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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * PRU-ICSS remoteproc driver for various TI SoCs
4 *
5 * Copyright (C) 2014-2022 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 * Author(s):
8 * Suman Anna <s-anna@ti.com>
9 * Andrew F. Davis <afd@ti.com>
10 * Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> for Texas Instruments
11 * Puranjay Mohan <p-mohan@ti.com>
12 * Md Danish Anwar <danishanwar@ti.com>
13 */
14
15#include <linux/bitops.h>
16#include <linux/debugfs.h>
17#include <linux/irqdomain.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_irq.h>
21#include <linux/platform_device.h>
22#include <linux/remoteproc/pruss.h>
23#include <linux/pruss_driver.h>
24#include <linux/remoteproc.h>
25
26#include "remoteproc_internal.h"
27#include "remoteproc_elf_helpers.h"
28#include "pru_rproc.h"
29
30/* PRU_ICSS_PRU_CTRL registers */
31#define PRU_CTRL_CTRL 0x0000
32#define PRU_CTRL_STS 0x0004
33#define PRU_CTRL_WAKEUP_EN 0x0008
34#define PRU_CTRL_CYCLE 0x000C
35#define PRU_CTRL_STALL 0x0010
36#define PRU_CTRL_CTBIR0 0x0020
37#define PRU_CTRL_CTBIR1 0x0024
38#define PRU_CTRL_CTPPR0 0x0028
39#define PRU_CTRL_CTPPR1 0x002C
40
41/* CTRL register bit-fields */
42#define CTRL_CTRL_SOFT_RST_N BIT(0)
43#define CTRL_CTRL_EN BIT(1)
44#define CTRL_CTRL_SLEEPING BIT(2)
45#define CTRL_CTRL_CTR_EN BIT(3)
46#define CTRL_CTRL_SINGLE_STEP BIT(8)
47#define CTRL_CTRL_RUNSTATE BIT(15)
48
49/* PRU_ICSS_PRU_DEBUG registers */
50#define PRU_DEBUG_GPREG(x) (0x0000 + (x) * 4)
51#define PRU_DEBUG_CT_REG(x) (0x0080 + (x) * 4)
52
53/* PRU/RTU/Tx_PRU Core IRAM address masks */
54#define PRU_IRAM_ADDR_MASK 0x3ffff
55#define PRU0_IRAM_ADDR_MASK 0x34000
56#define PRU1_IRAM_ADDR_MASK 0x38000
57#define RTU0_IRAM_ADDR_MASK 0x4000
58#define RTU1_IRAM_ADDR_MASK 0x6000
59#define TX_PRU0_IRAM_ADDR_MASK 0xa000
60#define TX_PRU1_IRAM_ADDR_MASK 0xc000
61
62/* PRU device addresses for various type of PRU RAMs */
63#define PRU_IRAM_DA 0 /* Instruction RAM */
64#define PRU_PDRAM_DA 0 /* Primary Data RAM */
65#define PRU_SDRAM_DA 0x2000 /* Secondary Data RAM */
66#define PRU_SHRDRAM_DA 0x10000 /* Shared Data RAM */
67
68#define MAX_PRU_SYS_EVENTS 160
69
70/**
71 * enum pru_iomem - PRU core memory/register range identifiers
72 *
73 * @PRU_IOMEM_IRAM: PRU Instruction RAM range
74 * @PRU_IOMEM_CTRL: PRU Control register range
75 * @PRU_IOMEM_DEBUG: PRU Debug register range
76 * @PRU_IOMEM_MAX: just keep this one at the end
77 */
78enum pru_iomem {
79 PRU_IOMEM_IRAM = 0,
80 PRU_IOMEM_CTRL,
81 PRU_IOMEM_DEBUG,
82 PRU_IOMEM_MAX,
83};
84
85/**
86 * struct pru_private_data - device data for a PRU core
87 * @type: type of the PRU core (PRU, RTU, Tx_PRU)
88 * @is_k3: flag used to identify the need for special load handling
89 */
90struct pru_private_data {
91 enum pru_type type;
92 unsigned int is_k3 : 1;
93};
94
95/**
96 * struct pru_rproc - PRU remoteproc structure
97 * @id: id of the PRU core within the PRUSS
98 * @dev: PRU core device pointer
99 * @pruss: back-reference to parent PRUSS structure
100 * @rproc: remoteproc pointer for this PRU core
101 * @data: PRU core specific data
102 * @mem_regions: data for each of the PRU memory regions
103 * @client_np: client device node
104 * @lock: mutex to protect client usage
105 * @fw_name: name of firmware image used during loading
106 * @mapped_irq: virtual interrupt numbers of created fw specific mapping
107 * @pru_interrupt_map: pointer to interrupt mapping description (firmware)
108 * @pru_interrupt_map_sz: pru_interrupt_map size
109 * @rmw_lock: lock for read, modify, write operations on registers
110 * @dbg_single_step: debug state variable to set PRU into single step mode
111 * @dbg_continuous: debug state variable to restore PRU execution mode
112 * @evt_count: number of mapped events
113 * @gpmux_save: saved value for gpmux config
114 */
115struct pru_rproc {
116 int id;
117 struct device *dev;
118 struct pruss *pruss;
119 struct rproc *rproc;
120 const struct pru_private_data *data;
121 struct pruss_mem_region mem_regions[PRU_IOMEM_MAX];
122 struct device_node *client_np;
123 struct mutex lock;
124 const char *fw_name;
125 unsigned int *mapped_irq;
126 struct pru_irq_rsc *pru_interrupt_map;
127 size_t pru_interrupt_map_sz;
128 spinlock_t rmw_lock;
129 u32 dbg_single_step;
130 u32 dbg_continuous;
131 u8 evt_count;
132 u8 gpmux_save;
133};
134
135static inline u32 pru_control_read_reg(struct pru_rproc *pru, unsigned int reg)
136{
137 return readl_relaxed(pru->mem_regions[PRU_IOMEM_CTRL].va + reg);
138}
139
140static inline
141void pru_control_write_reg(struct pru_rproc *pru, unsigned int reg, u32 val)
142{
143 writel_relaxed(val, pru->mem_regions[PRU_IOMEM_CTRL].va + reg);
144}
145
146static inline
147void pru_control_set_reg(struct pru_rproc *pru, unsigned int reg,
148 u32 mask, u32 set)
149{
150 u32 val;
151 unsigned long flags;
152
153 spin_lock_irqsave(&pru->rmw_lock, flags);
154
155 val = pru_control_read_reg(pru, reg);
156 val &= ~mask;
157 val |= (set & mask);
158 pru_control_write_reg(pru, reg, val);
159
160 spin_unlock_irqrestore(&pru->rmw_lock, flags);
161}
162
163/**
164 * pru_rproc_set_firmware() - set firmware for a PRU core
165 * @rproc: the rproc instance of the PRU
166 * @fw_name: the new firmware name, or NULL if default is desired
167 *
168 * Return: 0 on success, or errno in error case.
169 */
170static int pru_rproc_set_firmware(struct rproc *rproc, const char *fw_name)
171{
172 struct pru_rproc *pru = rproc->priv;
173
174 if (!fw_name)
175 fw_name = pru->fw_name;
176
177 return rproc_set_firmware(rproc, fw_name);
178}
179
180static struct rproc *__pru_rproc_get(struct device_node *np, int index)
181{
182 struct rproc *rproc;
183 phandle rproc_phandle;
184 int ret;
185
186 ret = of_property_read_u32_index(np, "ti,prus", index, &rproc_phandle);
187 if (ret)
188 return ERR_PTR(ret);
189
190 rproc = rproc_get_by_phandle(rproc_phandle);
191 if (!rproc) {
192 ret = -EPROBE_DEFER;
193 return ERR_PTR(ret);
194 }
195
196 /* make sure it is PRU rproc */
197 if (!is_pru_rproc(rproc->dev.parent)) {
198 rproc_put(rproc);
199 return ERR_PTR(-ENODEV);
200 }
201
202 return rproc;
203}
204
205/**
206 * pru_rproc_get() - get the PRU rproc instance from a device node
207 * @np: the user/client device node
208 * @index: index to use for the ti,prus property
209 * @pru_id: optional pointer to return the PRU remoteproc processor id
210 *
211 * This function looks through a client device node's "ti,prus" property at
212 * index @index and returns the rproc handle for a valid PRU remote processor if
213 * found. The function allows only one user to own the PRU rproc resource at a
214 * time. Caller must call pru_rproc_put() when done with using the rproc, not
215 * required if the function returns a failure.
216 *
217 * When optional @pru_id pointer is passed the PRU remoteproc processor id is
218 * returned.
219 *
220 * Return: rproc handle on success, and an ERR_PTR on failure using one
221 * of the following error values
222 * -ENODEV if device is not found
223 * -EBUSY if PRU is already acquired by anyone
224 * -EPROBE_DEFER is PRU device is not probed yet
225 */
226struct rproc *pru_rproc_get(struct device_node *np, int index,
227 enum pruss_pru_id *pru_id)
228{
229 struct rproc *rproc;
230 struct pru_rproc *pru;
231 struct device *dev;
232 const char *fw_name;
233 int ret;
234 u32 mux;
235
236 rproc = __pru_rproc_get(np, index);
237 if (IS_ERR(rproc))
238 return rproc;
239
240 pru = rproc->priv;
241 dev = &rproc->dev;
242
243 mutex_lock(&pru->lock);
244
245 if (pru->client_np) {
246 mutex_unlock(&pru->lock);
247 ret = -EBUSY;
248 goto err_no_rproc_handle;
249 }
250
251 pru->client_np = np;
252 rproc->sysfs_read_only = true;
253
254 mutex_unlock(&pru->lock);
255
256 if (pru_id)
257 *pru_id = pru->id;
258
259 ret = pruss_cfg_get_gpmux(pru->pruss, pru->id, &pru->gpmux_save);
260 if (ret) {
261 dev_err(dev, "failed to get cfg gpmux: %d\n", ret);
262 goto err;
263 }
264
265 /* An error here is acceptable for backward compatibility */
266 ret = of_property_read_u32_index(np, "ti,pruss-gp-mux-sel", index,
267 &mux);
268 if (!ret) {
269 ret = pruss_cfg_set_gpmux(pru->pruss, pru->id, mux);
270 if (ret) {
271 dev_err(dev, "failed to set cfg gpmux: %d\n", ret);
272 goto err;
273 }
274 }
275
276 ret = of_property_read_string_index(np, "firmware-name", index,
277 &fw_name);
278 if (!ret) {
279 ret = pru_rproc_set_firmware(rproc, fw_name);
280 if (ret) {
281 dev_err(dev, "failed to set firmware: %d\n", ret);
282 goto err;
283 }
284 }
285
286 return rproc;
287
288err_no_rproc_handle:
289 rproc_put(rproc);
290 return ERR_PTR(ret);
291
292err:
293 pru_rproc_put(rproc);
294 return ERR_PTR(ret);
295}
296EXPORT_SYMBOL_GPL(pru_rproc_get);
297
298/**
299 * pru_rproc_put() - release the PRU rproc resource
300 * @rproc: the rproc resource to release
301 *
302 * Releases the PRU rproc resource and makes it available to other
303 * users.
304 */
305void pru_rproc_put(struct rproc *rproc)
306{
307 struct pru_rproc *pru;
308
309 if (IS_ERR_OR_NULL(rproc) || !is_pru_rproc(rproc->dev.parent))
310 return;
311
312 pru = rproc->priv;
313
314 pruss_cfg_set_gpmux(pru->pruss, pru->id, pru->gpmux_save);
315
316 pru_rproc_set_firmware(rproc, NULL);
317
318 mutex_lock(&pru->lock);
319
320 if (!pru->client_np) {
321 mutex_unlock(&pru->lock);
322 return;
323 }
324
325 pru->client_np = NULL;
326 rproc->sysfs_read_only = false;
327 mutex_unlock(&pru->lock);
328
329 rproc_put(rproc);
330}
331EXPORT_SYMBOL_GPL(pru_rproc_put);
332
333/**
334 * pru_rproc_set_ctable() - set the constant table index for the PRU
335 * @rproc: the rproc instance of the PRU
336 * @c: constant table index to set
337 * @addr: physical address to set it to
338 *
339 * Return: 0 on success, or errno in error case.
340 */
341int pru_rproc_set_ctable(struct rproc *rproc, enum pru_ctable_idx c, u32 addr)
342{
343 struct pru_rproc *pru = rproc->priv;
344 unsigned int reg;
345 u32 mask, set;
346 u16 idx;
347 u16 idx_mask;
348
349 if (IS_ERR_OR_NULL(rproc))
350 return -EINVAL;
351
352 if (!rproc->dev.parent || !is_pru_rproc(rproc->dev.parent))
353 return -ENODEV;
354
355 /* pointer is 16 bit and index is 8-bit so mask out the rest */
356 idx_mask = (c >= PRU_C28) ? 0xFFFF : 0xFF;
357
358 /* ctable uses bit 8 and upwards only */
359 idx = (addr >> 8) & idx_mask;
360
361 /* configurable ctable (i.e. C24) starts at PRU_CTRL_CTBIR0 */
362 reg = PRU_CTRL_CTBIR0 + 4 * (c >> 1);
363 mask = idx_mask << (16 * (c & 1));
364 set = idx << (16 * (c & 1));
365
366 pru_control_set_reg(pru, reg, mask, set);
367
368 return 0;
369}
370EXPORT_SYMBOL_GPL(pru_rproc_set_ctable);
371
372static inline u32 pru_debug_read_reg(struct pru_rproc *pru, unsigned int reg)
373{
374 return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg);
375}
376
377static int regs_show(struct seq_file *s, void *data)
378{
379 struct rproc *rproc = s->private;
380 struct pru_rproc *pru = rproc->priv;
381 int i, nregs = 32;
382 u32 pru_sts;
383 int pru_is_running;
384
385 seq_puts(s, "============== Control Registers ==============\n");
386 seq_printf(s, "CTRL := 0x%08x\n",
387 pru_control_read_reg(pru, PRU_CTRL_CTRL));
388 pru_sts = pru_control_read_reg(pru, PRU_CTRL_STS);
389 seq_printf(s, "STS (PC) := 0x%08x (0x%08x)\n", pru_sts, pru_sts << 2);
390 seq_printf(s, "WAKEUP_EN := 0x%08x\n",
391 pru_control_read_reg(pru, PRU_CTRL_WAKEUP_EN));
392 seq_printf(s, "CYCLE := 0x%08x\n",
393 pru_control_read_reg(pru, PRU_CTRL_CYCLE));
394 seq_printf(s, "STALL := 0x%08x\n",
395 pru_control_read_reg(pru, PRU_CTRL_STALL));
396 seq_printf(s, "CTBIR0 := 0x%08x\n",
397 pru_control_read_reg(pru, PRU_CTRL_CTBIR0));
398 seq_printf(s, "CTBIR1 := 0x%08x\n",
399 pru_control_read_reg(pru, PRU_CTRL_CTBIR1));
400 seq_printf(s, "CTPPR0 := 0x%08x\n",
401 pru_control_read_reg(pru, PRU_CTRL_CTPPR0));
402 seq_printf(s, "CTPPR1 := 0x%08x\n",
403 pru_control_read_reg(pru, PRU_CTRL_CTPPR1));
404
405 seq_puts(s, "=============== Debug Registers ===============\n");
406 pru_is_running = pru_control_read_reg(pru, PRU_CTRL_CTRL) &
407 CTRL_CTRL_RUNSTATE;
408 if (pru_is_running) {
409 seq_puts(s, "PRU is executing, cannot print/access debug registers.\n");
410 return 0;
411 }
412
413 for (i = 0; i < nregs; i++) {
414 seq_printf(s, "GPREG%-2d := 0x%08x\tCT_REG%-2d := 0x%08x\n",
415 i, pru_debug_read_reg(pru, PRU_DEBUG_GPREG(i)),
416 i, pru_debug_read_reg(pru, PRU_DEBUG_CT_REG(i)));
417 }
418
419 return 0;
420}
421DEFINE_SHOW_ATTRIBUTE(regs);
422
423/*
424 * Control PRU single-step mode
425 *
426 * This is a debug helper function used for controlling the single-step
427 * mode of the PRU. The PRU Debug registers are not accessible when the
428 * PRU is in RUNNING state.
429 *
430 * Writing a non-zero value sets the PRU into single-step mode irrespective
431 * of its previous state. The PRU mode is saved only on the first set into
432 * a single-step mode. Writing a zero value will restore the PRU into its
433 * original mode.
434 */
435static int pru_rproc_debug_ss_set(void *data, u64 val)
436{
437 struct rproc *rproc = data;
438 struct pru_rproc *pru = rproc->priv;
439 u32 reg_val;
440
441 val = val ? 1 : 0;
442 if (!val && !pru->dbg_single_step)
443 return 0;
444
445 reg_val = pru_control_read_reg(pru, PRU_CTRL_CTRL);
446
447 if (val && !pru->dbg_single_step)
448 pru->dbg_continuous = reg_val;
449
450 if (val)
451 reg_val |= CTRL_CTRL_SINGLE_STEP | CTRL_CTRL_EN;
452 else
453 reg_val = pru->dbg_continuous;
454
455 pru->dbg_single_step = val;
456 pru_control_write_reg(pru, PRU_CTRL_CTRL, reg_val);
457
458 return 0;
459}
460
461static int pru_rproc_debug_ss_get(void *data, u64 *val)
462{
463 struct rproc *rproc = data;
464 struct pru_rproc *pru = rproc->priv;
465
466 *val = pru->dbg_single_step;
467
468 return 0;
469}
470DEFINE_DEBUGFS_ATTRIBUTE(pru_rproc_debug_ss_fops, pru_rproc_debug_ss_get,
471 pru_rproc_debug_ss_set, "%llu\n");
472
473/*
474 * Create PRU-specific debugfs entries
475 *
476 * The entries are created only if the parent remoteproc debugfs directory
477 * exists, and will be cleaned up by the remoteproc core.
478 */
479static void pru_rproc_create_debug_entries(struct rproc *rproc)
480{
481 if (!rproc->dbg_dir)
482 return;
483
484 debugfs_create_file("regs", 0400, rproc->dbg_dir,
485 rproc, ®s_fops);
486 debugfs_create_file("single_step", 0600, rproc->dbg_dir,
487 rproc, &pru_rproc_debug_ss_fops);
488}
489
490static void pru_dispose_irq_mapping(struct pru_rproc *pru)
491{
492 if (!pru->mapped_irq)
493 return;
494
495 while (pru->evt_count) {
496 pru->evt_count--;
497 if (pru->mapped_irq[pru->evt_count] > 0)
498 irq_dispose_mapping(pru->mapped_irq[pru->evt_count]);
499 }
500
501 kfree(pru->mapped_irq);
502 pru->mapped_irq = NULL;
503}
504
505/*
506 * Parse the custom PRU interrupt map resource and configure the INTC
507 * appropriately.
508 */
509static int pru_handle_intrmap(struct rproc *rproc)
510{
511 struct device *dev = rproc->dev.parent;
512 struct pru_rproc *pru = rproc->priv;
513 struct pru_irq_rsc *rsc = pru->pru_interrupt_map;
514 struct irq_fwspec fwspec;
515 struct device_node *parent, *irq_parent;
516 int i, ret = 0;
517
518 /* not having pru_interrupt_map is not an error */
519 if (!rsc)
520 return 0;
521
522 /* currently supporting only type 0 */
523 if (rsc->type != 0) {
524 dev_err(dev, "unsupported rsc type: %d\n", rsc->type);
525 return -EINVAL;
526 }
527
528 if (rsc->num_evts > MAX_PRU_SYS_EVENTS)
529 return -EINVAL;
530
531 if (sizeof(*rsc) + rsc->num_evts * sizeof(struct pruss_int_map) !=
532 pru->pru_interrupt_map_sz)
533 return -EINVAL;
534
535 pru->evt_count = rsc->num_evts;
536 pru->mapped_irq = kcalloc(pru->evt_count, sizeof(unsigned int),
537 GFP_KERNEL);
538 if (!pru->mapped_irq) {
539 pru->evt_count = 0;
540 return -ENOMEM;
541 }
542
543 /*
544 * parse and fill in system event to interrupt channel and
545 * channel-to-host mapping. The interrupt controller to be used
546 * for these mappings for a given PRU remoteproc is always its
547 * corresponding sibling PRUSS INTC node.
548 */
549 parent = of_get_parent(dev_of_node(pru->dev));
550 if (!parent) {
551 kfree(pru->mapped_irq);
552 pru->mapped_irq = NULL;
553 pru->evt_count = 0;
554 return -ENODEV;
555 }
556
557 irq_parent = of_get_child_by_name(parent, "interrupt-controller");
558 of_node_put(parent);
559 if (!irq_parent) {
560 kfree(pru->mapped_irq);
561 pru->mapped_irq = NULL;
562 pru->evt_count = 0;
563 return -ENODEV;
564 }
565
566 fwspec.fwnode = of_node_to_fwnode(irq_parent);
567 fwspec.param_count = 3;
568 for (i = 0; i < pru->evt_count; i++) {
569 fwspec.param[0] = rsc->pru_intc_map[i].event;
570 fwspec.param[1] = rsc->pru_intc_map[i].chnl;
571 fwspec.param[2] = rsc->pru_intc_map[i].host;
572
573 dev_dbg(dev, "mapping%d: event %d, chnl %d, host %d\n",
574 i, fwspec.param[0], fwspec.param[1], fwspec.param[2]);
575
576 pru->mapped_irq[i] = irq_create_fwspec_mapping(&fwspec);
577 if (!pru->mapped_irq[i]) {
578 dev_err(dev, "failed to get virq for fw mapping %d: event %d chnl %d host %d\n",
579 i, fwspec.param[0], fwspec.param[1],
580 fwspec.param[2]);
581 ret = -EINVAL;
582 goto map_fail;
583 }
584 }
585 of_node_put(irq_parent);
586
587 return ret;
588
589map_fail:
590 pru_dispose_irq_mapping(pru);
591 of_node_put(irq_parent);
592
593 return ret;
594}
595
596static int pru_rproc_start(struct rproc *rproc)
597{
598 struct device *dev = &rproc->dev;
599 struct pru_rproc *pru = rproc->priv;
600 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" };
601 u32 val;
602 int ret;
603
604 dev_dbg(dev, "starting %s%d: entry-point = 0x%llx\n",
605 names[pru->data->type], pru->id, (rproc->bootaddr >> 2));
606
607 ret = pru_handle_intrmap(rproc);
608 /*
609 * reset references to pru interrupt map - they will stop being valid
610 * after rproc_start returns
611 */
612 pru->pru_interrupt_map = NULL;
613 pru->pru_interrupt_map_sz = 0;
614 if (ret)
615 return ret;
616
617 val = CTRL_CTRL_EN | ((rproc->bootaddr >> 2) << 16);
618 pru_control_write_reg(pru, PRU_CTRL_CTRL, val);
619
620 return 0;
621}
622
623static int pru_rproc_stop(struct rproc *rproc)
624{
625 struct device *dev = &rproc->dev;
626 struct pru_rproc *pru = rproc->priv;
627 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" };
628 u32 val;
629
630 dev_dbg(dev, "stopping %s%d\n", names[pru->data->type], pru->id);
631
632 val = pru_control_read_reg(pru, PRU_CTRL_CTRL);
633 val &= ~CTRL_CTRL_EN;
634 pru_control_write_reg(pru, PRU_CTRL_CTRL, val);
635
636 /* dispose irq mapping - new firmware can provide new mapping */
637 pru_dispose_irq_mapping(pru);
638
639 return 0;
640}
641
642/*
643 * Convert PRU device address (data spaces only) to kernel virtual address.
644 *
645 * Each PRU has access to all data memories within the PRUSS, accessible at
646 * different ranges. So, look through both its primary and secondary Data
647 * RAMs as well as any shared Data RAM to convert a PRU device address to
648 * kernel virtual address. Data RAM0 is primary Data RAM for PRU0 and Data
649 * RAM1 is primary Data RAM for PRU1.
650 */
651static void *pru_d_da_to_va(struct pru_rproc *pru, u32 da, size_t len)
652{
653 struct pruss_mem_region dram0, dram1, shrd_ram;
654 struct pruss *pruss = pru->pruss;
655 u32 offset;
656 void *va = NULL;
657
658 if (len == 0)
659 return NULL;
660
661 dram0 = pruss->mem_regions[PRUSS_MEM_DRAM0];
662 dram1 = pruss->mem_regions[PRUSS_MEM_DRAM1];
663 /* PRU1 has its local RAM addresses reversed */
664 if (pru->id == PRUSS_PRU1)
665 swap(dram0, dram1);
666 shrd_ram = pruss->mem_regions[PRUSS_MEM_SHRD_RAM2];
667
668 if (da + len <= PRU_PDRAM_DA + dram0.size) {
669 offset = da - PRU_PDRAM_DA;
670 va = (__force void *)(dram0.va + offset);
671 } else if (da >= PRU_SDRAM_DA &&
672 da + len <= PRU_SDRAM_DA + dram1.size) {
673 offset = da - PRU_SDRAM_DA;
674 va = (__force void *)(dram1.va + offset);
675 } else if (da >= PRU_SHRDRAM_DA &&
676 da + len <= PRU_SHRDRAM_DA + shrd_ram.size) {
677 offset = da - PRU_SHRDRAM_DA;
678 va = (__force void *)(shrd_ram.va + offset);
679 }
680
681 return va;
682}
683
684/*
685 * Convert PRU device address (instruction space) to kernel virtual address.
686 *
687 * A PRU does not have an unified address space. Each PRU has its very own
688 * private Instruction RAM, and its device address is identical to that of
689 * its primary Data RAM device address.
690 */
691static void *pru_i_da_to_va(struct pru_rproc *pru, u32 da, size_t len)
692{
693 u32 offset;
694 void *va = NULL;
695
696 if (len == 0)
697 return NULL;
698
699 /*
700 * GNU binutils do not support multiple address spaces. The GNU
701 * linker's default linker script places IRAM at an arbitrary high
702 * offset, in order to differentiate it from DRAM. Hence we need to
703 * strip the artificial offset in the IRAM addresses coming from the
704 * ELF file.
705 *
706 * The TI proprietary linker would never set those higher IRAM address
707 * bits anyway. PRU architecture limits the program counter to 16-bit
708 * word-address range. This in turn corresponds to 18-bit IRAM
709 * byte-address range for ELF.
710 *
711 * Two more bits are added just in case to make the final 20-bit mask.
712 * Idea is to have a safeguard in case TI decides to add banking
713 * in future SoCs.
714 */
715 da &= 0xfffff;
716
717 if (da + len <= PRU_IRAM_DA + pru->mem_regions[PRU_IOMEM_IRAM].size) {
718 offset = da - PRU_IRAM_DA;
719 va = (__force void *)(pru->mem_regions[PRU_IOMEM_IRAM].va +
720 offset);
721 }
722
723 return va;
724}
725
726/*
727 * Provide address translations for only PRU Data RAMs through the remoteproc
728 * core for any PRU client drivers. The PRU Instruction RAM access is restricted
729 * only to the PRU loader code.
730 */
731static void *pru_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
732{
733 struct pru_rproc *pru = rproc->priv;
734
735 return pru_d_da_to_va(pru, da, len);
736}
737
738/* PRU-specific address translator used by PRU loader. */
739static void *pru_da_to_va(struct rproc *rproc, u64 da, size_t len, bool is_iram)
740{
741 struct pru_rproc *pru = rproc->priv;
742 void *va;
743
744 if (is_iram)
745 va = pru_i_da_to_va(pru, da, len);
746 else
747 va = pru_d_da_to_va(pru, da, len);
748
749 return va;
750}
751
752static struct rproc_ops pru_rproc_ops = {
753 .start = pru_rproc_start,
754 .stop = pru_rproc_stop,
755 .da_to_va = pru_rproc_da_to_va,
756};
757
758/*
759 * Custom memory copy implementation for ICSSG PRU/RTU/Tx_PRU Cores
760 *
761 * The ICSSG PRU/RTU/Tx_PRU cores have a memory copying issue with IRAM
762 * memories, that is not seen on previous generation SoCs. The data is reflected
763 * properly in the IRAM memories only for integer (4-byte) copies. Any unaligned
764 * copies result in all the other pre-existing bytes zeroed out within that
765 * 4-byte boundary, thereby resulting in wrong text/code in the IRAMs. Also, the
766 * IRAM memory port interface does not allow any 8-byte copies (as commonly used
767 * by ARM64 memcpy implementation) and throws an exception. The DRAM memory
768 * ports do not show this behavior.
769 */
770static int pru_rproc_memcpy(void *dest, const void *src, size_t count)
771{
772 const u32 *s = src;
773 u32 *d = dest;
774 size_t size = count / 4;
775 u32 *tmp_src = NULL;
776
777 /*
778 * TODO: relax limitation of 4-byte aligned dest addresses and copy
779 * sizes
780 */
781 if ((long)dest % 4 || count % 4)
782 return -EINVAL;
783
784 /* src offsets in ELF firmware image can be non-aligned */
785 if ((long)src % 4) {
786 tmp_src = kmemdup(src, count, GFP_KERNEL);
787 if (!tmp_src)
788 return -ENOMEM;
789 s = tmp_src;
790 }
791
792 while (size--)
793 *d++ = *s++;
794
795 kfree(tmp_src);
796
797 return 0;
798}
799
800static int
801pru_rproc_load_elf_segments(struct rproc *rproc, const struct firmware *fw)
802{
803 struct pru_rproc *pru = rproc->priv;
804 struct device *dev = &rproc->dev;
805 struct elf32_hdr *ehdr;
806 struct elf32_phdr *phdr;
807 int i, ret = 0;
808 const u8 *elf_data = fw->data;
809
810 ehdr = (struct elf32_hdr *)elf_data;
811 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
812
813 /* go through the available ELF segments */
814 for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
815 u32 da = phdr->p_paddr;
816 u32 memsz = phdr->p_memsz;
817 u32 filesz = phdr->p_filesz;
818 u32 offset = phdr->p_offset;
819 bool is_iram;
820 void *ptr;
821
822 if (phdr->p_type != PT_LOAD || !filesz)
823 continue;
824
825 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
826 phdr->p_type, da, memsz, filesz);
827
828 if (filesz > memsz) {
829 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
830 filesz, memsz);
831 ret = -EINVAL;
832 break;
833 }
834
835 if (offset + filesz > fw->size) {
836 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
837 offset + filesz, fw->size);
838 ret = -EINVAL;
839 break;
840 }
841
842 /* grab the kernel address for this device address */
843 is_iram = phdr->p_flags & PF_X;
844 ptr = pru_da_to_va(rproc, da, memsz, is_iram);
845 if (!ptr) {
846 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
847 ret = -EINVAL;
848 break;
849 }
850
851 if (pru->data->is_k3) {
852 ret = pru_rproc_memcpy(ptr, elf_data + phdr->p_offset,
853 filesz);
854 if (ret) {
855 dev_err(dev, "PRU memory copy failed for da 0x%x memsz 0x%x\n",
856 da, memsz);
857 break;
858 }
859 } else {
860 memcpy(ptr, elf_data + phdr->p_offset, filesz);
861 }
862
863 /* skip the memzero logic performed by remoteproc ELF loader */
864 }
865
866 return ret;
867}
868
869static const void *
870pru_rproc_find_interrupt_map(struct device *dev, const struct firmware *fw)
871{
872 struct elf32_shdr *shdr, *name_table_shdr;
873 const char *name_table;
874 const u8 *elf_data = fw->data;
875 struct elf32_hdr *ehdr = (struct elf32_hdr *)elf_data;
876 u16 shnum = ehdr->e_shnum;
877 u16 shstrndx = ehdr->e_shstrndx;
878 int i;
879
880 /* first, get the section header */
881 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff);
882 /* compute name table section header entry in shdr array */
883 name_table_shdr = shdr + shstrndx;
884 /* finally, compute the name table section address in elf */
885 name_table = elf_data + name_table_shdr->sh_offset;
886
887 for (i = 0; i < shnum; i++, shdr++) {
888 u32 size = shdr->sh_size;
889 u32 offset = shdr->sh_offset;
890 u32 name = shdr->sh_name;
891
892 if (strcmp(name_table + name, ".pru_irq_map"))
893 continue;
894
895 /* make sure we have the entire irq map */
896 if (offset + size > fw->size || offset + size < size) {
897 dev_err(dev, ".pru_irq_map section truncated\n");
898 return ERR_PTR(-EINVAL);
899 }
900
901 /* make sure irq map has at least the header */
902 if (sizeof(struct pru_irq_rsc) > size) {
903 dev_err(dev, "header-less .pru_irq_map section\n");
904 return ERR_PTR(-EINVAL);
905 }
906
907 return shdr;
908 }
909
910 dev_dbg(dev, "no .pru_irq_map section found for this fw\n");
911
912 return NULL;
913}
914
915/*
916 * Use a custom parse_fw callback function for dealing with PRU firmware
917 * specific sections.
918 *
919 * The firmware blob can contain optional ELF sections: .resource_table section
920 * and .pru_irq_map one. The second one contains the PRUSS interrupt mapping
921 * description, which needs to be setup before powering on the PRU core. To
922 * avoid RAM wastage this ELF section is not mapped to any ELF segment (by the
923 * firmware linker) and therefore is not loaded to PRU memory.
924 */
925static int pru_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
926{
927 struct device *dev = &rproc->dev;
928 struct pru_rproc *pru = rproc->priv;
929 const u8 *elf_data = fw->data;
930 const void *shdr;
931 u8 class = fw_elf_get_class(fw);
932 u64 sh_offset;
933 int ret;
934
935 /* load optional rsc table */
936 ret = rproc_elf_load_rsc_table(rproc, fw);
937 if (ret == -EINVAL)
938 dev_dbg(&rproc->dev, "no resource table found for this fw\n");
939 else if (ret)
940 return ret;
941
942 /* find .pru_interrupt_map section, not having it is not an error */
943 shdr = pru_rproc_find_interrupt_map(dev, fw);
944 if (IS_ERR(shdr))
945 return PTR_ERR(shdr);
946
947 if (!shdr)
948 return 0;
949
950 /* preserve pointer to PRU interrupt map together with it size */
951 sh_offset = elf_shdr_get_sh_offset(class, shdr);
952 pru->pru_interrupt_map = (struct pru_irq_rsc *)(elf_data + sh_offset);
953 pru->pru_interrupt_map_sz = elf_shdr_get_sh_size(class, shdr);
954
955 return 0;
956}
957
958/*
959 * Compute PRU id based on the IRAM addresses. The PRU IRAMs are
960 * always at a particular offset within the PRUSS address space.
961 */
962static int pru_rproc_set_id(struct pru_rproc *pru)
963{
964 int ret = 0;
965
966 switch (pru->mem_regions[PRU_IOMEM_IRAM].pa & PRU_IRAM_ADDR_MASK) {
967 case TX_PRU0_IRAM_ADDR_MASK:
968 fallthrough;
969 case RTU0_IRAM_ADDR_MASK:
970 fallthrough;
971 case PRU0_IRAM_ADDR_MASK:
972 pru->id = PRUSS_PRU0;
973 break;
974 case TX_PRU1_IRAM_ADDR_MASK:
975 fallthrough;
976 case RTU1_IRAM_ADDR_MASK:
977 fallthrough;
978 case PRU1_IRAM_ADDR_MASK:
979 pru->id = PRUSS_PRU1;
980 break;
981 default:
982 ret = -EINVAL;
983 }
984
985 return ret;
986}
987
988static int pru_rproc_probe(struct platform_device *pdev)
989{
990 struct device *dev = &pdev->dev;
991 struct device_node *np = dev->of_node;
992 struct platform_device *ppdev = to_platform_device(dev->parent);
993 struct pru_rproc *pru;
994 const char *fw_name;
995 struct rproc *rproc = NULL;
996 struct resource *res;
997 int i, ret;
998 const struct pru_private_data *data;
999 const char *mem_names[PRU_IOMEM_MAX] = { "iram", "control", "debug" };
1000
1001 data = of_device_get_match_data(&pdev->dev);
1002 if (!data)
1003 return -ENODEV;
1004
1005 ret = of_property_read_string(np, "firmware-name", &fw_name);
1006 if (ret) {
1007 dev_err(dev, "unable to retrieve firmware-name %d\n", ret);
1008 return ret;
1009 }
1010
1011 rproc = devm_rproc_alloc(dev, pdev->name, &pru_rproc_ops, fw_name,
1012 sizeof(*pru));
1013 if (!rproc) {
1014 dev_err(dev, "rproc_alloc failed\n");
1015 return -ENOMEM;
1016 }
1017 /* use a custom load function to deal with PRU-specific quirks */
1018 rproc->ops->load = pru_rproc_load_elf_segments;
1019
1020 /* use a custom parse function to deal with PRU-specific resources */
1021 rproc->ops->parse_fw = pru_rproc_parse_fw;
1022
1023 /* error recovery is not supported for PRUs */
1024 rproc->recovery_disabled = true;
1025
1026 /*
1027 * rproc_add will auto-boot the processor normally, but this is not
1028 * desired with PRU client driven boot-flow methodology. A PRU
1029 * application/client driver will boot the corresponding PRU
1030 * remote-processor as part of its state machine either through the
1031 * remoteproc sysfs interface or through the equivalent kernel API.
1032 */
1033 rproc->auto_boot = false;
1034
1035 pru = rproc->priv;
1036 pru->dev = dev;
1037 pru->data = data;
1038 pru->pruss = platform_get_drvdata(ppdev);
1039 pru->rproc = rproc;
1040 pru->fw_name = fw_name;
1041 pru->client_np = NULL;
1042 spin_lock_init(&pru->rmw_lock);
1043 mutex_init(&pru->lock);
1044
1045 for (i = 0; i < ARRAY_SIZE(mem_names); i++) {
1046 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1047 mem_names[i]);
1048 pru->mem_regions[i].va = devm_ioremap_resource(dev, res);
1049 if (IS_ERR(pru->mem_regions[i].va)) {
1050 dev_err(dev, "failed to parse and map memory resource %d %s\n",
1051 i, mem_names[i]);
1052 ret = PTR_ERR(pru->mem_regions[i].va);
1053 return ret;
1054 }
1055 pru->mem_regions[i].pa = res->start;
1056 pru->mem_regions[i].size = resource_size(res);
1057
1058 dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %pK\n",
1059 mem_names[i], &pru->mem_regions[i].pa,
1060 pru->mem_regions[i].size, pru->mem_regions[i].va);
1061 }
1062
1063 ret = pru_rproc_set_id(pru);
1064 if (ret < 0)
1065 return ret;
1066
1067 platform_set_drvdata(pdev, rproc);
1068
1069 ret = devm_rproc_add(dev, pru->rproc);
1070 if (ret) {
1071 dev_err(dev, "rproc_add failed: %d\n", ret);
1072 return ret;
1073 }
1074
1075 pru_rproc_create_debug_entries(rproc);
1076
1077 dev_dbg(dev, "PRU rproc node %pOF probed successfully\n", np);
1078
1079 return 0;
1080}
1081
1082static void pru_rproc_remove(struct platform_device *pdev)
1083{
1084 struct device *dev = &pdev->dev;
1085 struct rproc *rproc = platform_get_drvdata(pdev);
1086
1087 dev_dbg(dev, "%s: removing rproc %s\n", __func__, rproc->name);
1088}
1089
1090static const struct pru_private_data pru_data = {
1091 .type = PRU_TYPE_PRU,
1092};
1093
1094static const struct pru_private_data k3_pru_data = {
1095 .type = PRU_TYPE_PRU,
1096 .is_k3 = 1,
1097};
1098
1099static const struct pru_private_data k3_rtu_data = {
1100 .type = PRU_TYPE_RTU,
1101 .is_k3 = 1,
1102};
1103
1104static const struct pru_private_data k3_tx_pru_data = {
1105 .type = PRU_TYPE_TX_PRU,
1106 .is_k3 = 1,
1107};
1108
1109static const struct of_device_id pru_rproc_match[] = {
1110 { .compatible = "ti,am3356-pru", .data = &pru_data },
1111 { .compatible = "ti,am4376-pru", .data = &pru_data },
1112 { .compatible = "ti,am5728-pru", .data = &pru_data },
1113 { .compatible = "ti,am642-pru", .data = &k3_pru_data },
1114 { .compatible = "ti,am642-rtu", .data = &k3_rtu_data },
1115 { .compatible = "ti,am642-tx-pru", .data = &k3_tx_pru_data },
1116 { .compatible = "ti,k2g-pru", .data = &pru_data },
1117 { .compatible = "ti,am654-pru", .data = &k3_pru_data },
1118 { .compatible = "ti,am654-rtu", .data = &k3_rtu_data },
1119 { .compatible = "ti,am654-tx-pru", .data = &k3_tx_pru_data },
1120 { .compatible = "ti,j721e-pru", .data = &k3_pru_data },
1121 { .compatible = "ti,j721e-rtu", .data = &k3_rtu_data },
1122 { .compatible = "ti,j721e-tx-pru", .data = &k3_tx_pru_data },
1123 { .compatible = "ti,am625-pru", .data = &k3_pru_data },
1124 {},
1125};
1126MODULE_DEVICE_TABLE(of, pru_rproc_match);
1127
1128static struct platform_driver pru_rproc_driver = {
1129 .driver = {
1130 .name = PRU_RPROC_DRVNAME,
1131 .of_match_table = pru_rproc_match,
1132 .suppress_bind_attrs = true,
1133 },
1134 .probe = pru_rproc_probe,
1135 .remove_new = pru_rproc_remove,
1136};
1137module_platform_driver(pru_rproc_driver);
1138
1139MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");
1140MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
1141MODULE_AUTHOR("Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>");
1142MODULE_AUTHOR("Puranjay Mohan <p-mohan@ti.com>");
1143MODULE_AUTHOR("Md Danish Anwar <danishanwar@ti.com>");
1144MODULE_DESCRIPTION("PRU-ICSS Remote Processor Driver");
1145MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * PRU-ICSS remoteproc driver for various TI SoCs
4 *
5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 * Author(s):
8 * Suman Anna <s-anna@ti.com>
9 * Andrew F. Davis <afd@ti.com>
10 * Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> for Texas Instruments
11 */
12
13#include <linux/bitops.h>
14#include <linux/debugfs.h>
15#include <linux/irqdomain.h>
16#include <linux/module.h>
17#include <linux/of_device.h>
18#include <linux/of_irq.h>
19#include <linux/pruss_driver.h>
20#include <linux/remoteproc.h>
21
22#include "remoteproc_internal.h"
23#include "remoteproc_elf_helpers.h"
24#include "pru_rproc.h"
25
26/* PRU_ICSS_PRU_CTRL registers */
27#define PRU_CTRL_CTRL 0x0000
28#define PRU_CTRL_STS 0x0004
29#define PRU_CTRL_WAKEUP_EN 0x0008
30#define PRU_CTRL_CYCLE 0x000C
31#define PRU_CTRL_STALL 0x0010
32#define PRU_CTRL_CTBIR0 0x0020
33#define PRU_CTRL_CTBIR1 0x0024
34#define PRU_CTRL_CTPPR0 0x0028
35#define PRU_CTRL_CTPPR1 0x002C
36
37/* CTRL register bit-fields */
38#define CTRL_CTRL_SOFT_RST_N BIT(0)
39#define CTRL_CTRL_EN BIT(1)
40#define CTRL_CTRL_SLEEPING BIT(2)
41#define CTRL_CTRL_CTR_EN BIT(3)
42#define CTRL_CTRL_SINGLE_STEP BIT(8)
43#define CTRL_CTRL_RUNSTATE BIT(15)
44
45/* PRU_ICSS_PRU_DEBUG registers */
46#define PRU_DEBUG_GPREG(x) (0x0000 + (x) * 4)
47#define PRU_DEBUG_CT_REG(x) (0x0080 + (x) * 4)
48
49/* PRU/RTU/Tx_PRU Core IRAM address masks */
50#define PRU_IRAM_ADDR_MASK 0x3ffff
51#define PRU0_IRAM_ADDR_MASK 0x34000
52#define PRU1_IRAM_ADDR_MASK 0x38000
53#define RTU0_IRAM_ADDR_MASK 0x4000
54#define RTU1_IRAM_ADDR_MASK 0x6000
55#define TX_PRU0_IRAM_ADDR_MASK 0xa000
56#define TX_PRU1_IRAM_ADDR_MASK 0xc000
57
58/* PRU device addresses for various type of PRU RAMs */
59#define PRU_IRAM_DA 0 /* Instruction RAM */
60#define PRU_PDRAM_DA 0 /* Primary Data RAM */
61#define PRU_SDRAM_DA 0x2000 /* Secondary Data RAM */
62#define PRU_SHRDRAM_DA 0x10000 /* Shared Data RAM */
63
64#define MAX_PRU_SYS_EVENTS 160
65
66/**
67 * enum pru_iomem - PRU core memory/register range identifiers
68 *
69 * @PRU_IOMEM_IRAM: PRU Instruction RAM range
70 * @PRU_IOMEM_CTRL: PRU Control register range
71 * @PRU_IOMEM_DEBUG: PRU Debug register range
72 * @PRU_IOMEM_MAX: just keep this one at the end
73 */
74enum pru_iomem {
75 PRU_IOMEM_IRAM = 0,
76 PRU_IOMEM_CTRL,
77 PRU_IOMEM_DEBUG,
78 PRU_IOMEM_MAX,
79};
80
81/**
82 * enum pru_type - PRU core type identifier
83 *
84 * @PRU_TYPE_PRU: Programmable Real-time Unit
85 * @PRU_TYPE_RTU: Auxiliary Programmable Real-Time Unit
86 * @PRU_TYPE_TX_PRU: Transmit Programmable Real-Time Unit
87 * @PRU_TYPE_MAX: just keep this one at the end
88 */
89enum pru_type {
90 PRU_TYPE_PRU = 0,
91 PRU_TYPE_RTU,
92 PRU_TYPE_TX_PRU,
93 PRU_TYPE_MAX,
94};
95
96/**
97 * struct pru_private_data - device data for a PRU core
98 * @type: type of the PRU core (PRU, RTU, Tx_PRU)
99 * @is_k3: flag used to identify the need for special load handling
100 */
101struct pru_private_data {
102 enum pru_type type;
103 unsigned int is_k3 : 1;
104};
105
106/**
107 * struct pru_rproc - PRU remoteproc structure
108 * @id: id of the PRU core within the PRUSS
109 * @dev: PRU core device pointer
110 * @pruss: back-reference to parent PRUSS structure
111 * @rproc: remoteproc pointer for this PRU core
112 * @data: PRU core specific data
113 * @mem_regions: data for each of the PRU memory regions
114 * @fw_name: name of firmware image used during loading
115 * @mapped_irq: virtual interrupt numbers of created fw specific mapping
116 * @pru_interrupt_map: pointer to interrupt mapping description (firmware)
117 * @pru_interrupt_map_sz: pru_interrupt_map size
118 * @dbg_single_step: debug state variable to set PRU into single step mode
119 * @dbg_continuous: debug state variable to restore PRU execution mode
120 * @evt_count: number of mapped events
121 */
122struct pru_rproc {
123 int id;
124 struct device *dev;
125 struct pruss *pruss;
126 struct rproc *rproc;
127 const struct pru_private_data *data;
128 struct pruss_mem_region mem_regions[PRU_IOMEM_MAX];
129 const char *fw_name;
130 unsigned int *mapped_irq;
131 struct pru_irq_rsc *pru_interrupt_map;
132 size_t pru_interrupt_map_sz;
133 u32 dbg_single_step;
134 u32 dbg_continuous;
135 u8 evt_count;
136};
137
138static inline u32 pru_control_read_reg(struct pru_rproc *pru, unsigned int reg)
139{
140 return readl_relaxed(pru->mem_regions[PRU_IOMEM_CTRL].va + reg);
141}
142
143static inline
144void pru_control_write_reg(struct pru_rproc *pru, unsigned int reg, u32 val)
145{
146 writel_relaxed(val, pru->mem_regions[PRU_IOMEM_CTRL].va + reg);
147}
148
149static inline u32 pru_debug_read_reg(struct pru_rproc *pru, unsigned int reg)
150{
151 return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg);
152}
153
154static int regs_show(struct seq_file *s, void *data)
155{
156 struct rproc *rproc = s->private;
157 struct pru_rproc *pru = rproc->priv;
158 int i, nregs = 32;
159 u32 pru_sts;
160 int pru_is_running;
161
162 seq_puts(s, "============== Control Registers ==============\n");
163 seq_printf(s, "CTRL := 0x%08x\n",
164 pru_control_read_reg(pru, PRU_CTRL_CTRL));
165 pru_sts = pru_control_read_reg(pru, PRU_CTRL_STS);
166 seq_printf(s, "STS (PC) := 0x%08x (0x%08x)\n", pru_sts, pru_sts << 2);
167 seq_printf(s, "WAKEUP_EN := 0x%08x\n",
168 pru_control_read_reg(pru, PRU_CTRL_WAKEUP_EN));
169 seq_printf(s, "CYCLE := 0x%08x\n",
170 pru_control_read_reg(pru, PRU_CTRL_CYCLE));
171 seq_printf(s, "STALL := 0x%08x\n",
172 pru_control_read_reg(pru, PRU_CTRL_STALL));
173 seq_printf(s, "CTBIR0 := 0x%08x\n",
174 pru_control_read_reg(pru, PRU_CTRL_CTBIR0));
175 seq_printf(s, "CTBIR1 := 0x%08x\n",
176 pru_control_read_reg(pru, PRU_CTRL_CTBIR1));
177 seq_printf(s, "CTPPR0 := 0x%08x\n",
178 pru_control_read_reg(pru, PRU_CTRL_CTPPR0));
179 seq_printf(s, "CTPPR1 := 0x%08x\n",
180 pru_control_read_reg(pru, PRU_CTRL_CTPPR1));
181
182 seq_puts(s, "=============== Debug Registers ===============\n");
183 pru_is_running = pru_control_read_reg(pru, PRU_CTRL_CTRL) &
184 CTRL_CTRL_RUNSTATE;
185 if (pru_is_running) {
186 seq_puts(s, "PRU is executing, cannot print/access debug registers.\n");
187 return 0;
188 }
189
190 for (i = 0; i < nregs; i++) {
191 seq_printf(s, "GPREG%-2d := 0x%08x\tCT_REG%-2d := 0x%08x\n",
192 i, pru_debug_read_reg(pru, PRU_DEBUG_GPREG(i)),
193 i, pru_debug_read_reg(pru, PRU_DEBUG_CT_REG(i)));
194 }
195
196 return 0;
197}
198DEFINE_SHOW_ATTRIBUTE(regs);
199
200/*
201 * Control PRU single-step mode
202 *
203 * This is a debug helper function used for controlling the single-step
204 * mode of the PRU. The PRU Debug registers are not accessible when the
205 * PRU is in RUNNING state.
206 *
207 * Writing a non-zero value sets the PRU into single-step mode irrespective
208 * of its previous state. The PRU mode is saved only on the first set into
209 * a single-step mode. Writing a zero value will restore the PRU into its
210 * original mode.
211 */
212static int pru_rproc_debug_ss_set(void *data, u64 val)
213{
214 struct rproc *rproc = data;
215 struct pru_rproc *pru = rproc->priv;
216 u32 reg_val;
217
218 val = val ? 1 : 0;
219 if (!val && !pru->dbg_single_step)
220 return 0;
221
222 reg_val = pru_control_read_reg(pru, PRU_CTRL_CTRL);
223
224 if (val && !pru->dbg_single_step)
225 pru->dbg_continuous = reg_val;
226
227 if (val)
228 reg_val |= CTRL_CTRL_SINGLE_STEP | CTRL_CTRL_EN;
229 else
230 reg_val = pru->dbg_continuous;
231
232 pru->dbg_single_step = val;
233 pru_control_write_reg(pru, PRU_CTRL_CTRL, reg_val);
234
235 return 0;
236}
237
238static int pru_rproc_debug_ss_get(void *data, u64 *val)
239{
240 struct rproc *rproc = data;
241 struct pru_rproc *pru = rproc->priv;
242
243 *val = pru->dbg_single_step;
244
245 return 0;
246}
247DEFINE_DEBUGFS_ATTRIBUTE(pru_rproc_debug_ss_fops, pru_rproc_debug_ss_get,
248 pru_rproc_debug_ss_set, "%llu\n");
249
250/*
251 * Create PRU-specific debugfs entries
252 *
253 * The entries are created only if the parent remoteproc debugfs directory
254 * exists, and will be cleaned up by the remoteproc core.
255 */
256static void pru_rproc_create_debug_entries(struct rproc *rproc)
257{
258 if (!rproc->dbg_dir)
259 return;
260
261 debugfs_create_file("regs", 0400, rproc->dbg_dir,
262 rproc, ®s_fops);
263 debugfs_create_file("single_step", 0600, rproc->dbg_dir,
264 rproc, &pru_rproc_debug_ss_fops);
265}
266
267static void pru_dispose_irq_mapping(struct pru_rproc *pru)
268{
269 if (!pru->mapped_irq)
270 return;
271
272 while (pru->evt_count) {
273 pru->evt_count--;
274 if (pru->mapped_irq[pru->evt_count] > 0)
275 irq_dispose_mapping(pru->mapped_irq[pru->evt_count]);
276 }
277
278 kfree(pru->mapped_irq);
279 pru->mapped_irq = NULL;
280}
281
282/*
283 * Parse the custom PRU interrupt map resource and configure the INTC
284 * appropriately.
285 */
286static int pru_handle_intrmap(struct rproc *rproc)
287{
288 struct device *dev = rproc->dev.parent;
289 struct pru_rproc *pru = rproc->priv;
290 struct pru_irq_rsc *rsc = pru->pru_interrupt_map;
291 struct irq_fwspec fwspec;
292 struct device_node *parent, *irq_parent;
293 int i, ret = 0;
294
295 /* not having pru_interrupt_map is not an error */
296 if (!rsc)
297 return 0;
298
299 /* currently supporting only type 0 */
300 if (rsc->type != 0) {
301 dev_err(dev, "unsupported rsc type: %d\n", rsc->type);
302 return -EINVAL;
303 }
304
305 if (rsc->num_evts > MAX_PRU_SYS_EVENTS)
306 return -EINVAL;
307
308 if (sizeof(*rsc) + rsc->num_evts * sizeof(struct pruss_int_map) !=
309 pru->pru_interrupt_map_sz)
310 return -EINVAL;
311
312 pru->evt_count = rsc->num_evts;
313 pru->mapped_irq = kcalloc(pru->evt_count, sizeof(unsigned int),
314 GFP_KERNEL);
315 if (!pru->mapped_irq) {
316 pru->evt_count = 0;
317 return -ENOMEM;
318 }
319
320 /*
321 * parse and fill in system event to interrupt channel and
322 * channel-to-host mapping. The interrupt controller to be used
323 * for these mappings for a given PRU remoteproc is always its
324 * corresponding sibling PRUSS INTC node.
325 */
326 parent = of_get_parent(dev_of_node(pru->dev));
327 if (!parent) {
328 kfree(pru->mapped_irq);
329 pru->mapped_irq = NULL;
330 pru->evt_count = 0;
331 return -ENODEV;
332 }
333
334 irq_parent = of_get_child_by_name(parent, "interrupt-controller");
335 of_node_put(parent);
336 if (!irq_parent) {
337 kfree(pru->mapped_irq);
338 pru->mapped_irq = NULL;
339 pru->evt_count = 0;
340 return -ENODEV;
341 }
342
343 fwspec.fwnode = of_node_to_fwnode(irq_parent);
344 fwspec.param_count = 3;
345 for (i = 0; i < pru->evt_count; i++) {
346 fwspec.param[0] = rsc->pru_intc_map[i].event;
347 fwspec.param[1] = rsc->pru_intc_map[i].chnl;
348 fwspec.param[2] = rsc->pru_intc_map[i].host;
349
350 dev_dbg(dev, "mapping%d: event %d, chnl %d, host %d\n",
351 i, fwspec.param[0], fwspec.param[1], fwspec.param[2]);
352
353 pru->mapped_irq[i] = irq_create_fwspec_mapping(&fwspec);
354 if (!pru->mapped_irq[i]) {
355 dev_err(dev, "failed to get virq for fw mapping %d: event %d chnl %d host %d\n",
356 i, fwspec.param[0], fwspec.param[1],
357 fwspec.param[2]);
358 ret = -EINVAL;
359 goto map_fail;
360 }
361 }
362 of_node_put(irq_parent);
363
364 return ret;
365
366map_fail:
367 pru_dispose_irq_mapping(pru);
368 of_node_put(irq_parent);
369
370 return ret;
371}
372
373static int pru_rproc_start(struct rproc *rproc)
374{
375 struct device *dev = &rproc->dev;
376 struct pru_rproc *pru = rproc->priv;
377 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" };
378 u32 val;
379 int ret;
380
381 dev_dbg(dev, "starting %s%d: entry-point = 0x%llx\n",
382 names[pru->data->type], pru->id, (rproc->bootaddr >> 2));
383
384 ret = pru_handle_intrmap(rproc);
385 /*
386 * reset references to pru interrupt map - they will stop being valid
387 * after rproc_start returns
388 */
389 pru->pru_interrupt_map = NULL;
390 pru->pru_interrupt_map_sz = 0;
391 if (ret)
392 return ret;
393
394 val = CTRL_CTRL_EN | ((rproc->bootaddr >> 2) << 16);
395 pru_control_write_reg(pru, PRU_CTRL_CTRL, val);
396
397 return 0;
398}
399
400static int pru_rproc_stop(struct rproc *rproc)
401{
402 struct device *dev = &rproc->dev;
403 struct pru_rproc *pru = rproc->priv;
404 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" };
405 u32 val;
406
407 dev_dbg(dev, "stopping %s%d\n", names[pru->data->type], pru->id);
408
409 val = pru_control_read_reg(pru, PRU_CTRL_CTRL);
410 val &= ~CTRL_CTRL_EN;
411 pru_control_write_reg(pru, PRU_CTRL_CTRL, val);
412
413 /* dispose irq mapping - new firmware can provide new mapping */
414 pru_dispose_irq_mapping(pru);
415
416 return 0;
417}
418
419/*
420 * Convert PRU device address (data spaces only) to kernel virtual address.
421 *
422 * Each PRU has access to all data memories within the PRUSS, accessible at
423 * different ranges. So, look through both its primary and secondary Data
424 * RAMs as well as any shared Data RAM to convert a PRU device address to
425 * kernel virtual address. Data RAM0 is primary Data RAM for PRU0 and Data
426 * RAM1 is primary Data RAM for PRU1.
427 */
428static void *pru_d_da_to_va(struct pru_rproc *pru, u32 da, size_t len)
429{
430 struct pruss_mem_region dram0, dram1, shrd_ram;
431 struct pruss *pruss = pru->pruss;
432 u32 offset;
433 void *va = NULL;
434
435 if (len == 0)
436 return NULL;
437
438 dram0 = pruss->mem_regions[PRUSS_MEM_DRAM0];
439 dram1 = pruss->mem_regions[PRUSS_MEM_DRAM1];
440 /* PRU1 has its local RAM addresses reversed */
441 if (pru->id == 1)
442 swap(dram0, dram1);
443 shrd_ram = pruss->mem_regions[PRUSS_MEM_SHRD_RAM2];
444
445 if (da >= PRU_PDRAM_DA && da + len <= PRU_PDRAM_DA + dram0.size) {
446 offset = da - PRU_PDRAM_DA;
447 va = (__force void *)(dram0.va + offset);
448 } else if (da >= PRU_SDRAM_DA &&
449 da + len <= PRU_SDRAM_DA + dram1.size) {
450 offset = da - PRU_SDRAM_DA;
451 va = (__force void *)(dram1.va + offset);
452 } else if (da >= PRU_SHRDRAM_DA &&
453 da + len <= PRU_SHRDRAM_DA + shrd_ram.size) {
454 offset = da - PRU_SHRDRAM_DA;
455 va = (__force void *)(shrd_ram.va + offset);
456 }
457
458 return va;
459}
460
461/*
462 * Convert PRU device address (instruction space) to kernel virtual address.
463 *
464 * A PRU does not have an unified address space. Each PRU has its very own
465 * private Instruction RAM, and its device address is identical to that of
466 * its primary Data RAM device address.
467 */
468static void *pru_i_da_to_va(struct pru_rproc *pru, u32 da, size_t len)
469{
470 u32 offset;
471 void *va = NULL;
472
473 if (len == 0)
474 return NULL;
475
476 /*
477 * GNU binutils do not support multiple address spaces. The GNU
478 * linker's default linker script places IRAM at an arbitrary high
479 * offset, in order to differentiate it from DRAM. Hence we need to
480 * strip the artificial offset in the IRAM addresses coming from the
481 * ELF file.
482 *
483 * The TI proprietary linker would never set those higher IRAM address
484 * bits anyway. PRU architecture limits the program counter to 16-bit
485 * word-address range. This in turn corresponds to 18-bit IRAM
486 * byte-address range for ELF.
487 *
488 * Two more bits are added just in case to make the final 20-bit mask.
489 * Idea is to have a safeguard in case TI decides to add banking
490 * in future SoCs.
491 */
492 da &= 0xfffff;
493
494 if (da >= PRU_IRAM_DA &&
495 da + len <= PRU_IRAM_DA + pru->mem_regions[PRU_IOMEM_IRAM].size) {
496 offset = da - PRU_IRAM_DA;
497 va = (__force void *)(pru->mem_regions[PRU_IOMEM_IRAM].va +
498 offset);
499 }
500
501 return va;
502}
503
504/*
505 * Provide address translations for only PRU Data RAMs through the remoteproc
506 * core for any PRU client drivers. The PRU Instruction RAM access is restricted
507 * only to the PRU loader code.
508 */
509static void *pru_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
510{
511 struct pru_rproc *pru = rproc->priv;
512
513 return pru_d_da_to_va(pru, da, len);
514}
515
516/* PRU-specific address translator used by PRU loader. */
517static void *pru_da_to_va(struct rproc *rproc, u64 da, size_t len, bool is_iram)
518{
519 struct pru_rproc *pru = rproc->priv;
520 void *va;
521
522 if (is_iram)
523 va = pru_i_da_to_va(pru, da, len);
524 else
525 va = pru_d_da_to_va(pru, da, len);
526
527 return va;
528}
529
530static struct rproc_ops pru_rproc_ops = {
531 .start = pru_rproc_start,
532 .stop = pru_rproc_stop,
533 .da_to_va = pru_rproc_da_to_va,
534};
535
536/*
537 * Custom memory copy implementation for ICSSG PRU/RTU/Tx_PRU Cores
538 *
539 * The ICSSG PRU/RTU/Tx_PRU cores have a memory copying issue with IRAM
540 * memories, that is not seen on previous generation SoCs. The data is reflected
541 * properly in the IRAM memories only for integer (4-byte) copies. Any unaligned
542 * copies result in all the other pre-existing bytes zeroed out within that
543 * 4-byte boundary, thereby resulting in wrong text/code in the IRAMs. Also, the
544 * IRAM memory port interface does not allow any 8-byte copies (as commonly used
545 * by ARM64 memcpy implementation) and throws an exception. The DRAM memory
546 * ports do not show this behavior.
547 */
548static int pru_rproc_memcpy(void *dest, const void *src, size_t count)
549{
550 const u32 *s = src;
551 u32 *d = dest;
552 size_t size = count / 4;
553 u32 *tmp_src = NULL;
554
555 /*
556 * TODO: relax limitation of 4-byte aligned dest addresses and copy
557 * sizes
558 */
559 if ((long)dest % 4 || count % 4)
560 return -EINVAL;
561
562 /* src offsets in ELF firmware image can be non-aligned */
563 if ((long)src % 4) {
564 tmp_src = kmemdup(src, count, GFP_KERNEL);
565 if (!tmp_src)
566 return -ENOMEM;
567 s = tmp_src;
568 }
569
570 while (size--)
571 *d++ = *s++;
572
573 kfree(tmp_src);
574
575 return 0;
576}
577
578static int
579pru_rproc_load_elf_segments(struct rproc *rproc, const struct firmware *fw)
580{
581 struct pru_rproc *pru = rproc->priv;
582 struct device *dev = &rproc->dev;
583 struct elf32_hdr *ehdr;
584 struct elf32_phdr *phdr;
585 int i, ret = 0;
586 const u8 *elf_data = fw->data;
587
588 ehdr = (struct elf32_hdr *)elf_data;
589 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
590
591 /* go through the available ELF segments */
592 for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
593 u32 da = phdr->p_paddr;
594 u32 memsz = phdr->p_memsz;
595 u32 filesz = phdr->p_filesz;
596 u32 offset = phdr->p_offset;
597 bool is_iram;
598 void *ptr;
599
600 if (phdr->p_type != PT_LOAD || !filesz)
601 continue;
602
603 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
604 phdr->p_type, da, memsz, filesz);
605
606 if (filesz > memsz) {
607 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
608 filesz, memsz);
609 ret = -EINVAL;
610 break;
611 }
612
613 if (offset + filesz > fw->size) {
614 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
615 offset + filesz, fw->size);
616 ret = -EINVAL;
617 break;
618 }
619
620 /* grab the kernel address for this device address */
621 is_iram = phdr->p_flags & PF_X;
622 ptr = pru_da_to_va(rproc, da, memsz, is_iram);
623 if (!ptr) {
624 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
625 ret = -EINVAL;
626 break;
627 }
628
629 if (pru->data->is_k3) {
630 ret = pru_rproc_memcpy(ptr, elf_data + phdr->p_offset,
631 filesz);
632 if (ret) {
633 dev_err(dev, "PRU memory copy failed for da 0x%x memsz 0x%x\n",
634 da, memsz);
635 break;
636 }
637 } else {
638 memcpy(ptr, elf_data + phdr->p_offset, filesz);
639 }
640
641 /* skip the memzero logic performed by remoteproc ELF loader */
642 }
643
644 return ret;
645}
646
647static const void *
648pru_rproc_find_interrupt_map(struct device *dev, const struct firmware *fw)
649{
650 struct elf32_shdr *shdr, *name_table_shdr;
651 const char *name_table;
652 const u8 *elf_data = fw->data;
653 struct elf32_hdr *ehdr = (struct elf32_hdr *)elf_data;
654 u16 shnum = ehdr->e_shnum;
655 u16 shstrndx = ehdr->e_shstrndx;
656 int i;
657
658 /* first, get the section header */
659 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff);
660 /* compute name table section header entry in shdr array */
661 name_table_shdr = shdr + shstrndx;
662 /* finally, compute the name table section address in elf */
663 name_table = elf_data + name_table_shdr->sh_offset;
664
665 for (i = 0; i < shnum; i++, shdr++) {
666 u32 size = shdr->sh_size;
667 u32 offset = shdr->sh_offset;
668 u32 name = shdr->sh_name;
669
670 if (strcmp(name_table + name, ".pru_irq_map"))
671 continue;
672
673 /* make sure we have the entire irq map */
674 if (offset + size > fw->size || offset + size < size) {
675 dev_err(dev, ".pru_irq_map section truncated\n");
676 return ERR_PTR(-EINVAL);
677 }
678
679 /* make sure irq map has at least the header */
680 if (sizeof(struct pru_irq_rsc) > size) {
681 dev_err(dev, "header-less .pru_irq_map section\n");
682 return ERR_PTR(-EINVAL);
683 }
684
685 return shdr;
686 }
687
688 dev_dbg(dev, "no .pru_irq_map section found for this fw\n");
689
690 return NULL;
691}
692
693/*
694 * Use a custom parse_fw callback function for dealing with PRU firmware
695 * specific sections.
696 *
697 * The firmware blob can contain optional ELF sections: .resource_table section
698 * and .pru_irq_map one. The second one contains the PRUSS interrupt mapping
699 * description, which needs to be setup before powering on the PRU core. To
700 * avoid RAM wastage this ELF section is not mapped to any ELF segment (by the
701 * firmware linker) and therefore is not loaded to PRU memory.
702 */
703static int pru_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
704{
705 struct device *dev = &rproc->dev;
706 struct pru_rproc *pru = rproc->priv;
707 const u8 *elf_data = fw->data;
708 const void *shdr;
709 u8 class = fw_elf_get_class(fw);
710 u64 sh_offset;
711 int ret;
712
713 /* load optional rsc table */
714 ret = rproc_elf_load_rsc_table(rproc, fw);
715 if (ret == -EINVAL)
716 dev_dbg(&rproc->dev, "no resource table found for this fw\n");
717 else if (ret)
718 return ret;
719
720 /* find .pru_interrupt_map section, not having it is not an error */
721 shdr = pru_rproc_find_interrupt_map(dev, fw);
722 if (IS_ERR(shdr))
723 return PTR_ERR(shdr);
724
725 if (!shdr)
726 return 0;
727
728 /* preserve pointer to PRU interrupt map together with it size */
729 sh_offset = elf_shdr_get_sh_offset(class, shdr);
730 pru->pru_interrupt_map = (struct pru_irq_rsc *)(elf_data + sh_offset);
731 pru->pru_interrupt_map_sz = elf_shdr_get_sh_size(class, shdr);
732
733 return 0;
734}
735
736/*
737 * Compute PRU id based on the IRAM addresses. The PRU IRAMs are
738 * always at a particular offset within the PRUSS address space.
739 */
740static int pru_rproc_set_id(struct pru_rproc *pru)
741{
742 int ret = 0;
743
744 switch (pru->mem_regions[PRU_IOMEM_IRAM].pa & PRU_IRAM_ADDR_MASK) {
745 case TX_PRU0_IRAM_ADDR_MASK:
746 fallthrough;
747 case RTU0_IRAM_ADDR_MASK:
748 fallthrough;
749 case PRU0_IRAM_ADDR_MASK:
750 pru->id = 0;
751 break;
752 case TX_PRU1_IRAM_ADDR_MASK:
753 fallthrough;
754 case RTU1_IRAM_ADDR_MASK:
755 fallthrough;
756 case PRU1_IRAM_ADDR_MASK:
757 pru->id = 1;
758 break;
759 default:
760 ret = -EINVAL;
761 }
762
763 return ret;
764}
765
766static int pru_rproc_probe(struct platform_device *pdev)
767{
768 struct device *dev = &pdev->dev;
769 struct device_node *np = dev->of_node;
770 struct platform_device *ppdev = to_platform_device(dev->parent);
771 struct pru_rproc *pru;
772 const char *fw_name;
773 struct rproc *rproc = NULL;
774 struct resource *res;
775 int i, ret;
776 const struct pru_private_data *data;
777 const char *mem_names[PRU_IOMEM_MAX] = { "iram", "control", "debug" };
778
779 data = of_device_get_match_data(&pdev->dev);
780 if (!data)
781 return -ENODEV;
782
783 ret = of_property_read_string(np, "firmware-name", &fw_name);
784 if (ret) {
785 dev_err(dev, "unable to retrieve firmware-name %d\n", ret);
786 return ret;
787 }
788
789 rproc = devm_rproc_alloc(dev, pdev->name, &pru_rproc_ops, fw_name,
790 sizeof(*pru));
791 if (!rproc) {
792 dev_err(dev, "rproc_alloc failed\n");
793 return -ENOMEM;
794 }
795 /* use a custom load function to deal with PRU-specific quirks */
796 rproc->ops->load = pru_rproc_load_elf_segments;
797
798 /* use a custom parse function to deal with PRU-specific resources */
799 rproc->ops->parse_fw = pru_rproc_parse_fw;
800
801 /* error recovery is not supported for PRUs */
802 rproc->recovery_disabled = true;
803
804 /*
805 * rproc_add will auto-boot the processor normally, but this is not
806 * desired with PRU client driven boot-flow methodology. A PRU
807 * application/client driver will boot the corresponding PRU
808 * remote-processor as part of its state machine either through the
809 * remoteproc sysfs interface or through the equivalent kernel API.
810 */
811 rproc->auto_boot = false;
812
813 pru = rproc->priv;
814 pru->dev = dev;
815 pru->data = data;
816 pru->pruss = platform_get_drvdata(ppdev);
817 pru->rproc = rproc;
818 pru->fw_name = fw_name;
819
820 for (i = 0; i < ARRAY_SIZE(mem_names); i++) {
821 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
822 mem_names[i]);
823 pru->mem_regions[i].va = devm_ioremap_resource(dev, res);
824 if (IS_ERR(pru->mem_regions[i].va)) {
825 dev_err(dev, "failed to parse and map memory resource %d %s\n",
826 i, mem_names[i]);
827 ret = PTR_ERR(pru->mem_regions[i].va);
828 return ret;
829 }
830 pru->mem_regions[i].pa = res->start;
831 pru->mem_regions[i].size = resource_size(res);
832
833 dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %pK\n",
834 mem_names[i], &pru->mem_regions[i].pa,
835 pru->mem_regions[i].size, pru->mem_regions[i].va);
836 }
837
838 ret = pru_rproc_set_id(pru);
839 if (ret < 0)
840 return ret;
841
842 platform_set_drvdata(pdev, rproc);
843
844 ret = devm_rproc_add(dev, pru->rproc);
845 if (ret) {
846 dev_err(dev, "rproc_add failed: %d\n", ret);
847 return ret;
848 }
849
850 pru_rproc_create_debug_entries(rproc);
851
852 dev_dbg(dev, "PRU rproc node %pOF probed successfully\n", np);
853
854 return 0;
855}
856
857static int pru_rproc_remove(struct platform_device *pdev)
858{
859 struct device *dev = &pdev->dev;
860 struct rproc *rproc = platform_get_drvdata(pdev);
861
862 dev_dbg(dev, "%s: removing rproc %s\n", __func__, rproc->name);
863
864 return 0;
865}
866
867static const struct pru_private_data pru_data = {
868 .type = PRU_TYPE_PRU,
869};
870
871static const struct pru_private_data k3_pru_data = {
872 .type = PRU_TYPE_PRU,
873 .is_k3 = 1,
874};
875
876static const struct pru_private_data k3_rtu_data = {
877 .type = PRU_TYPE_RTU,
878 .is_k3 = 1,
879};
880
881static const struct pru_private_data k3_tx_pru_data = {
882 .type = PRU_TYPE_TX_PRU,
883 .is_k3 = 1,
884};
885
886static const struct of_device_id pru_rproc_match[] = {
887 { .compatible = "ti,am3356-pru", .data = &pru_data },
888 { .compatible = "ti,am4376-pru", .data = &pru_data },
889 { .compatible = "ti,am5728-pru", .data = &pru_data },
890 { .compatible = "ti,am642-pru", .data = &k3_pru_data },
891 { .compatible = "ti,am642-rtu", .data = &k3_rtu_data },
892 { .compatible = "ti,am642-tx-pru", .data = &k3_tx_pru_data },
893 { .compatible = "ti,k2g-pru", .data = &pru_data },
894 { .compatible = "ti,am654-pru", .data = &k3_pru_data },
895 { .compatible = "ti,am654-rtu", .data = &k3_rtu_data },
896 { .compatible = "ti,am654-tx-pru", .data = &k3_tx_pru_data },
897 { .compatible = "ti,j721e-pru", .data = &k3_pru_data },
898 { .compatible = "ti,j721e-rtu", .data = &k3_rtu_data },
899 { .compatible = "ti,j721e-tx-pru", .data = &k3_tx_pru_data },
900 { .compatible = "ti,am625-pru", .data = &k3_pru_data },
901 {},
902};
903MODULE_DEVICE_TABLE(of, pru_rproc_match);
904
905static struct platform_driver pru_rproc_driver = {
906 .driver = {
907 .name = "pru-rproc",
908 .of_match_table = pru_rproc_match,
909 .suppress_bind_attrs = true,
910 },
911 .probe = pru_rproc_probe,
912 .remove = pru_rproc_remove,
913};
914module_platform_driver(pru_rproc_driver);
915
916MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");
917MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
918MODULE_AUTHOR("Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>");
919MODULE_DESCRIPTION("PRU-ICSS Remote Processor Driver");
920MODULE_LICENSE("GPL v2");