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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Core PHY library, taken from phy.c
4 */
5#include <linux/export.h>
6#include <linux/phy.h>
7#include <linux/of.h>
8
9/**
10 * phy_speed_to_str - Return a string representing the PHY link speed
11 *
12 * @speed: Speed of the link
13 */
14const char *phy_speed_to_str(int speed)
15{
16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 102,
17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
18 "If a speed or mode has been added please update phy_speed_to_str "
19 "and the PHY settings array.\n");
20
21 switch (speed) {
22 case SPEED_10:
23 return "10Mbps";
24 case SPEED_100:
25 return "100Mbps";
26 case SPEED_1000:
27 return "1Gbps";
28 case SPEED_2500:
29 return "2.5Gbps";
30 case SPEED_5000:
31 return "5Gbps";
32 case SPEED_10000:
33 return "10Gbps";
34 case SPEED_14000:
35 return "14Gbps";
36 case SPEED_20000:
37 return "20Gbps";
38 case SPEED_25000:
39 return "25Gbps";
40 case SPEED_40000:
41 return "40Gbps";
42 case SPEED_50000:
43 return "50Gbps";
44 case SPEED_56000:
45 return "56Gbps";
46 case SPEED_100000:
47 return "100Gbps";
48 case SPEED_200000:
49 return "200Gbps";
50 case SPEED_400000:
51 return "400Gbps";
52 case SPEED_800000:
53 return "800Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy-core.c)";
58 }
59}
60EXPORT_SYMBOL_GPL(phy_speed_to_str);
61
62/**
63 * phy_duplex_to_str - Return string describing the duplex
64 *
65 * @duplex: Duplex setting to describe
66 */
67const char *phy_duplex_to_str(unsigned int duplex)
68{
69 if (duplex == DUPLEX_HALF)
70 return "Half";
71 if (duplex == DUPLEX_FULL)
72 return "Full";
73 if (duplex == DUPLEX_UNKNOWN)
74 return "Unknown";
75 return "Unsupported (update phy-core.c)";
76}
77EXPORT_SYMBOL_GPL(phy_duplex_to_str);
78
79/**
80 * phy_rate_matching_to_str - Return a string describing the rate matching
81 *
82 * @rate_matching: Type of rate matching to describe
83 */
84const char *phy_rate_matching_to_str(int rate_matching)
85{
86 switch (rate_matching) {
87 case RATE_MATCH_NONE:
88 return "none";
89 case RATE_MATCH_PAUSE:
90 return "pause";
91 case RATE_MATCH_CRS:
92 return "crs";
93 case RATE_MATCH_OPEN_LOOP:
94 return "open-loop";
95 }
96 return "Unsupported (update phy-core.c)";
97}
98EXPORT_SYMBOL_GPL(phy_rate_matching_to_str);
99
100/**
101 * phy_interface_num_ports - Return the number of links that can be carried by
102 * a given MAC-PHY physical link. Returns 0 if this is
103 * unknown, the number of links else.
104 *
105 * @interface: The interface mode we want to get the number of ports
106 */
107int phy_interface_num_ports(phy_interface_t interface)
108{
109 switch (interface) {
110 case PHY_INTERFACE_MODE_NA:
111 return 0;
112 case PHY_INTERFACE_MODE_INTERNAL:
113 case PHY_INTERFACE_MODE_MII:
114 case PHY_INTERFACE_MODE_GMII:
115 case PHY_INTERFACE_MODE_TBI:
116 case PHY_INTERFACE_MODE_REVMII:
117 case PHY_INTERFACE_MODE_RMII:
118 case PHY_INTERFACE_MODE_REVRMII:
119 case PHY_INTERFACE_MODE_RGMII:
120 case PHY_INTERFACE_MODE_RGMII_ID:
121 case PHY_INTERFACE_MODE_RGMII_RXID:
122 case PHY_INTERFACE_MODE_RGMII_TXID:
123 case PHY_INTERFACE_MODE_RTBI:
124 case PHY_INTERFACE_MODE_XGMII:
125 case PHY_INTERFACE_MODE_XLGMII:
126 case PHY_INTERFACE_MODE_MOCA:
127 case PHY_INTERFACE_MODE_TRGMII:
128 case PHY_INTERFACE_MODE_USXGMII:
129 case PHY_INTERFACE_MODE_SGMII:
130 case PHY_INTERFACE_MODE_SMII:
131 case PHY_INTERFACE_MODE_1000BASEX:
132 case PHY_INTERFACE_MODE_2500BASEX:
133 case PHY_INTERFACE_MODE_5GBASER:
134 case PHY_INTERFACE_MODE_10GBASER:
135 case PHY_INTERFACE_MODE_25GBASER:
136 case PHY_INTERFACE_MODE_10GKR:
137 case PHY_INTERFACE_MODE_100BASEX:
138 case PHY_INTERFACE_MODE_RXAUI:
139 case PHY_INTERFACE_MODE_XAUI:
140 case PHY_INTERFACE_MODE_1000BASEKX:
141 return 1;
142 case PHY_INTERFACE_MODE_QSGMII:
143 case PHY_INTERFACE_MODE_QUSGMII:
144 return 4;
145 case PHY_INTERFACE_MODE_PSGMII:
146 return 5;
147 case PHY_INTERFACE_MODE_MAX:
148 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
149 return 0;
150 }
151 return 0;
152}
153EXPORT_SYMBOL_GPL(phy_interface_num_ports);
154
155/* A mapping of all SUPPORTED settings to speed/duplex. This table
156 * must be grouped by speed and sorted in descending match priority
157 * - iow, descending speed.
158 */
159
160#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
161 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
162
163static const struct phy_setting settings[] = {
164 /* 800G */
165 PHY_SETTING( 800000, FULL, 800000baseCR8_Full ),
166 PHY_SETTING( 800000, FULL, 800000baseKR8_Full ),
167 PHY_SETTING( 800000, FULL, 800000baseDR8_Full ),
168 PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ),
169 PHY_SETTING( 800000, FULL, 800000baseSR8_Full ),
170 PHY_SETTING( 800000, FULL, 800000baseVR8_Full ),
171 /* 400G */
172 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ),
173 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ),
174 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ),
175 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ),
176 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ),
177 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ),
178 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ),
179 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ),
180 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ),
181 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ),
182 /* 200G */
183 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
184 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
185 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
186 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
187 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
188 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ),
189 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ),
190 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ),
191 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ),
192 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ),
193 /* 100G */
194 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
195 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
196 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
197 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
198 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
199 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
200 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
201 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
202 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
203 PHY_SETTING( 100000, FULL, 100000baseCR_Full ),
204 PHY_SETTING( 100000, FULL, 100000baseKR_Full ),
205 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ),
206 PHY_SETTING( 100000, FULL, 100000baseDR_Full ),
207 PHY_SETTING( 100000, FULL, 100000baseSR_Full ),
208 /* 56G */
209 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
210 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
211 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
212 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
213 /* 50G */
214 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
215 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
216 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
217 PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
218 PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
219 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
220 PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
221 PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
222 /* 40G */
223 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
224 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
225 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
226 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
227 /* 25G */
228 PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
229 PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
230 PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
231 /* 20G */
232 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
233 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
234 /* 10G */
235 PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
236 PHY_SETTING( 10000, FULL, 10000baseER_Full ),
237 PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
238 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
239 PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
240 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
241 PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
242 PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
243 PHY_SETTING( 10000, FULL, 10000baseT_Full ),
244 /* 5G */
245 PHY_SETTING( 5000, FULL, 5000baseT_Full ),
246 /* 2.5G */
247 PHY_SETTING( 2500, FULL, 2500baseT_Full ),
248 PHY_SETTING( 2500, FULL, 2500baseX_Full ),
249 /* 1G */
250 PHY_SETTING( 1000, FULL, 1000baseT_Full ),
251 PHY_SETTING( 1000, HALF, 1000baseT_Half ),
252 PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
253 PHY_SETTING( 1000, FULL, 1000baseX_Full ),
254 PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
255 /* 100M */
256 PHY_SETTING( 100, FULL, 100baseT_Full ),
257 PHY_SETTING( 100, FULL, 100baseT1_Full ),
258 PHY_SETTING( 100, HALF, 100baseT_Half ),
259 PHY_SETTING( 100, HALF, 100baseFX_Half ),
260 PHY_SETTING( 100, FULL, 100baseFX_Full ),
261 /* 10M */
262 PHY_SETTING( 10, FULL, 10baseT_Full ),
263 PHY_SETTING( 10, HALF, 10baseT_Half ),
264 PHY_SETTING( 10, FULL, 10baseT1L_Full ),
265 PHY_SETTING( 10, FULL, 10baseT1S_Full ),
266 PHY_SETTING( 10, HALF, 10baseT1S_Half ),
267 PHY_SETTING( 10, HALF, 10baseT1S_P2MP_Half ),
268};
269#undef PHY_SETTING
270
271/**
272 * phy_lookup_setting - lookup a PHY setting
273 * @speed: speed to match
274 * @duplex: duplex to match
275 * @mask: allowed link modes
276 * @exact: an exact match is required
277 *
278 * Search the settings array for a setting that matches the speed and
279 * duplex, and which is supported.
280 *
281 * If @exact is unset, either an exact match or %NULL for no match will
282 * be returned.
283 *
284 * If @exact is set, an exact match, the fastest supported setting at
285 * or below the specified speed, the slowest supported setting, or if
286 * they all fail, %NULL will be returned.
287 */
288const struct phy_setting *
289phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
290{
291 const struct phy_setting *p, *match = NULL, *last = NULL;
292 int i;
293
294 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
295 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
296 test_bit(p->bit, mask)) {
297 last = p;
298 if (p->speed == speed && p->duplex == duplex) {
299 /* Exact match for speed and duplex */
300 match = p;
301 break;
302 } else if (!exact) {
303 if (!match && p->speed <= speed)
304 /* Candidate */
305 match = p;
306
307 if (p->speed < speed)
308 break;
309 }
310 }
311 }
312
313 if (!match && !exact)
314 match = last;
315
316 return match;
317}
318EXPORT_SYMBOL_GPL(phy_lookup_setting);
319
320size_t phy_speeds(unsigned int *speeds, size_t size,
321 unsigned long *mask)
322{
323 size_t count;
324 int i;
325
326 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
327 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
328 test_bit(settings[i].bit, mask) &&
329 (count == 0 || speeds[count - 1] != settings[i].speed))
330 speeds[count++] = settings[i].speed;
331
332 return count;
333}
334
335static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
336{
337 const struct phy_setting *p;
338 int i;
339
340 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
341 if (p->speed > max_speed)
342 linkmode_clear_bit(p->bit, addr);
343 else
344 break;
345 }
346}
347
348static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
349{
350 __set_linkmode_max_speed(max_speed, phydev->supported);
351}
352
353/**
354 * phy_set_max_speed - Set the maximum speed the PHY should support
355 *
356 * @phydev: The phy_device struct
357 * @max_speed: Maximum speed
358 *
359 * The PHY might be more capable than the MAC. For example a Fast Ethernet
360 * is connected to a 1G PHY. This function allows the MAC to indicate its
361 * maximum speed, and so limit what the PHY will advertise.
362 */
363void phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
364{
365 __set_phy_supported(phydev, max_speed);
366
367 phy_advertise_supported(phydev);
368}
369EXPORT_SYMBOL(phy_set_max_speed);
370
371void of_set_phy_supported(struct phy_device *phydev)
372{
373 struct device_node *node = phydev->mdio.dev.of_node;
374 u32 max_speed;
375
376 if (!IS_ENABLED(CONFIG_OF_MDIO))
377 return;
378
379 if (!node)
380 return;
381
382 if (!of_property_read_u32(node, "max-speed", &max_speed))
383 __set_phy_supported(phydev, max_speed);
384}
385
386void of_set_phy_eee_broken(struct phy_device *phydev)
387{
388 struct device_node *node = phydev->mdio.dev.of_node;
389 u32 broken = 0;
390
391 if (!IS_ENABLED(CONFIG_OF_MDIO))
392 return;
393
394 if (!node)
395 return;
396
397 if (of_property_read_bool(node, "eee-broken-100tx"))
398 broken |= MDIO_EEE_100TX;
399 if (of_property_read_bool(node, "eee-broken-1000t"))
400 broken |= MDIO_EEE_1000T;
401 if (of_property_read_bool(node, "eee-broken-10gt"))
402 broken |= MDIO_EEE_10GT;
403 if (of_property_read_bool(node, "eee-broken-1000kx"))
404 broken |= MDIO_EEE_1000KX;
405 if (of_property_read_bool(node, "eee-broken-10gkx4"))
406 broken |= MDIO_EEE_10GKX4;
407 if (of_property_read_bool(node, "eee-broken-10gkr"))
408 broken |= MDIO_EEE_10GKR;
409
410 phydev->eee_broken_modes = broken;
411}
412
413/**
414 * phy_resolve_aneg_pause - Determine pause autoneg results
415 *
416 * @phydev: The phy_device struct
417 *
418 * Once autoneg has completed the local pause settings can be
419 * resolved. Determine if pause and asymmetric pause should be used
420 * by the MAC.
421 */
422
423void phy_resolve_aneg_pause(struct phy_device *phydev)
424{
425 if (phydev->duplex == DUPLEX_FULL) {
426 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
427 phydev->lp_advertising);
428 phydev->asym_pause = linkmode_test_bit(
429 ETHTOOL_LINK_MODE_Asym_Pause_BIT,
430 phydev->lp_advertising);
431 }
432}
433EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
434
435/**
436 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
437 * @phydev: The phy_device struct
438 *
439 * Resolve our and the link partner advertisements into their corresponding
440 * speed and duplex. If full duplex was negotiated, extract the pause mode
441 * from the link partner mask.
442 */
443void phy_resolve_aneg_linkmode(struct phy_device *phydev)
444{
445 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
446 int i;
447
448 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
449
450 for (i = 0; i < ARRAY_SIZE(settings); i++)
451 if (test_bit(settings[i].bit, common)) {
452 phydev->speed = settings[i].speed;
453 phydev->duplex = settings[i].duplex;
454 break;
455 }
456
457 phy_resolve_aneg_pause(phydev);
458}
459EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
460
461/**
462 * phy_check_downshift - check whether downshift occurred
463 * @phydev: The phy_device struct
464 *
465 * Check whether a downshift to a lower speed occurred. If this should be the
466 * case warn the user.
467 * Prerequisite for detecting downshift is that PHY driver implements the
468 * read_status callback and sets phydev->speed to the actual link speed.
469 */
470void phy_check_downshift(struct phy_device *phydev)
471{
472 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
473 int i, speed = SPEED_UNKNOWN;
474
475 phydev->downshifted_rate = 0;
476
477 if (phydev->autoneg == AUTONEG_DISABLE ||
478 phydev->speed == SPEED_UNKNOWN)
479 return;
480
481 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
482
483 for (i = 0; i < ARRAY_SIZE(settings); i++)
484 if (test_bit(settings[i].bit, common)) {
485 speed = settings[i].speed;
486 break;
487 }
488
489 if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
490 return;
491
492 phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
493 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
494
495 phydev->downshifted_rate = 1;
496}
497EXPORT_SYMBOL_GPL(phy_check_downshift);
498
499static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
500{
501 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
502 int i = ARRAY_SIZE(settings);
503
504 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
505
506 while (--i >= 0) {
507 if (test_bit(settings[i].bit, common)) {
508 if (fdx_only && settings[i].duplex != DUPLEX_FULL)
509 continue;
510 return settings[i].speed;
511 }
512 }
513
514 return SPEED_UNKNOWN;
515}
516
517int phy_speed_down_core(struct phy_device *phydev)
518{
519 int min_common_speed = phy_resolve_min_speed(phydev, true);
520
521 if (min_common_speed == SPEED_UNKNOWN)
522 return -EINVAL;
523
524 __set_linkmode_max_speed(min_common_speed, phydev->advertising);
525
526 return 0;
527}
528
529static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
530 u16 regnum)
531{
532 /* Write the desired MMD Devad */
533 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
534
535 /* Write the desired MMD register address */
536 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
537
538 /* Select the Function : DATA with no post increment */
539 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
540 devad | MII_MMD_CTRL_NOINCR);
541}
542
543static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
544 int devad, u32 regnum)
545{
546 if (is_c45)
547 return __mdiobus_c45_read(bus, phy_addr, devad, regnum);
548
549 mmd_phy_indirect(bus, phy_addr, devad, regnum);
550 /* Read the content of the MMD's selected register */
551 return __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
552}
553
554static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
555 int devad, u32 regnum, u16 val)
556{
557 if (is_c45)
558 return __mdiobus_c45_write(bus, phy_addr, devad, regnum, val);
559
560 mmd_phy_indirect(bus, phy_addr, devad, regnum);
561 /* Write the data into MMD's selected register */
562 return __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
563}
564
565/**
566 * __phy_read_mmd - Convenience function for reading a register
567 * from an MMD on a given PHY.
568 * @phydev: The phy_device struct
569 * @devad: The MMD to read from (0..31)
570 * @regnum: The register on the MMD to read (0..65535)
571 *
572 * Same rules as for __phy_read();
573 */
574int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
575{
576 if (regnum > (u16)~0 || devad > 32)
577 return -EINVAL;
578
579 if (phydev->drv && phydev->drv->read_mmd)
580 return phydev->drv->read_mmd(phydev, devad, regnum);
581
582 return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
583 phydev->is_c45, devad, regnum);
584}
585EXPORT_SYMBOL(__phy_read_mmd);
586
587/**
588 * phy_read_mmd - Convenience function for reading a register
589 * from an MMD on a given PHY.
590 * @phydev: The phy_device struct
591 * @devad: The MMD to read from
592 * @regnum: The register on the MMD to read
593 *
594 * Same rules as for phy_read();
595 */
596int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
597{
598 int ret;
599
600 phy_lock_mdio_bus(phydev);
601 ret = __phy_read_mmd(phydev, devad, regnum);
602 phy_unlock_mdio_bus(phydev);
603
604 return ret;
605}
606EXPORT_SYMBOL(phy_read_mmd);
607
608/**
609 * __phy_write_mmd - Convenience function for writing a register
610 * on an MMD on a given PHY.
611 * @phydev: The phy_device struct
612 * @devad: The MMD to read from
613 * @regnum: The register on the MMD to read
614 * @val: value to write to @regnum
615 *
616 * Same rules as for __phy_write();
617 */
618int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
619{
620 if (regnum > (u16)~0 || devad > 32)
621 return -EINVAL;
622
623 if (phydev->drv && phydev->drv->write_mmd)
624 return phydev->drv->write_mmd(phydev, devad, regnum, val);
625
626 return mmd_phy_write(phydev->mdio.bus, phydev->mdio.addr,
627 phydev->is_c45, devad, regnum, val);
628}
629EXPORT_SYMBOL(__phy_write_mmd);
630
631/**
632 * phy_write_mmd - Convenience function for writing a register
633 * on an MMD on a given PHY.
634 * @phydev: The phy_device struct
635 * @devad: The MMD to read from
636 * @regnum: The register on the MMD to read
637 * @val: value to write to @regnum
638 *
639 * Same rules as for phy_write();
640 */
641int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
642{
643 int ret;
644
645 phy_lock_mdio_bus(phydev);
646 ret = __phy_write_mmd(phydev, devad, regnum, val);
647 phy_unlock_mdio_bus(phydev);
648
649 return ret;
650}
651EXPORT_SYMBOL(phy_write_mmd);
652
653/**
654 * __phy_package_read_mmd - read MMD reg relative to PHY package base addr
655 * @phydev: The phy_device struct
656 * @addr_offset: The offset to be added to PHY package base_addr
657 * @devad: The MMD to read from
658 * @regnum: The register on the MMD to read
659 *
660 * Convenience helper for reading a register of an MMD on a given PHY
661 * using the PHY package base address. The base address is added to
662 * the addr_offset value.
663 *
664 * Same calling rules as for __phy_read();
665 *
666 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
667 */
668int __phy_package_read_mmd(struct phy_device *phydev,
669 unsigned int addr_offset, int devad,
670 u32 regnum)
671{
672 int addr = phy_package_address(phydev, addr_offset);
673
674 if (addr < 0)
675 return addr;
676
677 if (regnum > (u16)~0 || devad > 32)
678 return -EINVAL;
679
680 return mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
681 regnum);
682}
683EXPORT_SYMBOL(__phy_package_read_mmd);
684
685/**
686 * phy_package_read_mmd - read MMD reg relative to PHY package base addr
687 * @phydev: The phy_device struct
688 * @addr_offset: The offset to be added to PHY package base_addr
689 * @devad: The MMD to read from
690 * @regnum: The register on the MMD to read
691 *
692 * Convenience helper for reading a register of an MMD on a given PHY
693 * using the PHY package base address. The base address is added to
694 * the addr_offset value.
695 *
696 * Same calling rules as for phy_read();
697 *
698 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
699 */
700int phy_package_read_mmd(struct phy_device *phydev,
701 unsigned int addr_offset, int devad,
702 u32 regnum)
703{
704 int addr = phy_package_address(phydev, addr_offset);
705 int val;
706
707 if (addr < 0)
708 return addr;
709
710 if (regnum > (u16)~0 || devad > 32)
711 return -EINVAL;
712
713 phy_lock_mdio_bus(phydev);
714 val = mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
715 regnum);
716 phy_unlock_mdio_bus(phydev);
717
718 return val;
719}
720EXPORT_SYMBOL(phy_package_read_mmd);
721
722/**
723 * __phy_package_write_mmd - write MMD reg relative to PHY package base addr
724 * @phydev: The phy_device struct
725 * @addr_offset: The offset to be added to PHY package base_addr
726 * @devad: The MMD to write to
727 * @regnum: The register on the MMD to write
728 * @val: value to write to @regnum
729 *
730 * Convenience helper for writing a register of an MMD on a given PHY
731 * using the PHY package base address. The base address is added to
732 * the addr_offset value.
733 *
734 * Same calling rules as for __phy_write();
735 *
736 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
737 */
738int __phy_package_write_mmd(struct phy_device *phydev,
739 unsigned int addr_offset, int devad,
740 u32 regnum, u16 val)
741{
742 int addr = phy_package_address(phydev, addr_offset);
743
744 if (addr < 0)
745 return addr;
746
747 if (regnum > (u16)~0 || devad > 32)
748 return -EINVAL;
749
750 return mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
751 regnum, val);
752}
753EXPORT_SYMBOL(__phy_package_write_mmd);
754
755/**
756 * phy_package_write_mmd - write MMD reg relative to PHY package base addr
757 * @phydev: The phy_device struct
758 * @addr_offset: The offset to be added to PHY package base_addr
759 * @devad: The MMD to write to
760 * @regnum: The register on the MMD to write
761 * @val: value to write to @regnum
762 *
763 * Convenience helper for writing a register of an MMD on a given PHY
764 * using the PHY package base address. The base address is added to
765 * the addr_offset value.
766 *
767 * Same calling rules as for phy_write();
768 *
769 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
770 */
771int phy_package_write_mmd(struct phy_device *phydev,
772 unsigned int addr_offset, int devad,
773 u32 regnum, u16 val)
774{
775 int addr = phy_package_address(phydev, addr_offset);
776 int ret;
777
778 if (addr < 0)
779 return addr;
780
781 if (regnum > (u16)~0 || devad > 32)
782 return -EINVAL;
783
784 phy_lock_mdio_bus(phydev);
785 ret = mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
786 regnum, val);
787 phy_unlock_mdio_bus(phydev);
788
789 return ret;
790}
791EXPORT_SYMBOL(phy_package_write_mmd);
792
793/**
794 * phy_modify_changed - Function for modifying a PHY register
795 * @phydev: the phy_device struct
796 * @regnum: register number to modify
797 * @mask: bit mask of bits to clear
798 * @set: new value of bits set in mask to write to @regnum
799 *
800 * NOTE: MUST NOT be called from interrupt context,
801 * because the bus read/write functions may wait for an interrupt
802 * to conclude the operation.
803 *
804 * Returns negative errno, 0 if there was no change, and 1 in case of change
805 */
806int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
807{
808 int ret;
809
810 phy_lock_mdio_bus(phydev);
811 ret = __phy_modify_changed(phydev, regnum, mask, set);
812 phy_unlock_mdio_bus(phydev);
813
814 return ret;
815}
816EXPORT_SYMBOL_GPL(phy_modify_changed);
817
818/**
819 * __phy_modify - Convenience function for modifying a PHY register
820 * @phydev: the phy_device struct
821 * @regnum: register number to modify
822 * @mask: bit mask of bits to clear
823 * @set: new value of bits set in mask to write to @regnum
824 *
825 * NOTE: MUST NOT be called from interrupt context,
826 * because the bus read/write functions may wait for an interrupt
827 * to conclude the operation.
828 */
829int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
830{
831 int ret;
832
833 ret = __phy_modify_changed(phydev, regnum, mask, set);
834
835 return ret < 0 ? ret : 0;
836}
837EXPORT_SYMBOL_GPL(__phy_modify);
838
839/**
840 * phy_modify - Convenience function for modifying a given PHY register
841 * @phydev: the phy_device struct
842 * @regnum: register number to write
843 * @mask: bit mask of bits to clear
844 * @set: new value of bits set in mask to write to @regnum
845 *
846 * NOTE: MUST NOT be called from interrupt context,
847 * because the bus read/write functions may wait for an interrupt
848 * to conclude the operation.
849 */
850int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
851{
852 int ret;
853
854 phy_lock_mdio_bus(phydev);
855 ret = __phy_modify(phydev, regnum, mask, set);
856 phy_unlock_mdio_bus(phydev);
857
858 return ret;
859}
860EXPORT_SYMBOL_GPL(phy_modify);
861
862/**
863 * __phy_modify_mmd_changed - Function for modifying a register on MMD
864 * @phydev: the phy_device struct
865 * @devad: the MMD containing register to modify
866 * @regnum: register number to modify
867 * @mask: bit mask of bits to clear
868 * @set: new value of bits set in mask to write to @regnum
869 *
870 * Unlocked helper function which allows a MMD register to be modified as
871 * new register value = (old register value & ~mask) | set
872 *
873 * Returns negative errno, 0 if there was no change, and 1 in case of change
874 */
875int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
876 u16 mask, u16 set)
877{
878 int new, ret;
879
880 ret = __phy_read_mmd(phydev, devad, regnum);
881 if (ret < 0)
882 return ret;
883
884 new = (ret & ~mask) | set;
885 if (new == ret)
886 return 0;
887
888 ret = __phy_write_mmd(phydev, devad, regnum, new);
889
890 return ret < 0 ? ret : 1;
891}
892EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
893
894/**
895 * phy_modify_mmd_changed - Function for modifying a register on MMD
896 * @phydev: the phy_device struct
897 * @devad: the MMD containing register to modify
898 * @regnum: register number to modify
899 * @mask: bit mask of bits to clear
900 * @set: new value of bits set in mask to write to @regnum
901 *
902 * NOTE: MUST NOT be called from interrupt context,
903 * because the bus read/write functions may wait for an interrupt
904 * to conclude the operation.
905 *
906 * Returns negative errno, 0 if there was no change, and 1 in case of change
907 */
908int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
909 u16 mask, u16 set)
910{
911 int ret;
912
913 phy_lock_mdio_bus(phydev);
914 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
915 phy_unlock_mdio_bus(phydev);
916
917 return ret;
918}
919EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
920
921/**
922 * __phy_modify_mmd - Convenience function for modifying a register on MMD
923 * @phydev: the phy_device struct
924 * @devad: the MMD containing register to modify
925 * @regnum: register number to modify
926 * @mask: bit mask of bits to clear
927 * @set: new value of bits set in mask to write to @regnum
928 *
929 * NOTE: MUST NOT be called from interrupt context,
930 * because the bus read/write functions may wait for an interrupt
931 * to conclude the operation.
932 */
933int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
934 u16 mask, u16 set)
935{
936 int ret;
937
938 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
939
940 return ret < 0 ? ret : 0;
941}
942EXPORT_SYMBOL_GPL(__phy_modify_mmd);
943
944/**
945 * phy_modify_mmd - Convenience function for modifying a register on MMD
946 * @phydev: the phy_device struct
947 * @devad: the MMD containing register to modify
948 * @regnum: register number to modify
949 * @mask: bit mask of bits to clear
950 * @set: new value of bits set in mask to write to @regnum
951 *
952 * NOTE: MUST NOT be called from interrupt context,
953 * because the bus read/write functions may wait for an interrupt
954 * to conclude the operation.
955 */
956int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
957 u16 mask, u16 set)
958{
959 int ret;
960
961 phy_lock_mdio_bus(phydev);
962 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
963 phy_unlock_mdio_bus(phydev);
964
965 return ret;
966}
967EXPORT_SYMBOL_GPL(phy_modify_mmd);
968
969static int __phy_read_page(struct phy_device *phydev)
970{
971 if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
972 return -EOPNOTSUPP;
973
974 return phydev->drv->read_page(phydev);
975}
976
977static int __phy_write_page(struct phy_device *phydev, int page)
978{
979 if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
980 return -EOPNOTSUPP;
981
982 return phydev->drv->write_page(phydev, page);
983}
984
985/**
986 * phy_save_page() - take the bus lock and save the current page
987 * @phydev: a pointer to a &struct phy_device
988 *
989 * Take the MDIO bus lock, and return the current page number. On error,
990 * returns a negative errno. phy_restore_page() must always be called
991 * after this, irrespective of success or failure of this call.
992 */
993int phy_save_page(struct phy_device *phydev)
994{
995 phy_lock_mdio_bus(phydev);
996 return __phy_read_page(phydev);
997}
998EXPORT_SYMBOL_GPL(phy_save_page);
999
1000/**
1001 * phy_select_page() - take the bus lock, save the current page, and set a page
1002 * @phydev: a pointer to a &struct phy_device
1003 * @page: desired page
1004 *
1005 * Take the MDIO bus lock to protect against concurrent access, save the
1006 * current PHY page, and set the current page. On error, returns a
1007 * negative errno, otherwise returns the previous page number.
1008 * phy_restore_page() must always be called after this, irrespective
1009 * of success or failure of this call.
1010 */
1011int phy_select_page(struct phy_device *phydev, int page)
1012{
1013 int ret, oldpage;
1014
1015 oldpage = ret = phy_save_page(phydev);
1016 if (ret < 0)
1017 return ret;
1018
1019 if (oldpage != page) {
1020 ret = __phy_write_page(phydev, page);
1021 if (ret < 0)
1022 return ret;
1023 }
1024
1025 return oldpage;
1026}
1027EXPORT_SYMBOL_GPL(phy_select_page);
1028
1029/**
1030 * phy_restore_page() - restore the page register and release the bus lock
1031 * @phydev: a pointer to a &struct phy_device
1032 * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
1033 * @ret: operation's return code
1034 *
1035 * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
1036 * This function propagates the earliest error code from the group of
1037 * operations.
1038 *
1039 * Returns:
1040 * @oldpage if it was a negative value, otherwise
1041 * @ret if it was a negative errno value, otherwise
1042 * phy_write_page()'s negative value if it were in error, otherwise
1043 * @ret.
1044 */
1045int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
1046{
1047 int r;
1048
1049 if (oldpage >= 0) {
1050 r = __phy_write_page(phydev, oldpage);
1051
1052 /* Propagate the operation return code if the page write
1053 * was successful.
1054 */
1055 if (ret >= 0 && r < 0)
1056 ret = r;
1057 } else {
1058 /* Propagate the phy page selection error code */
1059 ret = oldpage;
1060 }
1061
1062 phy_unlock_mdio_bus(phydev);
1063
1064 return ret;
1065}
1066EXPORT_SYMBOL_GPL(phy_restore_page);
1067
1068/**
1069 * phy_read_paged() - Convenience function for reading a paged register
1070 * @phydev: a pointer to a &struct phy_device
1071 * @page: the page for the phy
1072 * @regnum: register number
1073 *
1074 * Same rules as for phy_read().
1075 */
1076int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
1077{
1078 int ret = 0, oldpage;
1079
1080 oldpage = phy_select_page(phydev, page);
1081 if (oldpage >= 0)
1082 ret = __phy_read(phydev, regnum);
1083
1084 return phy_restore_page(phydev, oldpage, ret);
1085}
1086EXPORT_SYMBOL(phy_read_paged);
1087
1088/**
1089 * phy_write_paged() - Convenience function for writing a paged register
1090 * @phydev: a pointer to a &struct phy_device
1091 * @page: the page for the phy
1092 * @regnum: register number
1093 * @val: value to write
1094 *
1095 * Same rules as for phy_write().
1096 */
1097int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
1098{
1099 int ret = 0, oldpage;
1100
1101 oldpage = phy_select_page(phydev, page);
1102 if (oldpage >= 0)
1103 ret = __phy_write(phydev, regnum, val);
1104
1105 return phy_restore_page(phydev, oldpage, ret);
1106}
1107EXPORT_SYMBOL(phy_write_paged);
1108
1109/**
1110 * phy_modify_paged_changed() - Function for modifying a paged register
1111 * @phydev: a pointer to a &struct phy_device
1112 * @page: the page for the phy
1113 * @regnum: register number
1114 * @mask: bit mask of bits to clear
1115 * @set: bit mask of bits to set
1116 *
1117 * Returns negative errno, 0 if there was no change, and 1 in case of change
1118 */
1119int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1120 u16 mask, u16 set)
1121{
1122 int ret = 0, oldpage;
1123
1124 oldpage = phy_select_page(phydev, page);
1125 if (oldpage >= 0)
1126 ret = __phy_modify_changed(phydev, regnum, mask, set);
1127
1128 return phy_restore_page(phydev, oldpage, ret);
1129}
1130EXPORT_SYMBOL(phy_modify_paged_changed);
1131
1132/**
1133 * phy_modify_paged() - Convenience function for modifying a paged register
1134 * @phydev: a pointer to a &struct phy_device
1135 * @page: the page for the phy
1136 * @regnum: register number
1137 * @mask: bit mask of bits to clear
1138 * @set: bit mask of bits to set
1139 *
1140 * Same rules as for phy_read() and phy_write().
1141 */
1142int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1143 u16 mask, u16 set)
1144{
1145 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
1146
1147 return ret < 0 ? ret : 0;
1148}
1149EXPORT_SYMBOL(phy_modify_paged);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Core PHY library, taken from phy.c
4 */
5#include <linux/export.h>
6#include <linux/phy.h>
7#include <linux/of.h>
8
9/**
10 * phy_speed_to_str - Return a string representing the PHY link speed
11 *
12 * @speed: Speed of the link
13 */
14const char *phy_speed_to_str(int speed)
15{
16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 99,
17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
18 "If a speed or mode has been added please update phy_speed_to_str "
19 "and the PHY settings array.\n");
20
21 switch (speed) {
22 case SPEED_10:
23 return "10Mbps";
24 case SPEED_100:
25 return "100Mbps";
26 case SPEED_1000:
27 return "1Gbps";
28 case SPEED_2500:
29 return "2.5Gbps";
30 case SPEED_5000:
31 return "5Gbps";
32 case SPEED_10000:
33 return "10Gbps";
34 case SPEED_14000:
35 return "14Gbps";
36 case SPEED_20000:
37 return "20Gbps";
38 case SPEED_25000:
39 return "25Gbps";
40 case SPEED_40000:
41 return "40Gbps";
42 case SPEED_50000:
43 return "50Gbps";
44 case SPEED_56000:
45 return "56Gbps";
46 case SPEED_100000:
47 return "100Gbps";
48 case SPEED_200000:
49 return "200Gbps";
50 case SPEED_400000:
51 return "400Gbps";
52 case SPEED_800000:
53 return "800Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy-core.c)";
58 }
59}
60EXPORT_SYMBOL_GPL(phy_speed_to_str);
61
62/**
63 * phy_duplex_to_str - Return string describing the duplex
64 *
65 * @duplex: Duplex setting to describe
66 */
67const char *phy_duplex_to_str(unsigned int duplex)
68{
69 if (duplex == DUPLEX_HALF)
70 return "Half";
71 if (duplex == DUPLEX_FULL)
72 return "Full";
73 if (duplex == DUPLEX_UNKNOWN)
74 return "Unknown";
75 return "Unsupported (update phy-core.c)";
76}
77EXPORT_SYMBOL_GPL(phy_duplex_to_str);
78
79/**
80 * phy_rate_matching_to_str - Return a string describing the rate matching
81 *
82 * @rate_matching: Type of rate matching to describe
83 */
84const char *phy_rate_matching_to_str(int rate_matching)
85{
86 switch (rate_matching) {
87 case RATE_MATCH_NONE:
88 return "none";
89 case RATE_MATCH_PAUSE:
90 return "pause";
91 case RATE_MATCH_CRS:
92 return "crs";
93 case RATE_MATCH_OPEN_LOOP:
94 return "open-loop";
95 }
96 return "Unsupported (update phy-core.c)";
97}
98EXPORT_SYMBOL_GPL(phy_rate_matching_to_str);
99
100/**
101 * phy_interface_num_ports - Return the number of links that can be carried by
102 * a given MAC-PHY physical link. Returns 0 if this is
103 * unknown, the number of links else.
104 *
105 * @interface: The interface mode we want to get the number of ports
106 */
107int phy_interface_num_ports(phy_interface_t interface)
108{
109 switch (interface) {
110 case PHY_INTERFACE_MODE_NA:
111 return 0;
112 case PHY_INTERFACE_MODE_INTERNAL:
113 case PHY_INTERFACE_MODE_MII:
114 case PHY_INTERFACE_MODE_GMII:
115 case PHY_INTERFACE_MODE_TBI:
116 case PHY_INTERFACE_MODE_REVMII:
117 case PHY_INTERFACE_MODE_RMII:
118 case PHY_INTERFACE_MODE_REVRMII:
119 case PHY_INTERFACE_MODE_RGMII:
120 case PHY_INTERFACE_MODE_RGMII_ID:
121 case PHY_INTERFACE_MODE_RGMII_RXID:
122 case PHY_INTERFACE_MODE_RGMII_TXID:
123 case PHY_INTERFACE_MODE_RTBI:
124 case PHY_INTERFACE_MODE_XGMII:
125 case PHY_INTERFACE_MODE_XLGMII:
126 case PHY_INTERFACE_MODE_MOCA:
127 case PHY_INTERFACE_MODE_TRGMII:
128 case PHY_INTERFACE_MODE_USXGMII:
129 case PHY_INTERFACE_MODE_SGMII:
130 case PHY_INTERFACE_MODE_SMII:
131 case PHY_INTERFACE_MODE_1000BASEX:
132 case PHY_INTERFACE_MODE_2500BASEX:
133 case PHY_INTERFACE_MODE_5GBASER:
134 case PHY_INTERFACE_MODE_10GBASER:
135 case PHY_INTERFACE_MODE_25GBASER:
136 case PHY_INTERFACE_MODE_10GKR:
137 case PHY_INTERFACE_MODE_100BASEX:
138 case PHY_INTERFACE_MODE_RXAUI:
139 case PHY_INTERFACE_MODE_XAUI:
140 case PHY_INTERFACE_MODE_1000BASEKX:
141 return 1;
142 case PHY_INTERFACE_MODE_QSGMII:
143 case PHY_INTERFACE_MODE_QUSGMII:
144 return 4;
145 case PHY_INTERFACE_MODE_MAX:
146 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
147 return 0;
148 }
149 return 0;
150}
151EXPORT_SYMBOL_GPL(phy_interface_num_ports);
152
153/* A mapping of all SUPPORTED settings to speed/duplex. This table
154 * must be grouped by speed and sorted in descending match priority
155 * - iow, descending speed.
156 */
157
158#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
159 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
160
161static const struct phy_setting settings[] = {
162 /* 800G */
163 PHY_SETTING( 800000, FULL, 800000baseCR8_Full ),
164 PHY_SETTING( 800000, FULL, 800000baseKR8_Full ),
165 PHY_SETTING( 800000, FULL, 800000baseDR8_Full ),
166 PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ),
167 PHY_SETTING( 800000, FULL, 800000baseSR8_Full ),
168 PHY_SETTING( 800000, FULL, 800000baseVR8_Full ),
169 /* 400G */
170 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ),
171 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ),
172 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ),
173 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ),
174 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ),
175 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ),
176 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ),
177 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ),
178 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ),
179 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ),
180 /* 200G */
181 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
182 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
183 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
184 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
185 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
186 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ),
187 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ),
188 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ),
189 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ),
190 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ),
191 /* 100G */
192 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
193 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
194 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
195 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
196 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
197 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
198 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
199 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
200 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
201 PHY_SETTING( 100000, FULL, 100000baseCR_Full ),
202 PHY_SETTING( 100000, FULL, 100000baseKR_Full ),
203 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ),
204 PHY_SETTING( 100000, FULL, 100000baseDR_Full ),
205 PHY_SETTING( 100000, FULL, 100000baseSR_Full ),
206 /* 56G */
207 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
208 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
209 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
210 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
211 /* 50G */
212 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
213 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
214 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
215 PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
216 PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
217 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
218 PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
219 PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
220 /* 40G */
221 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
222 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
223 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
224 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
225 /* 25G */
226 PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
227 PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
228 PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
229 /* 20G */
230 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
231 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
232 /* 10G */
233 PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
234 PHY_SETTING( 10000, FULL, 10000baseER_Full ),
235 PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
236 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
237 PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
238 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
239 PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
240 PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
241 PHY_SETTING( 10000, FULL, 10000baseT_Full ),
242 /* 5G */
243 PHY_SETTING( 5000, FULL, 5000baseT_Full ),
244 /* 2.5G */
245 PHY_SETTING( 2500, FULL, 2500baseT_Full ),
246 PHY_SETTING( 2500, FULL, 2500baseX_Full ),
247 /* 1G */
248 PHY_SETTING( 1000, FULL, 1000baseT_Full ),
249 PHY_SETTING( 1000, HALF, 1000baseT_Half ),
250 PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
251 PHY_SETTING( 1000, FULL, 1000baseX_Full ),
252 PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
253 /* 100M */
254 PHY_SETTING( 100, FULL, 100baseT_Full ),
255 PHY_SETTING( 100, FULL, 100baseT1_Full ),
256 PHY_SETTING( 100, HALF, 100baseT_Half ),
257 PHY_SETTING( 100, HALF, 100baseFX_Half ),
258 PHY_SETTING( 100, FULL, 100baseFX_Full ),
259 /* 10M */
260 PHY_SETTING( 10, FULL, 10baseT_Full ),
261 PHY_SETTING( 10, HALF, 10baseT_Half ),
262 PHY_SETTING( 10, FULL, 10baseT1L_Full ),
263};
264#undef PHY_SETTING
265
266/**
267 * phy_lookup_setting - lookup a PHY setting
268 * @speed: speed to match
269 * @duplex: duplex to match
270 * @mask: allowed link modes
271 * @exact: an exact match is required
272 *
273 * Search the settings array for a setting that matches the speed and
274 * duplex, and which is supported.
275 *
276 * If @exact is unset, either an exact match or %NULL for no match will
277 * be returned.
278 *
279 * If @exact is set, an exact match, the fastest supported setting at
280 * or below the specified speed, the slowest supported setting, or if
281 * they all fail, %NULL will be returned.
282 */
283const struct phy_setting *
284phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
285{
286 const struct phy_setting *p, *match = NULL, *last = NULL;
287 int i;
288
289 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
290 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
291 test_bit(p->bit, mask)) {
292 last = p;
293 if (p->speed == speed && p->duplex == duplex) {
294 /* Exact match for speed and duplex */
295 match = p;
296 break;
297 } else if (!exact) {
298 if (!match && p->speed <= speed)
299 /* Candidate */
300 match = p;
301
302 if (p->speed < speed)
303 break;
304 }
305 }
306 }
307
308 if (!match && !exact)
309 match = last;
310
311 return match;
312}
313EXPORT_SYMBOL_GPL(phy_lookup_setting);
314
315size_t phy_speeds(unsigned int *speeds, size_t size,
316 unsigned long *mask)
317{
318 size_t count;
319 int i;
320
321 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
322 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
323 test_bit(settings[i].bit, mask) &&
324 (count == 0 || speeds[count - 1] != settings[i].speed))
325 speeds[count++] = settings[i].speed;
326
327 return count;
328}
329
330static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
331{
332 const struct phy_setting *p;
333 int i;
334
335 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
336 if (p->speed > max_speed)
337 linkmode_clear_bit(p->bit, addr);
338 else
339 break;
340 }
341}
342
343static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
344{
345 __set_linkmode_max_speed(max_speed, phydev->supported);
346}
347
348/**
349 * phy_set_max_speed - Set the maximum speed the PHY should support
350 *
351 * @phydev: The phy_device struct
352 * @max_speed: Maximum speed
353 *
354 * The PHY might be more capable than the MAC. For example a Fast Ethernet
355 * is connected to a 1G PHY. This function allows the MAC to indicate its
356 * maximum speed, and so limit what the PHY will advertise.
357 */
358void phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
359{
360 __set_phy_supported(phydev, max_speed);
361
362 phy_advertise_supported(phydev);
363}
364EXPORT_SYMBOL(phy_set_max_speed);
365
366void of_set_phy_supported(struct phy_device *phydev)
367{
368 struct device_node *node = phydev->mdio.dev.of_node;
369 u32 max_speed;
370
371 if (!IS_ENABLED(CONFIG_OF_MDIO))
372 return;
373
374 if (!node)
375 return;
376
377 if (!of_property_read_u32(node, "max-speed", &max_speed))
378 __set_phy_supported(phydev, max_speed);
379}
380
381void of_set_phy_eee_broken(struct phy_device *phydev)
382{
383 struct device_node *node = phydev->mdio.dev.of_node;
384 u32 broken = 0;
385
386 if (!IS_ENABLED(CONFIG_OF_MDIO))
387 return;
388
389 if (!node)
390 return;
391
392 if (of_property_read_bool(node, "eee-broken-100tx"))
393 broken |= MDIO_EEE_100TX;
394 if (of_property_read_bool(node, "eee-broken-1000t"))
395 broken |= MDIO_EEE_1000T;
396 if (of_property_read_bool(node, "eee-broken-10gt"))
397 broken |= MDIO_EEE_10GT;
398 if (of_property_read_bool(node, "eee-broken-1000kx"))
399 broken |= MDIO_EEE_1000KX;
400 if (of_property_read_bool(node, "eee-broken-10gkx4"))
401 broken |= MDIO_EEE_10GKX4;
402 if (of_property_read_bool(node, "eee-broken-10gkr"))
403 broken |= MDIO_EEE_10GKR;
404
405 phydev->eee_broken_modes = broken;
406}
407
408/**
409 * phy_resolve_aneg_pause - Determine pause autoneg results
410 *
411 * @phydev: The phy_device struct
412 *
413 * Once autoneg has completed the local pause settings can be
414 * resolved. Determine if pause and asymmetric pause should be used
415 * by the MAC.
416 */
417
418void phy_resolve_aneg_pause(struct phy_device *phydev)
419{
420 if (phydev->duplex == DUPLEX_FULL) {
421 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
422 phydev->lp_advertising);
423 phydev->asym_pause = linkmode_test_bit(
424 ETHTOOL_LINK_MODE_Asym_Pause_BIT,
425 phydev->lp_advertising);
426 }
427}
428EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
429
430/**
431 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
432 * @phydev: The phy_device struct
433 *
434 * Resolve our and the link partner advertisements into their corresponding
435 * speed and duplex. If full duplex was negotiated, extract the pause mode
436 * from the link partner mask.
437 */
438void phy_resolve_aneg_linkmode(struct phy_device *phydev)
439{
440 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
441 int i;
442
443 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
444
445 for (i = 0; i < ARRAY_SIZE(settings); i++)
446 if (test_bit(settings[i].bit, common)) {
447 phydev->speed = settings[i].speed;
448 phydev->duplex = settings[i].duplex;
449 break;
450 }
451
452 phy_resolve_aneg_pause(phydev);
453}
454EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
455
456/**
457 * phy_check_downshift - check whether downshift occurred
458 * @phydev: The phy_device struct
459 *
460 * Check whether a downshift to a lower speed occurred. If this should be the
461 * case warn the user.
462 * Prerequisite for detecting downshift is that PHY driver implements the
463 * read_status callback and sets phydev->speed to the actual link speed.
464 */
465void phy_check_downshift(struct phy_device *phydev)
466{
467 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
468 int i, speed = SPEED_UNKNOWN;
469
470 phydev->downshifted_rate = 0;
471
472 if (phydev->autoneg == AUTONEG_DISABLE ||
473 phydev->speed == SPEED_UNKNOWN)
474 return;
475
476 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
477
478 for (i = 0; i < ARRAY_SIZE(settings); i++)
479 if (test_bit(settings[i].bit, common)) {
480 speed = settings[i].speed;
481 break;
482 }
483
484 if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
485 return;
486
487 phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
488 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
489
490 phydev->downshifted_rate = 1;
491}
492EXPORT_SYMBOL_GPL(phy_check_downshift);
493
494static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
495{
496 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
497 int i = ARRAY_SIZE(settings);
498
499 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
500
501 while (--i >= 0) {
502 if (test_bit(settings[i].bit, common)) {
503 if (fdx_only && settings[i].duplex != DUPLEX_FULL)
504 continue;
505 return settings[i].speed;
506 }
507 }
508
509 return SPEED_UNKNOWN;
510}
511
512int phy_speed_down_core(struct phy_device *phydev)
513{
514 int min_common_speed = phy_resolve_min_speed(phydev, true);
515
516 if (min_common_speed == SPEED_UNKNOWN)
517 return -EINVAL;
518
519 __set_linkmode_max_speed(min_common_speed, phydev->advertising);
520
521 return 0;
522}
523
524static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
525 u16 regnum)
526{
527 /* Write the desired MMD Devad */
528 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
529
530 /* Write the desired MMD register address */
531 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
532
533 /* Select the Function : DATA with no post increment */
534 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
535 devad | MII_MMD_CTRL_NOINCR);
536}
537
538/**
539 * __phy_read_mmd - Convenience function for reading a register
540 * from an MMD on a given PHY.
541 * @phydev: The phy_device struct
542 * @devad: The MMD to read from (0..31)
543 * @regnum: The register on the MMD to read (0..65535)
544 *
545 * Same rules as for __phy_read();
546 */
547int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
548{
549 int val;
550
551 if (regnum > (u16)~0 || devad > 32)
552 return -EINVAL;
553
554 if (phydev->drv && phydev->drv->read_mmd) {
555 val = phydev->drv->read_mmd(phydev, devad, regnum);
556 } else if (phydev->is_c45) {
557 val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
558 devad, regnum);
559 } else {
560 struct mii_bus *bus = phydev->mdio.bus;
561 int phy_addr = phydev->mdio.addr;
562
563 mmd_phy_indirect(bus, phy_addr, devad, regnum);
564
565 /* Read the content of the MMD's selected register */
566 val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
567 }
568 return val;
569}
570EXPORT_SYMBOL(__phy_read_mmd);
571
572/**
573 * phy_read_mmd - Convenience function for reading a register
574 * from an MMD on a given PHY.
575 * @phydev: The phy_device struct
576 * @devad: The MMD to read from
577 * @regnum: The register on the MMD to read
578 *
579 * Same rules as for phy_read();
580 */
581int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
582{
583 int ret;
584
585 phy_lock_mdio_bus(phydev);
586 ret = __phy_read_mmd(phydev, devad, regnum);
587 phy_unlock_mdio_bus(phydev);
588
589 return ret;
590}
591EXPORT_SYMBOL(phy_read_mmd);
592
593/**
594 * __phy_write_mmd - Convenience function for writing a register
595 * on an MMD on a given PHY.
596 * @phydev: The phy_device struct
597 * @devad: The MMD to read from
598 * @regnum: The register on the MMD to read
599 * @val: value to write to @regnum
600 *
601 * Same rules as for __phy_write();
602 */
603int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
604{
605 int ret;
606
607 if (regnum > (u16)~0 || devad > 32)
608 return -EINVAL;
609
610 if (phydev->drv && phydev->drv->write_mmd) {
611 ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
612 } else if (phydev->is_c45) {
613 ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr,
614 devad, regnum, val);
615 } else {
616 struct mii_bus *bus = phydev->mdio.bus;
617 int phy_addr = phydev->mdio.addr;
618
619 mmd_phy_indirect(bus, phy_addr, devad, regnum);
620
621 /* Write the data into MMD's selected register */
622 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
623
624 ret = 0;
625 }
626 return ret;
627}
628EXPORT_SYMBOL(__phy_write_mmd);
629
630/**
631 * phy_write_mmd - Convenience function for writing a register
632 * on an MMD on a given PHY.
633 * @phydev: The phy_device struct
634 * @devad: The MMD to read from
635 * @regnum: The register on the MMD to read
636 * @val: value to write to @regnum
637 *
638 * Same rules as for phy_write();
639 */
640int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
641{
642 int ret;
643
644 phy_lock_mdio_bus(phydev);
645 ret = __phy_write_mmd(phydev, devad, regnum, val);
646 phy_unlock_mdio_bus(phydev);
647
648 return ret;
649}
650EXPORT_SYMBOL(phy_write_mmd);
651
652/**
653 * phy_modify_changed - Function for modifying a PHY register
654 * @phydev: the phy_device struct
655 * @regnum: register number to modify
656 * @mask: bit mask of bits to clear
657 * @set: new value of bits set in mask to write to @regnum
658 *
659 * NOTE: MUST NOT be called from interrupt context,
660 * because the bus read/write functions may wait for an interrupt
661 * to conclude the operation.
662 *
663 * Returns negative errno, 0 if there was no change, and 1 in case of change
664 */
665int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
666{
667 int ret;
668
669 phy_lock_mdio_bus(phydev);
670 ret = __phy_modify_changed(phydev, regnum, mask, set);
671 phy_unlock_mdio_bus(phydev);
672
673 return ret;
674}
675EXPORT_SYMBOL_GPL(phy_modify_changed);
676
677/**
678 * __phy_modify - Convenience function for modifying a PHY register
679 * @phydev: the phy_device struct
680 * @regnum: register number to modify
681 * @mask: bit mask of bits to clear
682 * @set: new value of bits set in mask to write to @regnum
683 *
684 * NOTE: MUST NOT be called from interrupt context,
685 * because the bus read/write functions may wait for an interrupt
686 * to conclude the operation.
687 */
688int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
689{
690 int ret;
691
692 ret = __phy_modify_changed(phydev, regnum, mask, set);
693
694 return ret < 0 ? ret : 0;
695}
696EXPORT_SYMBOL_GPL(__phy_modify);
697
698/**
699 * phy_modify - Convenience function for modifying a given PHY register
700 * @phydev: the phy_device struct
701 * @regnum: register number to write
702 * @mask: bit mask of bits to clear
703 * @set: new value of bits set in mask to write to @regnum
704 *
705 * NOTE: MUST NOT be called from interrupt context,
706 * because the bus read/write functions may wait for an interrupt
707 * to conclude the operation.
708 */
709int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
710{
711 int ret;
712
713 phy_lock_mdio_bus(phydev);
714 ret = __phy_modify(phydev, regnum, mask, set);
715 phy_unlock_mdio_bus(phydev);
716
717 return ret;
718}
719EXPORT_SYMBOL_GPL(phy_modify);
720
721/**
722 * __phy_modify_mmd_changed - Function for modifying a register on MMD
723 * @phydev: the phy_device struct
724 * @devad: the MMD containing register to modify
725 * @regnum: register number to modify
726 * @mask: bit mask of bits to clear
727 * @set: new value of bits set in mask to write to @regnum
728 *
729 * Unlocked helper function which allows a MMD register to be modified as
730 * new register value = (old register value & ~mask) | set
731 *
732 * Returns negative errno, 0 if there was no change, and 1 in case of change
733 */
734int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
735 u16 mask, u16 set)
736{
737 int new, ret;
738
739 ret = __phy_read_mmd(phydev, devad, regnum);
740 if (ret < 0)
741 return ret;
742
743 new = (ret & ~mask) | set;
744 if (new == ret)
745 return 0;
746
747 ret = __phy_write_mmd(phydev, devad, regnum, new);
748
749 return ret < 0 ? ret : 1;
750}
751EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
752
753/**
754 * phy_modify_mmd_changed - Function for modifying a register on MMD
755 * @phydev: the phy_device struct
756 * @devad: the MMD containing register to modify
757 * @regnum: register number to modify
758 * @mask: bit mask of bits to clear
759 * @set: new value of bits set in mask to write to @regnum
760 *
761 * NOTE: MUST NOT be called from interrupt context,
762 * because the bus read/write functions may wait for an interrupt
763 * to conclude the operation.
764 *
765 * Returns negative errno, 0 if there was no change, and 1 in case of change
766 */
767int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
768 u16 mask, u16 set)
769{
770 int ret;
771
772 phy_lock_mdio_bus(phydev);
773 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
774 phy_unlock_mdio_bus(phydev);
775
776 return ret;
777}
778EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
779
780/**
781 * __phy_modify_mmd - Convenience function for modifying a register on MMD
782 * @phydev: the phy_device struct
783 * @devad: the MMD containing register to modify
784 * @regnum: register number to modify
785 * @mask: bit mask of bits to clear
786 * @set: new value of bits set in mask to write to @regnum
787 *
788 * NOTE: MUST NOT be called from interrupt context,
789 * because the bus read/write functions may wait for an interrupt
790 * to conclude the operation.
791 */
792int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
793 u16 mask, u16 set)
794{
795 int ret;
796
797 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
798
799 return ret < 0 ? ret : 0;
800}
801EXPORT_SYMBOL_GPL(__phy_modify_mmd);
802
803/**
804 * phy_modify_mmd - Convenience function for modifying a register on MMD
805 * @phydev: the phy_device struct
806 * @devad: the MMD containing register to modify
807 * @regnum: register number to modify
808 * @mask: bit mask of bits to clear
809 * @set: new value of bits set in mask to write to @regnum
810 *
811 * NOTE: MUST NOT be called from interrupt context,
812 * because the bus read/write functions may wait for an interrupt
813 * to conclude the operation.
814 */
815int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
816 u16 mask, u16 set)
817{
818 int ret;
819
820 phy_lock_mdio_bus(phydev);
821 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
822 phy_unlock_mdio_bus(phydev);
823
824 return ret;
825}
826EXPORT_SYMBOL_GPL(phy_modify_mmd);
827
828static int __phy_read_page(struct phy_device *phydev)
829{
830 if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
831 return -EOPNOTSUPP;
832
833 return phydev->drv->read_page(phydev);
834}
835
836static int __phy_write_page(struct phy_device *phydev, int page)
837{
838 if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
839 return -EOPNOTSUPP;
840
841 return phydev->drv->write_page(phydev, page);
842}
843
844/**
845 * phy_save_page() - take the bus lock and save the current page
846 * @phydev: a pointer to a &struct phy_device
847 *
848 * Take the MDIO bus lock, and return the current page number. On error,
849 * returns a negative errno. phy_restore_page() must always be called
850 * after this, irrespective of success or failure of this call.
851 */
852int phy_save_page(struct phy_device *phydev)
853{
854 phy_lock_mdio_bus(phydev);
855 return __phy_read_page(phydev);
856}
857EXPORT_SYMBOL_GPL(phy_save_page);
858
859/**
860 * phy_select_page() - take the bus lock, save the current page, and set a page
861 * @phydev: a pointer to a &struct phy_device
862 * @page: desired page
863 *
864 * Take the MDIO bus lock to protect against concurrent access, save the
865 * current PHY page, and set the current page. On error, returns a
866 * negative errno, otherwise returns the previous page number.
867 * phy_restore_page() must always be called after this, irrespective
868 * of success or failure of this call.
869 */
870int phy_select_page(struct phy_device *phydev, int page)
871{
872 int ret, oldpage;
873
874 oldpage = ret = phy_save_page(phydev);
875 if (ret < 0)
876 return ret;
877
878 if (oldpage != page) {
879 ret = __phy_write_page(phydev, page);
880 if (ret < 0)
881 return ret;
882 }
883
884 return oldpage;
885}
886EXPORT_SYMBOL_GPL(phy_select_page);
887
888/**
889 * phy_restore_page() - restore the page register and release the bus lock
890 * @phydev: a pointer to a &struct phy_device
891 * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
892 * @ret: operation's return code
893 *
894 * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
895 * This function propagates the earliest error code from the group of
896 * operations.
897 *
898 * Returns:
899 * @oldpage if it was a negative value, otherwise
900 * @ret if it was a negative errno value, otherwise
901 * phy_write_page()'s negative value if it were in error, otherwise
902 * @ret.
903 */
904int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
905{
906 int r;
907
908 if (oldpage >= 0) {
909 r = __phy_write_page(phydev, oldpage);
910
911 /* Propagate the operation return code if the page write
912 * was successful.
913 */
914 if (ret >= 0 && r < 0)
915 ret = r;
916 } else {
917 /* Propagate the phy page selection error code */
918 ret = oldpage;
919 }
920
921 phy_unlock_mdio_bus(phydev);
922
923 return ret;
924}
925EXPORT_SYMBOL_GPL(phy_restore_page);
926
927/**
928 * phy_read_paged() - Convenience function for reading a paged register
929 * @phydev: a pointer to a &struct phy_device
930 * @page: the page for the phy
931 * @regnum: register number
932 *
933 * Same rules as for phy_read().
934 */
935int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
936{
937 int ret = 0, oldpage;
938
939 oldpage = phy_select_page(phydev, page);
940 if (oldpage >= 0)
941 ret = __phy_read(phydev, regnum);
942
943 return phy_restore_page(phydev, oldpage, ret);
944}
945EXPORT_SYMBOL(phy_read_paged);
946
947/**
948 * phy_write_paged() - Convenience function for writing a paged register
949 * @phydev: a pointer to a &struct phy_device
950 * @page: the page for the phy
951 * @regnum: register number
952 * @val: value to write
953 *
954 * Same rules as for phy_write().
955 */
956int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
957{
958 int ret = 0, oldpage;
959
960 oldpage = phy_select_page(phydev, page);
961 if (oldpage >= 0)
962 ret = __phy_write(phydev, regnum, val);
963
964 return phy_restore_page(phydev, oldpage, ret);
965}
966EXPORT_SYMBOL(phy_write_paged);
967
968/**
969 * phy_modify_paged_changed() - Function for modifying a paged register
970 * @phydev: a pointer to a &struct phy_device
971 * @page: the page for the phy
972 * @regnum: register number
973 * @mask: bit mask of bits to clear
974 * @set: bit mask of bits to set
975 *
976 * Returns negative errno, 0 if there was no change, and 1 in case of change
977 */
978int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
979 u16 mask, u16 set)
980{
981 int ret = 0, oldpage;
982
983 oldpage = phy_select_page(phydev, page);
984 if (oldpage >= 0)
985 ret = __phy_modify_changed(phydev, regnum, mask, set);
986
987 return phy_restore_page(phydev, oldpage, ret);
988}
989EXPORT_SYMBOL(phy_modify_paged_changed);
990
991/**
992 * phy_modify_paged() - Convenience function for modifying a paged register
993 * @phydev: a pointer to a &struct phy_device
994 * @page: the page for the phy
995 * @regnum: register number
996 * @mask: bit mask of bits to clear
997 * @set: bit mask of bits to set
998 *
999 * Same rules as for phy_read() and phy_write().
1000 */
1001int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1002 u16 mask, u16 set)
1003{
1004 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
1005
1006 return ret < 0 ? ret : 0;
1007}
1008EXPORT_SYMBOL(phy_modify_paged);