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1# SPDX-License-Identifier: GPL-2.0
2#
3# PCI configuration
4#
5
6# select this to offer the PCI prompt
7config HAVE_PCI
8 bool
9
10# select this to unconditionally force on PCI support
11config FORCE_PCI
12 bool
13 select HAVE_PCI
14 select PCI
15
16menuconfig PCI
17 bool "PCI support"
18 depends on HAVE_PCI
19 help
20 This option enables support for the PCI local bus, including
21 support for PCI-X and the foundations for PCI Express support.
22 Say 'Y' here unless you know what you are doing.
23
24if PCI
25
26config PCI_DOMAINS
27 bool
28 depends on PCI
29
30config PCI_DOMAINS_GENERIC
31 bool
32 select PCI_DOMAINS
33
34config PCI_SYSCALL
35 bool
36
37source "drivers/pci/pcie/Kconfig"
38
39config PCI_MSI
40 bool "Message Signaled Interrupts (MSI and MSI-X)"
41 select GENERIC_MSI_IRQ
42 help
43 This allows device drivers to enable MSI (Message Signaled
44 Interrupts). Message Signaled Interrupts enable a device to
45 generate an interrupt using an inbound Memory Write on its
46 PCI bus instead of asserting a device IRQ pin.
47
48 Use of PCI MSI interrupts can be disabled at kernel boot time
49 by using the 'pci=nomsi' option. This disables MSI for the
50 entire system.
51
52 If you don't know what to do here, say Y.
53
54config PCI_MSI_ARCH_FALLBACKS
55 bool
56
57config PCI_QUIRKS
58 default y
59 bool "Enable PCI quirk workarounds" if EXPERT
60 help
61 This enables workarounds for various PCI chipset bugs/quirks.
62 Disable this only if your target machine is unaffected by PCI
63 quirks.
64
65config PCI_DEBUG
66 bool "PCI Debugging"
67 depends on DEBUG_KERNEL
68 help
69 Say Y here if you want the PCI core to produce a bunch of debug
70 messages to the system log. Select this if you are having a
71 problem with PCI support and want to see more of what is going on.
72
73 When in doubt, say N.
74
75config PCI_REALLOC_ENABLE_AUTO
76 bool "Enable PCI resource re-allocation detection"
77 depends on PCI_IOV
78 help
79 Say Y here if you want the PCI core to detect if PCI resource
80 re-allocation needs to be enabled. You can always use pci=realloc=on
81 or pci=realloc=off to override it. It will automatically
82 re-allocate PCI resources if SR-IOV BARs have not been allocated by
83 the BIOS.
84
85 When in doubt, say N.
86
87config PCI_STUB
88 tristate "PCI Stub driver"
89 help
90 Say Y or M here if you want be able to reserve a PCI device
91 when it is going to be assigned to a guest operating system.
92
93 When in doubt, say N.
94
95config PCI_PF_STUB
96 tristate "PCI PF Stub driver"
97 depends on PCI_IOV
98 help
99 Say Y or M here if you want to enable support for devices that
100 require SR-IOV support, while at the same time the PF (Physical
101 Function) itself is not providing any actual services on the
102 host itself such as storage or networking.
103
104 When in doubt, say N.
105
106config XEN_PCIDEV_FRONTEND
107 tristate "Xen PCI Frontend"
108 depends on XEN_PV
109 select PCI_XEN
110 select XEN_XENBUS_FRONTEND
111 default y
112 help
113 The PCI device frontend driver allows the kernel to import arbitrary
114 PCI devices from a PCI backend to support PCI driver domains.
115
116config PCI_ATS
117 bool
118
119config PCI_DOE
120 bool
121
122config PCI_ECAM
123 bool
124
125config PCI_LOCKLESS_CONFIG
126 bool
127
128config PCI_BRIDGE_EMUL
129 bool
130
131config PCI_IOV
132 bool "PCI IOV support"
133 select PCI_ATS
134 help
135 I/O Virtualization is a PCI feature supported by some devices
136 which allows them to create virtual devices which share their
137 physical resources.
138
139 If unsure, say N.
140
141config PCI_PRI
142 bool "PCI PRI support"
143 select PCI_ATS
144 help
145 PRI is the PCI Page Request Interface. It allows PCI devices that are
146 behind an IOMMU to recover from page faults.
147
148 If unsure, say N.
149
150config PCI_PASID
151 bool "PCI PASID support"
152 select PCI_ATS
153 help
154 Process Address Space Identifiers (PASIDs) can be used by PCI devices
155 to access more than one IO address space at the same time. To make
156 use of this feature an IOMMU is required which also supports PASIDs.
157 Select this option if you have such an IOMMU and want to compile the
158 driver for it into your kernel.
159
160 If unsure, say N.
161
162config PCI_P2PDMA
163 bool "PCI peer-to-peer transfer support"
164 depends on ZONE_DEVICE
165 #
166 # The need for the scatterlist DMA bus address flag means PCI P2PDMA
167 # requires 64bit
168 #
169 depends on 64BIT
170 select GENERIC_ALLOCATOR
171 select NEED_SG_DMA_FLAGS
172 help
173 Enables drivers to do PCI peer-to-peer transactions to and from
174 BARs that are exposed in other devices that are the part of
175 the hierarchy where peer-to-peer DMA is guaranteed by the PCI
176 specification to work (ie. anything below a single PCI bridge).
177
178 Many PCIe root complexes do not support P2P transactions and
179 it's hard to tell which support it at all, so at this time,
180 P2P DMA transactions must be between devices behind the same root
181 port.
182
183 If unsure, say N.
184
185config PCI_LABEL
186 def_bool y if (DMI || ACPI)
187 select NLS
188
189config PCI_HYPERV
190 tristate "Hyper-V PCI Frontend"
191 depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS
192 select PCI_HYPERV_INTERFACE
193 help
194 The PCI device frontend driver allows the kernel to import arbitrary
195 PCI devices from a PCI backend to support PCI driver domains.
196
197config PCI_DYNAMIC_OF_NODES
198 bool "Create Device tree nodes for PCI devices"
199 depends on OF_IRQ
200 select OF_DYNAMIC
201 help
202 This option enables support for generating device tree nodes for some
203 PCI devices. Thus, the driver of this kind can load and overlay
204 flattened device tree for its downstream devices.
205
206 Once this option is selected, the device tree nodes will be generated
207 for all PCI bridges.
208
209choice
210 prompt "PCI Express hierarchy optimization setting"
211 default PCIE_BUS_DEFAULT
212 depends on PCI && EXPERT
213 help
214 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
215 device parameters that affect performance and the ability to
216 support hotplug and peer-to-peer DMA.
217
218 The following choices set the MPS and MRRS optimization strategy
219 at compile-time. The choices are the same as those offered for
220 the kernel command-line parameter 'pci', i.e.,
221 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
222 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
223
224 This is a compile-time setting and can be overridden by the above
225 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
226
227config PCIE_BUS_TUNE_OFF
228 bool "Tune Off"
229 depends on PCI
230 help
231 Use the BIOS defaults; don't touch MPS at all. This is the same
232 as booting with 'pci=pcie_bus_tune_off'.
233
234config PCIE_BUS_DEFAULT
235 bool "Default"
236 depends on PCI
237 help
238 Default choice; ensure that the MPS matches upstream bridge.
239
240config PCIE_BUS_SAFE
241 bool "Safe"
242 depends on PCI
243 help
244 Use largest MPS that boot-time devices support. If you have a
245 closed system with no possibility of adding new devices, this
246 will use the largest MPS that's supported by all devices. This
247 is the same as booting with 'pci=pcie_bus_safe'.
248
249config PCIE_BUS_PERFORMANCE
250 bool "Performance"
251 depends on PCI
252 help
253 Use MPS and MRRS for best performance. Ensure that a given
254 device's MPS is no larger than its parent MPS, which allows us to
255 keep all switches/bridges to the max MPS supported by their
256 parent. This is the same as booting with 'pci=pcie_bus_perf'.
257
258config PCIE_BUS_PEER2PEER
259 bool "Peer2peer"
260 depends on PCI
261 help
262 Set MPS = 128 for all devices. MPS configuration effected by the
263 other options could cause the MPS on one root port to be
264 different than that of the MPS on another, which may cause
265 hot-added devices or peer-to-peer DMA to fail. Set MPS to the
266 smallest possible value (128B) system-wide to avoid these issues.
267 This is the same as booting with 'pci=pcie_bus_peer2peer'.
268
269endchoice
270
271config VGA_ARB
272 bool "VGA Arbitration" if EXPERT
273 default y
274 depends on (PCI && !S390)
275 help
276 Some "legacy" VGA devices implemented on PCI typically have the same
277 hard-decoded addresses as they did on ISA. When multiple PCI devices
278 are accessed at same time they need some kind of coordination. Please
279 see Documentation/gpu/vgaarbiter.rst for more details. Select this to
280 enable VGA arbiter.
281
282config VGA_ARB_MAX_GPUS
283 int "Maximum number of GPUs"
284 default 16
285 depends on VGA_ARB
286 help
287 Reserves space in the kernel to maintain resource locking for
288 multiple GPUS. The overhead for each GPU is very small.
289
290source "drivers/pci/hotplug/Kconfig"
291source "drivers/pci/controller/Kconfig"
292source "drivers/pci/endpoint/Kconfig"
293source "drivers/pci/switch/Kconfig"
294
295endif
1# SPDX-License-Identifier: GPL-2.0
2#
3# PCI configuration
4#
5
6# select this to offer the PCI prompt
7config HAVE_PCI
8 bool
9
10# select this to unconditionally force on PCI support
11config FORCE_PCI
12 bool
13 select HAVE_PCI
14 select PCI
15
16# select this to provide a generic PCI iomap,
17# without PCI itself having to be defined
18config GENERIC_PCI_IOMAP
19 bool
20
21menuconfig PCI
22 bool "PCI support"
23 depends on HAVE_PCI
24 help
25 This option enables support for the PCI local bus, including
26 support for PCI-X and the foundations for PCI Express support.
27 Say 'Y' here unless you know what you are doing.
28
29if PCI
30
31config PCI_DOMAINS
32 bool
33 depends on PCI
34
35config PCI_DOMAINS_GENERIC
36 bool
37 select PCI_DOMAINS
38
39config PCI_SYSCALL
40 bool
41
42source "drivers/pci/pcie/Kconfig"
43
44config PCI_MSI
45 bool "Message Signaled Interrupts (MSI and MSI-X)"
46 select GENERIC_MSI_IRQ
47 help
48 This allows device drivers to enable MSI (Message Signaled
49 Interrupts). Message Signaled Interrupts enable a device to
50 generate an interrupt using an inbound Memory Write on its
51 PCI bus instead of asserting a device IRQ pin.
52
53 Use of PCI MSI interrupts can be disabled at kernel boot time
54 by using the 'pci=nomsi' option. This disables MSI for the
55 entire system.
56
57 If you don't know what to do here, say Y.
58
59config PCI_MSI_ARCH_FALLBACKS
60 bool
61
62config PCI_QUIRKS
63 default y
64 bool "Enable PCI quirk workarounds" if EXPERT
65 help
66 This enables workarounds for various PCI chipset bugs/quirks.
67 Disable this only if your target machine is unaffected by PCI
68 quirks.
69
70config PCI_DEBUG
71 bool "PCI Debugging"
72 depends on DEBUG_KERNEL
73 help
74 Say Y here if you want the PCI core to produce a bunch of debug
75 messages to the system log. Select this if you are having a
76 problem with PCI support and want to see more of what is going on.
77
78 When in doubt, say N.
79
80config PCI_REALLOC_ENABLE_AUTO
81 bool "Enable PCI resource re-allocation detection"
82 depends on PCI_IOV
83 help
84 Say Y here if you want the PCI core to detect if PCI resource
85 re-allocation needs to be enabled. You can always use pci=realloc=on
86 or pci=realloc=off to override it. It will automatically
87 re-allocate PCI resources if SR-IOV BARs have not been allocated by
88 the BIOS.
89
90 When in doubt, say N.
91
92config PCI_STUB
93 tristate "PCI Stub driver"
94 help
95 Say Y or M here if you want be able to reserve a PCI device
96 when it is going to be assigned to a guest operating system.
97
98 When in doubt, say N.
99
100config PCI_PF_STUB
101 tristate "PCI PF Stub driver"
102 depends on PCI_IOV
103 help
104 Say Y or M here if you want to enable support for devices that
105 require SR-IOV support, while at the same time the PF (Physical
106 Function) itself is not providing any actual services on the
107 host itself such as storage or networking.
108
109 When in doubt, say N.
110
111config XEN_PCIDEV_FRONTEND
112 tristate "Xen PCI Frontend"
113 depends on XEN_PV
114 select PCI_XEN
115 select XEN_XENBUS_FRONTEND
116 default y
117 help
118 The PCI device frontend driver allows the kernel to import arbitrary
119 PCI devices from a PCI backend to support PCI driver domains.
120
121config PCI_ATS
122 bool
123
124config PCI_DOE
125 bool
126
127config PCI_ECAM
128 bool
129
130config PCI_LOCKLESS_CONFIG
131 bool
132
133config PCI_BRIDGE_EMUL
134 bool
135
136config PCI_IOV
137 bool "PCI IOV support"
138 select PCI_ATS
139 help
140 I/O Virtualization is a PCI feature supported by some devices
141 which allows them to create virtual devices which share their
142 physical resources.
143
144 If unsure, say N.
145
146config PCI_NPEM
147 bool "Native PCIe Enclosure Management"
148 depends on LEDS_CLASS=y
149 help
150 Support for Native PCIe Enclosure Management. It allows managing LED
151 indications in storage enclosures. Enclosure must support following
152 indications: OK, Locate, Fail, Rebuild, other indications are
153 optional.
154
155config PCI_PRI
156 bool "PCI PRI support"
157 select PCI_ATS
158 help
159 PRI is the PCI Page Request Interface. It allows PCI devices that are
160 behind an IOMMU to recover from page faults.
161
162 If unsure, say N.
163
164config PCI_PASID
165 bool "PCI PASID support"
166 select PCI_ATS
167 help
168 Process Address Space Identifiers (PASIDs) can be used by PCI devices
169 to access more than one IO address space at the same time. To make
170 use of this feature an IOMMU is required which also supports PASIDs.
171 Select this option if you have such an IOMMU and want to compile the
172 driver for it into your kernel.
173
174 If unsure, say N.
175
176config PCIE_TPH
177 bool "TLP Processing Hints"
178 help
179 This option adds support for PCIe TLP Processing Hints (TPH).
180 TPH allows endpoint devices to provide optimization hints, such as
181 desired caching behavior, for requests that target memory space.
182 These hints, called Steering Tags, can empower the system hardware
183 to optimize the utilization of platform resources.
184
185config PCI_P2PDMA
186 bool "PCI peer-to-peer transfer support"
187 depends on ZONE_DEVICE
188 #
189 # The need for the scatterlist DMA bus address flag means PCI P2PDMA
190 # requires 64bit
191 #
192 depends on 64BIT
193 select GENERIC_ALLOCATOR
194 select NEED_SG_DMA_FLAGS
195 help
196 Enables drivers to do PCI peer-to-peer transactions to and from
197 BARs that are exposed in other devices that are the part of
198 the hierarchy where peer-to-peer DMA is guaranteed by the PCI
199 specification to work (ie. anything below a single PCI bridge).
200
201 Many PCIe root complexes do not support P2P transactions and
202 it's hard to tell which support it at all, so at this time,
203 P2P DMA transactions must be between devices behind the same root
204 port.
205
206 If unsure, say N.
207
208config PCI_LABEL
209 def_bool y if (DMI || ACPI)
210 select NLS
211
212config PCI_HYPERV
213 tristate "Hyper-V PCI Frontend"
214 depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS
215 select PCI_HYPERV_INTERFACE
216 help
217 The PCI device frontend driver allows the kernel to import arbitrary
218 PCI devices from a PCI backend to support PCI driver domains.
219
220config PCI_DYNAMIC_OF_NODES
221 bool "Create Device tree nodes for PCI devices"
222 depends on OF_IRQ
223 select OF_DYNAMIC
224 help
225 This option enables support for generating device tree nodes for some
226 PCI devices. Thus, the driver of this kind can load and overlay
227 flattened device tree for its downstream devices.
228
229 Once this option is selected, the device tree nodes will be generated
230 for all PCI bridges.
231
232choice
233 prompt "PCI Express hierarchy optimization setting"
234 default PCIE_BUS_DEFAULT
235 depends on PCI && EXPERT
236 help
237 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
238 device parameters that affect performance and the ability to
239 support hotplug and peer-to-peer DMA.
240
241 The following choices set the MPS and MRRS optimization strategy
242 at compile-time. The choices are the same as those offered for
243 the kernel command-line parameter 'pci', i.e.,
244 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
245 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
246
247 This is a compile-time setting and can be overridden by the above
248 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
249
250config PCIE_BUS_TUNE_OFF
251 bool "Tune Off"
252 depends on PCI
253 help
254 Use the BIOS defaults; don't touch MPS at all. This is the same
255 as booting with 'pci=pcie_bus_tune_off'.
256
257config PCIE_BUS_DEFAULT
258 bool "Default"
259 depends on PCI
260 help
261 Default choice; ensure that the MPS matches upstream bridge.
262
263config PCIE_BUS_SAFE
264 bool "Safe"
265 depends on PCI
266 help
267 Use largest MPS that boot-time devices support. If you have a
268 closed system with no possibility of adding new devices, this
269 will use the largest MPS that's supported by all devices. This
270 is the same as booting with 'pci=pcie_bus_safe'.
271
272config PCIE_BUS_PERFORMANCE
273 bool "Performance"
274 depends on PCI
275 help
276 Use MPS and MRRS for best performance. Ensure that a given
277 device's MPS is no larger than its parent MPS, which allows us to
278 keep all switches/bridges to the max MPS supported by their
279 parent. This is the same as booting with 'pci=pcie_bus_perf'.
280
281config PCIE_BUS_PEER2PEER
282 bool "Peer2peer"
283 depends on PCI
284 help
285 Set MPS = 128 for all devices. MPS configuration effected by the
286 other options could cause the MPS on one root port to be
287 different than that of the MPS on another, which may cause
288 hot-added devices or peer-to-peer DMA to fail. Set MPS to the
289 smallest possible value (128B) system-wide to avoid these issues.
290 This is the same as booting with 'pci=pcie_bus_peer2peer'.
291
292endchoice
293
294config VGA_ARB
295 bool "VGA Arbitration" if EXPERT
296 default y
297 depends on (PCI && !S390)
298 help
299 Some "legacy" VGA devices implemented on PCI typically have the same
300 hard-decoded addresses as they did on ISA. When multiple PCI devices
301 are accessed at same time they need some kind of coordination. Please
302 see Documentation/gpu/vgaarbiter.rst for more details. Select this to
303 enable VGA arbiter.
304
305config VGA_ARB_MAX_GPUS
306 int "Maximum number of GPUs"
307 default 16
308 depends on VGA_ARB
309 help
310 Reserves space in the kernel to maintain resource locking for
311 multiple GPUS. The overhead for each GPU is very small.
312
313source "drivers/pci/hotplug/Kconfig"
314source "drivers/pci/controller/Kconfig"
315source "drivers/pci/endpoint/Kconfig"
316source "drivers/pci/switch/Kconfig"
317source "drivers/pci/pwrctrl/Kconfig"
318
319endif