1// SPDX-License-Identifier: ISC
   2/*
   3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   4 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
   5 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
   6 */
   7
   8#include "coredump.h"
   9
  10#include <linux/devcoredump.h>
  11#include <linux/kernel.h>
  12#include <linux/types.h>
  13#include <linux/utsname.h>
  14
  15#include "debug.h"
  16#include "hw.h"
  17
  18static const struct ath10k_mem_section qca6174_hw21_register_sections[] = {
  19	{0x800, 0x810},
  20	{0x820, 0x82C},
  21	{0x830, 0x8F4},
  22	{0x90C, 0x91C},
  23	{0xA14, 0xA18},
  24	{0xA84, 0xA94},
  25	{0xAA8, 0xAD4},
  26	{0xADC, 0xB40},
  27	{0x1000, 0x10A4},
  28	{0x10BC, 0x111C},
  29	{0x1134, 0x1138},
  30	{0x1144, 0x114C},
  31	{0x1150, 0x115C},
  32	{0x1160, 0x1178},
  33	{0x1240, 0x1260},
  34	{0x2000, 0x207C},
  35	{0x3000, 0x3014},
  36	{0x4000, 0x4014},
  37	{0x5000, 0x5124},
  38	{0x6000, 0x6040},
  39	{0x6080, 0x60CC},
  40	{0x6100, 0x611C},
  41	{0x6140, 0x61D8},
  42	{0x6200, 0x6238},
  43	{0x6240, 0x628C},
  44	{0x62C0, 0x62EC},
  45	{0x6380, 0x63E8},
  46	{0x6400, 0x6440},
  47	{0x6480, 0x64CC},
  48	{0x6500, 0x651C},
  49	{0x6540, 0x6580},
  50	{0x6600, 0x6638},
  51	{0x6640, 0x668C},
  52	{0x66C0, 0x66EC},
  53	{0x6780, 0x67E8},
  54	{0x7080, 0x708C},
  55	{0x70C0, 0x70C8},
  56	{0x7400, 0x741C},
  57	{0x7440, 0x7454},
  58	{0x7800, 0x7818},
  59	{0x8000, 0x8004},
  60	{0x8010, 0x8064},
  61	{0x8080, 0x8084},
  62	{0x80A0, 0x80A4},
  63	{0x80C0, 0x80C4},
  64	{0x80E0, 0x80F4},
  65	{0x8100, 0x8104},
  66	{0x8110, 0x812C},
  67	{0x9000, 0x9004},
  68	{0x9800, 0x982C},
  69	{0x9830, 0x9838},
  70	{0x9840, 0x986C},
  71	{0x9870, 0x9898},
  72	{0x9A00, 0x9C00},
  73	{0xD580, 0xD59C},
  74	{0xF000, 0xF0E0},
  75	{0xF140, 0xF190},
  76	{0xF250, 0xF25C},
  77	{0xF260, 0xF268},
  78	{0xF26C, 0xF2A8},
  79	{0x10008, 0x1000C},
  80	{0x10014, 0x10018},
  81	{0x1001C, 0x10020},
  82	{0x10024, 0x10028},
  83	{0x10030, 0x10034},
  84	{0x10040, 0x10054},
  85	{0x10058, 0x1007C},
  86	{0x10080, 0x100C4},
  87	{0x100C8, 0x10114},
  88	{0x1012C, 0x10130},
  89	{0x10138, 0x10144},
  90	{0x10200, 0x10220},
  91	{0x10230, 0x10250},
  92	{0x10260, 0x10280},
  93	{0x10290, 0x102B0},
  94	{0x102C0, 0x102DC},
  95	{0x102E0, 0x102F4},
  96	{0x102FC, 0x1037C},
  97	{0x10380, 0x10390},
  98	{0x10800, 0x10828},
  99	{0x10840, 0x10844},
 100	{0x10880, 0x10884},
 101	{0x108C0, 0x108E8},
 102	{0x10900, 0x10928},
 103	{0x10940, 0x10944},
 104	{0x10980, 0x10984},
 105	{0x109C0, 0x109E8},
 106	{0x10A00, 0x10A28},
 107	{0x10A40, 0x10A50},
 108	{0x11000, 0x11028},
 109	{0x11030, 0x11034},
 110	{0x11038, 0x11068},
 111	{0x11070, 0x11074},
 112	{0x11078, 0x110A8},
 113	{0x110B0, 0x110B4},
 114	{0x110B8, 0x110E8},
 115	{0x110F0, 0x110F4},
 116	{0x110F8, 0x11128},
 117	{0x11138, 0x11144},
 118	{0x11178, 0x11180},
 119	{0x111B8, 0x111C0},
 120	{0x111F8, 0x11200},
 121	{0x11238, 0x1123C},
 122	{0x11270, 0x11274},
 123	{0x11278, 0x1127C},
 124	{0x112B0, 0x112B4},
 125	{0x112B8, 0x112BC},
 126	{0x112F0, 0x112F4},
 127	{0x112F8, 0x112FC},
 128	{0x11338, 0x1133C},
 129	{0x11378, 0x1137C},
 130	{0x113B8, 0x113BC},
 131	{0x113F8, 0x113FC},
 132	{0x11438, 0x11440},
 133	{0x11478, 0x11480},
 134	{0x114B8, 0x114BC},
 135	{0x114F8, 0x114FC},
 136	{0x11538, 0x1153C},
 137	{0x11578, 0x1157C},
 138	{0x115B8, 0x115BC},
 139	{0x115F8, 0x115FC},
 140	{0x11638, 0x1163C},
 141	{0x11678, 0x1167C},
 142	{0x116B8, 0x116BC},
 143	{0x116F8, 0x116FC},
 144	{0x11738, 0x1173C},
 145	{0x11778, 0x1177C},
 146	{0x117B8, 0x117BC},
 147	{0x117F8, 0x117FC},
 148	{0x17000, 0x1701C},
 149	{0x17020, 0x170AC},
 150	{0x18000, 0x18050},
 151	{0x18054, 0x18074},
 152	{0x18080, 0x180D4},
 153	{0x180DC, 0x18104},
 154	{0x18108, 0x1813C},
 155	{0x18144, 0x18148},
 156	{0x18168, 0x18174},
 157	{0x18178, 0x18180},
 158	{0x181C8, 0x181E0},
 159	{0x181E4, 0x181E8},
 160	{0x181EC, 0x1820C},
 161	{0x1825C, 0x18280},
 162	{0x18284, 0x18290},
 163	{0x18294, 0x182A0},
 164	{0x18300, 0x18304},
 165	{0x18314, 0x18320},
 166	{0x18328, 0x18350},
 167	{0x1835C, 0x1836C},
 168	{0x18370, 0x18390},
 169	{0x18398, 0x183AC},
 170	{0x183BC, 0x183D8},
 171	{0x183DC, 0x183F4},
 172	{0x18400, 0x186F4},
 173	{0x186F8, 0x1871C},
 174	{0x18720, 0x18790},
 175	{0x19800, 0x19830},
 176	{0x19834, 0x19840},
 177	{0x19880, 0x1989C},
 178	{0x198A4, 0x198B0},
 179	{0x198BC, 0x19900},
 180	{0x19C00, 0x19C88},
 181	{0x19D00, 0x19D20},
 182	{0x19E00, 0x19E7C},
 183	{0x19E80, 0x19E94},
 184	{0x19E98, 0x19EAC},
 185	{0x19EB0, 0x19EBC},
 186	{0x19F70, 0x19F74},
 187	{0x19F80, 0x19F8C},
 188	{0x19FA0, 0x19FB4},
 189	{0x19FC0, 0x19FD8},
 190	{0x1A000, 0x1A200},
 191	{0x1A204, 0x1A210},
 192	{0x1A228, 0x1A22C},
 193	{0x1A230, 0x1A248},
 194	{0x1A250, 0x1A270},
 195	{0x1A280, 0x1A290},
 196	{0x1A2A0, 0x1A2A4},
 197	{0x1A2C0, 0x1A2EC},
 198	{0x1A300, 0x1A3BC},
 199	{0x1A3F0, 0x1A3F4},
 200	{0x1A3F8, 0x1A434},
 201	{0x1A438, 0x1A444},
 202	{0x1A448, 0x1A468},
 203	{0x1A580, 0x1A58C},
 204	{0x1A644, 0x1A654},
 205	{0x1A670, 0x1A698},
 206	{0x1A6AC, 0x1A6B0},
 207	{0x1A6D0, 0x1A6D4},
 208	{0x1A6EC, 0x1A70C},
 209	{0x1A710, 0x1A738},
 210	{0x1A7C0, 0x1A7D0},
 211	{0x1A7D4, 0x1A7D8},
 212	{0x1A7DC, 0x1A7E4},
 213	{0x1A7F0, 0x1A7F8},
 214	{0x1A888, 0x1A89C},
 215	{0x1A8A8, 0x1A8AC},
 216	{0x1A8C0, 0x1A8DC},
 217	{0x1A8F0, 0x1A8FC},
 218	{0x1AE04, 0x1AE08},
 219	{0x1AE18, 0x1AE24},
 220	{0x1AF80, 0x1AF8C},
 221	{0x1AFA0, 0x1AFB4},
 222	{0x1B000, 0x1B200},
 223	{0x1B284, 0x1B288},
 224	{0x1B2D0, 0x1B2D8},
 225	{0x1B2DC, 0x1B2EC},
 226	{0x1B300, 0x1B340},
 227	{0x1B374, 0x1B378},
 228	{0x1B380, 0x1B384},
 229	{0x1B388, 0x1B38C},
 230	{0x1B404, 0x1B408},
 231	{0x1B420, 0x1B428},
 232	{0x1B440, 0x1B444},
 233	{0x1B448, 0x1B44C},
 234	{0x1B450, 0x1B458},
 235	{0x1B45C, 0x1B468},
 236	{0x1B584, 0x1B58C},
 237	{0x1B68C, 0x1B690},
 238	{0x1B6AC, 0x1B6B0},
 239	{0x1B7F0, 0x1B7F8},
 240	{0x1C800, 0x1CC00},
 241	{0x1CE00, 0x1CE04},
 242	{0x1CF80, 0x1CF84},
 243	{0x1D200, 0x1D800},
 244	{0x1E000, 0x20014},
 245	{0x20100, 0x20124},
 246	{0x21400, 0x217A8},
 247	{0x21800, 0x21BA8},
 248	{0x21C00, 0x21FA8},
 249	{0x22000, 0x223A8},
 250	{0x22400, 0x227A8},
 251	{0x22800, 0x22BA8},
 252	{0x22C00, 0x22FA8},
 253	{0x23000, 0x233A8},
 254	{0x24000, 0x24034},
 255	{0x26000, 0x26064},
 256	{0x27000, 0x27024},
 257	{0x34000, 0x3400C},
 258	{0x34400, 0x3445C},
 259	{0x34800, 0x3485C},
 260	{0x34C00, 0x34C5C},
 261	{0x35000, 0x3505C},
 262	{0x35400, 0x3545C},
 263	{0x35800, 0x3585C},
 264	{0x35C00, 0x35C5C},
 265	{0x36000, 0x3605C},
 266	{0x38000, 0x38064},
 267	{0x38070, 0x380E0},
 268	{0x3A000, 0x3A064},
 269	{0x40000, 0x400A4},
 270	{0x80000, 0x8000C},
 271	{0x80010, 0x80020},
 272};
 273
 274static const struct ath10k_mem_section qca6174_hw30_sdio_register_sections[] = {
 275	{0x800, 0x810},
 276	{0x820, 0x82C},
 277	{0x830, 0x8F4},
 278	{0x90C, 0x91C},
 279	{0xA14, 0xA18},
 280	{0xA84, 0xA94},
 281	{0xAA8, 0xAD4},
 282	{0xADC, 0xB40},
 283	{0x1000, 0x10A4},
 284	{0x10BC, 0x111C},
 285	{0x1134, 0x1138},
 286	{0x1144, 0x114C},
 287	{0x1150, 0x115C},
 288	{0x1160, 0x1178},
 289	{0x1240, 0x1260},
 290	{0x2000, 0x207C},
 291	{0x3000, 0x3014},
 292	{0x4000, 0x4014},
 293	{0x5000, 0x5124},
 294	{0x6000, 0x6040},
 295	{0x6080, 0x60CC},
 296	{0x6100, 0x611C},
 297	{0x6140, 0x61D8},
 298	{0x6200, 0x6238},
 299	{0x6240, 0x628C},
 300	{0x62C0, 0x62EC},
 301	{0x6380, 0x63E8},
 302	{0x6400, 0x6440},
 303	{0x6480, 0x64CC},
 304	{0x6500, 0x651C},
 305	{0x6540, 0x6580},
 306	{0x6600, 0x6638},
 307	{0x6640, 0x668C},
 308	{0x66C0, 0x66EC},
 309	{0x6780, 0x67E8},
 310	{0x7080, 0x708C},
 311	{0x70C0, 0x70C8},
 312	{0x7400, 0x741C},
 313	{0x7440, 0x7454},
 314	{0x7800, 0x7818},
 315	{0x8010, 0x8060},
 316	{0x8080, 0x8084},
 317	{0x80A0, 0x80A4},
 318	{0x80C0, 0x80C4},
 319	{0x80E0, 0x80ec},
 320	{0x8110, 0x8128},
 321	{0x9000, 0x9004},
 322	{0xF000, 0xF0E0},
 323	{0xF140, 0xF190},
 324	{0xF250, 0xF25C},
 325	{0xF260, 0xF268},
 326	{0xF26C, 0xF2A8},
 327	{0x10008, 0x1000C},
 328	{0x10014, 0x10018},
 329	{0x1001C, 0x10020},
 330	{0x10024, 0x10028},
 331	{0x10030, 0x10034},
 332	{0x10040, 0x10054},
 333	{0x10058, 0x1007C},
 334	{0x10080, 0x100C4},
 335	{0x100C8, 0x10114},
 336	{0x1012C, 0x10130},
 337	{0x10138, 0x10144},
 338	{0x10200, 0x10220},
 339	{0x10230, 0x10250},
 340	{0x10260, 0x10280},
 341	{0x10290, 0x102B0},
 342	{0x102C0, 0x102DC},
 343	{0x102E0, 0x102F4},
 344	{0x102FC, 0x1037C},
 345	{0x10380, 0x10390},
 346	{0x10800, 0x10828},
 347	{0x10840, 0x10844},
 348	{0x10880, 0x10884},
 349	{0x108C0, 0x108E8},
 350	{0x10900, 0x10928},
 351	{0x10940, 0x10944},
 352	{0x10980, 0x10984},
 353	{0x109C0, 0x109E8},
 354	{0x10A00, 0x10A28},
 355	{0x10A40, 0x10A50},
 356	{0x11000, 0x11028},
 357	{0x11030, 0x11034},
 358	{0x11038, 0x11068},
 359	{0x11070, 0x11074},
 360	{0x11078, 0x110A8},
 361	{0x110B0, 0x110B4},
 362	{0x110B8, 0x110E8},
 363	{0x110F0, 0x110F4},
 364	{0x110F8, 0x11128},
 365	{0x11138, 0x11144},
 366	{0x11178, 0x11180},
 367	{0x111B8, 0x111C0},
 368	{0x111F8, 0x11200},
 369	{0x11238, 0x1123C},
 370	{0x11270, 0x11274},
 371	{0x11278, 0x1127C},
 372	{0x112B0, 0x112B4},
 373	{0x112B8, 0x112BC},
 374	{0x112F0, 0x112F4},
 375	{0x112F8, 0x112FC},
 376	{0x11338, 0x1133C},
 377	{0x11378, 0x1137C},
 378	{0x113B8, 0x113BC},
 379	{0x113F8, 0x113FC},
 380	{0x11438, 0x11440},
 381	{0x11478, 0x11480},
 382	{0x114B8, 0x114BC},
 383	{0x114F8, 0x114FC},
 384	{0x11538, 0x1153C},
 385	{0x11578, 0x1157C},
 386	{0x115B8, 0x115BC},
 387	{0x115F8, 0x115FC},
 388	{0x11638, 0x1163C},
 389	{0x11678, 0x1167C},
 390	{0x116B8, 0x116BC},
 391	{0x116F8, 0x116FC},
 392	{0x11738, 0x1173C},
 393	{0x11778, 0x1177C},
 394	{0x117B8, 0x117BC},
 395	{0x117F8, 0x117FC},
 396	{0x17000, 0x1701C},
 397	{0x17020, 0x170AC},
 398	{0x18000, 0x18050},
 399	{0x18054, 0x18074},
 400	{0x18080, 0x180D4},
 401	{0x180DC, 0x18104},
 402	{0x18108, 0x1813C},
 403	{0x18144, 0x18148},
 404	{0x18168, 0x18174},
 405	{0x18178, 0x18180},
 406	{0x181C8, 0x181E0},
 407	{0x181E4, 0x181E8},
 408	{0x181EC, 0x1820C},
 409	{0x1825C, 0x18280},
 410	{0x18284, 0x18290},
 411	{0x18294, 0x182A0},
 412	{0x18300, 0x18304},
 413	{0x18314, 0x18320},
 414	{0x18328, 0x18350},
 415	{0x1835C, 0x1836C},
 416	{0x18370, 0x18390},
 417	{0x18398, 0x183AC},
 418	{0x183BC, 0x183D8},
 419	{0x183DC, 0x183F4},
 420	{0x18400, 0x186F4},
 421	{0x186F8, 0x1871C},
 422	{0x18720, 0x18790},
 423	{0x19800, 0x19830},
 424	{0x19834, 0x19840},
 425	{0x19880, 0x1989C},
 426	{0x198A4, 0x198B0},
 427	{0x198BC, 0x19900},
 428	{0x19C00, 0x19C88},
 429	{0x19D00, 0x19D20},
 430	{0x19E00, 0x19E7C},
 431	{0x19E80, 0x19E94},
 432	{0x19E98, 0x19EAC},
 433	{0x19EB0, 0x19EBC},
 434	{0x19F70, 0x19F74},
 435	{0x19F80, 0x19F8C},
 436	{0x19FA0, 0x19FB4},
 437	{0x19FC0, 0x19FD8},
 438	{0x1A000, 0x1A200},
 439	{0x1A204, 0x1A210},
 440	{0x1A228, 0x1A22C},
 441	{0x1A230, 0x1A248},
 442	{0x1A250, 0x1A270},
 443	{0x1A280, 0x1A290},
 444	{0x1A2A0, 0x1A2A4},
 445	{0x1A2C0, 0x1A2EC},
 446	{0x1A300, 0x1A3BC},
 447	{0x1A3F0, 0x1A3F4},
 448	{0x1A3F8, 0x1A434},
 449	{0x1A438, 0x1A444},
 450	{0x1A448, 0x1A468},
 451	{0x1A580, 0x1A58C},
 452	{0x1A644, 0x1A654},
 453	{0x1A670, 0x1A698},
 454	{0x1A6AC, 0x1A6B0},
 455	{0x1A6D0, 0x1A6D4},
 456	{0x1A6EC, 0x1A70C},
 457	{0x1A710, 0x1A738},
 458	{0x1A7C0, 0x1A7D0},
 459	{0x1A7D4, 0x1A7D8},
 460	{0x1A7DC, 0x1A7E4},
 461	{0x1A7F0, 0x1A7F8},
 462	{0x1A888, 0x1A89C},
 463	{0x1A8A8, 0x1A8AC},
 464	{0x1A8C0, 0x1A8DC},
 465	{0x1A8F0, 0x1A8FC},
 466	{0x1AE04, 0x1AE08},
 467	{0x1AE18, 0x1AE24},
 468	{0x1AF80, 0x1AF8C},
 469	{0x1AFA0, 0x1AFB4},
 470	{0x1B000, 0x1B200},
 471	{0x1B284, 0x1B288},
 472	{0x1B2D0, 0x1B2D8},
 473	{0x1B2DC, 0x1B2EC},
 474	{0x1B300, 0x1B340},
 475	{0x1B374, 0x1B378},
 476	{0x1B380, 0x1B384},
 477	{0x1B388, 0x1B38C},
 478	{0x1B404, 0x1B408},
 479	{0x1B420, 0x1B428},
 480	{0x1B440, 0x1B444},
 481	{0x1B448, 0x1B44C},
 482	{0x1B450, 0x1B458},
 483	{0x1B45C, 0x1B468},
 484	{0x1B584, 0x1B58C},
 485	{0x1B68C, 0x1B690},
 486	{0x1B6AC, 0x1B6B0},
 487	{0x1B7F0, 0x1B7F8},
 488	{0x1C800, 0x1CC00},
 489	{0x1CE00, 0x1CE04},
 490	{0x1CF80, 0x1CF84},
 491	{0x1D200, 0x1D800},
 492	{0x1E000, 0x20014},
 493	{0x20100, 0x20124},
 494	{0x21400, 0x217A8},
 495	{0x21800, 0x21BA8},
 496	{0x21C00, 0x21FA8},
 497	{0x22000, 0x223A8},
 498	{0x22400, 0x227A8},
 499	{0x22800, 0x22BA8},
 500	{0x22C00, 0x22FA8},
 501	{0x23000, 0x233A8},
 502	{0x24000, 0x24034},
 503
 504	/* EFUSE0,1,2 is disabled here
 505	 * because its state may be reset
 506	 *
 507	 * {0x24800, 0x24804},
 508	 * {0x25000, 0x25004},
 509	 * {0x25800, 0x25804},
 510	 */
 511
 512	{0x26000, 0x26064},
 513	{0x27000, 0x27024},
 514	{0x34000, 0x3400C},
 515	{0x34400, 0x3445C},
 516	{0x34800, 0x3485C},
 517	{0x34C00, 0x34C5C},
 518	{0x35000, 0x3505C},
 519	{0x35400, 0x3545C},
 520	{0x35800, 0x3585C},
 521	{0x35C00, 0x35C5C},
 522	{0x36000, 0x3605C},
 523	{0x38000, 0x38064},
 524	{0x38070, 0x380E0},
 525	{0x3A000, 0x3A074},
 526
 527	/* DBI windows is skipped here, it can be only accessed when pcie
 528	 * is active (not in reset) and CORE_CTRL_PCIE_LTSSM_EN = 0 &&
 529	 * PCIE_CTRL_APP_LTSSM_ENALBE=0.
 530	 * {0x3C000 , 0x3C004},
 531	 */
 532
 533	{0x40000, 0x400A4},
 534
 535	/* SI register is skipped here.
 536	 * Because it will cause bus hang
 537	 *
 538	 * {0x50000, 0x50018},
 539	 */
 540
 541	{0x80000, 0x8000C},
 542	{0x80010, 0x80020},
 543};
 544
 545static const struct ath10k_mem_section qca6174_hw30_register_sections[] = {
 546	{0x800, 0x810},
 547	{0x820, 0x82C},
 548	{0x830, 0x8F4},
 549	{0x90C, 0x91C},
 550	{0xA14, 0xA18},
 551	{0xA84, 0xA94},
 552	{0xAA8, 0xAD4},
 553	{0xADC, 0xB40},
 554	{0x1000, 0x10A4},
 555	{0x10BC, 0x111C},
 556	{0x1134, 0x1138},
 557	{0x1144, 0x114C},
 558	{0x1150, 0x115C},
 559	{0x1160, 0x1178},
 560	{0x1240, 0x1260},
 561	{0x2000, 0x207C},
 562	{0x3000, 0x3014},
 563	{0x4000, 0x4014},
 564	{0x5000, 0x5124},
 565	{0x6000, 0x6040},
 566	{0x6080, 0x60CC},
 567	{0x6100, 0x611C},
 568	{0x6140, 0x61D8},
 569	{0x6200, 0x6238},
 570	{0x6240, 0x628C},
 571	{0x62C0, 0x62EC},
 572	{0x6380, 0x63E8},
 573	{0x6400, 0x6440},
 574	{0x6480, 0x64CC},
 575	{0x6500, 0x651C},
 576	{0x6540, 0x6580},
 577	{0x6600, 0x6638},
 578	{0x6640, 0x668C},
 579	{0x66C0, 0x66EC},
 580	{0x6780, 0x67E8},
 581	{0x7080, 0x708C},
 582	{0x70C0, 0x70C8},
 583	{0x7400, 0x741C},
 584	{0x7440, 0x7454},
 585	{0x7800, 0x7818},
 586	{0x8000, 0x8004},
 587	{0x8010, 0x8064},
 588	{0x8080, 0x8084},
 589	{0x80A0, 0x80A4},
 590	{0x80C0, 0x80C4},
 591	{0x80E0, 0x80F4},
 592	{0x8100, 0x8104},
 593	{0x8110, 0x812C},
 594	{0x9000, 0x9004},
 595	{0x9800, 0x982C},
 596	{0x9830, 0x9838},
 597	{0x9840, 0x986C},
 598	{0x9870, 0x9898},
 599	{0x9A00, 0x9C00},
 600	{0xD580, 0xD59C},
 601	{0xF000, 0xF0E0},
 602	{0xF140, 0xF190},
 603	{0xF250, 0xF25C},
 604	{0xF260, 0xF268},
 605	{0xF26C, 0xF2A8},
 606	{0x10008, 0x1000C},
 607	{0x10014, 0x10018},
 608	{0x1001C, 0x10020},
 609	{0x10024, 0x10028},
 610	{0x10030, 0x10034},
 611	{0x10040, 0x10054},
 612	{0x10058, 0x1007C},
 613	{0x10080, 0x100C4},
 614	{0x100C8, 0x10114},
 615	{0x1012C, 0x10130},
 616	{0x10138, 0x10144},
 617	{0x10200, 0x10220},
 618	{0x10230, 0x10250},
 619	{0x10260, 0x10280},
 620	{0x10290, 0x102B0},
 621	{0x102C0, 0x102DC},
 622	{0x102E0, 0x102F4},
 623	{0x102FC, 0x1037C},
 624	{0x10380, 0x10390},
 625	{0x10800, 0x10828},
 626	{0x10840, 0x10844},
 627	{0x10880, 0x10884},
 628	{0x108C0, 0x108E8},
 629	{0x10900, 0x10928},
 630	{0x10940, 0x10944},
 631	{0x10980, 0x10984},
 632	{0x109C0, 0x109E8},
 633	{0x10A00, 0x10A28},
 634	{0x10A40, 0x10A50},
 635	{0x11000, 0x11028},
 636	{0x11030, 0x11034},
 637	{0x11038, 0x11068},
 638	{0x11070, 0x11074},
 639	{0x11078, 0x110A8},
 640	{0x110B0, 0x110B4},
 641	{0x110B8, 0x110E8},
 642	{0x110F0, 0x110F4},
 643	{0x110F8, 0x11128},
 644	{0x11138, 0x11144},
 645	{0x11178, 0x11180},
 646	{0x111B8, 0x111C0},
 647	{0x111F8, 0x11200},
 648	{0x11238, 0x1123C},
 649	{0x11270, 0x11274},
 650	{0x11278, 0x1127C},
 651	{0x112B0, 0x112B4},
 652	{0x112B8, 0x112BC},
 653	{0x112F0, 0x112F4},
 654	{0x112F8, 0x112FC},
 655	{0x11338, 0x1133C},
 656	{0x11378, 0x1137C},
 657	{0x113B8, 0x113BC},
 658	{0x113F8, 0x113FC},
 659	{0x11438, 0x11440},
 660	{0x11478, 0x11480},
 661	{0x114B8, 0x114BC},
 662	{0x114F8, 0x114FC},
 663	{0x11538, 0x1153C},
 664	{0x11578, 0x1157C},
 665	{0x115B8, 0x115BC},
 666	{0x115F8, 0x115FC},
 667	{0x11638, 0x1163C},
 668	{0x11678, 0x1167C},
 669	{0x116B8, 0x116BC},
 670	{0x116F8, 0x116FC},
 671	{0x11738, 0x1173C},
 672	{0x11778, 0x1177C},
 673	{0x117B8, 0x117BC},
 674	{0x117F8, 0x117FC},
 675	{0x17000, 0x1701C},
 676	{0x17020, 0x170AC},
 677	{0x18000, 0x18050},
 678	{0x18054, 0x18074},
 679	{0x18080, 0x180D4},
 680	{0x180DC, 0x18104},
 681	{0x18108, 0x1813C},
 682	{0x18144, 0x18148},
 683	{0x18168, 0x18174},
 684	{0x18178, 0x18180},
 685	{0x181C8, 0x181E0},
 686	{0x181E4, 0x181E8},
 687	{0x181EC, 0x1820C},
 688	{0x1825C, 0x18280},
 689	{0x18284, 0x18290},
 690	{0x18294, 0x182A0},
 691	{0x18300, 0x18304},
 692	{0x18314, 0x18320},
 693	{0x18328, 0x18350},
 694	{0x1835C, 0x1836C},
 695	{0x18370, 0x18390},
 696	{0x18398, 0x183AC},
 697	{0x183BC, 0x183D8},
 698	{0x183DC, 0x183F4},
 699	{0x18400, 0x186F4},
 700	{0x186F8, 0x1871C},
 701	{0x18720, 0x18790},
 702	{0x19800, 0x19830},
 703	{0x19834, 0x19840},
 704	{0x19880, 0x1989C},
 705	{0x198A4, 0x198B0},
 706	{0x198BC, 0x19900},
 707	{0x19C00, 0x19C88},
 708	{0x19D00, 0x19D20},
 709	{0x19E00, 0x19E7C},
 710	{0x19E80, 0x19E94},
 711	{0x19E98, 0x19EAC},
 712	{0x19EB0, 0x19EBC},
 713	{0x19F70, 0x19F74},
 714	{0x19F80, 0x19F8C},
 715	{0x19FA0, 0x19FB4},
 716	{0x19FC0, 0x19FD8},
 717	{0x1A000, 0x1A200},
 718	{0x1A204, 0x1A210},
 719	{0x1A228, 0x1A22C},
 720	{0x1A230, 0x1A248},
 721	{0x1A250, 0x1A270},
 722	{0x1A280, 0x1A290},
 723	{0x1A2A0, 0x1A2A4},
 724	{0x1A2C0, 0x1A2EC},
 725	{0x1A300, 0x1A3BC},
 726	{0x1A3F0, 0x1A3F4},
 727	{0x1A3F8, 0x1A434},
 728	{0x1A438, 0x1A444},
 729	{0x1A448, 0x1A468},
 730	{0x1A580, 0x1A58C},
 731	{0x1A644, 0x1A654},
 732	{0x1A670, 0x1A698},
 733	{0x1A6AC, 0x1A6B0},
 734	{0x1A6D0, 0x1A6D4},
 735	{0x1A6EC, 0x1A70C},
 736	{0x1A710, 0x1A738},
 737	{0x1A7C0, 0x1A7D0},
 738	{0x1A7D4, 0x1A7D8},
 739	{0x1A7DC, 0x1A7E4},
 740	{0x1A7F0, 0x1A7F8},
 741	{0x1A888, 0x1A89C},
 742	{0x1A8A8, 0x1A8AC},
 743	{0x1A8C0, 0x1A8DC},
 744	{0x1A8F0, 0x1A8FC},
 745	{0x1AE04, 0x1AE08},
 746	{0x1AE18, 0x1AE24},
 747	{0x1AF80, 0x1AF8C},
 748	{0x1AFA0, 0x1AFB4},
 749	{0x1B000, 0x1B200},
 750	{0x1B284, 0x1B288},
 751	{0x1B2D0, 0x1B2D8},
 752	{0x1B2DC, 0x1B2EC},
 753	{0x1B300, 0x1B340},
 754	{0x1B374, 0x1B378},
 755	{0x1B380, 0x1B384},
 756	{0x1B388, 0x1B38C},
 757	{0x1B404, 0x1B408},
 758	{0x1B420, 0x1B428},
 759	{0x1B440, 0x1B444},
 760	{0x1B448, 0x1B44C},
 761	{0x1B450, 0x1B458},
 762	{0x1B45C, 0x1B468},
 763	{0x1B584, 0x1B58C},
 764	{0x1B68C, 0x1B690},
 765	{0x1B6AC, 0x1B6B0},
 766	{0x1B7F0, 0x1B7F8},
 767	{0x1C800, 0x1CC00},
 768	{0x1CE00, 0x1CE04},
 769	{0x1CF80, 0x1CF84},
 770	{0x1D200, 0x1D800},
 771	{0x1E000, 0x20014},
 772	{0x20100, 0x20124},
 773	{0x21400, 0x217A8},
 774	{0x21800, 0x21BA8},
 775	{0x21C00, 0x21FA8},
 776	{0x22000, 0x223A8},
 777	{0x22400, 0x227A8},
 778	{0x22800, 0x22BA8},
 779	{0x22C00, 0x22FA8},
 780	{0x23000, 0x233A8},
 781	{0x24000, 0x24034},
 782	{0x26000, 0x26064},
 783	{0x27000, 0x27024},
 784	{0x34000, 0x3400C},
 785	{0x34400, 0x3445C},
 786	{0x34800, 0x3485C},
 787	{0x34C00, 0x34C5C},
 788	{0x35000, 0x3505C},
 789	{0x35400, 0x3545C},
 790	{0x35800, 0x3585C},
 791	{0x35C00, 0x35C5C},
 792	{0x36000, 0x3605C},
 793	{0x38000, 0x38064},
 794	{0x38070, 0x380E0},
 795	{0x3A000, 0x3A074},
 796	{0x40000, 0x400A4},
 797	{0x80000, 0x8000C},
 798	{0x80010, 0x80020},
 799};
 800
 801static const struct ath10k_mem_region qca6174_hw10_mem_regions[] = {
 802	{
 803		.type = ATH10K_MEM_REGION_TYPE_DRAM,
 804		.start = 0x400000,
 805		.len = 0x70000,
 806		.name = "DRAM",
 807		.section_table = {
 808			.sections = NULL,
 809			.size = 0,
 810		},
 811	},
 812	{
 813		.type = ATH10K_MEM_REGION_TYPE_REG,
 814
 815		/* RTC_SOC_BASE_ADDRESS */
 816		.start = 0x0,
 817
 818		/* WLAN_MBOX_BASE_ADDRESS - RTC_SOC_BASE_ADDRESS */
 819		.len = 0x800 - 0x0,
 820
 821		.name = "REG_PART1",
 822		.section_table = {
 823			.sections = NULL,
 824			.size = 0,
 825		},
 826	},
 827	{
 828		.type = ATH10K_MEM_REGION_TYPE_REG,
 829
 830		/* STEREO_BASE_ADDRESS */
 831		.start = 0x27000,
 832
 833		/* USB_BASE_ADDRESS - STEREO_BASE_ADDRESS */
 834		.len = 0x60000 - 0x27000,
 835
 836		.name = "REG_PART2",
 837		.section_table = {
 838			.sections = NULL,
 839			.size = 0,
 840		},
 841	},
 842};
 843
 844static const struct ath10k_mem_region qca6174_hw21_mem_regions[] = {
 845	{
 846		.type = ATH10K_MEM_REGION_TYPE_DRAM,
 847		.start = 0x400000,
 848		.len = 0x70000,
 849		.name = "DRAM",
 850		.section_table = {
 851			.sections = NULL,
 852			.size = 0,
 853		},
 854	},
 855	{
 856		.type = ATH10K_MEM_REGION_TYPE_AXI,
 857		.start = 0xa0000,
 858		.len = 0x18000,
 859		.name = "AXI",
 860		.section_table = {
 861			.sections = NULL,
 862			.size = 0,
 863		},
 864	},
 865	{
 866		.type = ATH10K_MEM_REGION_TYPE_REG,
 867		.start = 0x800,
 868		.len = 0x80020 - 0x800,
 869		.name = "REG_TOTAL",
 870		.section_table = {
 871			.sections = qca6174_hw21_register_sections,
 872			.size = ARRAY_SIZE(qca6174_hw21_register_sections),
 873		},
 874	},
 875};
 876
 877static const struct ath10k_mem_region qca6174_hw30_sdio_mem_regions[] = {
 878	{
 879		.type = ATH10K_MEM_REGION_TYPE_DRAM,
 880		.start = 0x400000,
 881		.len = 0xa8000,
 882		.name = "DRAM",
 883		.section_table = {
 884			.sections = NULL,
 885			.size = 0,
 886		},
 887	},
 888	{
 889		.type = ATH10K_MEM_REGION_TYPE_AXI,
 890		.start = 0xa0000,
 891		.len = 0x18000,
 892		.name = "AXI",
 893		.section_table = {
 894			.sections = NULL,
 895			.size = 0,
 896		},
 897	},
 898	{
 899		.type = ATH10K_MEM_REGION_TYPE_IRAM1,
 900		.start = 0x00980000,
 901		.len = 0x00080000,
 902		.name = "IRAM1",
 903		.section_table = {
 904			.sections = NULL,
 905			.size = 0,
 906		},
 907	},
 908	{
 909		.type = ATH10K_MEM_REGION_TYPE_IRAM2,
 910		.start = 0x00a00000,
 911		.len = 0x00040000,
 912		.name = "IRAM2",
 913		.section_table = {
 914			.sections = NULL,
 915			.size = 0,
 916		},
 917	},
 918	{
 919		.type = ATH10K_MEM_REGION_TYPE_REG,
 920		.start = 0x800,
 921		.len = 0x80020 - 0x800,
 922		.name = "REG_TOTAL",
 923		.section_table = {
 924			.sections = qca6174_hw30_sdio_register_sections,
 925			.size = ARRAY_SIZE(qca6174_hw30_sdio_register_sections),
 926		},
 927	},
 928};
 929
 930static const struct ath10k_mem_region qca6174_hw30_mem_regions[] = {
 931	{
 932		.type = ATH10K_MEM_REGION_TYPE_DRAM,
 933		.start = 0x400000,
 934		.len = 0xa8000,
 935		.name = "DRAM",
 936		.section_table = {
 937			.sections = NULL,
 938			.size = 0,
 939		},
 940	},
 941	{
 942		.type = ATH10K_MEM_REGION_TYPE_AXI,
 943		.start = 0xa0000,
 944		.len = 0x18000,
 945		.name = "AXI",
 946		.section_table = {
 947			.sections = NULL,
 948			.size = 0,
 949		},
 950	},
 951	{
 952		.type = ATH10K_MEM_REGION_TYPE_REG,
 953		.start = 0x800,
 954		.len = 0x80020 - 0x800,
 955		.name = "REG_TOTAL",
 956		.section_table = {
 957			.sections = qca6174_hw30_register_sections,
 958			.size = ARRAY_SIZE(qca6174_hw30_register_sections),
 959		},
 960	},
 961
 962	/* IRAM dump must be put last */
 963	{
 964		.type = ATH10K_MEM_REGION_TYPE_IRAM1,
 965		.start = 0x00980000,
 966		.len = 0x00080000,
 967		.name = "IRAM1",
 968		.section_table = {
 969			.sections = NULL,
 970			.size = 0,
 971		},
 972	},
 973	{
 974		.type = ATH10K_MEM_REGION_TYPE_IRAM2,
 975		.start = 0x00a00000,
 976		.len = 0x00040000,
 977		.name = "IRAM2",
 978		.section_table = {
 979			.sections = NULL,
 980			.size = 0,
 981		},
 982	},
 983};
 984
 985static const struct ath10k_mem_region qca988x_hw20_mem_regions[] = {
 986	{
 987		.type = ATH10K_MEM_REGION_TYPE_DRAM,
 988		.start = 0x400000,
 989		.len = 0x50000,
 990		.name = "DRAM",
 991		.section_table = {
 992			.sections = NULL,
 993			.size = 0,
 994		},
 995	},
 996	{
 997		.type = ATH10K_MEM_REGION_TYPE_REG,
 998		.start = 0x4000,
 999		.len = 0x2000,
1000		.name = "REG_PART1",
1001		.section_table = {
1002			.sections = NULL,
1003			.size = 0,
1004		},
1005	},
1006	{
1007		.type = ATH10K_MEM_REGION_TYPE_REG,
1008		.start = 0x8000,
1009		.len = 0x58000,
1010		.name = "REG_PART2",
1011		.section_table = {
1012			.sections = NULL,
1013			.size = 0,
1014		},
1015	},
1016};
1017
1018static const struct ath10k_mem_region qca99x0_hw20_mem_regions[] = {
1019	{
1020		.type = ATH10K_MEM_REGION_TYPE_DRAM,
1021		.start = 0x400000,
1022		.len = 0x60000,
1023		.name = "DRAM",
1024		.section_table = {
1025			.sections = NULL,
1026			.size = 0,
1027		},
1028	},
1029	{
1030		.type = ATH10K_MEM_REGION_TYPE_REG,
1031		.start = 0x980000,
1032		.len = 0x50000,
1033		.name = "IRAM",
1034		.section_table = {
1035			.sections = NULL,
1036			.size = 0,
1037		},
1038	},
1039	{
1040		.type = ATH10K_MEM_REGION_TYPE_IOSRAM,
1041		.start = 0xC0000,
1042		.len = 0x40000,
1043		.name = "SRAM",
1044		.section_table = {
1045			.sections = NULL,
1046			.size = 0,
1047		},
1048	},
1049	{
1050		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1051		.start = 0x30000,
1052		.len = 0x7000,
1053		.name = "APB REG 1",
1054		.section_table = {
1055			.sections = NULL,
1056			.size = 0,
1057		},
1058	},
1059	{
1060		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1061		.start = 0x3f000,
1062		.len = 0x3000,
1063		.name = "APB REG 2",
1064		.section_table = {
1065			.sections = NULL,
1066			.size = 0,
1067		},
1068	},
1069	{
1070		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1071		.start = 0x43000,
1072		.len = 0x3000,
1073		.name = "WIFI REG",
1074		.section_table = {
1075			.sections = NULL,
1076			.size = 0,
1077		},
1078	},
1079	{
1080		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1081		.start = 0x4A000,
1082		.len = 0x5000,
1083		.name = "CE REG",
1084		.section_table = {
1085			.sections = NULL,
1086			.size = 0,
1087		},
1088	},
1089	{
1090		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1091		.start = 0x80000,
1092		.len = 0x6000,
1093		.name = "SOC REG",
1094		.section_table = {
1095			.sections = NULL,
1096			.size = 0,
1097		},
1098	},
1099};
1100
1101static const struct ath10k_mem_region qca9984_hw10_mem_regions[] = {
1102	{
1103		.type = ATH10K_MEM_REGION_TYPE_DRAM,
1104		.start = 0x400000,
1105		.len = 0x80000,
1106		.name = "DRAM",
1107		.section_table = {
1108			.sections = NULL,
1109			.size = 0,
1110		},
1111	},
1112	{
1113		.type = ATH10K_MEM_REGION_TYPE_REG,
1114		.start = 0x980000,
1115		.len = 0x50000,
1116		.name = "IRAM",
1117		.section_table = {
1118			.sections = NULL,
1119			.size = 0,
1120		},
1121	},
1122	{
1123		.type = ATH10K_MEM_REGION_TYPE_IOSRAM,
1124		.start = 0xC0000,
1125		.len = 0x40000,
1126		.name = "SRAM",
1127		.section_table = {
1128			.sections = NULL,
1129			.size = 0,
1130		},
1131	},
1132	{
1133		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1134		.start = 0x30000,
1135		.len = 0x7000,
1136		.name = "APB REG 1",
1137		.section_table = {
1138			.sections = NULL,
1139			.size = 0,
1140		},
1141	},
1142	{
1143		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1144		.start = 0x3f000,
1145		.len = 0x3000,
1146		.name = "APB REG 2",
1147		.section_table = {
1148			.sections = NULL,
1149			.size = 0,
1150		},
1151	},
1152	{
1153		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1154		.start = 0x43000,
1155		.len = 0x3000,
1156		.name = "WIFI REG",
1157		.section_table = {
1158			.sections = NULL,
1159			.size = 0,
1160		},
1161	},
1162	{
1163		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1164		.start = 0x4A000,
1165		.len = 0x5000,
1166		.name = "CE REG",
1167		.section_table = {
1168			.sections = NULL,
1169			.size = 0,
1170		},
1171	},
1172	{
1173		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1174		.start = 0x80000,
1175		.len = 0x6000,
1176		.name = "SOC REG",
1177		.section_table = {
1178			.sections = NULL,
1179			.size = 0,
1180		},
1181	},
1182};
1183
1184static const struct ath10k_mem_section ipq4019_soc_reg_range[] = {
1185	{0x080000, 0x080004},
1186	{0x080020, 0x080024},
1187	{0x080028, 0x080050},
1188	{0x0800d4, 0x0800ec},
1189	{0x08010c, 0x080118},
1190	{0x080284, 0x080290},
1191	{0x0802a8, 0x0802b8},
1192	{0x0802dc, 0x08030c},
1193	{0x082000, 0x083fff}
1194};
1195
1196static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = {
1197	{
1198		.type = ATH10K_MEM_REGION_TYPE_DRAM,
1199		.start = 0x400000,
1200		.len = 0x68000,
1201		.name = "DRAM",
1202		.section_table = {
1203			.sections = NULL,
1204			.size = 0,
1205		},
1206	},
1207	{
1208		.type = ATH10K_MEM_REGION_TYPE_REG,
1209		.start = 0xC0000,
1210		.len = 0x40000,
1211		.name = "SRAM",
1212		.section_table = {
1213			.sections = NULL,
1214			.size = 0,
1215		},
1216	},
1217	{
1218		.type = ATH10K_MEM_REGION_TYPE_REG,
1219		.start = 0x980000,
1220		.len = 0x50000,
1221		.name = "IRAM",
1222		.section_table = {
1223			.sections = NULL,
1224			.size = 0,
1225		},
1226	},
1227	{
1228		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1229		.start = 0x30000,
1230		.len = 0x7000,
1231		.name = "APB REG 1",
1232		.section_table = {
1233			.sections = NULL,
1234			.size = 0,
1235		},
1236	},
1237	{
1238		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1239		.start = 0x3f000,
1240		.len = 0x3000,
1241		.name = "APB REG 2",
1242		.section_table = {
1243			.sections = NULL,
1244			.size = 0,
1245		},
1246	},
1247	{
1248		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1249		.start = 0x43000,
1250		.len = 0x3000,
1251		.name = "WIFI REG",
1252		.section_table = {
1253			.sections = NULL,
1254			.size = 0,
1255		},
1256	},
1257	{
1258		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1259		.start = 0x4A000,
1260		.len = 0x5000,
1261		.name = "CE REG",
1262		.section_table = {
1263			.sections = NULL,
1264			.size = 0,
1265		},
1266	},
1267	{
1268		.type = ATH10K_MEM_REGION_TYPE_REG,
1269		.start = 0x080000,
1270		.len = 0x083fff - 0x080000,
1271		.name = "REG_TOTAL",
1272		.section_table = {
1273			.sections = ipq4019_soc_reg_range,
1274			.size = ARRAY_SIZE(ipq4019_soc_reg_range),
1275		},
1276	},
1277};
1278
1279static const struct ath10k_mem_region wcn399x_hw10_mem_regions[] = {
1280	{
1281		/* MSA region start is not fixed, hence it is assigned at runtime */
1282		.type = ATH10K_MEM_REGION_TYPE_MSA,
1283		.len = 0x100000,
1284		.name = "DRAM",
1285		.section_table = {
1286			.sections = NULL,
1287			.size = 0,
1288		},
1289	},
1290};
1291
1292static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
1293	{
1294		.hw_id = QCA6174_HW_1_0_VERSION,
1295		.hw_rev = ATH10K_HW_QCA6174,
1296		.bus = ATH10K_BUS_PCI,
1297		.region_table = {
1298			.regions = qca6174_hw10_mem_regions,
1299			.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1300		},
1301	},
1302	{
1303		.hw_id = QCA6174_HW_1_1_VERSION,
1304		.hw_rev = ATH10K_HW_QCA6174,
1305		.bus = ATH10K_BUS_PCI,
1306		.region_table = {
1307			.regions = qca6174_hw10_mem_regions,
1308			.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1309		},
1310	},
1311	{
1312		.hw_id = QCA6174_HW_1_3_VERSION,
1313		.hw_rev = ATH10K_HW_QCA6174,
1314		.bus = ATH10K_BUS_PCI,
1315		.region_table = {
1316			.regions = qca6174_hw10_mem_regions,
1317			.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1318		},
1319	},
1320	{
1321		.hw_id = QCA6174_HW_2_1_VERSION,
1322		.hw_rev = ATH10K_HW_QCA6174,
1323		.bus = ATH10K_BUS_PCI,
1324		.region_table = {
1325			.regions = qca6174_hw21_mem_regions,
1326			.size = ARRAY_SIZE(qca6174_hw21_mem_regions),
1327		},
1328	},
1329	{
1330		.hw_id = QCA6174_HW_3_0_VERSION,
1331		.hw_rev = ATH10K_HW_QCA6174,
1332		.bus = ATH10K_BUS_PCI,
1333		.region_table = {
1334			.regions = qca6174_hw30_mem_regions,
1335			.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1336		},
1337	},
1338	{
1339		.hw_id = QCA6174_HW_3_2_VERSION,
1340		.hw_rev = ATH10K_HW_QCA6174,
1341		.bus = ATH10K_BUS_PCI,
1342		.region_table = {
1343			.regions = qca6174_hw30_mem_regions,
1344			.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1345		},
1346	},
1347	{
1348		.hw_id = QCA6174_HW_3_2_VERSION,
1349		.hw_rev = ATH10K_HW_QCA6174,
1350		.bus = ATH10K_BUS_SDIO,
1351		.region_table = {
1352			.regions = qca6174_hw30_sdio_mem_regions,
1353			.size = ARRAY_SIZE(qca6174_hw30_sdio_mem_regions),
1354		},
1355	},
1356	{
1357		.hw_id = QCA9377_HW_1_1_DEV_VERSION,
1358		.hw_rev = ATH10K_HW_QCA9377,
1359		.bus = ATH10K_BUS_PCI,
1360		.region_table = {
1361			.regions = qca6174_hw30_mem_regions,
1362			.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1363		},
1364	},
1365	{
1366		.hw_id = QCA988X_HW_2_0_VERSION,
1367		.hw_rev = ATH10K_HW_QCA988X,
1368		.bus = ATH10K_BUS_PCI,
1369		.region_table = {
1370			.regions = qca988x_hw20_mem_regions,
1371			.size = ARRAY_SIZE(qca988x_hw20_mem_regions),
1372		},
1373	},
1374	{
1375		.hw_id = QCA9984_HW_1_0_DEV_VERSION,
1376		.hw_rev = ATH10K_HW_QCA9984,
1377		.bus = ATH10K_BUS_PCI,
1378		.region_table = {
1379			.regions = qca9984_hw10_mem_regions,
1380			.size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1381		},
1382	},
1383	{
1384		.hw_id = QCA9888_HW_2_0_DEV_VERSION,
1385		.hw_rev = ATH10K_HW_QCA9888,
1386		.bus = ATH10K_BUS_PCI,
1387		.region_table = {
1388			.regions = qca9984_hw10_mem_regions,
1389			.size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1390		},
1391	},
1392	{
1393		.hw_id = QCA99X0_HW_2_0_DEV_VERSION,
1394		.hw_rev = ATH10K_HW_QCA99X0,
1395		.bus = ATH10K_BUS_PCI,
1396		.region_table = {
1397			.regions = qca99x0_hw20_mem_regions,
1398			.size = ARRAY_SIZE(qca99x0_hw20_mem_regions),
1399		},
1400	},
1401	{
1402		.hw_id = QCA4019_HW_1_0_DEV_VERSION,
1403		.hw_rev = ATH10K_HW_QCA4019,
1404		.bus = ATH10K_BUS_AHB,
1405		.region_table = {
1406			.regions = qca4019_hw10_mem_regions,
1407			.size = ARRAY_SIZE(qca4019_hw10_mem_regions),
1408		},
1409	},
1410	{
1411		.hw_id = WCN3990_HW_1_0_DEV_VERSION,
1412		.hw_rev = ATH10K_HW_WCN3990,
1413		.bus = ATH10K_BUS_SNOC,
1414		.region_table = {
1415			.regions = wcn399x_hw10_mem_regions,
1416			.size = ARRAY_SIZE(wcn399x_hw10_mem_regions),
1417		},
1418	},
1419};
1420
1421static u32 ath10k_coredump_get_ramdump_size(struct ath10k *ar)
1422{
1423	const struct ath10k_hw_mem_layout *hw;
1424	const struct ath10k_mem_region *mem_region;
1425	size_t size = 0;
1426	int i;
1427
1428	hw = ath10k_coredump_get_mem_layout(ar);
1429
1430	if (!hw)
1431		return 0;
1432
1433	mem_region = &hw->region_table.regions[0];
1434
1435	for (i = 0; i < hw->region_table.size; i++) {
1436		size += mem_region->len;
1437		mem_region++;
1438	}
1439
1440	/* reserve space for the headers */
1441	size += hw->region_table.size * sizeof(struct ath10k_dump_ram_data_hdr);
1442
1443	/* make sure it is aligned 16 bytes for debug message print out */
1444	size = ALIGN(size, 16);
1445
1446	return size;
1447}
1448
1449const struct ath10k_hw_mem_layout *ath10k_coredump_get_mem_layout(struct ath10k *ar)
1450{
1451	if (!test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1452		return NULL;
1453
1454	return _ath10k_coredump_get_mem_layout(ar);
1455}
1456EXPORT_SYMBOL(ath10k_coredump_get_mem_layout);
1457
1458const struct ath10k_hw_mem_layout *_ath10k_coredump_get_mem_layout(struct ath10k *ar)
1459{
1460	int i;
1461
1462	if (WARN_ON(ar->target_version == 0))
1463		return NULL;
1464
1465	for (i = 0; i < ARRAY_SIZE(hw_mem_layouts); i++) {
1466		if (ar->target_version == hw_mem_layouts[i].hw_id &&
1467		    ar->hw_rev == hw_mem_layouts[i].hw_rev &&
1468		    hw_mem_layouts[i].bus == ar->hif.bus)
1469			return &hw_mem_layouts[i];
1470	}
1471
1472	return NULL;
1473}
1474
1475struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar)
1476{
1477	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1478
1479	lockdep_assert_held(&ar->dump_mutex);
1480
1481	if (ath10k_coredump_mask == 0)
1482		/* coredump disabled */
1483		return NULL;
1484
1485	guid_gen(&crash_data->guid);
1486	ktime_get_real_ts64(&crash_data->timestamp);
1487
1488	return crash_data;
1489}
1490EXPORT_SYMBOL(ath10k_coredump_new);
1491
1492static struct ath10k_dump_file_data *ath10k_coredump_build(struct ath10k *ar)
1493{
1494	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1495	struct ath10k_ce_crash_hdr *ce_hdr;
1496	struct ath10k_dump_file_data *dump_data;
1497	struct ath10k_tlv_dump_data *dump_tlv;
1498	size_t hdr_len = sizeof(*dump_data);
1499	size_t len, sofar = 0;
1500	unsigned char *buf;
1501
1502	len = hdr_len;
1503
1504	if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask))
1505		len += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1506
1507	if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask))
1508		len += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1509			CE_COUNT * sizeof(ce_hdr->entries[0]);
1510
1511	if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1512		len += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1513
1514	sofar += hdr_len;
1515
1516	/* This is going to get big when we start dumping FW RAM and such,
1517	 * so go ahead and use vmalloc.
1518	 */
1519	buf = vzalloc(len);
1520	if (!buf)
1521		return NULL;
1522
1523	mutex_lock(&ar->dump_mutex);
1524
1525	dump_data = (struct ath10k_dump_file_data *)(buf);
1526	strscpy(dump_data->df_magic, "ATH10K-FW-DUMP",
1527		sizeof(dump_data->df_magic));
1528	dump_data->len = cpu_to_le32(len);
1529
1530	dump_data->version = cpu_to_le32(ATH10K_FW_CRASH_DUMP_VERSION);
1531
1532	guid_copy(&dump_data->guid, &crash_data->guid);
1533	dump_data->chip_id = cpu_to_le32(ar->bus_param.chip_id);
1534	dump_data->bus_type = cpu_to_le32(0);
1535	dump_data->target_version = cpu_to_le32(ar->target_version);
1536	dump_data->fw_version_major = cpu_to_le32(ar->fw_version_major);
1537	dump_data->fw_version_minor = cpu_to_le32(ar->fw_version_minor);
1538	dump_data->fw_version_release = cpu_to_le32(ar->fw_version_release);
1539	dump_data->fw_version_build = cpu_to_le32(ar->fw_version_build);
1540	dump_data->phy_capability = cpu_to_le32(ar->phy_capability);
1541	dump_data->hw_min_tx_power = cpu_to_le32(ar->hw_min_tx_power);
1542	dump_data->hw_max_tx_power = cpu_to_le32(ar->hw_max_tx_power);
1543	dump_data->ht_cap_info = cpu_to_le32(ar->ht_cap_info);
1544	dump_data->vht_cap_info = cpu_to_le32(ar->vht_cap_info);
1545	dump_data->num_rf_chains = cpu_to_le32(ar->num_rf_chains);
1546
1547	strscpy(dump_data->fw_ver, ar->hw->wiphy->fw_version,
1548		sizeof(dump_data->fw_ver));
1549
1550	dump_data->kernel_ver_code = 0;
1551	strscpy(dump_data->kernel_ver, init_utsname()->release,
1552		sizeof(dump_data->kernel_ver));
1553
1554	dump_data->tv_sec = cpu_to_le64(crash_data->timestamp.tv_sec);
1555	dump_data->tv_nsec = cpu_to_le64(crash_data->timestamp.tv_nsec);
1556
1557	if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask)) {
1558		dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1559		dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_REGISTERS);
1560		dump_tlv->tlv_len = cpu_to_le32(sizeof(crash_data->registers));
1561		memcpy(dump_tlv->tlv_data, &crash_data->registers,
1562		       sizeof(crash_data->registers));
1563		sofar += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1564	}
1565
1566	if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask)) {
1567		dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1568		dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_CE_DATA);
1569		dump_tlv->tlv_len = cpu_to_le32(struct_size(ce_hdr, entries,
1570							    CE_COUNT));
1571		ce_hdr = (struct ath10k_ce_crash_hdr *)(dump_tlv->tlv_data);
1572		ce_hdr->ce_count = cpu_to_le32(CE_COUNT);
1573		memset(ce_hdr->reserved, 0, sizeof(ce_hdr->reserved));
1574		memcpy(ce_hdr->entries, crash_data->ce_crash_data,
1575		       CE_COUNT * sizeof(ce_hdr->entries[0]));
1576		sofar += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1577			CE_COUNT * sizeof(ce_hdr->entries[0]);
1578	}
1579
1580	/* Gather ram dump */
1581	if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1582		dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1583		dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_RAM_DATA);
1584		dump_tlv->tlv_len = cpu_to_le32(crash_data->ramdump_buf_len);
1585		if (crash_data->ramdump_buf_len) {
1586			memcpy(dump_tlv->tlv_data, crash_data->ramdump_buf,
1587			       crash_data->ramdump_buf_len);
1588			sofar += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1589		}
1590	}
1591
1592	mutex_unlock(&ar->dump_mutex);
1593
1594	return dump_data;
1595}
1596
1597int ath10k_coredump_submit(struct ath10k *ar)
1598{
1599	struct ath10k_dump_file_data *dump;
1600
1601	if (ath10k_coredump_mask == 0)
1602		/* coredump disabled */
1603		return 0;
1604
1605	dump = ath10k_coredump_build(ar);
1606	if (!dump) {
1607		ath10k_warn(ar, "no crash dump data found for devcoredump");
1608		return -ENODATA;
1609	}
1610
1611	dev_coredumpv(ar->dev, dump, le32_to_cpu(dump->len), GFP_KERNEL);
1612
1613	return 0;
1614}
1615
1616int ath10k_coredump_create(struct ath10k *ar)
1617{
1618	if (ath10k_coredump_mask == 0)
1619		/* coredump disabled */
1620		return 0;
1621
1622	ar->coredump.fw_crash_data = vzalloc(sizeof(*ar->coredump.fw_crash_data));
1623	if (!ar->coredump.fw_crash_data)
1624		return -ENOMEM;
1625
1626	return 0;
1627}
1628
1629int ath10k_coredump_register(struct ath10k *ar)
1630{
1631	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1632
1633	if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1634		crash_data->ramdump_buf_len = ath10k_coredump_get_ramdump_size(ar);
1635
1636		if (!crash_data->ramdump_buf_len)
1637			return 0;
1638
1639		crash_data->ramdump_buf = vzalloc(crash_data->ramdump_buf_len);
1640		if (!crash_data->ramdump_buf)
1641			return -ENOMEM;
1642	}
1643
1644	return 0;
1645}
1646
1647void ath10k_coredump_unregister(struct ath10k *ar)
1648{
1649	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1650
1651	vfree(crash_data->ramdump_buf);
1652}
1653
1654void ath10k_coredump_destroy(struct ath10k *ar)
1655{
1656	if (ar->coredump.fw_crash_data->ramdump_buf) {
1657		vfree(ar->coredump.fw_crash_data->ramdump_buf);
1658		ar->coredump.fw_crash_data->ramdump_buf = NULL;
1659		ar->coredump.fw_crash_data->ramdump_buf_len = 0;
1660	}
1661
1662	vfree(ar->coredump.fw_crash_data);
1663	ar->coredump.fw_crash_data = NULL;
1664}