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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/acpi.h>
10#include <linux/bitops.h>
11#include <linux/capability.h>
12#include <linux/delay.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/jiffies.h>
16#include <linux/kernel.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/nvmem-provider.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/property.h>
25#include <linux/regmap.h>
26#include <linux/regulator/consumer.h>
27#include <linux/slab.h>
28
29/* Address pointer is 16 bit. */
30#define AT24_FLAG_ADDR16 BIT(7)
31/* sysfs-entry will be read-only. */
32#define AT24_FLAG_READONLY BIT(6)
33/* sysfs-entry will be world-readable. */
34#define AT24_FLAG_IRUGO BIT(5)
35/* Take always 8 addresses (24c00). */
36#define AT24_FLAG_TAKE8ADDR BIT(4)
37/* Factory-programmed serial number. */
38#define AT24_FLAG_SERIAL BIT(3)
39/* Factory-programmed mac address. */
40#define AT24_FLAG_MAC BIT(2)
41/* Does not auto-rollover reads to the next slave address. */
42#define AT24_FLAG_NO_RDROL BIT(1)
43
44/*
45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
46 * Differences between different vendor product lines (like Atmel AT24C or
47 * MicroChip 24LC, etc) won't much matter for typical read/write access.
48 * There are also I2C RAM chips, likewise interchangeable. One example
49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
50 *
51 * However, misconfiguration can lose data. "Set 16-bit memory address"
52 * to a part with 8-bit addressing will overwrite data. Writing with too
53 * big a page size also loses data. And it's not safe to assume that the
54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
55 * uses 0x51, for just one example.
56 *
57 * Accordingly, explicit board-specific configuration data should be used
58 * in almost all cases. (One partial exception is an SMBus used to access
59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
60 *
61 * So this driver uses "new style" I2C driver binding, expecting to be
62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
63 * similar kernel-resident tables; or, configuration data coming from
64 * a bootloader.
65 *
66 * Other than binding model, current differences from "eeprom" driver are
67 * that this one handles write access and isn't restricted to 24c02 devices.
68 * It also handles larger devices (32 kbit and up) with two-byte addresses,
69 * which won't work on pure SMBus systems.
70 */
71
72struct at24_data {
73 /*
74 * Lock protects against activities from other Linux tasks,
75 * but not from changes by other I2C masters.
76 */
77 struct mutex lock;
78
79 unsigned int write_max;
80 unsigned int num_addresses;
81 unsigned int offset_adj;
82
83 u32 byte_len;
84 u16 page_size;
85 u8 flags;
86
87 struct nvmem_device *nvmem;
88 struct regulator *vcc_reg;
89 void (*read_post)(unsigned int off, char *buf, size_t count);
90
91 /*
92 * Some chips tie up multiple I2C addresses; dummy devices reserve
93 * them for us.
94 */
95 u8 bank_addr_shift;
96 struct regmap *client_regmaps[] __counted_by(num_addresses);
97};
98
99/*
100 * This parameter is to help this driver avoid blocking other drivers out
101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
102 * clock, one 256 byte read takes about 1/43 second which is excessive;
103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
105 *
106 * This value is forced to be a power of two so that writes align on pages.
107 */
108static unsigned int at24_io_limit = 128;
109module_param_named(io_limit, at24_io_limit, uint, 0);
110MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
111
112/*
113 * Specs often allow 5 msec for a page write, sometimes 20 msec;
114 * it's important to recover from write timeouts.
115 */
116static unsigned int at24_write_timeout = 25;
117module_param_named(write_timeout, at24_write_timeout, uint, 0);
118MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
119
120struct at24_chip_data {
121 u32 byte_len;
122 u8 flags;
123 u8 bank_addr_shift;
124 void (*read_post)(unsigned int off, char *buf, size_t count);
125};
126
127#define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
130 }
131
132#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
133 static const struct at24_chip_data _name = { \
134 .byte_len = _len, .flags = _flags, \
135 .read_post = _read_post, \
136 }
137
138#define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
139 static const struct at24_chip_data _name = { \
140 .byte_len = _len, .flags = _flags, \
141 .bank_addr_shift = _bank_addr_shift \
142 }
143
144static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
145{
146 int i;
147
148 if (capable(CAP_SYS_ADMIN))
149 return;
150
151 /*
152 * Hide VAIO private settings to regular users:
153 * - BIOS passwords: bytes 0x00 to 0x0f
154 * - UUID: bytes 0x10 to 0x1f
155 * - Serial number: 0xc0 to 0xdf
156 */
157 for (i = 0; i < count; i++) {
158 if ((off + i <= 0x1f) ||
159 (off + i >= 0xc0 && off + i <= 0xdf))
160 buf[i] = 0;
161 }
162}
163
164/* needs 8 addresses as A0-A2 are ignored */
165AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
166/* old variants can't be handled with this generic entry! */
167AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
168AT24_CHIP_DATA(at24_data_24cs01, 16,
169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
171AT24_CHIP_DATA(at24_data_24cs02, 16,
172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
173AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
174 AT24_FLAG_MAC | AT24_FLAG_READONLY);
175AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
176 AT24_FLAG_MAC | AT24_FLAG_READONLY);
177/* spd is a 24c02 in memory DIMMs */
178AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
179 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
180/* 24c02_vaio is a 24c02 on some Sony laptops */
181AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
182 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
183 at24_read_post_vaio);
184AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
185AT24_CHIP_DATA(at24_data_24cs04, 16,
186 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
187/* 24rf08 quirk is handled at i2c-core */
188AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
189AT24_CHIP_DATA(at24_data_24cs08, 16,
190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
191AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
192AT24_CHIP_DATA(at24_data_24cs16, 16,
193 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
194AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
195/* M24C32-D Additional Write lockable page (M24C32-D order codes) */
196AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
197AT24_CHIP_DATA(at24_data_24cs32, 16,
198 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
199AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
200/* M24C64-D Additional Write lockable page (M24C64-D order codes) */
201AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
202AT24_CHIP_DATA(at24_data_24cs64, 16,
203 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
204AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
205AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
206AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
207AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
208AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
209AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
210/* identical to 24c08 ? */
211AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
212
213static const struct i2c_device_id at24_ids[] = {
214 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
215 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
216 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
217 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
218 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
219 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
220 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
221 { "spd", (kernel_ulong_t)&at24_data_spd },
222 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
223 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
224 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
225 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
226 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
227 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
228 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
229 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
230 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp },
231 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
232 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
233 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp },
234 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
235 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
236 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
237 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
238 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
239 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
240 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
241 { "at24", 0 },
242 { /* END OF LIST */ }
243};
244MODULE_DEVICE_TABLE(i2c, at24_ids);
245
246static const struct of_device_id __maybe_unused at24_of_match[] = {
247 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
248 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
249 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
250 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
251 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
252 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
253 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
254 { .compatible = "atmel,spd", .data = &at24_data_spd },
255 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
256 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
257 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
258 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
259 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
260 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
261 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
262 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp },
263 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
264 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
265 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp },
266 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
267 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
268 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
269 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
270 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
271 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
272 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
273 { /* END OF LIST */ },
274};
275MODULE_DEVICE_TABLE(of, at24_of_match);
276
277static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
278 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
279 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
280 { /* END OF LIST */ }
281};
282MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
283
284/*
285 * This routine supports chips which consume multiple I2C addresses. It
286 * computes the addressing information to be used for a given r/w request.
287 * Assumes that sanity checks for offset happened at sysfs-layer.
288 *
289 * Slave address and byte offset derive from the offset. Always
290 * set the byte address; on a multi-master board, another master
291 * may have changed the chip's "current" address pointer.
292 */
293static struct regmap *at24_translate_offset(struct at24_data *at24,
294 unsigned int *offset)
295{
296 unsigned int i;
297
298 if (at24->flags & AT24_FLAG_ADDR16) {
299 i = *offset >> 16;
300 *offset &= 0xffff;
301 } else {
302 i = *offset >> 8;
303 *offset &= 0xff;
304 }
305
306 return at24->client_regmaps[i];
307}
308
309static struct device *at24_base_client_dev(struct at24_data *at24)
310{
311 return regmap_get_device(at24->client_regmaps[0]);
312}
313
314static size_t at24_adjust_read_count(struct at24_data *at24,
315 unsigned int offset, size_t count)
316{
317 unsigned int bits;
318 size_t remainder;
319
320 /*
321 * In case of multi-address chips that don't rollover reads to
322 * the next slave address: truncate the count to the slave boundary,
323 * so that the read never straddles slaves.
324 */
325 if (at24->flags & AT24_FLAG_NO_RDROL) {
326 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
327 remainder = BIT(bits) - offset;
328 if (count > remainder)
329 count = remainder;
330 }
331
332 if (count > at24_io_limit)
333 count = at24_io_limit;
334
335 return count;
336}
337
338static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
339 unsigned int offset, size_t count)
340{
341 unsigned long timeout, read_time;
342 struct regmap *regmap;
343 int ret;
344
345 regmap = at24_translate_offset(at24, &offset);
346 count = at24_adjust_read_count(at24, offset, count);
347
348 /* adjust offset for mac and serial read ops */
349 offset += at24->offset_adj;
350
351 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
352 do {
353 /*
354 * The timestamp shall be taken before the actual operation
355 * to avoid a premature timeout in case of high CPU load.
356 */
357 read_time = jiffies;
358
359 ret = regmap_bulk_read(regmap, offset, buf, count);
360 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
361 count, offset, ret, jiffies);
362 if (!ret)
363 return count;
364
365 usleep_range(1000, 1500);
366 } while (time_before(read_time, timeout));
367
368 return -ETIMEDOUT;
369}
370
371/*
372 * Note that if the hardware write-protect pin is pulled high, the whole
373 * chip is normally write protected. But there are plenty of product
374 * variants here, including OTP fuses and partial chip protect.
375 *
376 * We only use page mode writes; the alternative is sloooow. These routines
377 * write at most one page.
378 */
379
380static size_t at24_adjust_write_count(struct at24_data *at24,
381 unsigned int offset, size_t count)
382{
383 unsigned int next_page;
384
385 /* write_max is at most a page */
386 if (count > at24->write_max)
387 count = at24->write_max;
388
389 /* Never roll over backwards, to the start of this page */
390 next_page = roundup(offset + 1, at24->page_size);
391 if (offset + count > next_page)
392 count = next_page - offset;
393
394 return count;
395}
396
397static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
398 unsigned int offset, size_t count)
399{
400 unsigned long timeout, write_time;
401 struct regmap *regmap;
402 int ret;
403
404 regmap = at24_translate_offset(at24, &offset);
405 count = at24_adjust_write_count(at24, offset, count);
406 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
407
408 do {
409 /*
410 * The timestamp shall be taken before the actual operation
411 * to avoid a premature timeout in case of high CPU load.
412 */
413 write_time = jiffies;
414
415 ret = regmap_bulk_write(regmap, offset, buf, count);
416 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
417 count, offset, ret, jiffies);
418 if (!ret)
419 return count;
420
421 usleep_range(1000, 1500);
422 } while (time_before(write_time, timeout));
423
424 return -ETIMEDOUT;
425}
426
427static int at24_read(void *priv, unsigned int off, void *val, size_t count)
428{
429 struct at24_data *at24;
430 struct device *dev;
431 char *buf = val;
432 int i, ret;
433
434 at24 = priv;
435 dev = at24_base_client_dev(at24);
436
437 if (unlikely(!count))
438 return count;
439
440 if (off + count > at24->byte_len)
441 return -EINVAL;
442
443 ret = pm_runtime_resume_and_get(dev);
444 if (ret)
445 return ret;
446 /*
447 * Read data from chip, protecting against concurrent updates
448 * from this host, but not from other I2C masters.
449 */
450 mutex_lock(&at24->lock);
451
452 for (i = 0; count; i += ret, count -= ret) {
453 ret = at24_regmap_read(at24, buf + i, off + i, count);
454 if (ret < 0) {
455 mutex_unlock(&at24->lock);
456 pm_runtime_put(dev);
457 return ret;
458 }
459 }
460
461 mutex_unlock(&at24->lock);
462
463 pm_runtime_put(dev);
464
465 if (unlikely(at24->read_post))
466 at24->read_post(off, buf, i);
467
468 return 0;
469}
470
471static int at24_write(void *priv, unsigned int off, void *val, size_t count)
472{
473 struct at24_data *at24;
474 struct device *dev;
475 char *buf = val;
476 int ret;
477
478 at24 = priv;
479 dev = at24_base_client_dev(at24);
480
481 if (unlikely(!count))
482 return -EINVAL;
483
484 if (off + count > at24->byte_len)
485 return -EINVAL;
486
487 ret = pm_runtime_resume_and_get(dev);
488 if (ret)
489 return ret;
490 /*
491 * Write data to chip, protecting against concurrent updates
492 * from this host, but not from other I2C masters.
493 */
494 mutex_lock(&at24->lock);
495
496 while (count) {
497 ret = at24_regmap_write(at24, buf, off, count);
498 if (ret < 0) {
499 mutex_unlock(&at24->lock);
500 pm_runtime_put(dev);
501 return ret;
502 }
503 buf += ret;
504 off += ret;
505 count -= ret;
506 }
507
508 mutex_unlock(&at24->lock);
509
510 pm_runtime_put(dev);
511
512 return 0;
513}
514
515static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
516 struct i2c_client *base_client,
517 struct regmap_config *regmap_config)
518{
519 struct i2c_client *dummy_client;
520 struct regmap *regmap;
521
522 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
523 base_client->adapter,
524 base_client->addr +
525 (index << at24->bank_addr_shift));
526 if (IS_ERR(dummy_client))
527 return PTR_ERR(dummy_client);
528
529 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
530 if (IS_ERR(regmap))
531 return PTR_ERR(regmap);
532
533 at24->client_regmaps[index] = regmap;
534
535 return 0;
536}
537
538static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
539{
540 if (flags & AT24_FLAG_MAC) {
541 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
542 return 0xa0 - byte_len;
543 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
544 /*
545 * For 16 bit address pointers, the word address must contain
546 * a '10' sequence in bits 11 and 10 regardless of the
547 * intended position of the address pointer.
548 */
549 return 0x0800;
550 } else if (flags & AT24_FLAG_SERIAL) {
551 /*
552 * Otherwise the word address must begin with a '10' sequence,
553 * regardless of the intended address.
554 */
555 return 0x0080;
556 } else {
557 return 0;
558 }
559}
560
561static void at24_probe_temp_sensor(struct i2c_client *client)
562{
563 struct at24_data *at24 = i2c_get_clientdata(client);
564 struct i2c_board_info info = { .type = "jc42" };
565 int ret;
566 u8 val;
567
568 /*
569 * Byte 2 has value 11 for DDR3, earlier versions don't
570 * support the thermal sensor present flag
571 */
572 ret = at24_read(at24, 2, &val, 1);
573 if (ret || val != 11)
574 return;
575
576 /* Byte 32, bit 7 is set if temp sensor is present */
577 ret = at24_read(at24, 32, &val, 1);
578 if (ret || !(val & BIT(7)))
579 return;
580
581 info.addr = 0x18 | (client->addr & 7);
582
583 i2c_new_client_device(client->adapter, &info);
584}
585
586static int at24_probe(struct i2c_client *client)
587{
588 struct regmap_config regmap_config = { };
589 struct nvmem_config nvmem_config = { };
590 u32 byte_len, page_size, flags, addrw;
591 const struct at24_chip_data *cdata;
592 struct device *dev = &client->dev;
593 bool i2c_fn_i2c, i2c_fn_block;
594 unsigned int i, num_addresses;
595 struct at24_data *at24;
596 bool full_power;
597 struct regmap *regmap;
598 bool writable;
599 u8 test_byte;
600 int err;
601
602 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
603 i2c_fn_block = i2c_check_functionality(client->adapter,
604 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
605
606 cdata = i2c_get_match_data(client);
607 if (!cdata)
608 return -ENODEV;
609
610 err = device_property_read_u32(dev, "pagesize", &page_size);
611 if (err)
612 /*
613 * This is slow, but we can't know all eeproms, so we better
614 * play safe. Specifying custom eeprom-types via device tree
615 * or properties is recommended anyhow.
616 */
617 page_size = 1;
618
619 flags = cdata->flags;
620 if (device_property_present(dev, "read-only"))
621 flags |= AT24_FLAG_READONLY;
622 if (device_property_present(dev, "no-read-rollover"))
623 flags |= AT24_FLAG_NO_RDROL;
624
625 err = device_property_read_u32(dev, "address-width", &addrw);
626 if (!err) {
627 switch (addrw) {
628 case 8:
629 if (flags & AT24_FLAG_ADDR16)
630 dev_warn(dev,
631 "Override address width to be 8, while default is 16\n");
632 flags &= ~AT24_FLAG_ADDR16;
633 break;
634 case 16:
635 flags |= AT24_FLAG_ADDR16;
636 break;
637 default:
638 dev_warn(dev, "Bad \"address-width\" property: %u\n",
639 addrw);
640 }
641 }
642
643 err = device_property_read_u32(dev, "size", &byte_len);
644 if (err)
645 byte_len = cdata->byte_len;
646
647 if (!i2c_fn_i2c && !i2c_fn_block)
648 page_size = 1;
649
650 if (!page_size) {
651 dev_err(dev, "page_size must not be 0!\n");
652 return -EINVAL;
653 }
654
655 if (!is_power_of_2(page_size))
656 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
657
658 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
659 if (err) {
660 if (flags & AT24_FLAG_TAKE8ADDR)
661 num_addresses = 8;
662 else
663 num_addresses = DIV_ROUND_UP(byte_len,
664 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
665 }
666
667 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
668 dev_err(dev,
669 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
670 return -EINVAL;
671 }
672
673 regmap_config.val_bits = 8;
674 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
675 regmap_config.disable_locking = true;
676
677 regmap = devm_regmap_init_i2c(client, ®map_config);
678 if (IS_ERR(regmap))
679 return PTR_ERR(regmap);
680
681 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
682 GFP_KERNEL);
683 if (!at24)
684 return -ENOMEM;
685
686 mutex_init(&at24->lock);
687 at24->byte_len = byte_len;
688 at24->page_size = page_size;
689 at24->flags = flags;
690 at24->read_post = cdata->read_post;
691 at24->bank_addr_shift = cdata->bank_addr_shift;
692 at24->num_addresses = num_addresses;
693 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
694 at24->client_regmaps[0] = regmap;
695
696 at24->vcc_reg = devm_regulator_get(dev, "vcc");
697 if (IS_ERR(at24->vcc_reg))
698 return PTR_ERR(at24->vcc_reg);
699
700 writable = !(flags & AT24_FLAG_READONLY);
701 if (writable) {
702 at24->write_max = min_t(unsigned int,
703 page_size, at24_io_limit);
704 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
705 at24->write_max = I2C_SMBUS_BLOCK_MAX;
706 }
707
708 /* use dummy devices for multiple-address chips */
709 for (i = 1; i < num_addresses; i++) {
710 err = at24_make_dummy_client(at24, i, client, ®map_config);
711 if (err)
712 return err;
713 }
714
715 /*
716 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
717 * label property is set as some platform can have multiple eeproms
718 * with same label and we can not register each of those with same
719 * label. Failing to register those eeproms trigger cascade failure
720 * on such platform.
721 */
722 nvmem_config.id = NVMEM_DEVID_AUTO;
723
724 if (device_property_present(dev, "label")) {
725 err = device_property_read_string(dev, "label",
726 &nvmem_config.name);
727 if (err)
728 return err;
729 } else {
730 nvmem_config.name = dev_name(dev);
731 }
732
733 nvmem_config.type = NVMEM_TYPE_EEPROM;
734 nvmem_config.dev = dev;
735 nvmem_config.read_only = !writable;
736 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
737 nvmem_config.owner = THIS_MODULE;
738 nvmem_config.compat = true;
739 nvmem_config.base_dev = dev;
740 nvmem_config.reg_read = at24_read;
741 nvmem_config.reg_write = at24_write;
742 nvmem_config.priv = at24;
743 nvmem_config.stride = 1;
744 nvmem_config.word_size = 1;
745 nvmem_config.size = byte_len;
746
747 i2c_set_clientdata(client, at24);
748
749 full_power = acpi_dev_state_d0(&client->dev);
750 if (full_power) {
751 err = regulator_enable(at24->vcc_reg);
752 if (err) {
753 dev_err(dev, "Failed to enable vcc regulator\n");
754 return err;
755 }
756
757 pm_runtime_set_active(dev);
758 }
759 pm_runtime_enable(dev);
760
761 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
762 if (IS_ERR(at24->nvmem)) {
763 pm_runtime_disable(dev);
764 if (!pm_runtime_status_suspended(dev))
765 regulator_disable(at24->vcc_reg);
766 return dev_err_probe(dev, PTR_ERR(at24->nvmem),
767 "failed to register nvmem\n");
768 }
769
770 /*
771 * Perform a one-byte test read to verify that the chip is functional,
772 * unless powering on the device is to be avoided during probe (i.e.
773 * it's powered off right now).
774 */
775 if (full_power) {
776 err = at24_read(at24, 0, &test_byte, 1);
777 if (err) {
778 pm_runtime_disable(dev);
779 if (!pm_runtime_status_suspended(dev))
780 regulator_disable(at24->vcc_reg);
781 return -ENODEV;
782 }
783 }
784
785 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */
786 if (cdata == &at24_data_spd)
787 at24_probe_temp_sensor(client);
788
789 pm_runtime_idle(dev);
790
791 if (writable)
792 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
793 byte_len, client->name, at24->write_max);
794 else
795 dev_info(dev, "%u byte %s EEPROM, read-only\n",
796 byte_len, client->name);
797
798 return 0;
799}
800
801static void at24_remove(struct i2c_client *client)
802{
803 struct at24_data *at24 = i2c_get_clientdata(client);
804
805 pm_runtime_disable(&client->dev);
806 if (acpi_dev_state_d0(&client->dev)) {
807 if (!pm_runtime_status_suspended(&client->dev))
808 regulator_disable(at24->vcc_reg);
809 pm_runtime_set_suspended(&client->dev);
810 }
811}
812
813static int __maybe_unused at24_suspend(struct device *dev)
814{
815 struct i2c_client *client = to_i2c_client(dev);
816 struct at24_data *at24 = i2c_get_clientdata(client);
817
818 return regulator_disable(at24->vcc_reg);
819}
820
821static int __maybe_unused at24_resume(struct device *dev)
822{
823 struct i2c_client *client = to_i2c_client(dev);
824 struct at24_data *at24 = i2c_get_clientdata(client);
825
826 return regulator_enable(at24->vcc_reg);
827}
828
829static const struct dev_pm_ops at24_pm_ops = {
830 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
831 pm_runtime_force_resume)
832 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
833};
834
835static struct i2c_driver at24_driver = {
836 .driver = {
837 .name = "at24",
838 .pm = &at24_pm_ops,
839 .of_match_table = of_match_ptr(at24_of_match),
840 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
841 },
842 .probe = at24_probe,
843 .remove = at24_remove,
844 .id_table = at24_ids,
845 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
846};
847
848static int __init at24_init(void)
849{
850 if (!at24_io_limit) {
851 pr_err("at24: at24_io_limit must not be 0!\n");
852 return -EINVAL;
853 }
854
855 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
856 return i2c_add_driver(&at24_driver);
857}
858module_init(at24_init);
859
860static void __exit at24_exit(void)
861{
862 i2c_del_driver(&at24_driver);
863}
864module_exit(at24_exit);
865
866MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
867MODULE_AUTHOR("David Brownell and Wolfram Sang");
868MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/acpi.h>
10#include <linux/bitops.h>
11#include <linux/capability.h>
12#include <linux/delay.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/jiffies.h>
16#include <linux/kernel.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/nvmem-provider.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/property.h>
25#include <linux/regmap.h>
26#include <linux/regulator/consumer.h>
27#include <linux/slab.h>
28
29/* Address pointer is 16 bit. */
30#define AT24_FLAG_ADDR16 BIT(7)
31/* sysfs-entry will be read-only. */
32#define AT24_FLAG_READONLY BIT(6)
33/* sysfs-entry will be world-readable. */
34#define AT24_FLAG_IRUGO BIT(5)
35/* Take always 8 addresses (24c00). */
36#define AT24_FLAG_TAKE8ADDR BIT(4)
37/* Factory-programmed serial number. */
38#define AT24_FLAG_SERIAL BIT(3)
39/* Factory-programmed mac address. */
40#define AT24_FLAG_MAC BIT(2)
41/* Does not auto-rollover reads to the next slave address. */
42#define AT24_FLAG_NO_RDROL BIT(1)
43
44/*
45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
46 * Differences between different vendor product lines (like Atmel AT24C or
47 * MicroChip 24LC, etc) won't much matter for typical read/write access.
48 * There are also I2C RAM chips, likewise interchangeable. One example
49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
50 *
51 * However, misconfiguration can lose data. "Set 16-bit memory address"
52 * to a part with 8-bit addressing will overwrite data. Writing with too
53 * big a page size also loses data. And it's not safe to assume that the
54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
55 * uses 0x51, for just one example.
56 *
57 * Accordingly, explicit board-specific configuration data should be used
58 * in almost all cases. (One partial exception is an SMBus used to access
59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
60 *
61 * So this driver uses "new style" I2C driver binding, expecting to be
62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
63 * similar kernel-resident tables; or, configuration data coming from
64 * a bootloader.
65 *
66 * Other than binding model, current differences from "eeprom" driver are
67 * that this one handles write access and isn't restricted to 24c02 devices.
68 * It also handles larger devices (32 kbit and up) with two-byte addresses,
69 * which won't work on pure SMBus systems.
70 */
71
72struct at24_data {
73 /*
74 * Lock protects against activities from other Linux tasks,
75 * but not from changes by other I2C masters.
76 */
77 struct mutex lock;
78
79 unsigned int write_max;
80 unsigned int num_addresses;
81 unsigned int offset_adj;
82
83 u32 byte_len;
84 u16 page_size;
85 u8 flags;
86
87 struct nvmem_device *nvmem;
88 struct regulator *vcc_reg;
89 void (*read_post)(unsigned int off, char *buf, size_t count);
90
91 /*
92 * Some chips tie up multiple I2C addresses; dummy devices reserve
93 * them for us.
94 */
95 u8 bank_addr_shift;
96 struct regmap *client_regmaps[] __counted_by(num_addresses);
97};
98
99/*
100 * This parameter is to help this driver avoid blocking other drivers out
101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
102 * clock, one 256 byte read takes about 1/43 second which is excessive;
103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
105 *
106 * This value is forced to be a power of two so that writes align on pages.
107 */
108static unsigned int at24_io_limit = 128;
109module_param_named(io_limit, at24_io_limit, uint, 0);
110MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
111
112/*
113 * Specs often allow 5 msec for a page write, sometimes 20 msec;
114 * it's important to recover from write timeouts.
115 */
116static unsigned int at24_write_timeout = 25;
117module_param_named(write_timeout, at24_write_timeout, uint, 0);
118MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
119
120struct at24_chip_data {
121 u32 byte_len;
122 u8 flags;
123 u8 bank_addr_shift;
124 void (*read_post)(unsigned int off, char *buf, size_t count);
125};
126
127#define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
130 }
131
132#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
133 static const struct at24_chip_data _name = { \
134 .byte_len = _len, .flags = _flags, \
135 .read_post = _read_post, \
136 }
137
138#define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
139 static const struct at24_chip_data _name = { \
140 .byte_len = _len, .flags = _flags, \
141 .bank_addr_shift = _bank_addr_shift \
142 }
143
144static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
145{
146 int i;
147
148 if (capable(CAP_SYS_ADMIN))
149 return;
150
151 /*
152 * Hide VAIO private settings to regular users:
153 * - BIOS passwords: bytes 0x00 to 0x0f
154 * - UUID: bytes 0x10 to 0x1f
155 * - Serial number: 0xc0 to 0xdf
156 */
157 for (i = 0; i < count; i++) {
158 if ((off + i <= 0x1f) ||
159 (off + i >= 0xc0 && off + i <= 0xdf))
160 buf[i] = 0;
161 }
162}
163
164/* needs 8 addresses as A0-A2 are ignored */
165AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
166/* old variants can't be handled with this generic entry! */
167AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
168AT24_CHIP_DATA(at24_data_24cs01, 16,
169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
171AT24_CHIP_DATA(at24_data_24cs02, 16,
172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
173AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
174 AT24_FLAG_MAC | AT24_FLAG_READONLY);
175AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
176 AT24_FLAG_MAC | AT24_FLAG_READONLY);
177AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8,
178 AT24_FLAG_READONLY);
179AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8,
180 AT24_FLAG_READONLY);
181/* spd is a 24c02 in memory DIMMs */
182AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
183 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
184/* 24c02_vaio is a 24c02 on some Sony laptops */
185AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
186 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
187 at24_read_post_vaio);
188AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
189AT24_CHIP_DATA(at24_data_24cs04, 16,
190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
191/* 24rf08 quirk is handled at i2c-core */
192AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
193AT24_CHIP_DATA(at24_data_24cs08, 16,
194 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
195AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
196AT24_CHIP_DATA(at24_data_24cs16, 16,
197 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
198AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
199/* M24C32-D Additional Write lockable page (M24C32-D order codes) */
200AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
201AT24_CHIP_DATA(at24_data_24cs32, 16,
202 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
203AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
204/* M24C64-D Additional Write lockable page (M24C64-D order codes) */
205AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
206AT24_CHIP_DATA(at24_data_24cs64, 16,
207 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
208AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
209AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
210/* M24256E Additional Write lockable page (M24256E-F order codes) */
211AT24_CHIP_DATA(at24_data_24256e_wlp, 64, AT24_FLAG_ADDR16);
212AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
213AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
214AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
215AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
216/* identical to 24c08 ? */
217AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
218
219static const struct i2c_device_id at24_ids[] = {
220 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
221 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
222 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
223 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
224 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
225 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
226 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
227 { "24aa025e48", (kernel_ulong_t)&at24_data_24aa025e48 },
228 { "24aa025e64", (kernel_ulong_t)&at24_data_24aa025e64 },
229 { "spd", (kernel_ulong_t)&at24_data_spd },
230 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
231 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
232 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
233 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
234 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
235 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
236 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
237 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
238 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp },
239 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
240 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
241 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp },
242 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
243 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
244 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
245 { "24256e-wl", (kernel_ulong_t)&at24_data_24256e_wlp },
246 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
247 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
248 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
249 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
250 { "at24", 0 },
251 { /* END OF LIST */ }
252};
253MODULE_DEVICE_TABLE(i2c, at24_ids);
254
255static const struct of_device_id __maybe_unused at24_of_match[] = {
256 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
257 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
258 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
259 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
260 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
261 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
262 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
263 { .compatible = "atmel,spd", .data = &at24_data_spd },
264 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
265 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
266 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
267 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
268 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
269 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
270 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
271 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp },
272 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
273 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
274 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp },
275 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
276 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
277 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
278 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
279 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
280 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
281 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
282 { .compatible = "microchip,24aa025e48", .data = &at24_data_24aa025e48 },
283 { .compatible = "microchip,24aa025e64", .data = &at24_data_24aa025e64 },
284 { .compatible = "st,24256e-wl", .data = &at24_data_24256e_wlp },
285 { /* END OF LIST */ },
286};
287MODULE_DEVICE_TABLE(of, at24_of_match);
288
289static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
290 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
291 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
292 { /* END OF LIST */ }
293};
294MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
295
296/*
297 * This routine supports chips which consume multiple I2C addresses. It
298 * computes the addressing information to be used for a given r/w request.
299 * Assumes that sanity checks for offset happened at sysfs-layer.
300 *
301 * Slave address and byte offset derive from the offset. Always
302 * set the byte address; on a multi-master board, another master
303 * may have changed the chip's "current" address pointer.
304 */
305static struct regmap *at24_translate_offset(struct at24_data *at24,
306 unsigned int *offset)
307{
308 unsigned int i;
309
310 if (at24->flags & AT24_FLAG_ADDR16) {
311 i = *offset >> 16;
312 *offset &= 0xffff;
313 } else {
314 i = *offset >> 8;
315 *offset &= 0xff;
316 }
317
318 return at24->client_regmaps[i];
319}
320
321static struct device *at24_base_client_dev(struct at24_data *at24)
322{
323 return regmap_get_device(at24->client_regmaps[0]);
324}
325
326static size_t at24_adjust_read_count(struct at24_data *at24,
327 unsigned int offset, size_t count)
328{
329 unsigned int bits;
330 size_t remainder;
331
332 /*
333 * In case of multi-address chips that don't rollover reads to
334 * the next slave address: truncate the count to the slave boundary,
335 * so that the read never straddles slaves.
336 */
337 if (at24->flags & AT24_FLAG_NO_RDROL) {
338 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
339 remainder = BIT(bits) - offset;
340 if (count > remainder)
341 count = remainder;
342 }
343
344 if (count > at24_io_limit)
345 count = at24_io_limit;
346
347 return count;
348}
349
350static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
351 unsigned int offset, size_t count)
352{
353 unsigned long timeout, read_time;
354 struct regmap *regmap;
355 int ret;
356
357 regmap = at24_translate_offset(at24, &offset);
358 count = at24_adjust_read_count(at24, offset, count);
359
360 /* adjust offset for mac and serial read ops */
361 offset += at24->offset_adj;
362
363 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
364 do {
365 /*
366 * The timestamp shall be taken before the actual operation
367 * to avoid a premature timeout in case of high CPU load.
368 */
369 read_time = jiffies;
370
371 ret = regmap_bulk_read(regmap, offset, buf, count);
372 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
373 count, offset, ret, jiffies);
374 if (!ret)
375 return count;
376
377 usleep_range(1000, 1500);
378 } while (time_before(read_time, timeout));
379
380 return -ETIMEDOUT;
381}
382
383/*
384 * Note that if the hardware write-protect pin is pulled high, the whole
385 * chip is normally write protected. But there are plenty of product
386 * variants here, including OTP fuses and partial chip protect.
387 *
388 * We only use page mode writes; the alternative is sloooow. These routines
389 * write at most one page.
390 */
391
392static size_t at24_adjust_write_count(struct at24_data *at24,
393 unsigned int offset, size_t count)
394{
395 unsigned int next_page;
396
397 /* write_max is at most a page */
398 if (count > at24->write_max)
399 count = at24->write_max;
400
401 /* Never roll over backwards, to the start of this page */
402 next_page = roundup(offset + 1, at24->page_size);
403 if (offset + count > next_page)
404 count = next_page - offset;
405
406 return count;
407}
408
409static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
410 unsigned int offset, size_t count)
411{
412 unsigned long timeout, write_time;
413 struct regmap *regmap;
414 int ret;
415
416 regmap = at24_translate_offset(at24, &offset);
417 count = at24_adjust_write_count(at24, offset, count);
418 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
419
420 do {
421 /*
422 * The timestamp shall be taken before the actual operation
423 * to avoid a premature timeout in case of high CPU load.
424 */
425 write_time = jiffies;
426
427 ret = regmap_bulk_write(regmap, offset, buf, count);
428 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
429 count, offset, ret, jiffies);
430 if (!ret)
431 return count;
432
433 usleep_range(1000, 1500);
434 } while (time_before(write_time, timeout));
435
436 return -ETIMEDOUT;
437}
438
439static int at24_read(void *priv, unsigned int off, void *val, size_t count)
440{
441 struct at24_data *at24;
442 struct device *dev;
443 char *buf = val;
444 int i, ret;
445
446 at24 = priv;
447 dev = at24_base_client_dev(at24);
448
449 if (unlikely(!count))
450 return count;
451
452 if (off + count > at24->byte_len)
453 return -EINVAL;
454
455 ret = pm_runtime_resume_and_get(dev);
456 if (ret)
457 return ret;
458 /*
459 * Read data from chip, protecting against concurrent updates
460 * from this host, but not from other I2C masters.
461 */
462 mutex_lock(&at24->lock);
463
464 for (i = 0; count; i += ret, count -= ret) {
465 ret = at24_regmap_read(at24, buf + i, off + i, count);
466 if (ret < 0) {
467 mutex_unlock(&at24->lock);
468 pm_runtime_put(dev);
469 return ret;
470 }
471 }
472
473 mutex_unlock(&at24->lock);
474
475 pm_runtime_put(dev);
476
477 if (unlikely(at24->read_post))
478 at24->read_post(off, buf, i);
479
480 return 0;
481}
482
483static int at24_write(void *priv, unsigned int off, void *val, size_t count)
484{
485 struct at24_data *at24;
486 struct device *dev;
487 char *buf = val;
488 int ret;
489
490 at24 = priv;
491 dev = at24_base_client_dev(at24);
492
493 if (unlikely(!count))
494 return -EINVAL;
495
496 if (off + count > at24->byte_len)
497 return -EINVAL;
498
499 ret = pm_runtime_resume_and_get(dev);
500 if (ret)
501 return ret;
502 /*
503 * Write data to chip, protecting against concurrent updates
504 * from this host, but not from other I2C masters.
505 */
506 mutex_lock(&at24->lock);
507
508 while (count) {
509 ret = at24_regmap_write(at24, buf, off, count);
510 if (ret < 0) {
511 mutex_unlock(&at24->lock);
512 pm_runtime_put(dev);
513 return ret;
514 }
515 buf += ret;
516 off += ret;
517 count -= ret;
518 }
519
520 mutex_unlock(&at24->lock);
521
522 pm_runtime_put(dev);
523
524 return 0;
525}
526
527static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
528 struct i2c_client *base_client,
529 struct regmap_config *regmap_config)
530{
531 struct i2c_client *dummy_client;
532 struct regmap *regmap;
533
534 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
535 base_client->adapter,
536 base_client->addr +
537 (index << at24->bank_addr_shift));
538 if (IS_ERR(dummy_client))
539 return PTR_ERR(dummy_client);
540
541 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
542 if (IS_ERR(regmap))
543 return PTR_ERR(regmap);
544
545 at24->client_regmaps[index] = regmap;
546
547 return 0;
548}
549
550static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
551{
552 if (flags & AT24_FLAG_MAC) {
553 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
554 return 0xa0 - byte_len;
555 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
556 /*
557 * For 16 bit address pointers, the word address must contain
558 * a '10' sequence in bits 11 and 10 regardless of the
559 * intended position of the address pointer.
560 */
561 return 0x0800;
562 } else if (flags & AT24_FLAG_SERIAL) {
563 /*
564 * Otherwise the word address must begin with a '10' sequence,
565 * regardless of the intended address.
566 */
567 return 0x0080;
568 } else {
569 return 0;
570 }
571}
572
573static void at24_probe_temp_sensor(struct i2c_client *client)
574{
575 struct at24_data *at24 = i2c_get_clientdata(client);
576 struct i2c_board_info info = { .type = "jc42" };
577 int ret;
578 u8 val;
579
580 /*
581 * Byte 2 has value 11 for DDR3, earlier versions don't
582 * support the thermal sensor present flag
583 */
584 ret = at24_read(at24, 2, &val, 1);
585 if (ret || val != 11)
586 return;
587
588 /* Byte 32, bit 7 is set if temp sensor is present */
589 ret = at24_read(at24, 32, &val, 1);
590 if (ret || !(val & BIT(7)))
591 return;
592
593 info.addr = 0x18 | (client->addr & 7);
594
595 i2c_new_client_device(client->adapter, &info);
596}
597
598static int at24_probe(struct i2c_client *client)
599{
600 struct regmap_config regmap_config = { };
601 struct nvmem_config nvmem_config = { };
602 u32 byte_len, page_size, flags, addrw;
603 const struct at24_chip_data *cdata;
604 struct device *dev = &client->dev;
605 bool i2c_fn_i2c, i2c_fn_block;
606 unsigned int i, num_addresses;
607 struct at24_data *at24;
608 bool full_power;
609 struct regmap *regmap;
610 bool writable;
611 u8 test_byte;
612 int err;
613
614 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
615 i2c_fn_block = i2c_check_functionality(client->adapter,
616 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
617
618 cdata = i2c_get_match_data(client);
619 if (!cdata)
620 return -ENODEV;
621
622 err = device_property_read_u32(dev, "pagesize", &page_size);
623 if (err)
624 /*
625 * This is slow, but we can't know all eeproms, so we better
626 * play safe. Specifying custom eeprom-types via device tree
627 * or properties is recommended anyhow.
628 */
629 page_size = 1;
630
631 flags = cdata->flags;
632 if (device_property_present(dev, "read-only"))
633 flags |= AT24_FLAG_READONLY;
634 if (device_property_present(dev, "no-read-rollover"))
635 flags |= AT24_FLAG_NO_RDROL;
636
637 err = device_property_read_u32(dev, "address-width", &addrw);
638 if (!err) {
639 switch (addrw) {
640 case 8:
641 if (flags & AT24_FLAG_ADDR16)
642 dev_warn(dev,
643 "Override address width to be 8, while default is 16\n");
644 flags &= ~AT24_FLAG_ADDR16;
645 break;
646 case 16:
647 flags |= AT24_FLAG_ADDR16;
648 break;
649 default:
650 dev_warn(dev, "Bad \"address-width\" property: %u\n",
651 addrw);
652 }
653 }
654
655 err = device_property_read_u32(dev, "size", &byte_len);
656 if (err)
657 byte_len = cdata->byte_len;
658
659 if (!i2c_fn_i2c && !i2c_fn_block)
660 page_size = 1;
661
662 if (!page_size) {
663 dev_err(dev, "page_size must not be 0!\n");
664 return -EINVAL;
665 }
666
667 if (!is_power_of_2(page_size))
668 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
669
670 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
671 if (err) {
672 if (flags & AT24_FLAG_TAKE8ADDR)
673 num_addresses = 8;
674 else
675 num_addresses = DIV_ROUND_UP(byte_len,
676 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
677 }
678
679 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
680 dev_err(dev,
681 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
682 return -EINVAL;
683 }
684
685 regmap_config.val_bits = 8;
686 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
687 regmap_config.disable_locking = true;
688
689 regmap = devm_regmap_init_i2c(client, ®map_config);
690 if (IS_ERR(regmap))
691 return PTR_ERR(regmap);
692
693 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
694 GFP_KERNEL);
695 if (!at24)
696 return -ENOMEM;
697
698 mutex_init(&at24->lock);
699 at24->byte_len = byte_len;
700 at24->page_size = page_size;
701 at24->flags = flags;
702 at24->read_post = cdata->read_post;
703 at24->bank_addr_shift = cdata->bank_addr_shift;
704 at24->num_addresses = num_addresses;
705 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
706 at24->client_regmaps[0] = regmap;
707
708 at24->vcc_reg = devm_regulator_get(dev, "vcc");
709 if (IS_ERR(at24->vcc_reg))
710 return PTR_ERR(at24->vcc_reg);
711
712 writable = !(flags & AT24_FLAG_READONLY);
713 if (writable) {
714 at24->write_max = min_t(unsigned int,
715 page_size, at24_io_limit);
716 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
717 at24->write_max = I2C_SMBUS_BLOCK_MAX;
718 }
719
720 /* use dummy devices for multiple-address chips */
721 for (i = 1; i < num_addresses; i++) {
722 err = at24_make_dummy_client(at24, i, client, ®map_config);
723 if (err)
724 return err;
725 }
726
727 /*
728 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
729 * label property is set as some platform can have multiple eeproms
730 * with same label and we can not register each of those with same
731 * label. Failing to register those eeproms trigger cascade failure
732 * on such platform.
733 */
734 nvmem_config.id = NVMEM_DEVID_AUTO;
735
736 if (device_property_present(dev, "label")) {
737 err = device_property_read_string(dev, "label",
738 &nvmem_config.name);
739 if (err)
740 return err;
741 } else {
742 nvmem_config.name = dev_name(dev);
743 }
744
745 nvmem_config.type = NVMEM_TYPE_EEPROM;
746 nvmem_config.dev = dev;
747 nvmem_config.read_only = !writable;
748 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
749 nvmem_config.owner = THIS_MODULE;
750 nvmem_config.compat = true;
751 nvmem_config.base_dev = dev;
752 nvmem_config.reg_read = at24_read;
753 nvmem_config.reg_write = at24_write;
754 nvmem_config.priv = at24;
755 nvmem_config.stride = 1;
756 nvmem_config.word_size = 1;
757 nvmem_config.size = byte_len;
758
759 i2c_set_clientdata(client, at24);
760
761 full_power = acpi_dev_state_d0(&client->dev);
762 if (full_power) {
763 err = regulator_enable(at24->vcc_reg);
764 if (err) {
765 dev_err(dev, "Failed to enable vcc regulator\n");
766 return err;
767 }
768
769 pm_runtime_set_active(dev);
770 }
771 pm_runtime_enable(dev);
772
773 /*
774 * Perform a one-byte test read to verify that the chip is functional,
775 * unless powering on the device is to be avoided during probe (i.e.
776 * it's powered off right now).
777 */
778 if (full_power) {
779 err = at24_read(at24, 0, &test_byte, 1);
780 if (err) {
781 pm_runtime_disable(dev);
782 if (!pm_runtime_status_suspended(dev))
783 regulator_disable(at24->vcc_reg);
784 return -ENODEV;
785 }
786 }
787
788 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
789 if (IS_ERR(at24->nvmem)) {
790 pm_runtime_disable(dev);
791 if (!pm_runtime_status_suspended(dev))
792 regulator_disable(at24->vcc_reg);
793 return dev_err_probe(dev, PTR_ERR(at24->nvmem),
794 "failed to register nvmem\n");
795 }
796
797 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */
798 if (cdata == &at24_data_spd)
799 at24_probe_temp_sensor(client);
800
801 pm_runtime_idle(dev);
802
803 if (writable)
804 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
805 byte_len, client->name, at24->write_max);
806 else
807 dev_info(dev, "%u byte %s EEPROM, read-only\n",
808 byte_len, client->name);
809
810 return 0;
811}
812
813static void at24_remove(struct i2c_client *client)
814{
815 struct at24_data *at24 = i2c_get_clientdata(client);
816
817 pm_runtime_disable(&client->dev);
818 if (acpi_dev_state_d0(&client->dev)) {
819 if (!pm_runtime_status_suspended(&client->dev))
820 regulator_disable(at24->vcc_reg);
821 pm_runtime_set_suspended(&client->dev);
822 }
823}
824
825static int __maybe_unused at24_suspend(struct device *dev)
826{
827 struct i2c_client *client = to_i2c_client(dev);
828 struct at24_data *at24 = i2c_get_clientdata(client);
829
830 return regulator_disable(at24->vcc_reg);
831}
832
833static int __maybe_unused at24_resume(struct device *dev)
834{
835 struct i2c_client *client = to_i2c_client(dev);
836 struct at24_data *at24 = i2c_get_clientdata(client);
837
838 return regulator_enable(at24->vcc_reg);
839}
840
841static const struct dev_pm_ops at24_pm_ops = {
842 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
843 pm_runtime_force_resume)
844 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
845};
846
847static struct i2c_driver at24_driver = {
848 .driver = {
849 .name = "at24",
850 .pm = &at24_pm_ops,
851 .of_match_table = of_match_ptr(at24_of_match),
852 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
853 },
854 .probe = at24_probe,
855 .remove = at24_remove,
856 .id_table = at24_ids,
857 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
858};
859
860static int __init at24_init(void)
861{
862 if (!at24_io_limit) {
863 pr_err("at24: at24_io_limit must not be 0!\n");
864 return -EINVAL;
865 }
866
867 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
868 return i2c_add_driver(&at24_driver);
869}
870module_init(at24_init);
871
872static void __exit at24_exit(void)
873{
874 i2c_del_driver(&at24_driver);
875}
876module_exit(at24_exit);
877
878MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
879MODULE_AUTHOR("David Brownell and Wolfram Sang");
880MODULE_LICENSE("GPL");