1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
 2/*
 3 * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
 4 */
 5
 6/dts-v1/;
 7
 8#include "sg2002.dtsi"
 9
10/ {
11	model = "LicheeRV Nano B";
12	compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
13
14	aliases {
15		gpio0 = &gpio0;
16		gpio1 = &gpio1;
17		gpio2 = &gpio2;
18		gpio3 = &gpio3;
19		serial0 = &uart0;
20		serial1 = &uart1;
21		serial2 = &uart2;
22		serial3 = &uart3;
23		serial4 = &uart4;
24	};
25
26	chosen {
27		stdout-path = "serial0:115200n8";
28	};
29};
30
31&osc {
32	clock-frequency = <25000000>;
33};
34
35&pinctrl {
36	uart0_cfg: uart0-cfg {
37		uart0-pins {
38			pinmux = <PINMUX(PIN_UART0_TX, 0)>,
39				 <PINMUX(PIN_UART0_RX, 0)>;
40			bias-pull-up;
41			drive-strength-microamp = <10800>;
42			power-source = <3300>;
43		};
44	};
45
46	sdhci0_cfg: sdhci0-cfg {
47		sdhci0-clk-pins {
48			pinmux = <PINMUX(PIN_SD0_CLK, 0)>;
49			bias-pull-up;
50			drive-strength-microamp = <16100>;
51			power-source = <3300>;
52		};
53
54		sdhci0-cmd-pins {
55			pinmux = <PINMUX(PIN_SD0_CMD, 0)>;
56			bias-pull-up;
57			drive-strength-microamp = <10800>;
58			power-source = <3300>;
59		};
60
61		sdhci0-data-pins {
62			pinmux = <PINMUX(PIN_SD0_D0, 0)>,
63				 <PINMUX(PIN_SD0_D1, 0)>,
64				 <PINMUX(PIN_SD0_D2, 0)>,
65				 <PINMUX(PIN_SD0_D3, 0)>;
66			bias-pull-up;
67			drive-strength-microamp = <10800>;
68			power-source = <3300>;
69		};
70
71		sdhci0-cd-pins {
72			pinmux = <PINMUX(PIN_SD0_CD, 0)>;
73			bias-pull-up;
74			drive-strength-microamp = <10800>;
75			power-source = <3300>;
76		};
77	};
78};
79
80&sdhci0 {
81	pinctrl-0 = <&sdhci0_cfg>;
82	pinctrl-names = "default";
83	status = "okay";
84	bus-width = <4>;
85	no-1-8-v;
86	no-mmc;
87	no-sdio;
88	disable-wp;
89};
90
91&uart0 {
92	pinctrl-0 = <&uart0_cfg>;
93	pinctrl-names = "default";
94	status = "okay";
95};