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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Based on arch/arm/mm/flush.c
4 *
5 * Copyright (C) 1995-2002 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 */
8
9#include <linux/export.h>
10#include <linux/mm.h>
11#include <linux/libnvdimm.h>
12#include <linux/pagemap.h>
13
14#include <asm/cacheflush.h>
15#include <asm/cache.h>
16#include <asm/tlbflush.h>
17
18void sync_icache_aliases(unsigned long start, unsigned long end)
19{
20 if (icache_is_aliasing()) {
21 dcache_clean_pou(start, end);
22 icache_inval_all_pou();
23 } else {
24 /*
25 * Don't issue kick_all_cpus_sync() after I-cache invalidation
26 * for user mappings.
27 */
28 caches_clean_inval_pou(start, end);
29 }
30}
31
32static void flush_ptrace_access(struct vm_area_struct *vma, unsigned long start,
33 unsigned long end)
34{
35 if (vma->vm_flags & VM_EXEC)
36 sync_icache_aliases(start, end);
37}
38
39/*
40 * Copy user data from/to a page which is mapped into a different processes
41 * address space. Really, we want to allow our "user space" model to handle
42 * this.
43 */
44void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
45 unsigned long uaddr, void *dst, const void *src,
46 unsigned long len)
47{
48 memcpy(dst, src, len);
49 flush_ptrace_access(vma, (unsigned long)dst, (unsigned long)dst + len);
50}
51
52void __sync_icache_dcache(pte_t pte)
53{
54 struct folio *folio = page_folio(pte_page(pte));
55
56 if (!test_bit(PG_dcache_clean, &folio->flags)) {
57 sync_icache_aliases((unsigned long)folio_address(folio),
58 (unsigned long)folio_address(folio) +
59 folio_size(folio));
60 set_bit(PG_dcache_clean, &folio->flags);
61 }
62}
63EXPORT_SYMBOL_GPL(__sync_icache_dcache);
64
65/*
66 * This function is called when a page has been modified by the kernel. Mark
67 * it as dirty for later flushing when mapped in user space (if executable,
68 * see __sync_icache_dcache).
69 */
70void flush_dcache_folio(struct folio *folio)
71{
72 if (test_bit(PG_dcache_clean, &folio->flags))
73 clear_bit(PG_dcache_clean, &folio->flags);
74}
75EXPORT_SYMBOL(flush_dcache_folio);
76
77void flush_dcache_page(struct page *page)
78{
79 flush_dcache_folio(page_folio(page));
80}
81EXPORT_SYMBOL(flush_dcache_page);
82
83/*
84 * Additional functions defined in assembly.
85 */
86EXPORT_SYMBOL(caches_clean_inval_pou);
87
88#ifdef CONFIG_ARCH_HAS_PMEM_API
89void arch_wb_cache_pmem(void *addr, size_t size)
90{
91 /* Ensure order against any prior non-cacheable writes */
92 dmb(osh);
93 dcache_clean_pop((unsigned long)addr, (unsigned long)addr + size);
94}
95EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
96
97void arch_invalidate_pmem(void *addr, size_t size)
98{
99 dcache_inval_poc((unsigned long)addr, (unsigned long)addr + size);
100}
101EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
102#endif
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Based on arch/arm/mm/flush.c
4 *
5 * Copyright (C) 1995-2002 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 */
8
9#include <linux/export.h>
10#include <linux/mm.h>
11#include <linux/libnvdimm.h>
12#include <linux/pagemap.h>
13
14#include <asm/cacheflush.h>
15#include <asm/cache.h>
16#include <asm/tlbflush.h>
17
18void sync_icache_aliases(unsigned long start, unsigned long end)
19{
20 if (icache_is_aliasing()) {
21 dcache_clean_pou(start, end);
22 icache_inval_all_pou();
23 } else {
24 /*
25 * Don't issue kick_all_cpus_sync() after I-cache invalidation
26 * for user mappings.
27 */
28 caches_clean_inval_pou(start, end);
29 }
30}
31
32static void flush_ptrace_access(struct vm_area_struct *vma, unsigned long start,
33 unsigned long end)
34{
35 if (vma->vm_flags & VM_EXEC)
36 sync_icache_aliases(start, end);
37}
38
39/*
40 * Copy user data from/to a page which is mapped into a different processes
41 * address space. Really, we want to allow our "user space" model to handle
42 * this.
43 */
44void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
45 unsigned long uaddr, void *dst, const void *src,
46 unsigned long len)
47{
48 memcpy(dst, src, len);
49 flush_ptrace_access(vma, (unsigned long)dst, (unsigned long)dst + len);
50}
51
52void __sync_icache_dcache(pte_t pte)
53{
54 struct folio *folio = page_folio(pte_page(pte));
55
56 if (!test_bit(PG_dcache_clean, &folio->flags)) {
57 sync_icache_aliases((unsigned long)folio_address(folio),
58 (unsigned long)folio_address(folio) +
59 folio_size(folio));
60 set_bit(PG_dcache_clean, &folio->flags);
61 }
62}
63EXPORT_SYMBOL_GPL(__sync_icache_dcache);
64
65/*
66 * This function is called when a page has been modified by the kernel. Mark
67 * it as dirty for later flushing when mapped in user space (if executable,
68 * see __sync_icache_dcache).
69 */
70void flush_dcache_folio(struct folio *folio)
71{
72 if (test_bit(PG_dcache_clean, &folio->flags))
73 clear_bit(PG_dcache_clean, &folio->flags);
74}
75EXPORT_SYMBOL(flush_dcache_folio);
76
77void flush_dcache_page(struct page *page)
78{
79 flush_dcache_folio(page_folio(page));
80}
81EXPORT_SYMBOL(flush_dcache_page);
82
83/*
84 * Additional functions defined in assembly.
85 */
86EXPORT_SYMBOL(caches_clean_inval_pou);
87
88#ifdef CONFIG_ARCH_HAS_PMEM_API
89void arch_wb_cache_pmem(void *addr, size_t size)
90{
91 /* Ensure order against any prior non-cacheable writes */
92 dmb(osh);
93 dcache_clean_pop((unsigned long)addr, (unsigned long)addr + size);
94}
95EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
96
97void arch_invalidate_pmem(void *addr, size_t size)
98{
99 dcache_inval_poc((unsigned long)addr, (unsigned long)addr + size);
100}
101EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
102#endif