Linux Audio

Check our new training course

Loading...
v6.8
  1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
  2/*
  3 * Copyright (C) 2008-2014, 2018-2023 Intel Corporation
  4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
  5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
  6 */
  7#ifndef __iwl_fw_file_h__
  8#define __iwl_fw_file_h__
  9
 10#include <linux/netdevice.h>
 11#include <linux/nl80211.h>
 12
 13/* v1/v2 uCode file layout */
 14struct iwl_ucode_header {
 15	__le32 ver;	/* major/minor/API/serial */
 16	union {
 17		struct {
 18			__le32 inst_size;	/* bytes of runtime code */
 19			__le32 data_size;	/* bytes of runtime data */
 20			__le32 init_size;	/* bytes of init code */
 21			__le32 init_data_size;	/* bytes of init data */
 22			__le32 boot_size;	/* bytes of bootstrap code */
 23			u8 data[];		/* in same order as sizes */
 24		} v1;
 25		struct {
 26			__le32 build;		/* build number */
 27			__le32 inst_size;	/* bytes of runtime code */
 28			__le32 data_size;	/* bytes of runtime data */
 29			__le32 init_size;	/* bytes of init code */
 30			__le32 init_data_size;	/* bytes of init data */
 31			__le32 boot_size;	/* bytes of bootstrap code */
 32			u8 data[];		/* in same order as sizes */
 33		} v2;
 34	} u;
 35};
 36
 37#define IWL_UCODE_TLV_DEBUG_BASE	0x1000005
 38#define IWL_UCODE_TLV_CONST_BASE	0x100
 39
 40/*
 41 * new TLV uCode file layout
 42 *
 43 * The new TLV file format contains TLVs, that each specify
 44 * some piece of data.
 45 */
 46
 47enum iwl_ucode_tlv_type {
 48	IWL_UCODE_TLV_INVALID		= 0, /* unused */
 49	IWL_UCODE_TLV_INST		= 1,
 50	IWL_UCODE_TLV_DATA		= 2,
 51	IWL_UCODE_TLV_INIT		= 3,
 52	IWL_UCODE_TLV_INIT_DATA		= 4,
 53	IWL_UCODE_TLV_BOOT		= 5,
 54	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
 55	IWL_UCODE_TLV_PAN		= 7, /* deprecated -- only used in DVM */
 56	IWL_UCODE_TLV_MEM_DESC		= 7, /* replaces PAN in non-DVM */
 57	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
 58	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
 59	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
 60	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
 61	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
 62	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
 63	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
 64	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
 65	IWL_UCODE_TLV_WOWLAN_INST	= 16,
 66	IWL_UCODE_TLV_WOWLAN_DATA	= 17,
 67	IWL_UCODE_TLV_FLAGS		= 18,
 68	IWL_UCODE_TLV_SEC_RT		= 19,
 69	IWL_UCODE_TLV_SEC_INIT		= 20,
 70	IWL_UCODE_TLV_SEC_WOWLAN	= 21,
 71	IWL_UCODE_TLV_DEF_CALIB		= 22,
 72	IWL_UCODE_TLV_PHY_SKU		= 23,
 73	IWL_UCODE_TLV_SECURE_SEC_RT	= 24,
 74	IWL_UCODE_TLV_SECURE_SEC_INIT	= 25,
 75	IWL_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
 76	IWL_UCODE_TLV_NUM_OF_CPU	= 27,
 77	IWL_UCODE_TLV_CSCHEME		= 28,
 78	IWL_UCODE_TLV_API_CHANGES_SET	= 29,
 79	IWL_UCODE_TLV_ENABLED_CAPABILITIES	= 30,
 80	IWL_UCODE_TLV_N_SCAN_CHANNELS		= 31,
 81	IWL_UCODE_TLV_PAGING		= 32,
 82	IWL_UCODE_TLV_SEC_RT_USNIFFER	= 34,
 83	/* 35 is unused */
 84	IWL_UCODE_TLV_FW_VERSION	= 36,
 85	IWL_UCODE_TLV_FW_DBG_DEST	= 38,
 86	IWL_UCODE_TLV_FW_DBG_CONF	= 39,
 87	IWL_UCODE_TLV_FW_DBG_TRIGGER	= 40,
 88	IWL_UCODE_TLV_CMD_VERSIONS	= 48,
 89	IWL_UCODE_TLV_FW_GSCAN_CAPA	= 50,
 90	IWL_UCODE_TLV_FW_MEM_SEG	= 51,
 91	IWL_UCODE_TLV_IML		= 52,
 92	IWL_UCODE_TLV_UMAC_DEBUG_ADDRS	= 54,
 93	IWL_UCODE_TLV_LMAC_DEBUG_ADDRS	= 55,
 94	IWL_UCODE_TLV_FW_RECOVERY_INFO	= 57,
 95	IWL_UCODE_TLV_HW_TYPE			= 58,
 96	IWL_UCODE_TLV_FW_FSEQ_VERSION		= 60,
 97	IWL_UCODE_TLV_PHY_INTEGRATION_VERSION	= 61,
 98
 99	IWL_UCODE_TLV_PNVM_VERSION		= 62,
100	IWL_UCODE_TLV_PNVM_SKU			= 64,
101
102	IWL_UCODE_TLV_SEC_TABLE_ADDR		= 66,
103	IWL_UCODE_TLV_D3_KEK_KCK_ADDR		= 67,
104	IWL_UCODE_TLV_CURRENT_PC		= 68,
105
106	IWL_UCODE_TLV_FW_NUM_STATIONS		= IWL_UCODE_TLV_CONST_BASE + 0,
107	IWL_UCODE_TLV_FW_NUM_BEACONS		= IWL_UCODE_TLV_CONST_BASE + 2,
108
109	IWL_UCODE_TLV_TYPE_DEBUG_INFO		= IWL_UCODE_TLV_DEBUG_BASE + 0,
110	IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION	= IWL_UCODE_TLV_DEBUG_BASE + 1,
111	IWL_UCODE_TLV_TYPE_HCMD			= IWL_UCODE_TLV_DEBUG_BASE + 2,
112	IWL_UCODE_TLV_TYPE_REGIONS		= IWL_UCODE_TLV_DEBUG_BASE + 3,
113	IWL_UCODE_TLV_TYPE_TRIGGERS		= IWL_UCODE_TLV_DEBUG_BASE + 4,
114	IWL_UCODE_TLV_TYPE_CONF_SET		= IWL_UCODE_TLV_DEBUG_BASE + 5,
115	IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
116
117	/* TLVs 0x1000-0x2000 are for internal driver usage */
118	IWL_UCODE_TLV_FW_DBG_DUMP_LST	= 0x1000,
119};
120
121struct iwl_ucode_tlv {
122	__le32 type;		/* see above */
123	__le32 length;		/* not including type/length fields */
124	u8 data[];
125};
126
127#define IWL_TLV_UCODE_MAGIC		0x0a4c5749
128#define FW_VER_HUMAN_READABLE_SZ	64
129
130struct iwl_tlv_ucode_header {
131	/*
132	 * The TLV style ucode header is distinguished from
133	 * the v1/v2 style header by first four bytes being
134	 * zero, as such is an invalid combination of
135	 * major/minor/API/serial versions.
136	 */
137	__le32 zero;
138	__le32 magic;
139	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
140	/* major/minor/API/serial or major in new format */
141	__le32 ver;
142	__le32 build;
143	__le64 ignore;
144	/*
145	 * The data contained herein has a TLV layout,
146	 * see above for the TLV header and types.
147	 * Note that each TLV is padded to a length
148	 * that is a multiple of 4 for alignment.
149	 */
150	u8 data[];
151};
152
153/*
154 * ucode TLVs
155 *
156 * ability to get extension for: flags & capabilities from ucode binaries files
157 */
158struct iwl_ucode_api {
159	__le32 api_index;
160	__le32 api_flags;
161} __packed;
162
163struct iwl_ucode_capa {
164	__le32 api_index;
165	__le32 api_capa;
166} __packed;
167
168/**
169 * enum iwl_ucode_tlv_flag - ucode API flags
170 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
171 *	was a separate TLV but moved here to save space.
172 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
173 *	treats good CRC threshold as a boolean
174 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
175 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
176 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
177 *	offload profile config command.
178 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
179 *	(rather than two) IPv6 addresses
180 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
181 *	from the probe request template.
182 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
183 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
184 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
185 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
186 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
187 */
188enum iwl_ucode_tlv_flag {
189	IWL_UCODE_TLV_FLAGS_PAN			= BIT(0),
190	IWL_UCODE_TLV_FLAGS_NEWSCAN		= BIT(1),
191	IWL_UCODE_TLV_FLAGS_MFP			= BIT(2),
192	IWL_UCODE_TLV_FLAGS_SHORT_BL		= BIT(7),
193	IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= BIT(10),
194	IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID	= BIT(12),
195	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= BIT(15),
196	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= BIT(16),
197	IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= BIT(24),
198	IWL_UCODE_TLV_FLAGS_EBS_SUPPORT		= BIT(25),
199	IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= BIT(26),
200};
201
202typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
203
204/**
205 * enum iwl_ucode_tlv_api - ucode api
206 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
207 *	longer than the passive one, which is essential for fragmented scan.
208 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
209 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
210 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
211 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
212 *	iteration complete notification, and the timestamp reported for RX
213 *	received during scan, are reported in TSF of the mac specified in the
214 *	scan request.
215 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
216 *	ADD_MODIFY_STA_KEY_API_S_VER_2.
217 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
218 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
 
219 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
220 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
221 *	indicating low latency direction.
222 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
223 *	deprecated.
224 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
225 *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
226 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
227 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
228 *	the REDUCE_TX_POWER_CMD.
229 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
230 *	version of the beacon notification.
231 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
232 *	BEACON_FILTER_CONFIG_API_S_VER_4.
233 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
234 *	REGULATORY_NVM_GET_INFO_RSP_API_S.
235 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
236 *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
237 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
238 *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
239 *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
240 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
241 *	STA_CONTEXT_DOT11AX_API_S
 
 
242 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
243 *	version tables.
244 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
245 *  SCAN_CONFIG_DB_CMD_API_S.
 
 
 
246 * @IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX: Firmware offloaded the station disable tx
247 *	logic.
248 * @IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR: Firmware supports clearing the debug
249 *	internal buffer
 
 
250 *
251 * @NUM_IWL_UCODE_TLV_API: number of bits used
252 */
253enum iwl_ucode_tlv_api {
254	/* API Set 0 */
255	IWL_UCODE_TLV_API_FRAGMENTED_SCAN	= (__force iwl_ucode_tlv_api_t)8,
256	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE	= (__force iwl_ucode_tlv_api_t)9,
257	IWL_UCODE_TLV_API_LQ_SS_PARAMS		= (__force iwl_ucode_tlv_api_t)18,
258	IWL_UCODE_TLV_API_NEW_VERSION		= (__force iwl_ucode_tlv_api_t)20,
259	IWL_UCODE_TLV_API_SCAN_TSF_REPORT	= (__force iwl_ucode_tlv_api_t)28,
260	IWL_UCODE_TLV_API_TKIP_MIC_KEYS		= (__force iwl_ucode_tlv_api_t)29,
261	IWL_UCODE_TLV_API_STA_TYPE		= (__force iwl_ucode_tlv_api_t)30,
262	IWL_UCODE_TLV_API_NAN2_VER2		= (__force iwl_ucode_tlv_api_t)31,
263	/* API Set 1 */
264	IWL_UCODE_TLV_API_ADAPTIVE_DWELL	= (__force iwl_ucode_tlv_api_t)32,
265	IWL_UCODE_TLV_API_OCE			= (__force iwl_ucode_tlv_api_t)33,
266	IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= (__force iwl_ucode_tlv_api_t)34,
267	IWL_UCODE_TLV_API_NEW_RX_STATS		= (__force iwl_ucode_tlv_api_t)35,
268	IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= (__force iwl_ucode_tlv_api_t)36,
269	IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY	= (__force iwl_ucode_tlv_api_t)38,
270	IWL_UCODE_TLV_API_DEPRECATE_TTAK	= (__force iwl_ucode_tlv_api_t)41,
271	IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= (__force iwl_ucode_tlv_api_t)42,
272	IWL_UCODE_TLV_API_FRAG_EBS		= (__force iwl_ucode_tlv_api_t)44,
273	IWL_UCODE_TLV_API_REDUCE_TX_POWER	= (__force iwl_ucode_tlv_api_t)45,
274	IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF	= (__force iwl_ucode_tlv_api_t)46,
275	IWL_UCODE_TLV_API_BEACON_FILTER_V4      = (__force iwl_ucode_tlv_api_t)47,
276	IWL_UCODE_TLV_API_REGULATORY_NVM_INFO   = (__force iwl_ucode_tlv_api_t)48,
277	IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = (__force iwl_ucode_tlv_api_t)49,
278	IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = (__force iwl_ucode_tlv_api_t)50,
279	IWL_UCODE_TLV_API_MBSSID_HE		= (__force iwl_ucode_tlv_api_t)52,
280	IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= (__force iwl_ucode_tlv_api_t)53,
281	IWL_UCODE_TLV_API_FTM_RTT_ACCURACY      = (__force iwl_ucode_tlv_api_t)54,
282	IWL_UCODE_TLV_API_SAR_TABLE_VER         = (__force iwl_ucode_tlv_api_t)55,
283	IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG   = (__force iwl_ucode_tlv_api_t)56,
284	IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= (__force iwl_ucode_tlv_api_t)57,
285	IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= (__force iwl_ucode_tlv_api_t)58,
286	IWL_UCODE_TLV_API_BAND_IN_RX_DATA	= (__force iwl_ucode_tlv_api_t)59,
287	/* API Set 2 */
288	IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX	= (__force iwl_ucode_tlv_api_t)66,
289	IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR     = (__force iwl_ucode_tlv_api_t)67,
 
290
291	NUM_IWL_UCODE_TLV_API
292/*
293 * This construction make both sparse (which cannot increment the previous
294 * member due to its bitwise type) and kernel-doc (which doesn't understand
295 * the ifdef/else properly) work.
296 */
297#ifdef __CHECKER__
298#define __CHECKER_NUM_IWL_UCODE_TLV_API	128
299		= (__force iwl_ucode_tlv_api_t)__CHECKER_NUM_IWL_UCODE_TLV_API,
300#define NUM_IWL_UCODE_TLV_API __CHECKER_NUM_IWL_UCODE_TLV_API
301#endif
302};
303
304typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
305
306/**
307 * enum iwl_ucode_tlv_capa - ucode capabilities
308 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
309 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
310 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
311 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
312 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
313 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
314 *	tx power value into TPC Report action frame and Link Measurement Report
315 *	action frame
316 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
317 *	channel in DS parameter set element in probe requests.
318 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
319 *	probe requests.
320 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
321 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
322 *	which also implies support for the scheduler configuration command
323 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
324 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
325 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
326 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
327 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
328 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
329 *	is standalone or with a BSS station interface in the same binding.
330 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
331 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
332 *	sources for the MCC. This TLV bit is a future replacement to
333 *	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
334 *	is supported.
335 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
336 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
337 * @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image
338 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
339 *	stabilization latency for SoCs.
340 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
341 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
342 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
343 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
344 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
345 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
346 *	(6 GHz).
347 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
348 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
349 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
350 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
351 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
352 *	countdown offloading. Beacon notifications are not sent to the host.
353 *	The fw also offloads TBTT alignment.
354 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
355 *	antenna the beacon should be transmitted
356 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
357 *	from AP and will send it upon d0i3 exit.
358 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
359 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
360 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
361 *	thresholds reporting
362 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
363 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
364 *	regular image.
365 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
366 *	memory addresses from the firmware.
367 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
368 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
369 *	command size (command version 4) that supports toggling ACK TX
370 *	power reduction.
371 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
372 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
373 *	capability.
374 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
375 *	to report the CSI information with (certain) RX frames
376 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
377 *	initiator and responder
378 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
379 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
380 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
381 *	reset flow
382 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
383 *      channels even when these are not enabled.
384 * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection
385 *	complete to FW.
 
 
 
 
 
386 *
387 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
388 */
389enum iwl_ucode_tlv_capa {
390	/* set 0 */
391	IWL_UCODE_TLV_CAPA_D0I3_SUPPORT			= (__force iwl_ucode_tlv_capa_t)0,
392	IWL_UCODE_TLV_CAPA_LAR_SUPPORT			= (__force iwl_ucode_tlv_capa_t)1,
393	IWL_UCODE_TLV_CAPA_UMAC_SCAN			= (__force iwl_ucode_tlv_capa_t)2,
394	IWL_UCODE_TLV_CAPA_BEAMFORMER			= (__force iwl_ucode_tlv_capa_t)3,
395	IWL_UCODE_TLV_CAPA_TDLS_SUPPORT			= (__force iwl_ucode_tlv_capa_t)6,
396	IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= (__force iwl_ucode_tlv_capa_t)8,
397	IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)9,
398	IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)10,
399	IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)11,
400	IWL_UCODE_TLV_CAPA_DQA_SUPPORT			= (__force iwl_ucode_tlv_capa_t)12,
401	IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= (__force iwl_ucode_tlv_capa_t)13,
402	IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= (__force iwl_ucode_tlv_capa_t)17,
403	IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)18,
404	IWL_UCODE_TLV_CAPA_CSUM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)21,
405	IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= (__force iwl_ucode_tlv_capa_t)22,
406	IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD		= (__force iwl_ucode_tlv_capa_t)26,
407	IWL_UCODE_TLV_CAPA_BT_COEX_PLCR			= (__force iwl_ucode_tlv_capa_t)28,
408	IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC		= (__force iwl_ucode_tlv_capa_t)29,
409	IWL_UCODE_TLV_CAPA_BT_COEX_RRC			= (__force iwl_ucode_tlv_capa_t)30,
410	IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)31,
411
412	/* set 1 */
413	IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG		= (__force iwl_ucode_tlv_capa_t)32,
414	IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT		= (__force iwl_ucode_tlv_capa_t)37,
415	IWL_UCODE_TLV_CAPA_STA_PM_NOTIF			= (__force iwl_ucode_tlv_capa_t)38,
416	IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT		= (__force iwl_ucode_tlv_capa_t)39,
417	IWL_UCODE_TLV_CAPA_CDB_SUPPORT			= (__force iwl_ucode_tlv_capa_t)40,
418	IWL_UCODE_TLV_CAPA_D0I3_END_FIRST		= (__force iwl_ucode_tlv_capa_t)41,
419	IWL_UCODE_TLV_CAPA_TLC_OFFLOAD                  = (__force iwl_ucode_tlv_capa_t)43,
420	IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA                = (__force iwl_ucode_tlv_capa_t)44,
421	IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2		= (__force iwl_ucode_tlv_capa_t)45,
422	IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD		= (__force iwl_ucode_tlv_capa_t)46,
423	IWL_UCODE_TLV_CAPA_FTM_CALIBRATED		= (__force iwl_ucode_tlv_capa_t)47,
424	IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS		= (__force iwl_ucode_tlv_capa_t)48,
425	IWL_UCODE_TLV_CAPA_CS_MODIFY			= (__force iwl_ucode_tlv_capa_t)49,
426	IWL_UCODE_TLV_CAPA_SET_LTR_GEN2			= (__force iwl_ucode_tlv_capa_t)50,
427	IWL_UCODE_TLV_CAPA_SET_PPAG			= (__force iwl_ucode_tlv_capa_t)52,
428	IWL_UCODE_TLV_CAPA_TAS_CFG			= (__force iwl_ucode_tlv_capa_t)53,
429	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD		= (__force iwl_ucode_tlv_capa_t)54,
430	IWL_UCODE_TLV_CAPA_PROTECTED_TWT		= (__force iwl_ucode_tlv_capa_t)56,
431	IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE		= (__force iwl_ucode_tlv_capa_t)57,
432	IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)58,
433	IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)59,
434	IWL_UCODE_TLV_CAPA_BROADCAST_TWT		= (__force iwl_ucode_tlv_capa_t)60,
435	IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO		= (__force iwl_ucode_tlv_capa_t)61,
436	IWL_UCODE_TLV_CAPA_RFIM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)62,
437	IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT		= (__force iwl_ucode_tlv_capa_t)63,
438
439	/* set 2 */
440	IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= (__force iwl_ucode_tlv_capa_t)64,
441	IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= (__force iwl_ucode_tlv_capa_t)65,
442	IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)67,
443	IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)68,
444	IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD		= (__force iwl_ucode_tlv_capa_t)70,
445	IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= (__force iwl_ucode_tlv_capa_t)71,
446	IWL_UCODE_TLV_CAPA_BEACON_STORING		= (__force iwl_ucode_tlv_capa_t)72,
447	IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3		= (__force iwl_ucode_tlv_capa_t)73,
448	IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW		= (__force iwl_ucode_tlv_capa_t)74,
449	IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= (__force iwl_ucode_tlv_capa_t)75,
450	IWL_UCODE_TLV_CAPA_CTDP_SUPPORT			= (__force iwl_ucode_tlv_capa_t)76,
451	IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= (__force iwl_ucode_tlv_capa_t)77,
452	IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= (__force iwl_ucode_tlv_capa_t)80,
453	IWL_UCODE_TLV_CAPA_LQM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)81,
454	IWL_UCODE_TLV_CAPA_TX_POWER_ACK			= (__force iwl_ucode_tlv_capa_t)84,
455	IWL_UCODE_TLV_CAPA_D3_DEBUG			= (__force iwl_ucode_tlv_capa_t)87,
456	IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)88,
457	IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)89,
458	IWL_UCODE_TLV_CAPA_CSI_REPORTING		= (__force iwl_ucode_tlv_capa_t)90,
459	IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)92,
460	IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)93,
461
462	/* set 3 */
463	IWL_UCODE_TLV_CAPA_MLME_OFFLOAD			= (__force iwl_ucode_tlv_capa_t)96,
464
465	/*
466	 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
467	 */
468	IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)98,
469
470	IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT		= (__force iwl_ucode_tlv_capa_t)100,
 
471	IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)104,
472	IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)105,
473	IWL_UCODE_TLV_CAPA_SYNCED_TIME			= (__force iwl_ucode_tlv_capa_t)106,
474	IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM        = (__force iwl_ucode_tlv_capa_t)108,
475	IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT		= (__force iwl_ucode_tlv_capa_t)109,
476	IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT		= (__force iwl_ucode_tlv_capa_t)110,
477	IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT         = (__force iwl_ucode_tlv_capa_t)111,
478	IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT	= (__force iwl_ucode_tlv_capa_t)112,
479	IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT		= (__force iwl_ucode_tlv_capa_t)113,
480	IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT		= (__force iwl_ucode_tlv_capa_t)114,
481	IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)116,
482	IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)117,
483
 
484	NUM_IWL_UCODE_TLV_CAPA
485/*
486 * This construction make both sparse (which cannot increment the previous
487 * member due to its bitwise type) and kernel-doc (which doesn't understand
488 * the ifdef/else properly) work.
489 */
490#ifdef __CHECKER__
491#define __CHECKER_NUM_IWL_UCODE_TLV_CAPA	128
492		= (__force iwl_ucode_tlv_capa_t)__CHECKER_NUM_IWL_UCODE_TLV_CAPA,
493#define NUM_IWL_UCODE_TLV_CAPA __CHECKER_NUM_IWL_UCODE_TLV_CAPA
494#endif
495};
496
497/* The default calibrate table size if not specified by firmware file */
498#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
499#define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
500#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE			253
501
502/* The default max probe length if not specified by the firmware file */
503#define IWL_DEFAULT_MAX_PROBE_LENGTH	200
504
505/*
506 * For 16.0 uCode and above, there is no differentiation between sections,
507 * just an offset to the HW address.
508 */
509#define CPU1_CPU2_SEPARATOR_SECTION	0xFFFFCCCC
510#define PAGING_SEPARATOR_SECTION	0xAAAABBBB
511
512/* uCode version contains 4 values: Major/Minor/API/Serial */
513#define IWL_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
514#define IWL_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
515#define IWL_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
516#define IWL_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
517
518/**
519 * struct iwl_tlv_calib_ctrl - Calibration control struct.
520 * Sent as part of the phy configuration command.
521 * @flow_trigger: bitmap for which calibrations to perform according to
522 *		flow triggers.
523 * @event_trigger: bitmap for which calibrations to perform according to
524 *		event triggers.
525 */
526struct iwl_tlv_calib_ctrl {
527	__le32 flow_trigger;
528	__le32 event_trigger;
529} __packed;
530
531enum iwl_fw_phy_cfg {
532	FW_PHY_CFG_RADIO_TYPE_POS = 0,
533	FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
534	FW_PHY_CFG_RADIO_STEP_POS = 2,
535	FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
536	FW_PHY_CFG_RADIO_DASH_POS = 4,
537	FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
538	FW_PHY_CFG_TX_CHAIN_POS = 16,
539	FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
540	FW_PHY_CFG_RX_CHAIN_POS = 20,
541	FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
542	FW_PHY_CFG_CHAIN_SAD_POS = 23,
543	FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
544	FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
545	FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
546	FW_PHY_CFG_SHARED_CLK = BIT(31),
547};
548
549enum iwl_fw_dbg_reg_operator {
550	CSR_ASSIGN,
551	CSR_SETBIT,
552	CSR_CLEARBIT,
553
554	PRPH_ASSIGN,
555	PRPH_SETBIT,
556	PRPH_CLEARBIT,
557
558	INDIRECT_ASSIGN,
559	INDIRECT_SETBIT,
560	INDIRECT_CLEARBIT,
561
562	PRPH_BLOCKBIT,
563};
564
565/**
566 * struct iwl_fw_dbg_reg_op - an operation on a register
567 *
568 * @op: &enum iwl_fw_dbg_reg_operator
 
569 * @addr: offset of the register
570 * @val: value
571 */
572struct iwl_fw_dbg_reg_op {
573	u8 op;
574	u8 reserved[3];
575	__le32 addr;
576	__le32 val;
577} __packed;
578
579/**
580 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
581 *
582 * @SMEM_MODE: monitor stores the data in SMEM
583 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
584 * @MARBH_MODE: monitor stores the data in MARBH buffer
585 * @MIPI_MODE: monitor outputs the data through the MIPI interface
586 */
587enum iwl_fw_dbg_monitor_mode {
588	SMEM_MODE = 0,
589	EXTERNAL_MODE = 1,
590	MARBH_MODE = 2,
591	MIPI_MODE = 3,
592};
593
594/**
595 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
596 *
597 * @data_type: the memory segment type to record
598 * @ofs: the memory segment offset
599 * @len: the memory segment length, in bytes
600 *
601 * This parses IWL_UCODE_TLV_FW_MEM_SEG
602 */
603struct iwl_fw_dbg_mem_seg_tlv {
604	__le32 data_type;
605	__le32 ofs;
606	__le32 len;
607} __packed;
608
609/**
610 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
611 *
612 * @version: version of the TLV - currently 0
613 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
614 * @size_power: buffer size will be 2^(size_power + 11)
 
615 * @base_reg: addr of the base addr register (PRPH)
616 * @end_reg:  addr of the end addr register (PRPH)
617 * @write_ptr_reg: the addr of the reg of the write pointer
618 * @wrap_count: the addr of the reg of the wrap_count
619 * @base_shift: shift right of the base addr reg
620 * @end_shift: shift right of the end addr reg
621 * @reg_ops: array of registers operations
622 *
623 * This parses IWL_UCODE_TLV_FW_DBG_DEST
624 */
625struct iwl_fw_dbg_dest_tlv_v1 {
626	u8 version;
627	u8 monitor_mode;
628	u8 size_power;
629	u8 reserved;
630	__le32 base_reg;
631	__le32 end_reg;
632	__le32 write_ptr_reg;
633	__le32 wrap_count;
634	u8 base_shift;
635	u8 end_shift;
636	struct iwl_fw_dbg_reg_op reg_ops[];
637} __packed;
638
639/* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
640#define IWL_LDBG_M2S_BUF_SIZE_MSK	0x0fff0000
641/* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
642#define IWL_LDBG_M2S_BUF_BA_MSK		0x00000fff
643/* The smem buffer chunks are in units of 256 bits */
644#define IWL_M2S_UNIT_SIZE			0x100
645
646struct iwl_fw_dbg_dest_tlv {
647	u8 version;
648	u8 monitor_mode;
649	u8 size_power;
650	u8 reserved;
651	__le32 cfg_reg;
652	__le32 write_ptr_reg;
653	__le32 wrap_count;
654	u8 base_shift;
655	u8 size_shift;
656	struct iwl_fw_dbg_reg_op reg_ops[];
657} __packed;
658
659struct iwl_fw_dbg_conf_hcmd {
660	u8 id;
661	u8 reserved;
662	__le16 len;
663	u8 data[];
664} __packed;
665
666/**
667 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
668 *
669 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
670 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
671 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
672 *	collect only monitor data
673 */
674enum iwl_fw_dbg_trigger_mode {
675	IWL_FW_DBG_TRIGGER_START = BIT(0),
676	IWL_FW_DBG_TRIGGER_STOP = BIT(1),
677	IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
678};
679
680/**
681 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
682 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
683 */
684enum iwl_fw_dbg_trigger_flags {
685	IWL_FW_DBG_FORCE_RESTART = BIT(0),
686};
687
688/**
689 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
690 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
691 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
692 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
693 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
694 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
695 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
696 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
697 */
698enum iwl_fw_dbg_trigger_vif_type {
699	IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
700	IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
701	IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
702	IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
703	IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
704	IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
705	IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
706};
707
708/**
709 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
710 * @id: &enum iwl_fw_dbg_trigger
711 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
712 * @stop_conf_ids: bitmap of configurations this trigger relates to.
713 *	if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
714 *	to the currently running configuration is set, the data should be
715 *	collected.
716 * @stop_delay: how many milliseconds to wait before collecting the data
717 *	after the STOP trigger fires.
718 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
719 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
720 *	configuration should be applied when the triggers kicks in.
721 * @occurrences: number of occurrences. 0 means the trigger will never fire.
722 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
723 *	trigger in which another occurrence should be ignored.
724 * @flags: &enum iwl_fw_dbg_trigger_flags
 
 
725 */
726struct iwl_fw_dbg_trigger_tlv {
727	__le32 id;
728	__le32 vif_type;
729	__le32 stop_conf_ids;
730	__le32 stop_delay;
731	u8 mode;
732	u8 start_conf_id;
733	__le16 occurrences;
734	__le16 trig_dis_ms;
735	u8 flags;
736	u8 reserved[5];
737
738	u8 data[];
739} __packed;
740
741#define FW_DBG_START_FROM_ALIVE	0
742#define FW_DBG_CONF_MAX		32
743#define FW_DBG_INVALID		0xff
744
745/**
746 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
747 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
748 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
749 * @start_consec_missed_bcon: start recording if threshold is crossed.
750 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
751 * @reserved1: reserved
752 * @reserved2: reserved
753 */
754struct iwl_fw_dbg_trigger_missed_bcon {
755	__le32 stop_consec_missed_bcon;
756	__le32 stop_consec_missed_bcon_since_rx;
757	__le32 reserved2[2];
758	__le32 start_consec_missed_bcon;
759	__le32 start_consec_missed_bcon_since_rx;
760	__le32 reserved1[2];
761} __packed;
762
763/**
764 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
765 * cmds: the list of commands to trigger the collection on
766 */
767struct iwl_fw_dbg_trigger_cmd {
768	struct cmd {
769		u8 cmd_id;
770		u8 group_id;
771	} __packed cmds[16];
772} __packed;
773
774/**
775 * iwl_fw_dbg_trigger_stats - configures trigger for statistics
776 * @stop_offset: the offset of the value to be monitored
777 * @stop_threshold: the threshold above which to collect
778 * @start_offset: the offset of the value to be monitored
779 * @start_threshold: the threshold above which to start recording
780 */
781struct iwl_fw_dbg_trigger_stats {
782	__le32 stop_offset;
783	__le32 stop_threshold;
784	__le32 start_offset;
785	__le32 start_threshold;
786} __packed;
787
788/**
789 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
790 * @rssi: RSSI value to trigger at
791 */
792struct iwl_fw_dbg_trigger_low_rssi {
793	__le32 rssi;
794} __packed;
795
796/**
797 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
798 * @stop_auth_denied: number of denied authentication to collect
799 * @stop_auth_timeout: number of authentication timeout to collect
800 * @stop_rx_deauth: number of Rx deauth before to collect
801 * @stop_tx_deauth: number of Tx deauth before to collect
802 * @stop_assoc_denied: number of denied association to collect
803 * @stop_assoc_timeout: number of association timeout to collect
804 * @stop_connection_loss: number of connection loss to collect
805 * @start_auth_denied: number of denied authentication to start recording
806 * @start_auth_timeout: number of authentication timeout to start recording
807 * @start_rx_deauth: number of Rx deauth to start recording
808 * @start_tx_deauth: number of Tx deauth to start recording
809 * @start_assoc_denied: number of denied association to start recording
810 * @start_assoc_timeout: number of association timeout to start recording
811 * @start_connection_loss: number of connection loss to start recording
812 */
813struct iwl_fw_dbg_trigger_mlme {
814	u8 stop_auth_denied;
815	u8 stop_auth_timeout;
816	u8 stop_rx_deauth;
817	u8 stop_tx_deauth;
818
819	u8 stop_assoc_denied;
820	u8 stop_assoc_timeout;
821	u8 stop_connection_loss;
822	u8 reserved;
823
824	u8 start_auth_denied;
825	u8 start_auth_timeout;
826	u8 start_rx_deauth;
827	u8 start_tx_deauth;
828
829	u8 start_assoc_denied;
830	u8 start_assoc_timeout;
831	u8 start_connection_loss;
832	u8 reserved2;
833} __packed;
834
835/**
836 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
837 * @command_queue: timeout for the command queue in ms
838 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
839 * @softap: timeout for the queues of a softAP in ms
840 * @p2p_go: timeout for the queues of a P2P GO in ms
841 * @p2p_client: timeout for the queues of a P2P client in ms
842 * @p2p_device: timeout for the queues of a P2P device in ms
843 * @ibss: timeout for the queues of an IBSS in ms
844 * @tdls: timeout for the queues of a TDLS station in ms
845 */
846struct iwl_fw_dbg_trigger_txq_timer {
847	__le32 command_queue;
848	__le32 bss;
849	__le32 softap;
850	__le32 p2p_go;
851	__le32 p2p_client;
852	__le32 p2p_device;
853	__le32 ibss;
854	__le32 tdls;
855	__le32 reserved[4];
856} __packed;
857
858/**
859 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
860 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
861 *	trigger each time a time event notification that relates to time event
862 *	id with one of the actions in the bitmap is received and
863 *	BIT(notif->status) is set in status_bitmap.
864 *
865 */
866struct iwl_fw_dbg_trigger_time_event {
867	struct {
868		__le32 id;
869		__le32 action_bitmap;
870		__le32 status_bitmap;
871	} __packed time_events[16];
872} __packed;
873
874/**
875 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
876 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
877 *	when an Rx BlockAck session is started.
878 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
879 *	when an Rx BlockAck session is stopped.
880 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
881 *	when a Tx BlockAck session is started.
882 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
883 *	when a Tx BlockAck session is stopped.
884 * rx_bar: tid bitmap to configure on what tid the trigger should occur
885 *	when a BAR is received (for a Tx BlockAck session).
886 * tx_bar: tid bitmap to configure on what tid the trigger should occur
887 *	when a BAR is send (for an Rx BlocAck session).
888 * frame_timeout: tid bitmap to configure on what tid the trigger should occur
889 *	when a frame times out in the reordering buffer.
890 */
891struct iwl_fw_dbg_trigger_ba {
892	__le16 rx_ba_start;
893	__le16 rx_ba_stop;
894	__le16 tx_ba_start;
895	__le16 tx_ba_stop;
896	__le16 rx_bar;
897	__le16 tx_bar;
898	__le16 frame_timeout;
899} __packed;
900
901/**
902 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
903 * @action_bitmap: the TDLS action to trigger the collection upon
904 * @peer_mode: trigger on specific peer or all
905 * @peer: the TDLS peer to trigger the collection on
906 */
907struct iwl_fw_dbg_trigger_tdls {
908	u8 action_bitmap;
909	u8 peer_mode;
910	u8 peer[ETH_ALEN];
911	u8 reserved[4];
912} __packed;
913
914/**
915 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
916 *  status.
917 * @statuses: the list of statuses to trigger the collection on
918 */
919struct iwl_fw_dbg_trigger_tx_status {
920	struct tx_status {
921		u8 status;
922		u8 reserved[3];
923	} __packed statuses[16];
924	__le32 reserved[2];
925} __packed;
926
927/**
928 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
929 * @id: conf id
930 * @usniffer: should the uSniffer image be used
931 * @num_of_hcmds: how many HCMDs to send are present here
932 * @hcmd: a variable length host command to be sent to apply the configuration.
933 *	If there is more than one HCMD to send, they will appear one after the
934 *	other and be sent in the order that they appear in.
935 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
936 * %FW_DBG_CONF_MAX configuration per run.
937 */
938struct iwl_fw_dbg_conf_tlv {
939	u8 id;
940	u8 usniffer;
941	u8 reserved;
942	u8 num_of_hcmds;
943	struct iwl_fw_dbg_conf_hcmd hcmd;
944} __packed;
945
946#define IWL_FW_CMD_VER_UNKNOWN 99
947
948/**
949 * struct iwl_fw_cmd_version - firmware command version entry
950 * @cmd: command ID
951 * @group: group ID
952 * @cmd_ver: command version
953 * @notif_ver: notification version
954 */
955struct iwl_fw_cmd_version {
956	u8 cmd;
957	u8 group;
958	u8 cmd_ver;
959	u8 notif_ver;
960} __packed;
961
962struct iwl_fw_tcm_error_addr {
963	__le32 addr;
964}; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
965
966struct iwl_fw_dump_exclude {
967	__le32 addr, size;
968};
969
970static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
971					size_t fixed_size, size_t var_size)
972{
973	size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
974
975	if (WARN_ON(var_len % var_size))
976		return 0;
977
978	return var_len / var_size;
979}
980
981#define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb)			\
982	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)),		\
983			   sizeof(_struct_ptr->_memb[0]))
984
985#define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size)	\
986	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size)
987#endif  /* __iwl_fw_file_h__ */
v6.13.7
   1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
   2/*
   3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
   4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
   5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
   6 */
   7#ifndef __iwl_fw_file_h__
   8#define __iwl_fw_file_h__
   9
  10#include <linux/netdevice.h>
  11#include <linux/nl80211.h>
  12
  13/* v1/v2 uCode file layout */
  14struct iwl_ucode_header {
  15	__le32 ver;	/* major/minor/API/serial */
  16	union {
  17		struct {
  18			__le32 inst_size;	/* bytes of runtime code */
  19			__le32 data_size;	/* bytes of runtime data */
  20			__le32 init_size;	/* bytes of init code */
  21			__le32 init_data_size;	/* bytes of init data */
  22			__le32 boot_size;	/* bytes of bootstrap code */
  23			u8 data[];		/* in same order as sizes */
  24		} v1;
  25		struct {
  26			__le32 build;		/* build number */
  27			__le32 inst_size;	/* bytes of runtime code */
  28			__le32 data_size;	/* bytes of runtime data */
  29			__le32 init_size;	/* bytes of init code */
  30			__le32 init_data_size;	/* bytes of init data */
  31			__le32 boot_size;	/* bytes of bootstrap code */
  32			u8 data[];		/* in same order as sizes */
  33		} v2;
  34	} u;
  35};
  36
  37#define IWL_UCODE_TLV_DEBUG_BASE	0x1000005
  38#define IWL_UCODE_TLV_CONST_BASE	0x100
  39
  40/*
  41 * new TLV uCode file layout
  42 *
  43 * The new TLV file format contains TLVs, that each specify
  44 * some piece of data.
  45 */
  46
  47enum iwl_ucode_tlv_type {
  48	IWL_UCODE_TLV_INVALID		= 0, /* unused */
  49	IWL_UCODE_TLV_INST		= 1,
  50	IWL_UCODE_TLV_DATA		= 2,
  51	IWL_UCODE_TLV_INIT		= 3,
  52	IWL_UCODE_TLV_INIT_DATA		= 4,
  53	IWL_UCODE_TLV_BOOT		= 5,
  54	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
  55	IWL_UCODE_TLV_PAN		= 7, /* deprecated -- only used in DVM */
  56	IWL_UCODE_TLV_MEM_DESC		= 7, /* replaces PAN in non-DVM */
  57	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
  58	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
  59	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
  60	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
  61	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
  62	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
  63	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
  64	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
  65	IWL_UCODE_TLV_WOWLAN_INST	= 16,
  66	IWL_UCODE_TLV_WOWLAN_DATA	= 17,
  67	IWL_UCODE_TLV_FLAGS		= 18,
  68	IWL_UCODE_TLV_SEC_RT		= 19,
  69	IWL_UCODE_TLV_SEC_INIT		= 20,
  70	IWL_UCODE_TLV_SEC_WOWLAN	= 21,
  71	IWL_UCODE_TLV_DEF_CALIB		= 22,
  72	IWL_UCODE_TLV_PHY_SKU		= 23,
  73	IWL_UCODE_TLV_SECURE_SEC_RT	= 24,
  74	IWL_UCODE_TLV_SECURE_SEC_INIT	= 25,
  75	IWL_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
  76	IWL_UCODE_TLV_NUM_OF_CPU	= 27,
  77	IWL_UCODE_TLV_CSCHEME		= 28,
  78	IWL_UCODE_TLV_API_CHANGES_SET	= 29,
  79	IWL_UCODE_TLV_ENABLED_CAPABILITIES	= 30,
  80	IWL_UCODE_TLV_N_SCAN_CHANNELS		= 31,
  81	IWL_UCODE_TLV_PAGING		= 32,
  82	IWL_UCODE_TLV_SEC_RT_USNIFFER	= 34,
  83	/* 35 is unused */
  84	IWL_UCODE_TLV_FW_VERSION	= 36,
  85	IWL_UCODE_TLV_FW_DBG_DEST	= 38,
  86	IWL_UCODE_TLV_FW_DBG_CONF	= 39,
  87	IWL_UCODE_TLV_FW_DBG_TRIGGER	= 40,
  88	IWL_UCODE_TLV_CMD_VERSIONS	= 48,
  89	IWL_UCODE_TLV_FW_GSCAN_CAPA	= 50,
  90	IWL_UCODE_TLV_FW_MEM_SEG	= 51,
  91	IWL_UCODE_TLV_IML		= 52,
  92	IWL_UCODE_TLV_UMAC_DEBUG_ADDRS	= 54,
  93	IWL_UCODE_TLV_LMAC_DEBUG_ADDRS	= 55,
  94	IWL_UCODE_TLV_FW_RECOVERY_INFO	= 57,
  95	IWL_UCODE_TLV_HW_TYPE			= 58,
  96	IWL_UCODE_TLV_FW_FSEQ_VERSION		= 60,
  97	IWL_UCODE_TLV_PHY_INTEGRATION_VERSION	= 61,
  98
  99	IWL_UCODE_TLV_PNVM_VERSION		= 62,
 100	IWL_UCODE_TLV_PNVM_SKU			= 64,
 101
 102	IWL_UCODE_TLV_SEC_TABLE_ADDR		= 66,
 103	IWL_UCODE_TLV_D3_KEK_KCK_ADDR		= 67,
 104	IWL_UCODE_TLV_CURRENT_PC		= 68,
 105
 106	IWL_UCODE_TLV_FW_NUM_STATIONS		= IWL_UCODE_TLV_CONST_BASE + 0,
 107	IWL_UCODE_TLV_FW_NUM_BEACONS		= IWL_UCODE_TLV_CONST_BASE + 2,
 108
 109	IWL_UCODE_TLV_TYPE_DEBUG_INFO		= IWL_UCODE_TLV_DEBUG_BASE + 0,
 110	IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION	= IWL_UCODE_TLV_DEBUG_BASE + 1,
 111	IWL_UCODE_TLV_TYPE_HCMD			= IWL_UCODE_TLV_DEBUG_BASE + 2,
 112	IWL_UCODE_TLV_TYPE_REGIONS		= IWL_UCODE_TLV_DEBUG_BASE + 3,
 113	IWL_UCODE_TLV_TYPE_TRIGGERS		= IWL_UCODE_TLV_DEBUG_BASE + 4,
 114	IWL_UCODE_TLV_TYPE_CONF_SET		= IWL_UCODE_TLV_DEBUG_BASE + 5,
 115	IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
 116
 117	/* TLVs 0x1000-0x2000 are for internal driver usage */
 118	IWL_UCODE_TLV_FW_DBG_DUMP_LST	= 0x1000,
 119};
 120
 121struct iwl_ucode_tlv {
 122	__le32 type;		/* see above */
 123	__le32 length;		/* not including type/length fields */
 124	u8 data[];
 125};
 126
 127#define IWL_TLV_UCODE_MAGIC		0x0a4c5749
 128#define FW_VER_HUMAN_READABLE_SZ	64
 129
 130struct iwl_tlv_ucode_header {
 131	/*
 132	 * The TLV style ucode header is distinguished from
 133	 * the v1/v2 style header by first four bytes being
 134	 * zero, as such is an invalid combination of
 135	 * major/minor/API/serial versions.
 136	 */
 137	__le32 zero;
 138	__le32 magic;
 139	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
 140	/* major/minor/API/serial or major in new format */
 141	__le32 ver;
 142	__le32 build;
 143	__le64 ignore;
 144	/*
 145	 * The data contained herein has a TLV layout,
 146	 * see above for the TLV header and types.
 147	 * Note that each TLV is padded to a length
 148	 * that is a multiple of 4 for alignment.
 149	 */
 150	u8 data[];
 151};
 152
 153/*
 154 * ucode TLVs
 155 *
 156 * ability to get extension for: flags & capabilities from ucode binaries files
 157 */
 158struct iwl_ucode_api {
 159	__le32 api_index;
 160	__le32 api_flags;
 161} __packed;
 162
 163struct iwl_ucode_capa {
 164	__le32 api_index;
 165	__le32 api_capa;
 166} __packed;
 167
 168/**
 169 * enum iwl_ucode_tlv_flag - ucode API flags
 170 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
 171 *	was a separate TLV but moved here to save space.
 172 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
 173 *	treats good CRC threshold as a boolean
 174 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
 175 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
 176 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
 177 *	offload profile config command.
 178 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
 179 *	(rather than two) IPv6 addresses
 180 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
 181 *	from the probe request template.
 182 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
 183 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
 184 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
 185 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
 186 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
 187 */
 188enum iwl_ucode_tlv_flag {
 189	IWL_UCODE_TLV_FLAGS_PAN			= BIT(0),
 190	IWL_UCODE_TLV_FLAGS_NEWSCAN		= BIT(1),
 191	IWL_UCODE_TLV_FLAGS_MFP			= BIT(2),
 192	IWL_UCODE_TLV_FLAGS_SHORT_BL		= BIT(7),
 193	IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= BIT(10),
 194	IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID	= BIT(12),
 195	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= BIT(15),
 196	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= BIT(16),
 197	IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= BIT(24),
 198	IWL_UCODE_TLV_FLAGS_EBS_SUPPORT		= BIT(25),
 199	IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= BIT(26),
 200};
 201
 202typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
 203
 204/**
 205 * enum iwl_ucode_tlv_api - ucode api
 206 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
 207 *	longer than the passive one, which is essential for fragmented scan.
 208 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
 209 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
 210 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
 211 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
 212 *	iteration complete notification, and the timestamp reported for RX
 213 *	received during scan, are reported in TSF of the mac specified in the
 214 *	scan request.
 215 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
 216 *	ADD_MODIFY_STA_KEY_API_S_VER_2.
 217 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
 218 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
 219 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL: support for adaptive dwell in scanning
 220 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
 221 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
 222 *	indicating low latency direction.
 223 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
 224 *	deprecated.
 225 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
 226 *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
 227 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
 228 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
 229 *	the REDUCE_TX_POWER_CMD.
 230 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
 231 *	version of the beacon notification.
 232 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
 233 *	BEACON_FILTER_CONFIG_API_S_VER_4.
 234 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
 235 *	REGULATORY_NVM_GET_INFO_RSP_API_S.
 236 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
 237 *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
 238 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
 239 *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
 240 *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
 241 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
 242 *	STA_CONTEXT_DOT11AX_API_S
 243 * @IWL_UCODE_TLV_API_FTM_RTT_ACCURACY: version 7 of the range response API
 244 *	is supported by FW, this indicates the RTT confidence value
 245 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
 246 *	version tables.
 247 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
 248 *	SCAN_CONFIG_DB_CMD_API_S.
 249 * @IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP: support for setting adaptive dwell
 250 *	number of APs in the 5 GHz band
 251 * @IWL_UCODE_TLV_API_BAND_IN_RX_DATA: FW reports band number in RX notification
 252 * @IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX: Firmware offloaded the station disable tx
 253 *	logic.
 254 * @IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR: Firmware supports clearing the debug
 255 *	internal buffer
 256 * @IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD: Firmware doesn't need the host to
 257 *	configure the smart fifo
 258 *
 259 * @NUM_IWL_UCODE_TLV_API: number of bits used
 260 */
 261enum iwl_ucode_tlv_api {
 262	/* API Set 0 */
 263	IWL_UCODE_TLV_API_FRAGMENTED_SCAN	= (__force iwl_ucode_tlv_api_t)8,
 264	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE	= (__force iwl_ucode_tlv_api_t)9,
 265	IWL_UCODE_TLV_API_LQ_SS_PARAMS		= (__force iwl_ucode_tlv_api_t)18,
 266	IWL_UCODE_TLV_API_NEW_VERSION		= (__force iwl_ucode_tlv_api_t)20,
 267	IWL_UCODE_TLV_API_SCAN_TSF_REPORT	= (__force iwl_ucode_tlv_api_t)28,
 268	IWL_UCODE_TLV_API_TKIP_MIC_KEYS		= (__force iwl_ucode_tlv_api_t)29,
 269	IWL_UCODE_TLV_API_STA_TYPE		= (__force iwl_ucode_tlv_api_t)30,
 270	IWL_UCODE_TLV_API_NAN2_VER2		= (__force iwl_ucode_tlv_api_t)31,
 271	/* API Set 1 */
 272	IWL_UCODE_TLV_API_ADAPTIVE_DWELL	= (__force iwl_ucode_tlv_api_t)32,
 273	IWL_UCODE_TLV_API_OCE			= (__force iwl_ucode_tlv_api_t)33,
 274	IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= (__force iwl_ucode_tlv_api_t)34,
 275	IWL_UCODE_TLV_API_NEW_RX_STATS		= (__force iwl_ucode_tlv_api_t)35,
 276	IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= (__force iwl_ucode_tlv_api_t)36,
 277	IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY	= (__force iwl_ucode_tlv_api_t)38,
 278	IWL_UCODE_TLV_API_DEPRECATE_TTAK	= (__force iwl_ucode_tlv_api_t)41,
 279	IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= (__force iwl_ucode_tlv_api_t)42,
 280	IWL_UCODE_TLV_API_FRAG_EBS		= (__force iwl_ucode_tlv_api_t)44,
 281	IWL_UCODE_TLV_API_REDUCE_TX_POWER	= (__force iwl_ucode_tlv_api_t)45,
 282	IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF	= (__force iwl_ucode_tlv_api_t)46,
 283	IWL_UCODE_TLV_API_BEACON_FILTER_V4      = (__force iwl_ucode_tlv_api_t)47,
 284	IWL_UCODE_TLV_API_REGULATORY_NVM_INFO   = (__force iwl_ucode_tlv_api_t)48,
 285	IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = (__force iwl_ucode_tlv_api_t)49,
 286	IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = (__force iwl_ucode_tlv_api_t)50,
 287	IWL_UCODE_TLV_API_MBSSID_HE		= (__force iwl_ucode_tlv_api_t)52,
 288	IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= (__force iwl_ucode_tlv_api_t)53,
 289	IWL_UCODE_TLV_API_FTM_RTT_ACCURACY      = (__force iwl_ucode_tlv_api_t)54,
 290	IWL_UCODE_TLV_API_SAR_TABLE_VER         = (__force iwl_ucode_tlv_api_t)55,
 291	IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG   = (__force iwl_ucode_tlv_api_t)56,
 292	IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= (__force iwl_ucode_tlv_api_t)57,
 293	IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= (__force iwl_ucode_tlv_api_t)58,
 294	IWL_UCODE_TLV_API_BAND_IN_RX_DATA	= (__force iwl_ucode_tlv_api_t)59,
 295	/* API Set 2 */
 296	IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX	= (__force iwl_ucode_tlv_api_t)66,
 297	IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR     = (__force iwl_ucode_tlv_api_t)67,
 298	IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD    = (__force iwl_ucode_tlv_api_t)68,
 299
 300	NUM_IWL_UCODE_TLV_API
 301/*
 302 * This construction make both sparse (which cannot increment the previous
 303 * member due to its bitwise type) and kernel-doc (which doesn't understand
 304 * the ifdef/else properly) work.
 305 */
 306#ifdef __CHECKER__
 307#define __CHECKER_NUM_IWL_UCODE_TLV_API	128
 308		= (__force iwl_ucode_tlv_api_t)__CHECKER_NUM_IWL_UCODE_TLV_API,
 309#define NUM_IWL_UCODE_TLV_API __CHECKER_NUM_IWL_UCODE_TLV_API
 310#endif
 311};
 312
 313typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
 314
 315/**
 316 * enum iwl_ucode_tlv_capa - ucode capabilities
 317 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
 318 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
 319 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
 320 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
 321 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
 322 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
 323 *	tx power value into TPC Report action frame and Link Measurement Report
 324 *	action frame
 325 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
 326 *	channel in DS parameter set element in probe requests.
 327 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
 328 *	probe requests.
 329 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
 330 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
 331 *	which also implies support for the scheduler configuration command
 332 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
 333 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
 334 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
 335 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
 336 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
 337 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
 338 *	is standalone or with a BSS station interface in the same binding.
 339 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
 340 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
 341 *	sources for the MCC. This TLV bit is a future replacement to
 342 *	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
 343 *	is supported.
 344 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
 345 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
 346 * @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image
 347 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
 348 *	stabilization latency for SoCs.
 349 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
 350 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
 351 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
 352 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
 353 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
 354 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
 355 *	(6 GHz).
 356 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
 357 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
 358 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
 359 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
 360 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
 361 *	countdown offloading. Beacon notifications are not sent to the host.
 362 *	The fw also offloads TBTT alignment.
 363 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
 364 *	antenna the beacon should be transmitted
 365 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
 366 *	from AP and will send it upon d0i3 exit.
 367 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
 368 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
 369 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
 370 *	thresholds reporting
 371 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
 372 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
 373 *	regular image.
 374 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
 375 *	memory addresses from the firmware.
 376 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
 377 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
 378 *	command size (command version 4) that supports toggling ACK TX
 379 *	power reduction.
 380 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
 381 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
 382 *	capability.
 383 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
 384 *	to report the CSI information with (certain) RX frames
 385 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
 386 *	initiator and responder
 387 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
 388 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
 389 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
 390 *	reset flow
 391 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
 392 *      channels even when these are not enabled.
 393 * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection
 394 *	complete to FW.
 395 * @IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT: Support SPP (signaling and payload
 396 *	protected) A-MSDU.
 397 * @IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT: Support secure LTF measurement.
 398 * @IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS: Support monitor mode on otherwise
 399 *	passive channels
 400 *
 401 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
 402 */
 403enum iwl_ucode_tlv_capa {
 404	/* set 0 */
 405	IWL_UCODE_TLV_CAPA_D0I3_SUPPORT			= (__force iwl_ucode_tlv_capa_t)0,
 406	IWL_UCODE_TLV_CAPA_LAR_SUPPORT			= (__force iwl_ucode_tlv_capa_t)1,
 407	IWL_UCODE_TLV_CAPA_UMAC_SCAN			= (__force iwl_ucode_tlv_capa_t)2,
 408	IWL_UCODE_TLV_CAPA_BEAMFORMER			= (__force iwl_ucode_tlv_capa_t)3,
 409	IWL_UCODE_TLV_CAPA_TDLS_SUPPORT			= (__force iwl_ucode_tlv_capa_t)6,
 410	IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= (__force iwl_ucode_tlv_capa_t)8,
 411	IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)9,
 412	IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)10,
 413	IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)11,
 414	IWL_UCODE_TLV_CAPA_DQA_SUPPORT			= (__force iwl_ucode_tlv_capa_t)12,
 415	IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= (__force iwl_ucode_tlv_capa_t)13,
 416	IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= (__force iwl_ucode_tlv_capa_t)17,
 417	IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)18,
 418	IWL_UCODE_TLV_CAPA_CSUM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)21,
 419	IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= (__force iwl_ucode_tlv_capa_t)22,
 420	IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD		= (__force iwl_ucode_tlv_capa_t)26,
 421	IWL_UCODE_TLV_CAPA_BT_COEX_PLCR			= (__force iwl_ucode_tlv_capa_t)28,
 422	IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC		= (__force iwl_ucode_tlv_capa_t)29,
 423	IWL_UCODE_TLV_CAPA_BT_COEX_RRC			= (__force iwl_ucode_tlv_capa_t)30,
 424	IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)31,
 425
 426	/* set 1 */
 427	IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG		= (__force iwl_ucode_tlv_capa_t)32,
 428	IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT		= (__force iwl_ucode_tlv_capa_t)37,
 429	IWL_UCODE_TLV_CAPA_STA_PM_NOTIF			= (__force iwl_ucode_tlv_capa_t)38,
 430	IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT		= (__force iwl_ucode_tlv_capa_t)39,
 431	IWL_UCODE_TLV_CAPA_CDB_SUPPORT			= (__force iwl_ucode_tlv_capa_t)40,
 432	IWL_UCODE_TLV_CAPA_D0I3_END_FIRST		= (__force iwl_ucode_tlv_capa_t)41,
 433	IWL_UCODE_TLV_CAPA_TLC_OFFLOAD                  = (__force iwl_ucode_tlv_capa_t)43,
 434	IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA                = (__force iwl_ucode_tlv_capa_t)44,
 435	IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2		= (__force iwl_ucode_tlv_capa_t)45,
 436	IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD		= (__force iwl_ucode_tlv_capa_t)46,
 437	IWL_UCODE_TLV_CAPA_FTM_CALIBRATED		= (__force iwl_ucode_tlv_capa_t)47,
 438	IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS		= (__force iwl_ucode_tlv_capa_t)48,
 439	IWL_UCODE_TLV_CAPA_CS_MODIFY			= (__force iwl_ucode_tlv_capa_t)49,
 440	IWL_UCODE_TLV_CAPA_SET_LTR_GEN2			= (__force iwl_ucode_tlv_capa_t)50,
 441	IWL_UCODE_TLV_CAPA_SET_PPAG			= (__force iwl_ucode_tlv_capa_t)52,
 442	IWL_UCODE_TLV_CAPA_TAS_CFG			= (__force iwl_ucode_tlv_capa_t)53,
 443	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD		= (__force iwl_ucode_tlv_capa_t)54,
 444	IWL_UCODE_TLV_CAPA_PROTECTED_TWT		= (__force iwl_ucode_tlv_capa_t)56,
 445	IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE		= (__force iwl_ucode_tlv_capa_t)57,
 446	IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)58,
 447	IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)59,
 448	IWL_UCODE_TLV_CAPA_BROADCAST_TWT		= (__force iwl_ucode_tlv_capa_t)60,
 449	IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO		= (__force iwl_ucode_tlv_capa_t)61,
 450	IWL_UCODE_TLV_CAPA_RFIM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)62,
 451	IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT		= (__force iwl_ucode_tlv_capa_t)63,
 452
 453	/* set 2 */
 454	IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= (__force iwl_ucode_tlv_capa_t)64,
 455	IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= (__force iwl_ucode_tlv_capa_t)65,
 456	IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)67,
 457	IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)68,
 458	IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD		= (__force iwl_ucode_tlv_capa_t)70,
 459	IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= (__force iwl_ucode_tlv_capa_t)71,
 460	IWL_UCODE_TLV_CAPA_BEACON_STORING		= (__force iwl_ucode_tlv_capa_t)72,
 461	IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3		= (__force iwl_ucode_tlv_capa_t)73,
 462	IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW		= (__force iwl_ucode_tlv_capa_t)74,
 463	IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= (__force iwl_ucode_tlv_capa_t)75,
 464	IWL_UCODE_TLV_CAPA_CTDP_SUPPORT			= (__force iwl_ucode_tlv_capa_t)76,
 465	IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= (__force iwl_ucode_tlv_capa_t)77,
 466	IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= (__force iwl_ucode_tlv_capa_t)80,
 467	IWL_UCODE_TLV_CAPA_LQM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)81,
 468	IWL_UCODE_TLV_CAPA_TX_POWER_ACK			= (__force iwl_ucode_tlv_capa_t)84,
 469	IWL_UCODE_TLV_CAPA_D3_DEBUG			= (__force iwl_ucode_tlv_capa_t)87,
 470	IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)88,
 471	IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)89,
 472	IWL_UCODE_TLV_CAPA_CSI_REPORTING		= (__force iwl_ucode_tlv_capa_t)90,
 473	IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)92,
 474	IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)93,
 475
 476	/* set 3 */
 477	IWL_UCODE_TLV_CAPA_MLME_OFFLOAD			= (__force iwl_ucode_tlv_capa_t)96,
 478
 479	/*
 480	 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
 481	 */
 482	IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)98,
 483
 484	IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT		= (__force iwl_ucode_tlv_capa_t)100,
 485	IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT		= (__force iwl_ucode_tlv_capa_t)103,
 486	IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)104,
 487	IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)105,
 488	IWL_UCODE_TLV_CAPA_SYNCED_TIME			= (__force iwl_ucode_tlv_capa_t)106,
 489	IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM        = (__force iwl_ucode_tlv_capa_t)108,
 490	IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT		= (__force iwl_ucode_tlv_capa_t)109,
 491	IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT		= (__force iwl_ucode_tlv_capa_t)110,
 492	IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT         = (__force iwl_ucode_tlv_capa_t)111,
 493	IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT	= (__force iwl_ucode_tlv_capa_t)112,
 494	IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT		= (__force iwl_ucode_tlv_capa_t)113,
 495	IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT		= (__force iwl_ucode_tlv_capa_t)114,
 496	IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)116,
 497	IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)117,
 498	IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT		= (__force iwl_ucode_tlv_capa_t)121,
 499	IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS	= (__force iwl_ucode_tlv_capa_t)122,
 500	NUM_IWL_UCODE_TLV_CAPA
 501/*
 502 * This construction make both sparse (which cannot increment the previous
 503 * member due to its bitwise type) and kernel-doc (which doesn't understand
 504 * the ifdef/else properly) work.
 505 */
 506#ifdef __CHECKER__
 507#define __CHECKER_NUM_IWL_UCODE_TLV_CAPA	128
 508		= (__force iwl_ucode_tlv_capa_t)__CHECKER_NUM_IWL_UCODE_TLV_CAPA,
 509#define NUM_IWL_UCODE_TLV_CAPA __CHECKER_NUM_IWL_UCODE_TLV_CAPA
 510#endif
 511};
 512
 513/* The default calibrate table size if not specified by firmware file */
 514#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
 515#define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
 516#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE			253
 517
 518/* The default max probe length if not specified by the firmware file */
 519#define IWL_DEFAULT_MAX_PROBE_LENGTH	200
 520
 521/*
 522 * For 16.0 uCode and above, there is no differentiation between sections,
 523 * just an offset to the HW address.
 524 */
 525#define CPU1_CPU2_SEPARATOR_SECTION	0xFFFFCCCC
 526#define PAGING_SEPARATOR_SECTION	0xAAAABBBB
 527
 528/* uCode version contains 4 values: Major/Minor/API/Serial */
 529#define IWL_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
 530#define IWL_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
 531#define IWL_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
 532#define IWL_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
 533
 534/**
 535 * struct iwl_tlv_calib_ctrl - Calibration control struct.
 536 * Sent as part of the phy configuration command.
 537 * @flow_trigger: bitmap for which calibrations to perform according to
 538 *		flow triggers.
 539 * @event_trigger: bitmap for which calibrations to perform according to
 540 *		event triggers.
 541 */
 542struct iwl_tlv_calib_ctrl {
 543	__le32 flow_trigger;
 544	__le32 event_trigger;
 545} __packed;
 546
 547enum iwl_fw_phy_cfg {
 548	FW_PHY_CFG_RADIO_TYPE_POS = 0,
 549	FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
 550	FW_PHY_CFG_RADIO_STEP_POS = 2,
 551	FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
 552	FW_PHY_CFG_RADIO_DASH_POS = 4,
 553	FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
 554	FW_PHY_CFG_TX_CHAIN_POS = 16,
 555	FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
 556	FW_PHY_CFG_RX_CHAIN_POS = 20,
 557	FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
 558	FW_PHY_CFG_CHAIN_SAD_POS = 23,
 559	FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
 560	FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
 561	FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
 562	FW_PHY_CFG_SHARED_CLK = BIT(31),
 563};
 564
 565enum iwl_fw_dbg_reg_operator {
 566	CSR_ASSIGN,
 567	CSR_SETBIT,
 568	CSR_CLEARBIT,
 569
 570	PRPH_ASSIGN,
 571	PRPH_SETBIT,
 572	PRPH_CLEARBIT,
 573
 574	INDIRECT_ASSIGN,
 575	INDIRECT_SETBIT,
 576	INDIRECT_CLEARBIT,
 577
 578	PRPH_BLOCKBIT,
 579};
 580
 581/**
 582 * struct iwl_fw_dbg_reg_op - an operation on a register
 583 *
 584 * @op: &enum iwl_fw_dbg_reg_operator
 585 * @reserved: reserved
 586 * @addr: offset of the register
 587 * @val: value
 588 */
 589struct iwl_fw_dbg_reg_op {
 590	u8 op;
 591	u8 reserved[3];
 592	__le32 addr;
 593	__le32 val;
 594} __packed;
 595
 596/**
 597 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
 598 *
 599 * @SMEM_MODE: monitor stores the data in SMEM
 600 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
 601 * @MARBH_MODE: monitor stores the data in MARBH buffer
 602 * @MIPI_MODE: monitor outputs the data through the MIPI interface
 603 */
 604enum iwl_fw_dbg_monitor_mode {
 605	SMEM_MODE = 0,
 606	EXTERNAL_MODE = 1,
 607	MARBH_MODE = 2,
 608	MIPI_MODE = 3,
 609};
 610
 611/**
 612 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
 613 *
 614 * @data_type: the memory segment type to record
 615 * @ofs: the memory segment offset
 616 * @len: the memory segment length, in bytes
 617 *
 618 * This parses IWL_UCODE_TLV_FW_MEM_SEG
 619 */
 620struct iwl_fw_dbg_mem_seg_tlv {
 621	__le32 data_type;
 622	__le32 ofs;
 623	__le32 len;
 624} __packed;
 625
 626/**
 627 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
 628 *
 629 * @version: version of the TLV - currently 0
 630 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
 631 * @size_power: buffer size will be 2^(size_power + 11)
 632 * @reserved: reserved
 633 * @base_reg: addr of the base addr register (PRPH)
 634 * @end_reg:  addr of the end addr register (PRPH)
 635 * @write_ptr_reg: the addr of the reg of the write pointer
 636 * @wrap_count: the addr of the reg of the wrap_count
 637 * @base_shift: shift right of the base addr reg
 638 * @end_shift: shift right of the end addr reg
 639 * @reg_ops: array of registers operations
 640 *
 641 * This parses IWL_UCODE_TLV_FW_DBG_DEST
 642 */
 643struct iwl_fw_dbg_dest_tlv_v1 {
 644	u8 version;
 645	u8 monitor_mode;
 646	u8 size_power;
 647	u8 reserved;
 648	__le32 base_reg;
 649	__le32 end_reg;
 650	__le32 write_ptr_reg;
 651	__le32 wrap_count;
 652	u8 base_shift;
 653	u8 end_shift;
 654	struct iwl_fw_dbg_reg_op reg_ops[];
 655} __packed;
 656
 657/* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
 658#define IWL_LDBG_M2S_BUF_SIZE_MSK	0x0fff0000
 659/* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
 660#define IWL_LDBG_M2S_BUF_BA_MSK		0x00000fff
 661/* The smem buffer chunks are in units of 256 bits */
 662#define IWL_M2S_UNIT_SIZE			0x100
 663
 664struct iwl_fw_dbg_dest_tlv {
 665	u8 version;
 666	u8 monitor_mode;
 667	u8 size_power;
 668	u8 reserved;
 669	__le32 cfg_reg;
 670	__le32 write_ptr_reg;
 671	__le32 wrap_count;
 672	u8 base_shift;
 673	u8 size_shift;
 674	struct iwl_fw_dbg_reg_op reg_ops[];
 675} __packed;
 676
 677struct iwl_fw_dbg_conf_hcmd {
 678	u8 id;
 679	u8 reserved;
 680	__le16 len;
 681	u8 data[];
 682} __packed;
 683
 684/**
 685 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
 686 *
 687 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
 688 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
 689 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
 690 *	collect only monitor data
 691 */
 692enum iwl_fw_dbg_trigger_mode {
 693	IWL_FW_DBG_TRIGGER_START = BIT(0),
 694	IWL_FW_DBG_TRIGGER_STOP = BIT(1),
 695	IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
 696};
 697
 698/**
 699 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
 700 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
 701 */
 702enum iwl_fw_dbg_trigger_flags {
 703	IWL_FW_DBG_FORCE_RESTART = BIT(0),
 704};
 705
 706/**
 707 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
 708 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
 709 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
 710 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
 711 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
 712 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
 713 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
 714 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
 715 */
 716enum iwl_fw_dbg_trigger_vif_type {
 717	IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
 718	IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
 719	IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
 720	IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
 721	IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
 722	IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
 723	IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
 724};
 725
 726/**
 727 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
 728 * @id: &enum iwl_fw_dbg_trigger
 729 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
 730 * @stop_conf_ids: bitmap of configurations this trigger relates to.
 731 *	if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
 732 *	to the currently running configuration is set, the data should be
 733 *	collected.
 734 * @stop_delay: how many milliseconds to wait before collecting the data
 735 *	after the STOP trigger fires.
 736 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
 737 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
 738 *	configuration should be applied when the triggers kicks in.
 739 * @occurrences: number of occurrences. 0 means the trigger will never fire.
 740 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
 741 *	trigger in which another occurrence should be ignored.
 742 * @flags: &enum iwl_fw_dbg_trigger_flags
 743 * @reserved: reserved (for alignment)
 744 * @data: trigger data
 745 */
 746struct iwl_fw_dbg_trigger_tlv {
 747	__le32 id;
 748	__le32 vif_type;
 749	__le32 stop_conf_ids;
 750	__le32 stop_delay;
 751	u8 mode;
 752	u8 start_conf_id;
 753	__le16 occurrences;
 754	__le16 trig_dis_ms;
 755	u8 flags;
 756	u8 reserved[5];
 757
 758	u8 data[];
 759} __packed;
 760
 761#define FW_DBG_START_FROM_ALIVE	0
 762#define FW_DBG_CONF_MAX		32
 763#define FW_DBG_INVALID		0xff
 764
 765/**
 766 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
 767 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
 768 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
 769 * @start_consec_missed_bcon: start recording if threshold is crossed.
 770 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
 771 * @reserved1: reserved
 772 * @reserved2: reserved
 773 */
 774struct iwl_fw_dbg_trigger_missed_bcon {
 775	__le32 stop_consec_missed_bcon;
 776	__le32 stop_consec_missed_bcon_since_rx;
 777	__le32 reserved2[2];
 778	__le32 start_consec_missed_bcon;
 779	__le32 start_consec_missed_bcon_since_rx;
 780	__le32 reserved1[2];
 781} __packed;
 782
 783/**
 784 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
 785 * @cmds: the list of commands to trigger the collection on
 786 */
 787struct iwl_fw_dbg_trigger_cmd {
 788	struct cmd {
 789		u8 cmd_id;
 790		u8 group_id;
 791	} __packed cmds[16];
 792} __packed;
 793
 794/**
 795 * struct iwl_fw_dbg_trigger_stats - configures trigger for statistics
 796 * @stop_offset: the offset of the value to be monitored
 797 * @stop_threshold: the threshold above which to collect
 798 * @start_offset: the offset of the value to be monitored
 799 * @start_threshold: the threshold above which to start recording
 800 */
 801struct iwl_fw_dbg_trigger_stats {
 802	__le32 stop_offset;
 803	__le32 stop_threshold;
 804	__le32 start_offset;
 805	__le32 start_threshold;
 806} __packed;
 807
 808/**
 809 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
 810 * @rssi: RSSI value to trigger at
 811 */
 812struct iwl_fw_dbg_trigger_low_rssi {
 813	__le32 rssi;
 814} __packed;
 815
 816/**
 817 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
 818 * @stop_auth_denied: number of denied authentication to collect
 819 * @stop_auth_timeout: number of authentication timeout to collect
 820 * @stop_rx_deauth: number of Rx deauth before to collect
 821 * @stop_tx_deauth: number of Tx deauth before to collect
 822 * @stop_assoc_denied: number of denied association to collect
 823 * @stop_assoc_timeout: number of association timeout to collect
 824 * @stop_connection_loss: number of connection loss to collect
 825 * @start_auth_denied: number of denied authentication to start recording
 826 * @start_auth_timeout: number of authentication timeout to start recording
 827 * @start_rx_deauth: number of Rx deauth to start recording
 828 * @start_tx_deauth: number of Tx deauth to start recording
 829 * @start_assoc_denied: number of denied association to start recording
 830 * @start_assoc_timeout: number of association timeout to start recording
 831 * @start_connection_loss: number of connection loss to start recording
 832 */
 833struct iwl_fw_dbg_trigger_mlme {
 834	u8 stop_auth_denied;
 835	u8 stop_auth_timeout;
 836	u8 stop_rx_deauth;
 837	u8 stop_tx_deauth;
 838
 839	u8 stop_assoc_denied;
 840	u8 stop_assoc_timeout;
 841	u8 stop_connection_loss;
 842	u8 reserved;
 843
 844	u8 start_auth_denied;
 845	u8 start_auth_timeout;
 846	u8 start_rx_deauth;
 847	u8 start_tx_deauth;
 848
 849	u8 start_assoc_denied;
 850	u8 start_assoc_timeout;
 851	u8 start_connection_loss;
 852	u8 reserved2;
 853} __packed;
 854
 855/**
 856 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
 857 * @command_queue: timeout for the command queue in ms
 858 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
 859 * @softap: timeout for the queues of a softAP in ms
 860 * @p2p_go: timeout for the queues of a P2P GO in ms
 861 * @p2p_client: timeout for the queues of a P2P client in ms
 862 * @p2p_device: timeout for the queues of a P2P device in ms
 863 * @ibss: timeout for the queues of an IBSS in ms
 864 * @tdls: timeout for the queues of a TDLS station in ms
 865 */
 866struct iwl_fw_dbg_trigger_txq_timer {
 867	__le32 command_queue;
 868	__le32 bss;
 869	__le32 softap;
 870	__le32 p2p_go;
 871	__le32 p2p_client;
 872	__le32 p2p_device;
 873	__le32 ibss;
 874	__le32 tdls;
 875	__le32 reserved[4];
 876} __packed;
 877
 878/**
 879 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
 880 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
 881 *	trigger each time a time event notification that relates to time event
 882 *	id with one of the actions in the bitmap is received and
 883 *	BIT(notif->status) is set in status_bitmap.
 884 *
 885 */
 886struct iwl_fw_dbg_trigger_time_event {
 887	struct {
 888		__le32 id;
 889		__le32 action_bitmap;
 890		__le32 status_bitmap;
 891	} __packed time_events[16];
 892} __packed;
 893
 894/**
 895 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
 896 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
 897 *	when an Rx BlockAck session is started.
 898 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
 899 *	when an Rx BlockAck session is stopped.
 900 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
 901 *	when a Tx BlockAck session is started.
 902 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
 903 *	when a Tx BlockAck session is stopped.
 904 * rx_bar: tid bitmap to configure on what tid the trigger should occur
 905 *	when a BAR is received (for a Tx BlockAck session).
 906 * tx_bar: tid bitmap to configure on what tid the trigger should occur
 907 *	when a BAR is send (for an Rx BlocAck session).
 908 * frame_timeout: tid bitmap to configure on what tid the trigger should occur
 909 *	when a frame times out in the reordering buffer.
 910 */
 911struct iwl_fw_dbg_trigger_ba {
 912	__le16 rx_ba_start;
 913	__le16 rx_ba_stop;
 914	__le16 tx_ba_start;
 915	__le16 tx_ba_stop;
 916	__le16 rx_bar;
 917	__le16 tx_bar;
 918	__le16 frame_timeout;
 919} __packed;
 920
 921/**
 922 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
 923 * @action_bitmap: the TDLS action to trigger the collection upon
 924 * @peer_mode: trigger on specific peer or all
 925 * @peer: the TDLS peer to trigger the collection on
 926 */
 927struct iwl_fw_dbg_trigger_tdls {
 928	u8 action_bitmap;
 929	u8 peer_mode;
 930	u8 peer[ETH_ALEN];
 931	u8 reserved[4];
 932} __packed;
 933
 934/**
 935 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
 936 *  status.
 937 * @statuses: the list of statuses to trigger the collection on
 938 */
 939struct iwl_fw_dbg_trigger_tx_status {
 940	struct tx_status {
 941		u8 status;
 942		u8 reserved[3];
 943	} __packed statuses[16];
 944	__le32 reserved[2];
 945} __packed;
 946
 947/**
 948 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
 949 * @id: conf id
 950 * @usniffer: should the uSniffer image be used
 951 * @num_of_hcmds: how many HCMDs to send are present here
 952 * @hcmd: a variable length host command to be sent to apply the configuration.
 953 *	If there is more than one HCMD to send, they will appear one after the
 954 *	other and be sent in the order that they appear in.
 955 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
 956 * %FW_DBG_CONF_MAX configuration per run.
 957 */
 958struct iwl_fw_dbg_conf_tlv {
 959	u8 id;
 960	u8 usniffer;
 961	u8 reserved;
 962	u8 num_of_hcmds;
 963	struct iwl_fw_dbg_conf_hcmd hcmd;
 964} __packed;
 965
 966#define IWL_FW_CMD_VER_UNKNOWN 99
 967
 968/**
 969 * struct iwl_fw_cmd_version - firmware command version entry
 970 * @cmd: command ID
 971 * @group: group ID
 972 * @cmd_ver: command version
 973 * @notif_ver: notification version
 974 */
 975struct iwl_fw_cmd_version {
 976	u8 cmd;
 977	u8 group;
 978	u8 cmd_ver;
 979	u8 notif_ver;
 980} __packed;
 981
 982struct iwl_fw_tcm_error_addr {
 983	__le32 addr;
 984}; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
 985
 986struct iwl_fw_dump_exclude {
 987	__le32 addr, size;
 988};
 989
 990static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
 991					size_t fixed_size, size_t var_size)
 992{
 993	size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
 994
 995	if (WARN_ON(var_len % var_size))
 996		return 0;
 997
 998	return var_len / var_size;
 999}
1000
1001#define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb)			\
1002	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)),		\
1003			   sizeof(_struct_ptr->_memb[0]))
1004
1005#define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size)	\
1006	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size)
1007#endif  /* __iwl_fw_file_h__ */