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1# SPDX-License-Identifier: GPL-2.0-only
2config CSKY
3 def_bool y
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_DMA_PREP_COHERENT
6 select ARCH_HAS_GCOV_PROFILE_ALL
7 select ARCH_HAS_SYNC_DMA_FOR_CPU
8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
9 select ARCH_USE_BUILTIN_BSWAP
10 select ARCH_USE_QUEUED_RWLOCKS
11 select ARCH_USE_QUEUED_SPINLOCKS
12 select ARCH_HAS_CURRENT_STACK_POINTER
13 select ARCH_INLINE_READ_LOCK if !PREEMPTION
14 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
15 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
16 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
17 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
18 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
19 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
20 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
21 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
22 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
23 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
24 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
25 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
26 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
27 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
28 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
29 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
30 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
31 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
32 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
33 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
34 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
35 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
36 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
37 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
38 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
39 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
40 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
41 select COMMON_CLK
42 select CLKSRC_MMIO
43 select CSKY_MPINTC if CPU_CK860
44 select CSKY_MP_TIMER if CPU_CK860
45 select CSKY_APB_INTC
46 select DMA_DIRECT_REMAP
47 select IRQ_DOMAIN
48 select DW_APB_TIMER_OF
49 select GENERIC_IOREMAP
50 select GENERIC_LIB_ASHLDI3
51 select GENERIC_LIB_ASHRDI3
52 select GENERIC_LIB_LSHRDI3
53 select GENERIC_LIB_MULDI3
54 select GENERIC_LIB_CMPDI2
55 select GENERIC_LIB_UCMPDI2
56 select GENERIC_ALLOCATOR
57 select GENERIC_ATOMIC64
58 select GENERIC_CPU_DEVICES
59 select GENERIC_IRQ_CHIP
60 select GENERIC_IRQ_PROBE
61 select GENERIC_IRQ_SHOW
62 select GENERIC_IRQ_MULTI_HANDLER
63 select GENERIC_SCHED_CLOCK
64 select GENERIC_SMP_IDLE_THREAD
65 select GENERIC_TIME_VSYSCALL
66 select GENERIC_VDSO_32
67 select GENERIC_GETTIMEOFDAY
68 select GX6605S_TIMER if CPU_CK610
69 select HAVE_ARCH_TRACEHOOK
70 select HAVE_ARCH_AUDITSYSCALL
71 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
72 select HAVE_ARCH_JUMP_LABEL_RELATIVE
73 select HAVE_ARCH_MMAP_RND_BITS
74 select HAVE_ARCH_SECCOMP_FILTER
75 select HAVE_CONTEXT_TRACKING_USER
76 select HAVE_VIRT_CPU_ACCOUNTING_GEN
77 select HAVE_DEBUG_BUGVERBOSE
78 select HAVE_DEBUG_KMEMLEAK
79 select HAVE_DYNAMIC_FTRACE
80 select HAVE_DYNAMIC_FTRACE_WITH_REGS
81 select HAVE_GENERIC_VDSO
82 select HAVE_FUNCTION_TRACER
83 select HAVE_FUNCTION_GRAPH_TRACER
84 select HAVE_FUNCTION_ERROR_INJECTION
85 select HAVE_FTRACE_MCOUNT_RECORD
86 select HAVE_KERNEL_GZIP
87 select HAVE_KERNEL_LZO
88 select HAVE_KERNEL_LZMA
89 select HAVE_KPROBES if !CPU_CK610
90 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
91 select HAVE_KRETPROBES if !CPU_CK610
92 select HAVE_PERF_EVENTS
93 select HAVE_PERF_REGS
94 select HAVE_PERF_USER_STACK_DUMP
95 select HAVE_DMA_CONTIGUOUS
96 select HAVE_REGS_AND_STACK_ACCESS_API
97 select HAVE_STACKPROTECTOR
98 select HAVE_SYSCALL_TRACEPOINTS
99 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
100 select LOCK_MM_AND_FIND_VMA
101 select MAY_HAVE_SPARSE_IRQ
102 select MODULES_USE_ELF_RELA if MODULES
103 select OF
104 select OF_EARLY_FLATTREE
105 select PERF_USE_VMALLOC if CPU_CK610
106 select RTC_LIB
107 select TIMER_OF
108 select GENERIC_PCI_IOMAP
109 select HAVE_PCI
110 select PCI_DOMAINS_GENERIC if PCI
111 select PCI_SYSCALL if PCI
112 select PCI_MSI if PCI
113 select TRACE_IRQFLAGS_SUPPORT
114
115config LOCKDEP_SUPPORT
116 def_bool y
117
118config ARCH_SUPPORTS_UPROBES
119 def_bool y if !CPU_CK610
120
121config CPU_HAS_CACHEV2
122 bool
123
124config CPU_HAS_FPUV2
125 bool
126
127config CPU_HAS_HILO
128 bool
129
130config CPU_HAS_TLBI
131 bool
132
133config CPU_HAS_LDSTEX
134 bool
135 help
136 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
137
138config CPU_NEED_TLBSYNC
139 bool
140
141config CPU_NEED_SOFTALIGN
142 bool
143
144config CPU_NO_USER_BKPT
145 bool
146 help
147 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
148 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
149 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
150 instruction exception.
151 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
152
153config GENERIC_CALIBRATE_DELAY
154 def_bool y
155
156config GENERIC_CSUM
157 def_bool y
158
159config GENERIC_HWEIGHT
160 def_bool y
161
162config MMU
163 def_bool y
164
165config STACKTRACE_SUPPORT
166 def_bool y
167
168config TIME_LOW_RES
169 def_bool y
170
171config CPU_ASID_BITS
172 int
173 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
174 default "12" if (CPU_CK860)
175
176config L1_CACHE_SHIFT
177 int
178 default "4" if (CPU_CK610)
179 default "5" if (CPU_CK807 || CPU_CK810)
180 default "6" if (CPU_CK860)
181
182config ARCH_MMAP_RND_BITS_MIN
183 default 8
184
185# max bits determined by the following formula:
186# VA_BITS - PAGE_SHIFT - 3
187config ARCH_MMAP_RND_BITS_MAX
188 default 17
189
190menu "Processor type and features"
191
192choice
193 prompt "CPU MODEL"
194 default CPU_CK807
195
196config CPU_CK610
197 bool "CSKY CPU ck610"
198 select CPU_NEED_TLBSYNC
199 select CPU_NEED_SOFTALIGN
200 select CPU_NO_USER_BKPT
201
202config CPU_CK810
203 bool "CSKY CPU ck810"
204 select CPU_HAS_HILO
205 select CPU_NEED_TLBSYNC
206
207config CPU_CK807
208 bool "CSKY CPU ck807"
209 select CPU_HAS_HILO
210
211config CPU_CK860
212 bool "CSKY CPU ck860"
213 select CPU_HAS_TLBI
214 select CPU_HAS_CACHEV2
215 select CPU_HAS_LDSTEX
216 select CPU_HAS_FPUV2
217endchoice
218
219choice
220 prompt "PAGE OFFSET"
221 default PAGE_OFFSET_80000000
222
223config PAGE_OFFSET_80000000
224 bool "PAGE OFFSET 2G (user:kernel = 2:2)"
225
226config PAGE_OFFSET_A0000000
227 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
228endchoice
229
230config PAGE_OFFSET
231 hex
232 default 0x80000000 if PAGE_OFFSET_80000000
233 default 0xa0000000 if PAGE_OFFSET_A0000000
234choice
235
236 prompt "C-SKY PMU type"
237 depends on PERF_EVENTS
238 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
239
240config CPU_PMU_NONE
241 bool "None"
242
243config CSKY_PMU_V1
244 bool "Performance Monitoring Unit Ver.1"
245
246endchoice
247
248choice
249 prompt "Power Manager Instruction (wait/doze/stop)"
250 default CPU_PM_NONE
251
252config CPU_PM_NONE
253 bool "None"
254
255config CPU_PM_WAIT
256 bool "wait"
257
258config CPU_PM_DOZE
259 bool "doze"
260
261config CPU_PM_STOP
262 bool "stop"
263endchoice
264
265menuconfig HAVE_TCM
266 bool "Tightly-Coupled/Sram Memory"
267 depends on !COMPILE_TEST
268 help
269 The implementation are not only used by TCM (Tightly-Coupled Memory)
270 but also used by sram on SOC bus. It follow existed linux tcm
271 software interface, so that old tcm application codes could be
272 re-used directly.
273
274if HAVE_TCM
275config ITCM_RAM_BASE
276 hex "ITCM ram base"
277 default 0xffffffff
278
279config ITCM_NR_PAGES
280 int "Page count of ITCM size: NR*4KB"
281 range 1 256
282 default 32
283
284config HAVE_DTCM
285 bool "DTCM Support"
286
287config DTCM_RAM_BASE
288 hex "DTCM ram base"
289 depends on HAVE_DTCM
290 default 0xffffffff
291
292config DTCM_NR_PAGES
293 int "Page count of DTCM size: NR*4KB"
294 depends on HAVE_DTCM
295 range 1 256
296 default 32
297endif
298
299config CPU_HAS_VDSP
300 bool "CPU has VDSP coprocessor"
301 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
302
303config CPU_HAS_FPU
304 bool "CPU has FPU coprocessor"
305 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
306
307config CPU_HAS_ICACHE_INS
308 bool "CPU has Icache invalidate instructions"
309 depends on CPU_HAS_CACHEV2
310
311config CPU_HAS_TEE
312 bool "CPU has Trusted Execution Environment"
313 depends on CPU_CK810
314
315config SMP
316 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
317 depends on CPU_CK860
318 default n
319
320config NR_CPUS
321 int "Maximum number of CPUs (2-32)"
322 range 2 32
323 depends on SMP
324 default "4"
325
326config HIGHMEM
327 bool "High Memory Support"
328 depends on !CPU_CK610
329 select KMAP_LOCAL
330 default y
331
332config DRAM_BASE
333 hex "DRAM start addr (the same with memory-section in dts)"
334 default 0x0
335
336config HOTPLUG_CPU
337 bool "Support for hot-pluggable CPUs"
338 select GENERIC_IRQ_MIGRATION
339 depends on SMP
340 help
341 Say Y here to allow turning CPUs off and on. CPUs can be
342 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
343
344 Say N if you want to disable CPU hotplug.
345
346config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
347 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
348 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
349 help
350 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
351 deal with unaligned access by hardware.
352
353endmenu
354
355source "arch/csky/Kconfig.platforms"
356
357source "kernel/Kconfig.hz"
1# SPDX-License-Identifier: GPL-2.0-only
2config CSKY
3 def_bool y
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_CPU_CACHE_ALIASING
6 select ARCH_HAS_DMA_PREP_COHERENT
7 select ARCH_HAS_GCOV_PROFILE_ALL
8 select ARCH_HAS_SYNC_DMA_FOR_CPU
9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
10 select ARCH_USE_BUILTIN_BSWAP
11 select ARCH_USE_QUEUED_RWLOCKS
12 select ARCH_USE_QUEUED_SPINLOCKS
13 select ARCH_HAS_CURRENT_STACK_POINTER
14 select ARCH_INLINE_READ_LOCK if !PREEMPTION
15 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
16 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
17 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
18 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
19 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
20 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
21 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
22 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
23 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
24 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
25 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
26 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
27 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
28 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
29 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
30 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
31 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
32 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
33 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
34 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
35 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
36 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
37 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
38 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
39 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
40 select ARCH_NEED_CMPXCHG_1_EMU
41 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
42 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
43 select COMMON_CLK
44 select CLKSRC_MMIO
45 select CSKY_MPINTC if CPU_CK860
46 select CSKY_MP_TIMER if CPU_CK860
47 select CSKY_APB_INTC
48 select DMA_DIRECT_REMAP
49 select IRQ_DOMAIN
50 select DW_APB_TIMER_OF
51 select GENERIC_IOREMAP
52 select GENERIC_LIB_ASHLDI3
53 select GENERIC_LIB_ASHRDI3
54 select GENERIC_LIB_LSHRDI3
55 select GENERIC_LIB_MULDI3
56 select GENERIC_LIB_CMPDI2
57 select GENERIC_LIB_UCMPDI2
58 select GENERIC_ALLOCATOR
59 select GENERIC_ATOMIC64
60 select GENERIC_CPU_DEVICES
61 select GENERIC_IRQ_CHIP
62 select GENERIC_IRQ_PROBE
63 select GENERIC_IRQ_SHOW
64 select GENERIC_IRQ_MULTI_HANDLER
65 select GENERIC_SCHED_CLOCK
66 select GENERIC_SMP_IDLE_THREAD
67 select GX6605S_TIMER if CPU_CK610
68 select HAVE_ARCH_TRACEHOOK
69 select HAVE_ARCH_AUDITSYSCALL
70 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
71 select HAVE_ARCH_JUMP_LABEL_RELATIVE
72 select HAVE_ARCH_MMAP_RND_BITS
73 select HAVE_ARCH_SECCOMP_FILTER
74 select HAVE_CONTEXT_TRACKING_USER
75 select HAVE_VIRT_CPU_ACCOUNTING_GEN
76 select HAVE_DEBUG_BUGVERBOSE
77 select HAVE_DEBUG_KMEMLEAK
78 select HAVE_DYNAMIC_FTRACE
79 select HAVE_DYNAMIC_FTRACE_WITH_REGS
80 select HAVE_FUNCTION_TRACER
81 select HAVE_FUNCTION_GRAPH_TRACER
82 select HAVE_FUNCTION_ERROR_INJECTION
83 select HAVE_FTRACE_MCOUNT_RECORD
84 select HAVE_KERNEL_GZIP
85 select HAVE_KERNEL_LZO
86 select HAVE_KERNEL_LZMA
87 select HAVE_KPROBES if !CPU_CK610
88 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
89 select HAVE_KRETPROBES if !CPU_CK610
90 select HAVE_PAGE_SIZE_4KB
91 select HAVE_PERF_EVENTS
92 select HAVE_PERF_REGS
93 select HAVE_PERF_USER_STACK_DUMP
94 select HAVE_DMA_CONTIGUOUS
95 select HAVE_REGS_AND_STACK_ACCESS_API
96 select HAVE_STACKPROTECTOR
97 select HAVE_SYSCALL_TRACEPOINTS
98 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
99 select LOCK_MM_AND_FIND_VMA
100 select MAY_HAVE_SPARSE_IRQ
101 select MODULES_USE_ELF_RELA if MODULES
102 select OF
103 select OF_EARLY_FLATTREE
104 select PERF_USE_VMALLOC if CPU_CK610
105 select RTC_LIB
106 select TIMER_OF
107 select GENERIC_PCI_IOMAP
108 select HAVE_PCI
109 select PCI_DOMAINS_GENERIC if PCI
110 select PCI_SYSCALL if PCI
111 select PCI_MSI if PCI
112 select TRACE_IRQFLAGS_SUPPORT
113
114config LOCKDEP_SUPPORT
115 def_bool y
116
117config ARCH_SUPPORTS_UPROBES
118 def_bool y if !CPU_CK610
119
120config CPU_HAS_CACHEV2
121 bool
122
123config CPU_HAS_FPUV2
124 bool
125
126config CPU_HAS_HILO
127 bool
128
129config CPU_HAS_TLBI
130 bool
131
132config CPU_HAS_LDSTEX
133 bool
134 help
135 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
136
137config CPU_NEED_TLBSYNC
138 bool
139
140config CPU_NEED_SOFTALIGN
141 bool
142
143config CPU_NO_USER_BKPT
144 bool
145 help
146 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
147 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
148 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
149 instruction exception.
150 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
151
152config GENERIC_CALIBRATE_DELAY
153 def_bool y
154
155config GENERIC_CSUM
156 def_bool y
157
158config GENERIC_HWEIGHT
159 def_bool y
160
161config MMU
162 def_bool y
163
164config STACKTRACE_SUPPORT
165 def_bool y
166
167config TIME_LOW_RES
168 def_bool y
169
170config CPU_ASID_BITS
171 int
172 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
173 default "12" if (CPU_CK860)
174
175config L1_CACHE_SHIFT
176 int
177 default "4" if (CPU_CK610)
178 default "5" if (CPU_CK807 || CPU_CK810)
179 default "6" if (CPU_CK860)
180
181config ARCH_MMAP_RND_BITS_MIN
182 default 8
183
184# max bits determined by the following formula:
185# VA_BITS - PAGE_SHIFT - 3
186config ARCH_MMAP_RND_BITS_MAX
187 default 17
188
189menu "Processor type and features"
190
191choice
192 prompt "CPU MODEL"
193 default CPU_CK807
194
195config CPU_CK610
196 bool "CSKY CPU ck610"
197 select CPU_NEED_TLBSYNC
198 select CPU_NEED_SOFTALIGN
199 select CPU_NO_USER_BKPT
200
201config CPU_CK810
202 bool "CSKY CPU ck810"
203 select CPU_HAS_HILO
204 select CPU_NEED_TLBSYNC
205
206config CPU_CK807
207 bool "CSKY CPU ck807"
208 select CPU_HAS_HILO
209
210config CPU_CK860
211 bool "CSKY CPU ck860"
212 select CPU_HAS_TLBI
213 select CPU_HAS_CACHEV2
214 select CPU_HAS_LDSTEX
215 select CPU_HAS_FPUV2
216endchoice
217
218choice
219 prompt "PAGE OFFSET"
220 default PAGE_OFFSET_80000000
221
222config PAGE_OFFSET_80000000
223 bool "PAGE OFFSET 2G (user:kernel = 2:2)"
224
225config PAGE_OFFSET_A0000000
226 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
227endchoice
228
229config PAGE_OFFSET
230 hex
231 default 0x80000000 if PAGE_OFFSET_80000000
232 default 0xa0000000 if PAGE_OFFSET_A0000000
233choice
234
235 prompt "C-SKY PMU type"
236 depends on PERF_EVENTS
237 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
238
239config CPU_PMU_NONE
240 bool "None"
241
242config CSKY_PMU_V1
243 bool "Performance Monitoring Unit Ver.1"
244
245endchoice
246
247choice
248 prompt "Power Manager Instruction (wait/doze/stop)"
249 default CPU_PM_NONE
250
251config CPU_PM_NONE
252 bool "None"
253
254config CPU_PM_WAIT
255 bool "wait"
256
257config CPU_PM_DOZE
258 bool "doze"
259
260config CPU_PM_STOP
261 bool "stop"
262endchoice
263
264menuconfig HAVE_TCM
265 bool "Tightly-Coupled/Sram Memory"
266 depends on !COMPILE_TEST
267 help
268 The implementation are not only used by TCM (Tightly-Coupled Memory)
269 but also used by sram on SOC bus. It follow existed linux tcm
270 software interface, so that old tcm application codes could be
271 re-used directly.
272
273if HAVE_TCM
274config ITCM_RAM_BASE
275 hex "ITCM ram base"
276 default 0xffffffff
277
278config ITCM_NR_PAGES
279 int "Page count of ITCM size: NR*4KB"
280 range 1 256
281 default 32
282
283config HAVE_DTCM
284 bool "DTCM Support"
285
286config DTCM_RAM_BASE
287 hex "DTCM ram base"
288 depends on HAVE_DTCM
289 default 0xffffffff
290
291config DTCM_NR_PAGES
292 int "Page count of DTCM size: NR*4KB"
293 depends on HAVE_DTCM
294 range 1 256
295 default 32
296endif
297
298config CPU_HAS_VDSP
299 bool "CPU has VDSP coprocessor"
300 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
301
302config CPU_HAS_FPU
303 bool "CPU has FPU coprocessor"
304 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
305
306config CPU_HAS_ICACHE_INS
307 bool "CPU has Icache invalidate instructions"
308 depends on CPU_HAS_CACHEV2
309
310config CPU_HAS_TEE
311 bool "CPU has Trusted Execution Environment"
312 depends on CPU_CK810
313
314config SMP
315 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
316 depends on CPU_CK860
317 default n
318
319config NR_CPUS
320 int "Maximum number of CPUs (2-32)"
321 range 2 32
322 depends on SMP
323 default "4"
324
325config HIGHMEM
326 bool "High Memory Support"
327 depends on !CPU_CK610
328 select KMAP_LOCAL
329 default y
330
331config DRAM_BASE
332 hex "DRAM start addr (the same with memory-section in dts)"
333 default 0x0
334
335config HOTPLUG_CPU
336 bool "Support for hot-pluggable CPUs"
337 select GENERIC_IRQ_MIGRATION
338 depends on SMP
339 help
340 Say Y here to allow turning CPUs off and on. CPUs can be
341 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
342
343 Say N if you want to disable CPU hotplug.
344
345config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
346 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
347 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
348 help
349 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
350 deal with unaligned access by hardware.
351
352endmenu
353
354source "arch/csky/Kconfig.platforms"
355
356source "kernel/Kconfig.hz"