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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * A driver for the I2C members of the Abracon AB x8xx RTC family,
4 * and compatible: AB 1805 and AB 0805
5 *
6 * Copyright 2014-2015 Macq S.A.
7 *
8 * Author: Philippe De Muyter <phdm@macqel.be>
9 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
10 *
11 */
12
13#include <linux/bcd.h>
14#include <linux/bitfield.h>
15#include <linux/i2c.h>
16#include <linux/kstrtox.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/rtc.h>
20#include <linux/watchdog.h>
21
22#define ABX8XX_REG_HTH 0x00
23#define ABX8XX_REG_SC 0x01
24#define ABX8XX_REG_MN 0x02
25#define ABX8XX_REG_HR 0x03
26#define ABX8XX_REG_DA 0x04
27#define ABX8XX_REG_MO 0x05
28#define ABX8XX_REG_YR 0x06
29#define ABX8XX_REG_WD 0x07
30
31#define ABX8XX_REG_AHTH 0x08
32#define ABX8XX_REG_ASC 0x09
33#define ABX8XX_REG_AMN 0x0a
34#define ABX8XX_REG_AHR 0x0b
35#define ABX8XX_REG_ADA 0x0c
36#define ABX8XX_REG_AMO 0x0d
37#define ABX8XX_REG_AWD 0x0e
38
39#define ABX8XX_REG_STATUS 0x0f
40#define ABX8XX_STATUS_AF BIT(2)
41#define ABX8XX_STATUS_BLF BIT(4)
42#define ABX8XX_STATUS_WDT BIT(6)
43
44#define ABX8XX_REG_CTRL1 0x10
45#define ABX8XX_CTRL_WRITE BIT(0)
46#define ABX8XX_CTRL_ARST BIT(2)
47#define ABX8XX_CTRL_12_24 BIT(6)
48
49#define ABX8XX_REG_CTRL2 0x11
50#define ABX8XX_CTRL2_RSVD BIT(5)
51
52#define ABX8XX_REG_IRQ 0x12
53#define ABX8XX_IRQ_AIE BIT(2)
54#define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
55
56#define ABX8XX_REG_CD_TIMER_CTL 0x18
57
58#define ABX8XX_REG_OSC 0x1c
59#define ABX8XX_OSC_FOS BIT(3)
60#define ABX8XX_OSC_BOS BIT(4)
61#define ABX8XX_OSC_ACAL_512 BIT(5)
62#define ABX8XX_OSC_ACAL_1024 BIT(6)
63
64#define ABX8XX_OSC_OSEL BIT(7)
65
66#define ABX8XX_REG_OSS 0x1d
67#define ABX8XX_OSS_OF BIT(1)
68#define ABX8XX_OSS_OMODE BIT(4)
69
70#define ABX8XX_REG_WDT 0x1b
71#define ABX8XX_WDT_WDS BIT(7)
72#define ABX8XX_WDT_BMB_MASK 0x7c
73#define ABX8XX_WDT_BMB_SHIFT 2
74#define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
75#define ABX8XX_WDT_WRB_MASK 0x03
76#define ABX8XX_WDT_WRB_1HZ 0x02
77
78#define ABX8XX_REG_CFG_KEY 0x1f
79#define ABX8XX_CFG_KEY_OSC 0xa1
80#define ABX8XX_CFG_KEY_MISC 0x9d
81
82#define ABX8XX_REG_ID0 0x28
83
84#define ABX8XX_REG_OUT_CTRL 0x30
85#define ABX8XX_OUT_CTRL_EXDS BIT(4)
86
87#define ABX8XX_REG_TRICKLE 0x20
88#define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
89#define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
90#define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
91
92#define ABX8XX_REG_EXTRAM 0x3f
93#define ABX8XX_EXTRAM_XADS GENMASK(1, 0)
94
95#define ABX8XX_SRAM_BASE 0x40
96#define ABX8XX_SRAM_WIN_SIZE 0x40
97#define ABX8XX_RAM_SIZE 256
98
99#define NVMEM_ADDR_LOWER GENMASK(5, 0)
100#define NVMEM_ADDR_UPPER GENMASK(7, 6)
101
102static u8 trickle_resistors[] = {0, 3, 6, 11};
103
104enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
105 AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
106
107struct abx80x_cap {
108 u16 pn;
109 bool has_tc;
110 bool has_wdog;
111};
112
113static struct abx80x_cap abx80x_caps[] = {
114 [AB0801] = {.pn = 0x0801},
115 [AB0803] = {.pn = 0x0803},
116 [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
117 [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
118 [AB1801] = {.pn = 0x1801},
119 [AB1803] = {.pn = 0x1803},
120 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
121 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
122 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
123 [ABX80X] = {.pn = 0}
124};
125
126struct abx80x_priv {
127 struct rtc_device *rtc;
128 struct i2c_client *client;
129 struct watchdog_device wdog;
130};
131
132static int abx80x_write_config_key(struct i2c_client *client, u8 key)
133{
134 if (i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY, key) < 0) {
135 dev_err(&client->dev, "Unable to write configuration key\n");
136 return -EIO;
137 }
138
139 return 0;
140}
141
142static int abx80x_is_rc_mode(struct i2c_client *client)
143{
144 int flags = 0;
145
146 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
147 if (flags < 0) {
148 dev_err(&client->dev,
149 "Failed to read autocalibration attribute\n");
150 return flags;
151 }
152
153 return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
154}
155
156static int abx80x_enable_trickle_charger(struct i2c_client *client,
157 u8 trickle_cfg)
158{
159 int err;
160
161 /*
162 * Write the configuration key register to enable access to the Trickle
163 * register
164 */
165 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0)
166 return -EIO;
167
168 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE,
169 ABX8XX_TRICKLE_CHARGE_ENABLE |
170 trickle_cfg);
171 if (err < 0) {
172 dev_err(&client->dev, "Unable to write trickle register\n");
173 return -EIO;
174 }
175
176 return 0;
177}
178
179static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
180{
181 struct i2c_client *client = to_i2c_client(dev);
182 unsigned char buf[8];
183 int err, flags, rc_mode = 0;
184
185 /* Read the Oscillator Failure only in XT mode */
186 rc_mode = abx80x_is_rc_mode(client);
187 if (rc_mode < 0)
188 return rc_mode;
189
190 if (!rc_mode) {
191 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
192 if (flags < 0)
193 return flags;
194
195 if (flags & ABX8XX_OSS_OF) {
196 dev_err(dev, "Oscillator failure, data is invalid.\n");
197 return -EINVAL;
198 }
199 }
200
201 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH,
202 sizeof(buf), buf);
203 if (err < 0) {
204 dev_err(&client->dev, "Unable to read date\n");
205 return -EIO;
206 }
207
208 tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
209 tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
210 tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
211 tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
212 tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
213 tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1;
214 tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100;
215
216 return 0;
217}
218
219static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
220{
221 struct i2c_client *client = to_i2c_client(dev);
222 unsigned char buf[8];
223 int err, flags;
224
225 if (tm->tm_year < 100)
226 return -EINVAL;
227
228 buf[ABX8XX_REG_HTH] = 0;
229 buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
230 buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
231 buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
232 buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
233 buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1);
234 buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100);
235 buf[ABX8XX_REG_WD] = tm->tm_wday;
236
237 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH,
238 sizeof(buf), buf);
239 if (err < 0) {
240 dev_err(&client->dev, "Unable to write to date registers\n");
241 return -EIO;
242 }
243
244 /* Clear the OF bit of Oscillator Status Register */
245 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
246 if (flags < 0)
247 return flags;
248
249 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS,
250 flags & ~ABX8XX_OSS_OF);
251 if (err < 0) {
252 dev_err(&client->dev, "Unable to write oscillator status register\n");
253 return err;
254 }
255
256 return 0;
257}
258
259static irqreturn_t abx80x_handle_irq(int irq, void *dev_id)
260{
261 struct i2c_client *client = dev_id;
262 struct abx80x_priv *priv = i2c_get_clientdata(client);
263 struct rtc_device *rtc = priv->rtc;
264 int status;
265
266 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
267 if (status < 0)
268 return IRQ_NONE;
269
270 if (status & ABX8XX_STATUS_AF)
271 rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
272
273 /*
274 * It is unclear if we'll get an interrupt before the external
275 * reset kicks in.
276 */
277 if (status & ABX8XX_STATUS_WDT)
278 dev_alert(&client->dev, "watchdog timeout interrupt.\n");
279
280 i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
281
282 return IRQ_HANDLED;
283}
284
285static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t)
286{
287 struct i2c_client *client = to_i2c_client(dev);
288 unsigned char buf[7];
289
290 int irq_mask, err;
291
292 if (client->irq <= 0)
293 return -EINVAL;
294
295 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC,
296 sizeof(buf), buf);
297 if (err)
298 return err;
299
300 irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ);
301 if (irq_mask < 0)
302 return irq_mask;
303
304 t->time.tm_sec = bcd2bin(buf[0] & 0x7F);
305 t->time.tm_min = bcd2bin(buf[1] & 0x7F);
306 t->time.tm_hour = bcd2bin(buf[2] & 0x3F);
307 t->time.tm_mday = bcd2bin(buf[3] & 0x3F);
308 t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1;
309 t->time.tm_wday = buf[5] & 0x7;
310
311 t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE);
312 t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled;
313
314 return err;
315}
316
317static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t)
318{
319 struct i2c_client *client = to_i2c_client(dev);
320 u8 alarm[6];
321 int err;
322
323 if (client->irq <= 0)
324 return -EINVAL;
325
326 alarm[0] = 0x0;
327 alarm[1] = bin2bcd(t->time.tm_sec);
328 alarm[2] = bin2bcd(t->time.tm_min);
329 alarm[3] = bin2bcd(t->time.tm_hour);
330 alarm[4] = bin2bcd(t->time.tm_mday);
331 alarm[5] = bin2bcd(t->time.tm_mon + 1);
332
333 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH,
334 sizeof(alarm), alarm);
335 if (err < 0) {
336 dev_err(&client->dev, "Unable to write alarm registers\n");
337 return -EIO;
338 }
339
340 if (t->enabled) {
341 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
342 (ABX8XX_IRQ_IM_1_4 |
343 ABX8XX_IRQ_AIE));
344 if (err)
345 return err;
346 }
347
348 return 0;
349}
350
351static int abx80x_rtc_set_autocalibration(struct device *dev,
352 int autocalibration)
353{
354 struct i2c_client *client = to_i2c_client(dev);
355 int retval, flags = 0;
356
357 if ((autocalibration != 0) && (autocalibration != 1024) &&
358 (autocalibration != 512)) {
359 dev_err(dev, "autocalibration value outside permitted range\n");
360 return -EINVAL;
361 }
362
363 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
364 if (flags < 0)
365 return flags;
366
367 if (autocalibration == 0) {
368 flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
369 } else if (autocalibration == 1024) {
370 /* 1024 autocalibration is 0x10 */
371 flags |= ABX8XX_OSC_ACAL_1024;
372 flags &= ~(ABX8XX_OSC_ACAL_512);
373 } else {
374 /* 512 autocalibration is 0x11 */
375 flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
376 }
377
378 /* Unlock write access to Oscillator Control Register */
379 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0)
380 return -EIO;
381
382 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
383
384 return retval;
385}
386
387static int abx80x_rtc_get_autocalibration(struct device *dev)
388{
389 struct i2c_client *client = to_i2c_client(dev);
390 int flags = 0, autocalibration;
391
392 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
393 if (flags < 0)
394 return flags;
395
396 if (flags & ABX8XX_OSC_ACAL_512)
397 autocalibration = 512;
398 else if (flags & ABX8XX_OSC_ACAL_1024)
399 autocalibration = 1024;
400 else
401 autocalibration = 0;
402
403 return autocalibration;
404}
405
406static ssize_t autocalibration_store(struct device *dev,
407 struct device_attribute *attr,
408 const char *buf, size_t count)
409{
410 int retval;
411 unsigned long autocalibration = 0;
412
413 retval = kstrtoul(buf, 10, &autocalibration);
414 if (retval < 0) {
415 dev_err(dev, "Failed to store RTC autocalibration attribute\n");
416 return -EINVAL;
417 }
418
419 retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration);
420
421 return retval ? retval : count;
422}
423
424static ssize_t autocalibration_show(struct device *dev,
425 struct device_attribute *attr, char *buf)
426{
427 int autocalibration = 0;
428
429 autocalibration = abx80x_rtc_get_autocalibration(dev->parent);
430 if (autocalibration < 0) {
431 dev_err(dev, "Failed to read RTC autocalibration\n");
432 sprintf(buf, "0\n");
433 return autocalibration;
434 }
435
436 return sprintf(buf, "%d\n", autocalibration);
437}
438
439static DEVICE_ATTR_RW(autocalibration);
440
441static ssize_t oscillator_store(struct device *dev,
442 struct device_attribute *attr,
443 const char *buf, size_t count)
444{
445 struct i2c_client *client = to_i2c_client(dev->parent);
446 int retval, flags, rc_mode = 0;
447
448 if (strncmp(buf, "rc", 2) == 0) {
449 rc_mode = 1;
450 } else if (strncmp(buf, "xtal", 4) == 0) {
451 rc_mode = 0;
452 } else {
453 dev_err(dev, "Oscillator selection value outside permitted ones\n");
454 return -EINVAL;
455 }
456
457 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
458 if (flags < 0)
459 return flags;
460
461 if (rc_mode == 0)
462 flags &= ~(ABX8XX_OSC_OSEL);
463 else
464 flags |= (ABX8XX_OSC_OSEL);
465
466 /* Unlock write access on Oscillator Control register */
467 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0)
468 return -EIO;
469
470 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
471 if (retval < 0) {
472 dev_err(dev, "Failed to write Oscillator Control register\n");
473 return retval;
474 }
475
476 return retval ? retval : count;
477}
478
479static ssize_t oscillator_show(struct device *dev,
480 struct device_attribute *attr, char *buf)
481{
482 int rc_mode = 0;
483 struct i2c_client *client = to_i2c_client(dev->parent);
484
485 rc_mode = abx80x_is_rc_mode(client);
486
487 if (rc_mode < 0) {
488 dev_err(dev, "Failed to read RTC oscillator selection\n");
489 sprintf(buf, "\n");
490 return rc_mode;
491 }
492
493 if (rc_mode)
494 return sprintf(buf, "rc\n");
495 else
496 return sprintf(buf, "xtal\n");
497}
498
499static DEVICE_ATTR_RW(oscillator);
500
501static struct attribute *rtc_calib_attrs[] = {
502 &dev_attr_autocalibration.attr,
503 &dev_attr_oscillator.attr,
504 NULL,
505};
506
507static const struct attribute_group rtc_calib_attr_group = {
508 .attrs = rtc_calib_attrs,
509};
510
511static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled)
512{
513 struct i2c_client *client = to_i2c_client(dev);
514 int err;
515
516 if (enabled)
517 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
518 (ABX8XX_IRQ_IM_1_4 |
519 ABX8XX_IRQ_AIE));
520 else
521 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
522 ABX8XX_IRQ_IM_1_4);
523 return err;
524}
525
526static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
527{
528 struct i2c_client *client = to_i2c_client(dev);
529 int status, tmp;
530
531 switch (cmd) {
532 case RTC_VL_READ:
533 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
534 if (status < 0)
535 return status;
536
537 tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0;
538
539 return put_user(tmp, (unsigned int __user *)arg);
540
541 case RTC_VL_CLR:
542 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
543 if (status < 0)
544 return status;
545
546 status &= ~ABX8XX_STATUS_BLF;
547
548 tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
549 if (tmp < 0)
550 return tmp;
551
552 return 0;
553
554 default:
555 return -ENOIOCTLCMD;
556 }
557}
558
559static const struct rtc_class_ops abx80x_rtc_ops = {
560 .read_time = abx80x_rtc_read_time,
561 .set_time = abx80x_rtc_set_time,
562 .read_alarm = abx80x_read_alarm,
563 .set_alarm = abx80x_set_alarm,
564 .alarm_irq_enable = abx80x_alarm_irq_enable,
565 .ioctl = abx80x_ioctl,
566};
567
568static int abx80x_dt_trickle_cfg(struct i2c_client *client)
569{
570 struct device_node *np = client->dev.of_node;
571 const char *diode;
572 int trickle_cfg = 0;
573 int i, ret;
574 u32 tmp;
575
576 ret = of_property_read_string(np, "abracon,tc-diode", &diode);
577 if (ret)
578 return ret;
579
580 if (!strcmp(diode, "standard")) {
581 trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
582 } else if (!strcmp(diode, "schottky")) {
583 trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
584 } else {
585 dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode);
586 return -EINVAL;
587 }
588
589 ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp);
590 if (ret)
591 return ret;
592
593 for (i = 0; i < sizeof(trickle_resistors); i++)
594 if (trickle_resistors[i] == tmp)
595 break;
596
597 if (i == sizeof(trickle_resistors)) {
598 dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp);
599 return -EINVAL;
600 }
601
602 return (trickle_cfg | i);
603}
604
605#ifdef CONFIG_WATCHDOG
606
607static inline u8 timeout_bits(unsigned int timeout)
608{
609 return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) |
610 ABX8XX_WDT_WRB_1HZ;
611}
612
613static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog,
614 unsigned int timeout)
615{
616 struct abx80x_priv *priv = watchdog_get_drvdata(wdog);
617 u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout);
618
619 /*
620 * Writing any timeout to the WDT register resets the watchdog timer.
621 * Writing 0 disables it.
622 */
623 return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val);
624}
625
626static int abx80x_wdog_set_timeout(struct watchdog_device *wdog,
627 unsigned int new_timeout)
628{
629 int err = 0;
630
631 if (watchdog_hw_running(wdog))
632 err = __abx80x_wdog_set_timeout(wdog, new_timeout);
633
634 if (err == 0)
635 wdog->timeout = new_timeout;
636
637 return err;
638}
639
640static int abx80x_wdog_ping(struct watchdog_device *wdog)
641{
642 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
643}
644
645static int abx80x_wdog_start(struct watchdog_device *wdog)
646{
647 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
648}
649
650static int abx80x_wdog_stop(struct watchdog_device *wdog)
651{
652 return __abx80x_wdog_set_timeout(wdog, 0);
653}
654
655static const struct watchdog_info abx80x_wdog_info = {
656 .identity = "abx80x watchdog",
657 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
658};
659
660static const struct watchdog_ops abx80x_wdog_ops = {
661 .owner = THIS_MODULE,
662 .start = abx80x_wdog_start,
663 .stop = abx80x_wdog_stop,
664 .ping = abx80x_wdog_ping,
665 .set_timeout = abx80x_wdog_set_timeout,
666};
667
668static int abx80x_setup_watchdog(struct abx80x_priv *priv)
669{
670 priv->wdog.parent = &priv->client->dev;
671 priv->wdog.ops = &abx80x_wdog_ops;
672 priv->wdog.info = &abx80x_wdog_info;
673 priv->wdog.min_timeout = 1;
674 priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME;
675 priv->wdog.timeout = ABX8XX_WDT_MAX_TIME;
676
677 watchdog_set_drvdata(&priv->wdog, priv);
678
679 return devm_watchdog_register_device(&priv->client->dev, &priv->wdog);
680}
681#else
682static int abx80x_setup_watchdog(struct abx80x_priv *priv)
683{
684 return 0;
685}
686#endif
687
688static int abx80x_nvmem_xfer(struct abx80x_priv *priv, unsigned int offset,
689 void *val, size_t bytes, bool write)
690{
691 int ret;
692
693 while (bytes) {
694 u8 extram, reg, len, lower, upper;
695
696 lower = FIELD_GET(NVMEM_ADDR_LOWER, offset);
697 upper = FIELD_GET(NVMEM_ADDR_UPPER, offset);
698 extram = FIELD_PREP(ABX8XX_EXTRAM_XADS, upper);
699 reg = ABX8XX_SRAM_BASE + lower;
700 len = min(lower + bytes, (size_t)ABX8XX_SRAM_WIN_SIZE) - lower;
701 len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX);
702
703 ret = i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_EXTRAM,
704 extram);
705 if (ret)
706 return ret;
707
708 if (write)
709 ret = i2c_smbus_write_i2c_block_data(priv->client, reg,
710 len, val);
711 else
712 ret = i2c_smbus_read_i2c_block_data(priv->client, reg,
713 len, val);
714 if (ret)
715 return ret;
716
717 offset += len;
718 val += len;
719 bytes -= len;
720 }
721
722 return 0;
723}
724
725static int abx80x_nvmem_read(void *priv, unsigned int offset, void *val,
726 size_t bytes)
727{
728 return abx80x_nvmem_xfer(priv, offset, val, bytes, false);
729}
730
731static int abx80x_nvmem_write(void *priv, unsigned int offset, void *val,
732 size_t bytes)
733{
734 return abx80x_nvmem_xfer(priv, offset, val, bytes, true);
735}
736
737static int abx80x_setup_nvmem(struct abx80x_priv *priv)
738{
739 struct nvmem_config config = {
740 .type = NVMEM_TYPE_BATTERY_BACKED,
741 .reg_read = abx80x_nvmem_read,
742 .reg_write = abx80x_nvmem_write,
743 .size = ABX8XX_RAM_SIZE,
744 .priv = priv,
745 };
746
747 return devm_rtc_nvmem_register(priv->rtc, &config);
748}
749
750static const struct i2c_device_id abx80x_id[] = {
751 { "abx80x", ABX80X },
752 { "ab0801", AB0801 },
753 { "ab0803", AB0803 },
754 { "ab0804", AB0804 },
755 { "ab0805", AB0805 },
756 { "ab1801", AB1801 },
757 { "ab1803", AB1803 },
758 { "ab1804", AB1804 },
759 { "ab1805", AB1805 },
760 { "rv1805", RV1805 },
761 { }
762};
763MODULE_DEVICE_TABLE(i2c, abx80x_id);
764
765static int abx80x_probe(struct i2c_client *client)
766{
767 struct device_node *np = client->dev.of_node;
768 struct abx80x_priv *priv;
769 int i, data, err, trickle_cfg = -EINVAL;
770 char buf[7];
771 const struct i2c_device_id *id = i2c_match_id(abx80x_id, client);
772 unsigned int part = id->driver_data;
773 unsigned int partnumber;
774 unsigned int majrev, minrev;
775 unsigned int lot;
776 unsigned int wafer;
777 unsigned int uid;
778
779 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
780 return -ENODEV;
781
782 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0,
783 sizeof(buf), buf);
784 if (err < 0) {
785 dev_err(&client->dev, "Unable to read partnumber\n");
786 return -EIO;
787 }
788
789 partnumber = (buf[0] << 8) | buf[1];
790 majrev = buf[2] >> 3;
791 minrev = buf[2] & 0x7;
792 lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
793 uid = ((buf[4] & 0x7f) << 8) | buf[5];
794 wafer = (buf[6] & 0x7c) >> 2;
795 dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
796 partnumber, majrev, minrev, lot, wafer, uid);
797
798 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1);
799 if (data < 0) {
800 dev_err(&client->dev, "Unable to read control register\n");
801 return -EIO;
802 }
803
804 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1,
805 ((data & ~(ABX8XX_CTRL_12_24 |
806 ABX8XX_CTRL_ARST)) |
807 ABX8XX_CTRL_WRITE));
808 if (err < 0) {
809 dev_err(&client->dev, "Unable to write control register\n");
810 return -EIO;
811 }
812
813 /* Configure RV1805 specifics */
814 if (part == RV1805) {
815 /*
816 * Avoid accidentally entering test mode. This can happen
817 * on the RV1805 in case the reserved bit 5 in control2
818 * register is set. RV-1805-C3 datasheet indicates that
819 * the bit should be cleared in section 11h - Control2.
820 */
821 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2);
822 if (data < 0) {
823 dev_err(&client->dev,
824 "Unable to read control2 register\n");
825 return -EIO;
826 }
827
828 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2,
829 data & ~ABX8XX_CTRL2_RSVD);
830 if (err < 0) {
831 dev_err(&client->dev,
832 "Unable to write control2 register\n");
833 return -EIO;
834 }
835
836 /*
837 * Avoid extra power leakage. The RV1805 uses smaller
838 * 10pin package and the EXTI input is not present.
839 * Disable it to avoid leakage.
840 */
841 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL);
842 if (data < 0) {
843 dev_err(&client->dev,
844 "Unable to read output control register\n");
845 return -EIO;
846 }
847
848 /*
849 * Write the configuration key register to enable access to
850 * the config2 register
851 */
852 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0)
853 return -EIO;
854
855 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL,
856 data | ABX8XX_OUT_CTRL_EXDS);
857 if (err < 0) {
858 dev_err(&client->dev,
859 "Unable to write output control register\n");
860 return -EIO;
861 }
862 }
863
864 /* part autodetection */
865 if (part == ABX80X) {
866 for (i = 0; abx80x_caps[i].pn; i++)
867 if (partnumber == abx80x_caps[i].pn)
868 break;
869 if (abx80x_caps[i].pn == 0) {
870 dev_err(&client->dev, "Unknown part: %04x\n",
871 partnumber);
872 return -EINVAL;
873 }
874 part = i;
875 }
876
877 if (partnumber != abx80x_caps[part].pn) {
878 dev_err(&client->dev, "partnumber mismatch %04x != %04x\n",
879 partnumber, abx80x_caps[part].pn);
880 return -EINVAL;
881 }
882
883 if (np && abx80x_caps[part].has_tc)
884 trickle_cfg = abx80x_dt_trickle_cfg(client);
885
886 if (trickle_cfg > 0) {
887 dev_info(&client->dev, "Enabling trickle charger: %02x\n",
888 trickle_cfg);
889 abx80x_enable_trickle_charger(client, trickle_cfg);
890 }
891
892 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL,
893 BIT(2));
894 if (err)
895 return err;
896
897 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
898 if (priv == NULL)
899 return -ENOMEM;
900
901 priv->rtc = devm_rtc_allocate_device(&client->dev);
902 if (IS_ERR(priv->rtc))
903 return PTR_ERR(priv->rtc);
904
905 priv->rtc->ops = &abx80x_rtc_ops;
906 priv->client = client;
907
908 i2c_set_clientdata(client, priv);
909
910 if (abx80x_caps[part].has_wdog) {
911 err = abx80x_setup_watchdog(priv);
912 if (err)
913 return err;
914 }
915
916 err = abx80x_setup_nvmem(priv);
917 if (err)
918 return err;
919
920 if (client->irq > 0) {
921 dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
922 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
923 abx80x_handle_irq,
924 IRQF_SHARED | IRQF_ONESHOT,
925 "abx8xx",
926 client);
927 if (err) {
928 dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
929 client->irq = 0;
930 }
931 }
932
933 err = rtc_add_group(priv->rtc, &rtc_calib_attr_group);
934 if (err) {
935 dev_err(&client->dev, "Failed to create sysfs group: %d\n",
936 err);
937 return err;
938 }
939
940 return devm_rtc_register_device(priv->rtc);
941}
942
943#ifdef CONFIG_OF
944static const struct of_device_id abx80x_of_match[] = {
945 {
946 .compatible = "abracon,abx80x",
947 .data = (void *)ABX80X
948 },
949 {
950 .compatible = "abracon,ab0801",
951 .data = (void *)AB0801
952 },
953 {
954 .compatible = "abracon,ab0803",
955 .data = (void *)AB0803
956 },
957 {
958 .compatible = "abracon,ab0804",
959 .data = (void *)AB0804
960 },
961 {
962 .compatible = "abracon,ab0805",
963 .data = (void *)AB0805
964 },
965 {
966 .compatible = "abracon,ab1801",
967 .data = (void *)AB1801
968 },
969 {
970 .compatible = "abracon,ab1803",
971 .data = (void *)AB1803
972 },
973 {
974 .compatible = "abracon,ab1804",
975 .data = (void *)AB1804
976 },
977 {
978 .compatible = "abracon,ab1805",
979 .data = (void *)AB1805
980 },
981 {
982 .compatible = "microcrystal,rv1805",
983 .data = (void *)RV1805
984 },
985 { }
986};
987MODULE_DEVICE_TABLE(of, abx80x_of_match);
988#endif
989
990static struct i2c_driver abx80x_driver = {
991 .driver = {
992 .name = "rtc-abx80x",
993 .of_match_table = of_match_ptr(abx80x_of_match),
994 },
995 .probe = abx80x_probe,
996 .id_table = abx80x_id,
997};
998
999module_i2c_driver(abx80x_driver);
1000
1001MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>");
1002MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
1003MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
1004MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * A driver for the I2C members of the Abracon AB x8xx RTC family,
4 * and compatible: AB 1805 and AB 0805
5 *
6 * Copyright 2014-2015 Macq S.A.
7 *
8 * Author: Philippe De Muyter <phdm@macqel.be>
9 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
10 *
11 */
12
13#include <linux/bcd.h>
14#include <linux/i2c.h>
15#include <linux/module.h>
16#include <linux/of_device.h>
17#include <linux/rtc.h>
18#include <linux/watchdog.h>
19
20#define ABX8XX_REG_HTH 0x00
21#define ABX8XX_REG_SC 0x01
22#define ABX8XX_REG_MN 0x02
23#define ABX8XX_REG_HR 0x03
24#define ABX8XX_REG_DA 0x04
25#define ABX8XX_REG_MO 0x05
26#define ABX8XX_REG_YR 0x06
27#define ABX8XX_REG_WD 0x07
28
29#define ABX8XX_REG_AHTH 0x08
30#define ABX8XX_REG_ASC 0x09
31#define ABX8XX_REG_AMN 0x0a
32#define ABX8XX_REG_AHR 0x0b
33#define ABX8XX_REG_ADA 0x0c
34#define ABX8XX_REG_AMO 0x0d
35#define ABX8XX_REG_AWD 0x0e
36
37#define ABX8XX_REG_STATUS 0x0f
38#define ABX8XX_STATUS_AF BIT(2)
39#define ABX8XX_STATUS_BLF BIT(4)
40#define ABX8XX_STATUS_WDT BIT(6)
41
42#define ABX8XX_REG_CTRL1 0x10
43#define ABX8XX_CTRL_WRITE BIT(0)
44#define ABX8XX_CTRL_ARST BIT(2)
45#define ABX8XX_CTRL_12_24 BIT(6)
46
47#define ABX8XX_REG_CTRL2 0x11
48#define ABX8XX_CTRL2_RSVD BIT(5)
49
50#define ABX8XX_REG_IRQ 0x12
51#define ABX8XX_IRQ_AIE BIT(2)
52#define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
53
54#define ABX8XX_REG_CD_TIMER_CTL 0x18
55
56#define ABX8XX_REG_OSC 0x1c
57#define ABX8XX_OSC_FOS BIT(3)
58#define ABX8XX_OSC_BOS BIT(4)
59#define ABX8XX_OSC_ACAL_512 BIT(5)
60#define ABX8XX_OSC_ACAL_1024 BIT(6)
61
62#define ABX8XX_OSC_OSEL BIT(7)
63
64#define ABX8XX_REG_OSS 0x1d
65#define ABX8XX_OSS_OF BIT(1)
66#define ABX8XX_OSS_OMODE BIT(4)
67
68#define ABX8XX_REG_WDT 0x1b
69#define ABX8XX_WDT_WDS BIT(7)
70#define ABX8XX_WDT_BMB_MASK 0x7c
71#define ABX8XX_WDT_BMB_SHIFT 2
72#define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
73#define ABX8XX_WDT_WRB_MASK 0x03
74#define ABX8XX_WDT_WRB_1HZ 0x02
75
76#define ABX8XX_REG_CFG_KEY 0x1f
77#define ABX8XX_CFG_KEY_OSC 0xa1
78#define ABX8XX_CFG_KEY_MISC 0x9d
79
80#define ABX8XX_REG_ID0 0x28
81
82#define ABX8XX_REG_OUT_CTRL 0x30
83#define ABX8XX_OUT_CTRL_EXDS BIT(4)
84
85#define ABX8XX_REG_TRICKLE 0x20
86#define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
87#define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
88#define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
89
90static u8 trickle_resistors[] = {0, 3, 6, 11};
91
92enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
93 AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
94
95struct abx80x_cap {
96 u16 pn;
97 bool has_tc;
98 bool has_wdog;
99};
100
101static struct abx80x_cap abx80x_caps[] = {
102 [AB0801] = {.pn = 0x0801},
103 [AB0803] = {.pn = 0x0803},
104 [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
105 [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
106 [AB1801] = {.pn = 0x1801},
107 [AB1803] = {.pn = 0x1803},
108 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
109 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
110 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
111 [ABX80X] = {.pn = 0}
112};
113
114struct abx80x_priv {
115 struct rtc_device *rtc;
116 struct i2c_client *client;
117 struct watchdog_device wdog;
118};
119
120static int abx80x_is_rc_mode(struct i2c_client *client)
121{
122 int flags = 0;
123
124 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
125 if (flags < 0) {
126 dev_err(&client->dev,
127 "Failed to read autocalibration attribute\n");
128 return flags;
129 }
130
131 return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
132}
133
134static int abx80x_enable_trickle_charger(struct i2c_client *client,
135 u8 trickle_cfg)
136{
137 int err;
138
139 /*
140 * Write the configuration key register to enable access to the Trickle
141 * register
142 */
143 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
144 ABX8XX_CFG_KEY_MISC);
145 if (err < 0) {
146 dev_err(&client->dev, "Unable to write configuration key\n");
147 return -EIO;
148 }
149
150 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE,
151 ABX8XX_TRICKLE_CHARGE_ENABLE |
152 trickle_cfg);
153 if (err < 0) {
154 dev_err(&client->dev, "Unable to write trickle register\n");
155 return -EIO;
156 }
157
158 return 0;
159}
160
161static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
162{
163 struct i2c_client *client = to_i2c_client(dev);
164 unsigned char buf[8];
165 int err, flags, rc_mode = 0;
166
167 /* Read the Oscillator Failure only in XT mode */
168 rc_mode = abx80x_is_rc_mode(client);
169 if (rc_mode < 0)
170 return rc_mode;
171
172 if (!rc_mode) {
173 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
174 if (flags < 0)
175 return flags;
176
177 if (flags & ABX8XX_OSS_OF) {
178 dev_err(dev, "Oscillator failure, data is invalid.\n");
179 return -EINVAL;
180 }
181 }
182
183 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH,
184 sizeof(buf), buf);
185 if (err < 0) {
186 dev_err(&client->dev, "Unable to read date\n");
187 return -EIO;
188 }
189
190 tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
191 tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
192 tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
193 tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
194 tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
195 tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1;
196 tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100;
197
198 return 0;
199}
200
201static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
202{
203 struct i2c_client *client = to_i2c_client(dev);
204 unsigned char buf[8];
205 int err, flags;
206
207 if (tm->tm_year < 100)
208 return -EINVAL;
209
210 buf[ABX8XX_REG_HTH] = 0;
211 buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
212 buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
213 buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
214 buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
215 buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1);
216 buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100);
217 buf[ABX8XX_REG_WD] = tm->tm_wday;
218
219 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH,
220 sizeof(buf), buf);
221 if (err < 0) {
222 dev_err(&client->dev, "Unable to write to date registers\n");
223 return -EIO;
224 }
225
226 /* Clear the OF bit of Oscillator Status Register */
227 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
228 if (flags < 0)
229 return flags;
230
231 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS,
232 flags & ~ABX8XX_OSS_OF);
233 if (err < 0) {
234 dev_err(&client->dev, "Unable to write oscillator status register\n");
235 return err;
236 }
237
238 return 0;
239}
240
241static irqreturn_t abx80x_handle_irq(int irq, void *dev_id)
242{
243 struct i2c_client *client = dev_id;
244 struct abx80x_priv *priv = i2c_get_clientdata(client);
245 struct rtc_device *rtc = priv->rtc;
246 int status;
247
248 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
249 if (status < 0)
250 return IRQ_NONE;
251
252 if (status & ABX8XX_STATUS_AF)
253 rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
254
255 /*
256 * It is unclear if we'll get an interrupt before the external
257 * reset kicks in.
258 */
259 if (status & ABX8XX_STATUS_WDT)
260 dev_alert(&client->dev, "watchdog timeout interrupt.\n");
261
262 i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
263
264 return IRQ_HANDLED;
265}
266
267static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t)
268{
269 struct i2c_client *client = to_i2c_client(dev);
270 unsigned char buf[7];
271
272 int irq_mask, err;
273
274 if (client->irq <= 0)
275 return -EINVAL;
276
277 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC,
278 sizeof(buf), buf);
279 if (err)
280 return err;
281
282 irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ);
283 if (irq_mask < 0)
284 return irq_mask;
285
286 t->time.tm_sec = bcd2bin(buf[0] & 0x7F);
287 t->time.tm_min = bcd2bin(buf[1] & 0x7F);
288 t->time.tm_hour = bcd2bin(buf[2] & 0x3F);
289 t->time.tm_mday = bcd2bin(buf[3] & 0x3F);
290 t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1;
291 t->time.tm_wday = buf[5] & 0x7;
292
293 t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE);
294 t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled;
295
296 return err;
297}
298
299static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t)
300{
301 struct i2c_client *client = to_i2c_client(dev);
302 u8 alarm[6];
303 int err;
304
305 if (client->irq <= 0)
306 return -EINVAL;
307
308 alarm[0] = 0x0;
309 alarm[1] = bin2bcd(t->time.tm_sec);
310 alarm[2] = bin2bcd(t->time.tm_min);
311 alarm[3] = bin2bcd(t->time.tm_hour);
312 alarm[4] = bin2bcd(t->time.tm_mday);
313 alarm[5] = bin2bcd(t->time.tm_mon + 1);
314
315 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH,
316 sizeof(alarm), alarm);
317 if (err < 0) {
318 dev_err(&client->dev, "Unable to write alarm registers\n");
319 return -EIO;
320 }
321
322 if (t->enabled) {
323 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
324 (ABX8XX_IRQ_IM_1_4 |
325 ABX8XX_IRQ_AIE));
326 if (err)
327 return err;
328 }
329
330 return 0;
331}
332
333static int abx80x_rtc_set_autocalibration(struct device *dev,
334 int autocalibration)
335{
336 struct i2c_client *client = to_i2c_client(dev);
337 int retval, flags = 0;
338
339 if ((autocalibration != 0) && (autocalibration != 1024) &&
340 (autocalibration != 512)) {
341 dev_err(dev, "autocalibration value outside permitted range\n");
342 return -EINVAL;
343 }
344
345 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
346 if (flags < 0)
347 return flags;
348
349 if (autocalibration == 0) {
350 flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
351 } else if (autocalibration == 1024) {
352 /* 1024 autocalibration is 0x10 */
353 flags |= ABX8XX_OSC_ACAL_1024;
354 flags &= ~(ABX8XX_OSC_ACAL_512);
355 } else {
356 /* 512 autocalibration is 0x11 */
357 flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
358 }
359
360 /* Unlock write access to Oscillator Control Register */
361 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
362 ABX8XX_CFG_KEY_OSC);
363 if (retval < 0) {
364 dev_err(dev, "Failed to write CONFIG_KEY register\n");
365 return retval;
366 }
367
368 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
369
370 return retval;
371}
372
373static int abx80x_rtc_get_autocalibration(struct device *dev)
374{
375 struct i2c_client *client = to_i2c_client(dev);
376 int flags = 0, autocalibration;
377
378 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
379 if (flags < 0)
380 return flags;
381
382 if (flags & ABX8XX_OSC_ACAL_512)
383 autocalibration = 512;
384 else if (flags & ABX8XX_OSC_ACAL_1024)
385 autocalibration = 1024;
386 else
387 autocalibration = 0;
388
389 return autocalibration;
390}
391
392static ssize_t autocalibration_store(struct device *dev,
393 struct device_attribute *attr,
394 const char *buf, size_t count)
395{
396 int retval;
397 unsigned long autocalibration = 0;
398
399 retval = kstrtoul(buf, 10, &autocalibration);
400 if (retval < 0) {
401 dev_err(dev, "Failed to store RTC autocalibration attribute\n");
402 return -EINVAL;
403 }
404
405 retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration);
406
407 return retval ? retval : count;
408}
409
410static ssize_t autocalibration_show(struct device *dev,
411 struct device_attribute *attr, char *buf)
412{
413 int autocalibration = 0;
414
415 autocalibration = abx80x_rtc_get_autocalibration(dev->parent);
416 if (autocalibration < 0) {
417 dev_err(dev, "Failed to read RTC autocalibration\n");
418 sprintf(buf, "0\n");
419 return autocalibration;
420 }
421
422 return sprintf(buf, "%d\n", autocalibration);
423}
424
425static DEVICE_ATTR_RW(autocalibration);
426
427static ssize_t oscillator_store(struct device *dev,
428 struct device_attribute *attr,
429 const char *buf, size_t count)
430{
431 struct i2c_client *client = to_i2c_client(dev->parent);
432 int retval, flags, rc_mode = 0;
433
434 if (strncmp(buf, "rc", 2) == 0) {
435 rc_mode = 1;
436 } else if (strncmp(buf, "xtal", 4) == 0) {
437 rc_mode = 0;
438 } else {
439 dev_err(dev, "Oscillator selection value outside permitted ones\n");
440 return -EINVAL;
441 }
442
443 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
444 if (flags < 0)
445 return flags;
446
447 if (rc_mode == 0)
448 flags &= ~(ABX8XX_OSC_OSEL);
449 else
450 flags |= (ABX8XX_OSC_OSEL);
451
452 /* Unlock write access on Oscillator Control register */
453 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
454 ABX8XX_CFG_KEY_OSC);
455 if (retval < 0) {
456 dev_err(dev, "Failed to write CONFIG_KEY register\n");
457 return retval;
458 }
459
460 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
461 if (retval < 0) {
462 dev_err(dev, "Failed to write Oscillator Control register\n");
463 return retval;
464 }
465
466 return retval ? retval : count;
467}
468
469static ssize_t oscillator_show(struct device *dev,
470 struct device_attribute *attr, char *buf)
471{
472 int rc_mode = 0;
473 struct i2c_client *client = to_i2c_client(dev->parent);
474
475 rc_mode = abx80x_is_rc_mode(client);
476
477 if (rc_mode < 0) {
478 dev_err(dev, "Failed to read RTC oscillator selection\n");
479 sprintf(buf, "\n");
480 return rc_mode;
481 }
482
483 if (rc_mode)
484 return sprintf(buf, "rc\n");
485 else
486 return sprintf(buf, "xtal\n");
487}
488
489static DEVICE_ATTR_RW(oscillator);
490
491static struct attribute *rtc_calib_attrs[] = {
492 &dev_attr_autocalibration.attr,
493 &dev_attr_oscillator.attr,
494 NULL,
495};
496
497static const struct attribute_group rtc_calib_attr_group = {
498 .attrs = rtc_calib_attrs,
499};
500
501static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled)
502{
503 struct i2c_client *client = to_i2c_client(dev);
504 int err;
505
506 if (enabled)
507 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
508 (ABX8XX_IRQ_IM_1_4 |
509 ABX8XX_IRQ_AIE));
510 else
511 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
512 ABX8XX_IRQ_IM_1_4);
513 return err;
514}
515
516static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
517{
518 struct i2c_client *client = to_i2c_client(dev);
519 int status, tmp;
520
521 switch (cmd) {
522 case RTC_VL_READ:
523 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
524 if (status < 0)
525 return status;
526
527 tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0;
528
529 return put_user(tmp, (unsigned int __user *)arg);
530
531 case RTC_VL_CLR:
532 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
533 if (status < 0)
534 return status;
535
536 status &= ~ABX8XX_STATUS_BLF;
537
538 tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
539 if (tmp < 0)
540 return tmp;
541
542 return 0;
543
544 default:
545 return -ENOIOCTLCMD;
546 }
547}
548
549static const struct rtc_class_ops abx80x_rtc_ops = {
550 .read_time = abx80x_rtc_read_time,
551 .set_time = abx80x_rtc_set_time,
552 .read_alarm = abx80x_read_alarm,
553 .set_alarm = abx80x_set_alarm,
554 .alarm_irq_enable = abx80x_alarm_irq_enable,
555 .ioctl = abx80x_ioctl,
556};
557
558static int abx80x_dt_trickle_cfg(struct i2c_client *client)
559{
560 struct device_node *np = client->dev.of_node;
561 const char *diode;
562 int trickle_cfg = 0;
563 int i, ret;
564 u32 tmp;
565
566 ret = of_property_read_string(np, "abracon,tc-diode", &diode);
567 if (ret)
568 return ret;
569
570 if (!strcmp(diode, "standard")) {
571 trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
572 } else if (!strcmp(diode, "schottky")) {
573 trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
574 } else {
575 dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode);
576 return -EINVAL;
577 }
578
579 ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp);
580 if (ret)
581 return ret;
582
583 for (i = 0; i < sizeof(trickle_resistors); i++)
584 if (trickle_resistors[i] == tmp)
585 break;
586
587 if (i == sizeof(trickle_resistors)) {
588 dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp);
589 return -EINVAL;
590 }
591
592 return (trickle_cfg | i);
593}
594
595#ifdef CONFIG_WATCHDOG
596
597static inline u8 timeout_bits(unsigned int timeout)
598{
599 return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) |
600 ABX8XX_WDT_WRB_1HZ;
601}
602
603static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog,
604 unsigned int timeout)
605{
606 struct abx80x_priv *priv = watchdog_get_drvdata(wdog);
607 u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout);
608
609 /*
610 * Writing any timeout to the WDT register resets the watchdog timer.
611 * Writing 0 disables it.
612 */
613 return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val);
614}
615
616static int abx80x_wdog_set_timeout(struct watchdog_device *wdog,
617 unsigned int new_timeout)
618{
619 int err = 0;
620
621 if (watchdog_hw_running(wdog))
622 err = __abx80x_wdog_set_timeout(wdog, new_timeout);
623
624 if (err == 0)
625 wdog->timeout = new_timeout;
626
627 return err;
628}
629
630static int abx80x_wdog_ping(struct watchdog_device *wdog)
631{
632 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
633}
634
635static int abx80x_wdog_start(struct watchdog_device *wdog)
636{
637 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
638}
639
640static int abx80x_wdog_stop(struct watchdog_device *wdog)
641{
642 return __abx80x_wdog_set_timeout(wdog, 0);
643}
644
645static const struct watchdog_info abx80x_wdog_info = {
646 .identity = "abx80x watchdog",
647 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
648};
649
650static const struct watchdog_ops abx80x_wdog_ops = {
651 .owner = THIS_MODULE,
652 .start = abx80x_wdog_start,
653 .stop = abx80x_wdog_stop,
654 .ping = abx80x_wdog_ping,
655 .set_timeout = abx80x_wdog_set_timeout,
656};
657
658static int abx80x_setup_watchdog(struct abx80x_priv *priv)
659{
660 priv->wdog.parent = &priv->client->dev;
661 priv->wdog.ops = &abx80x_wdog_ops;
662 priv->wdog.info = &abx80x_wdog_info;
663 priv->wdog.min_timeout = 1;
664 priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME;
665 priv->wdog.timeout = ABX8XX_WDT_MAX_TIME;
666
667 watchdog_set_drvdata(&priv->wdog, priv);
668
669 return devm_watchdog_register_device(&priv->client->dev, &priv->wdog);
670}
671#else
672static int abx80x_setup_watchdog(struct abx80x_priv *priv)
673{
674 return 0;
675}
676#endif
677
678static int abx80x_probe(struct i2c_client *client,
679 const struct i2c_device_id *id)
680{
681 struct device_node *np = client->dev.of_node;
682 struct abx80x_priv *priv;
683 int i, data, err, trickle_cfg = -EINVAL;
684 char buf[7];
685 unsigned int part = id->driver_data;
686 unsigned int partnumber;
687 unsigned int majrev, minrev;
688 unsigned int lot;
689 unsigned int wafer;
690 unsigned int uid;
691
692 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
693 return -ENODEV;
694
695 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0,
696 sizeof(buf), buf);
697 if (err < 0) {
698 dev_err(&client->dev, "Unable to read partnumber\n");
699 return -EIO;
700 }
701
702 partnumber = (buf[0] << 8) | buf[1];
703 majrev = buf[2] >> 3;
704 minrev = buf[2] & 0x7;
705 lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
706 uid = ((buf[4] & 0x7f) << 8) | buf[5];
707 wafer = (buf[6] & 0x7c) >> 2;
708 dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
709 partnumber, majrev, minrev, lot, wafer, uid);
710
711 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1);
712 if (data < 0) {
713 dev_err(&client->dev, "Unable to read control register\n");
714 return -EIO;
715 }
716
717 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1,
718 ((data & ~(ABX8XX_CTRL_12_24 |
719 ABX8XX_CTRL_ARST)) |
720 ABX8XX_CTRL_WRITE));
721 if (err < 0) {
722 dev_err(&client->dev, "Unable to write control register\n");
723 return -EIO;
724 }
725
726 /* Configure RV1805 specifics */
727 if (part == RV1805) {
728 /*
729 * Avoid accidentally entering test mode. This can happen
730 * on the RV1805 in case the reserved bit 5 in control2
731 * register is set. RV-1805-C3 datasheet indicates that
732 * the bit should be cleared in section 11h - Control2.
733 */
734 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2);
735 if (data < 0) {
736 dev_err(&client->dev,
737 "Unable to read control2 register\n");
738 return -EIO;
739 }
740
741 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2,
742 data & ~ABX8XX_CTRL2_RSVD);
743 if (err < 0) {
744 dev_err(&client->dev,
745 "Unable to write control2 register\n");
746 return -EIO;
747 }
748
749 /*
750 * Avoid extra power leakage. The RV1805 uses smaller
751 * 10pin package and the EXTI input is not present.
752 * Disable it to avoid leakage.
753 */
754 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL);
755 if (data < 0) {
756 dev_err(&client->dev,
757 "Unable to read output control register\n");
758 return -EIO;
759 }
760
761 /*
762 * Write the configuration key register to enable access to
763 * the config2 register
764 */
765 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
766 ABX8XX_CFG_KEY_MISC);
767 if (err < 0) {
768 dev_err(&client->dev,
769 "Unable to write configuration key\n");
770 return -EIO;
771 }
772
773 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL,
774 data | ABX8XX_OUT_CTRL_EXDS);
775 if (err < 0) {
776 dev_err(&client->dev,
777 "Unable to write output control register\n");
778 return -EIO;
779 }
780 }
781
782 /* part autodetection */
783 if (part == ABX80X) {
784 for (i = 0; abx80x_caps[i].pn; i++)
785 if (partnumber == abx80x_caps[i].pn)
786 break;
787 if (abx80x_caps[i].pn == 0) {
788 dev_err(&client->dev, "Unknown part: %04x\n",
789 partnumber);
790 return -EINVAL;
791 }
792 part = i;
793 }
794
795 if (partnumber != abx80x_caps[part].pn) {
796 dev_err(&client->dev, "partnumber mismatch %04x != %04x\n",
797 partnumber, abx80x_caps[part].pn);
798 return -EINVAL;
799 }
800
801 if (np && abx80x_caps[part].has_tc)
802 trickle_cfg = abx80x_dt_trickle_cfg(client);
803
804 if (trickle_cfg > 0) {
805 dev_info(&client->dev, "Enabling trickle charger: %02x\n",
806 trickle_cfg);
807 abx80x_enable_trickle_charger(client, trickle_cfg);
808 }
809
810 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL,
811 BIT(2));
812 if (err)
813 return err;
814
815 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
816 if (priv == NULL)
817 return -ENOMEM;
818
819 priv->rtc = devm_rtc_allocate_device(&client->dev);
820 if (IS_ERR(priv->rtc))
821 return PTR_ERR(priv->rtc);
822
823 priv->rtc->ops = &abx80x_rtc_ops;
824 priv->client = client;
825
826 i2c_set_clientdata(client, priv);
827
828 if (abx80x_caps[part].has_wdog) {
829 err = abx80x_setup_watchdog(priv);
830 if (err)
831 return err;
832 }
833
834 if (client->irq > 0) {
835 dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
836 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
837 abx80x_handle_irq,
838 IRQF_SHARED | IRQF_ONESHOT,
839 "abx8xx",
840 client);
841 if (err) {
842 dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
843 client->irq = 0;
844 }
845 }
846
847 err = rtc_add_group(priv->rtc, &rtc_calib_attr_group);
848 if (err) {
849 dev_err(&client->dev, "Failed to create sysfs group: %d\n",
850 err);
851 return err;
852 }
853
854 return rtc_register_device(priv->rtc);
855}
856
857static const struct i2c_device_id abx80x_id[] = {
858 { "abx80x", ABX80X },
859 { "ab0801", AB0801 },
860 { "ab0803", AB0803 },
861 { "ab0804", AB0804 },
862 { "ab0805", AB0805 },
863 { "ab1801", AB1801 },
864 { "ab1803", AB1803 },
865 { "ab1804", AB1804 },
866 { "ab1805", AB1805 },
867 { "rv1805", RV1805 },
868 { }
869};
870MODULE_DEVICE_TABLE(i2c, abx80x_id);
871
872#ifdef CONFIG_OF
873static const struct of_device_id abx80x_of_match[] = {
874 {
875 .compatible = "abracon,abx80x",
876 .data = (void *)ABX80X
877 },
878 {
879 .compatible = "abracon,ab0801",
880 .data = (void *)AB0801
881 },
882 {
883 .compatible = "abracon,ab0803",
884 .data = (void *)AB0803
885 },
886 {
887 .compatible = "abracon,ab0804",
888 .data = (void *)AB0804
889 },
890 {
891 .compatible = "abracon,ab0805",
892 .data = (void *)AB0805
893 },
894 {
895 .compatible = "abracon,ab1801",
896 .data = (void *)AB1801
897 },
898 {
899 .compatible = "abracon,ab1803",
900 .data = (void *)AB1803
901 },
902 {
903 .compatible = "abracon,ab1804",
904 .data = (void *)AB1804
905 },
906 {
907 .compatible = "abracon,ab1805",
908 .data = (void *)AB1805
909 },
910 {
911 .compatible = "microcrystal,rv1805",
912 .data = (void *)RV1805
913 },
914 { }
915};
916MODULE_DEVICE_TABLE(of, abx80x_of_match);
917#endif
918
919static struct i2c_driver abx80x_driver = {
920 .driver = {
921 .name = "rtc-abx80x",
922 .of_match_table = of_match_ptr(abx80x_of_match),
923 },
924 .probe = abx80x_probe,
925 .id_table = abx80x_id,
926};
927
928module_i2c_driver(abx80x_driver);
929
930MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>");
931MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
932MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
933MODULE_LICENSE("GPL v2");