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1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2017 Intel Deutschland GmbH
4 * Copyright (C) 2019-2021 Intel Corporation
5 */
6#include "iwl-drv.h"
7#include "runtime.h"
8#include "dbg.h"
9#include "debugfs.h"
10
11#include "fw/api/system.h"
12#include "fw/api/commands.h"
13#include "fw/api/rx.h"
14#include "fw/api/datapath.h"
15
16void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,
17 const struct iwl_fw *fw,
18 const struct iwl_fw_runtime_ops *ops, void *ops_ctx,
19 const struct iwl_dump_sanitize_ops *sanitize_ops,
20 void *sanitize_ctx,
21 struct dentry *dbgfs_dir)
22{
23 int i;
24
25 memset(fwrt, 0, sizeof(*fwrt));
26 fwrt->trans = trans;
27 fwrt->fw = fw;
28 fwrt->dev = trans->dev;
29 fwrt->dump.conf = FW_DBG_INVALID;
30 fwrt->ops = ops;
31 fwrt->sanitize_ops = sanitize_ops;
32 fwrt->sanitize_ctx = sanitize_ctx;
33 fwrt->ops_ctx = ops_ctx;
34 for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++) {
35 fwrt->dump.wks[i].idx = i;
36 INIT_DELAYED_WORK(&fwrt->dump.wks[i].wk, iwl_fw_error_dump_wk);
37 }
38 iwl_fwrt_dbgfs_register(fwrt, dbgfs_dir);
39}
40IWL_EXPORT_SYMBOL(iwl_fw_runtime_init);
41
42void iwl_fw_runtime_suspend(struct iwl_fw_runtime *fwrt)
43{
44 iwl_fw_suspend_timestamp(fwrt);
45 iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_START, NULL);
46}
47IWL_EXPORT_SYMBOL(iwl_fw_runtime_suspend);
48
49void iwl_fw_runtime_resume(struct iwl_fw_runtime *fwrt)
50{
51 iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_END, NULL);
52 iwl_fw_resume_timestamp(fwrt);
53}
54IWL_EXPORT_SYMBOL(iwl_fw_runtime_resume);
55
56/* set device type and latency */
57int iwl_set_soc_latency(struct iwl_fw_runtime *fwrt)
58{
59 struct iwl_soc_configuration_cmd cmd = {};
60 struct iwl_host_cmd hcmd = {
61 .id = WIDE_ID(SYSTEM_GROUP, SOC_CONFIGURATION_CMD),
62 .data[0] = &cmd,
63 .len[0] = sizeof(cmd),
64 };
65 int ret;
66
67 /*
68 * In VER_1 of this command, the discrete value is considered
69 * an integer; In VER_2, it's a bitmask. Since we have only 2
70 * values in VER_1, this is backwards-compatible with VER_2,
71 * as long as we don't set any other bits.
72 */
73 if (!fwrt->trans->trans_cfg->integrated)
74 cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE);
75
76 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_NONE !=
77 SOC_FLAGS_LTR_APPLY_DELAY_NONE);
78 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_200US !=
79 SOC_FLAGS_LTR_APPLY_DELAY_200);
80 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_2500US !=
81 SOC_FLAGS_LTR_APPLY_DELAY_2500);
82 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_1820US !=
83 SOC_FLAGS_LTR_APPLY_DELAY_1820);
84
85 if (fwrt->trans->trans_cfg->ltr_delay != IWL_CFG_TRANS_LTR_DELAY_NONE &&
86 !WARN_ON(!fwrt->trans->trans_cfg->integrated))
87 cmd.flags |= le32_encode_bits(fwrt->trans->trans_cfg->ltr_delay,
88 SOC_FLAGS_LTR_APPLY_DELAY_MASK);
89
90 if (iwl_fw_lookup_cmd_ver(fwrt->fw, SCAN_REQ_UMAC,
91 IWL_FW_CMD_VER_UNKNOWN) >= 2 &&
92 fwrt->trans->trans_cfg->low_latency_xtal)
93 cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY);
94
95 cmd.latency = cpu_to_le32(fwrt->trans->trans_cfg->xtal_latency);
96
97 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
98 if (ret)
99 IWL_ERR(fwrt, "Failed to set soc latency: %d\n", ret);
100 return ret;
101}
102IWL_EXPORT_SYMBOL(iwl_set_soc_latency);
103
104int iwl_configure_rxq(struct iwl_fw_runtime *fwrt)
105{
106 int i, num_queues, size, ret;
107 struct iwl_rfh_queue_config *cmd;
108 struct iwl_host_cmd hcmd = {
109 .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
110 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
111 };
112
113 /*
114 * The default queue is configured via context info, so if we
115 * have a single queue, there's nothing to do here.
116 */
117 if (fwrt->trans->num_rx_queues == 1)
118 return 0;
119
120 if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_22000)
121 return 0;
122
123 /* skip the default queue */
124 num_queues = fwrt->trans->num_rx_queues - 1;
125
126 size = struct_size(cmd, data, num_queues);
127
128 cmd = kzalloc(size, GFP_KERNEL);
129 if (!cmd)
130 return -ENOMEM;
131
132 cmd->num_queues = num_queues;
133
134 for (i = 0; i < num_queues; i++) {
135 struct iwl_trans_rxq_dma_data data;
136
137 cmd->data[i].q_num = i + 1;
138 iwl_trans_get_rxq_dma_data(fwrt->trans, i + 1, &data);
139
140 cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
141 cmd->data[i].urbd_stts_wrptr =
142 cpu_to_le64(data.urbd_stts_wrptr);
143 cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
144 cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
145 }
146
147 hcmd.data[0] = cmd;
148 hcmd.len[0] = size;
149
150 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
151
152 kfree(cmd);
153
154 if (ret)
155 IWL_ERR(fwrt, "Failed to configure RX queues: %d\n", ret);
156
157 return ret;
158}
159IWL_EXPORT_SYMBOL(iwl_configure_rxq);
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2017 Intel Deutschland GmbH
9 * Copyright(c) 2019 - 2020 Intel Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called COPYING.
22 *
23 * Contact Information:
24 * Intel Linux Wireless <linuxwifi@intel.com>
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *
27 * BSD LICENSE
28 *
29 * Copyright(c) 2017 Intel Deutschland GmbH
30 * Copyright(c) 2019 - 2020 Intel Corporation
31 * All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions
35 * are met:
36 *
37 * * Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * * Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in
41 * the documentation and/or other materials provided with the
42 * distribution.
43 * * Neither the name Intel Corporation nor the names of its
44 * contributors may be used to endorse or promote products derived
45 * from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
48 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
49 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
50 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
51 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
52 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
53 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
57 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58 *
59 *****************************************************************************/
60#include "iwl-drv.h"
61#include "runtime.h"
62#include "dbg.h"
63#include "debugfs.h"
64
65#include "fw/api/soc.h"
66#include "fw/api/commands.h"
67
68void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,
69 const struct iwl_fw *fw,
70 const struct iwl_fw_runtime_ops *ops, void *ops_ctx,
71 struct dentry *dbgfs_dir)
72{
73 int i;
74
75 memset(fwrt, 0, sizeof(*fwrt));
76 fwrt->trans = trans;
77 fwrt->fw = fw;
78 fwrt->dev = trans->dev;
79 fwrt->dump.conf = FW_DBG_INVALID;
80 fwrt->ops = ops;
81 fwrt->ops_ctx = ops_ctx;
82 for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++) {
83 fwrt->dump.wks[i].idx = i;
84 INIT_DELAYED_WORK(&fwrt->dump.wks[i].wk, iwl_fw_error_dump_wk);
85 }
86 iwl_fwrt_dbgfs_register(fwrt, dbgfs_dir);
87}
88IWL_EXPORT_SYMBOL(iwl_fw_runtime_init);
89
90void iwl_fw_runtime_suspend(struct iwl_fw_runtime *fwrt)
91{
92 iwl_fw_suspend_timestamp(fwrt);
93}
94IWL_EXPORT_SYMBOL(iwl_fw_runtime_suspend);
95
96void iwl_fw_runtime_resume(struct iwl_fw_runtime *fwrt)
97{
98 iwl_fw_resume_timestamp(fwrt);
99}
100IWL_EXPORT_SYMBOL(iwl_fw_runtime_resume);
101
102/* set device type and latency */
103int iwl_set_soc_latency(struct iwl_fw_runtime *fwrt)
104{
105 struct iwl_soc_configuration_cmd cmd = {};
106 struct iwl_host_cmd hcmd = {
107 .id = iwl_cmd_id(SOC_CONFIGURATION_CMD, SYSTEM_GROUP, 0),
108 .data[0] = &cmd,
109 .len[0] = sizeof(cmd),
110 };
111 int ret;
112
113 /*
114 * In VER_1 of this command, the discrete value is considered
115 * an integer; In VER_2, it's a bitmask. Since we have only 2
116 * values in VER_1, this is backwards-compatible with VER_2,
117 * as long as we don't set any other bits.
118 */
119 if (!fwrt->trans->trans_cfg->integrated)
120 cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE);
121
122 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_NONE !=
123 SOC_FLAGS_LTR_APPLY_DELAY_NONE);
124 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_200US !=
125 SOC_FLAGS_LTR_APPLY_DELAY_200);
126 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_2500US !=
127 SOC_FLAGS_LTR_APPLY_DELAY_2500);
128 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_1820US !=
129 SOC_FLAGS_LTR_APPLY_DELAY_1820);
130
131 if (fwrt->trans->trans_cfg->ltr_delay != IWL_CFG_TRANS_LTR_DELAY_NONE &&
132 !WARN_ON(!fwrt->trans->trans_cfg->integrated))
133 cmd.flags |= le32_encode_bits(fwrt->trans->trans_cfg->ltr_delay,
134 SOC_FLAGS_LTR_APPLY_DELAY_MASK);
135
136 if (iwl_fw_lookup_cmd_ver(fwrt->fw, IWL_ALWAYS_LONG_GROUP,
137 SCAN_REQ_UMAC) >= 2 &&
138 fwrt->trans->trans_cfg->low_latency_xtal)
139 cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY);
140
141 cmd.latency = cpu_to_le32(fwrt->trans->trans_cfg->xtal_latency);
142
143 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
144 if (ret)
145 IWL_ERR(fwrt, "Failed to set soc latency: %d\n", ret);
146 return ret;
147}
148IWL_EXPORT_SYMBOL(iwl_set_soc_latency);