Loading...
1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/*
3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
4 * Copyright (C) 2017 Intel Deutschland GmbH
5 */
6#ifndef __iwl_fw_api_rs_h__
7#define __iwl_fw_api_rs_h__
8
9#include "mac.h"
10
11/**
12 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags
13 * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for
14 * bandwidths <= 80MHz
15 * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC
16 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
17 * bandwidth
18 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation
19 * for BPSK (MCS 0) with 1 spatial
20 * stream
21 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation
22 * for BPSK (MCS 0) with 2 spatial
23 * streams
24 * @IWL_TLC_MNG_CFG_FLAGS_EHT_EXTRA_LTF_MSK: enable support for EHT extra LTF
25 */
26enum iwl_tlc_mng_cfg_flags {
27 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0),
28 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1),
29 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2),
30 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3),
31 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4),
32 IWL_TLC_MNG_CFG_FLAGS_EHT_EXTRA_LTF_MSK = BIT(6),
33};
34
35/**
36 * enum iwl_tlc_mng_cfg_cw - channel width options
37 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
38 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
39 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
40 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
41 * @IWL_TLC_MNG_CH_WIDTH_320MHZ: 320MHZ channel
42 */
43enum iwl_tlc_mng_cfg_cw {
44 IWL_TLC_MNG_CH_WIDTH_20MHZ,
45 IWL_TLC_MNG_CH_WIDTH_40MHZ,
46 IWL_TLC_MNG_CH_WIDTH_80MHZ,
47 IWL_TLC_MNG_CH_WIDTH_160MHZ,
48 IWL_TLC_MNG_CH_WIDTH_320MHZ,
49};
50
51/**
52 * enum iwl_tlc_mng_cfg_chains - possible chains
53 * @IWL_TLC_MNG_CHAIN_A_MSK: chain A
54 * @IWL_TLC_MNG_CHAIN_B_MSK: chain B
55 */
56enum iwl_tlc_mng_cfg_chains {
57 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0),
58 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1),
59};
60
61/**
62 * enum iwl_tlc_mng_cfg_mode - supported modes
63 * @IWL_TLC_MNG_MODE_CCK: enable CCK
64 * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT)
65 * @IWL_TLC_MNG_MODE_NON_HT: enable non HT
66 * @IWL_TLC_MNG_MODE_HT: enable HT
67 * @IWL_TLC_MNG_MODE_VHT: enable VHT
68 * @IWL_TLC_MNG_MODE_HE: enable HE
69 * @IWL_TLC_MNG_MODE_EHT: enable EHT
70 */
71enum iwl_tlc_mng_cfg_mode {
72 IWL_TLC_MNG_MODE_CCK = 0,
73 IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK,
74 IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK,
75 IWL_TLC_MNG_MODE_HT,
76 IWL_TLC_MNG_MODE_VHT,
77 IWL_TLC_MNG_MODE_HE,
78 IWL_TLC_MNG_MODE_EHT,
79};
80
81/**
82 * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates
83 * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0
84 * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1
85 * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2
86 * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3
87 * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4
88 * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5
89 * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6
90 * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7
91 * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8
92 * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9
93 * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10
94 * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11
95 * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT
96 */
97enum iwl_tlc_mng_ht_rates {
98 IWL_TLC_MNG_HT_RATE_MCS0 = 0,
99 IWL_TLC_MNG_HT_RATE_MCS1,
100 IWL_TLC_MNG_HT_RATE_MCS2,
101 IWL_TLC_MNG_HT_RATE_MCS3,
102 IWL_TLC_MNG_HT_RATE_MCS4,
103 IWL_TLC_MNG_HT_RATE_MCS5,
104 IWL_TLC_MNG_HT_RATE_MCS6,
105 IWL_TLC_MNG_HT_RATE_MCS7,
106 IWL_TLC_MNG_HT_RATE_MCS8,
107 IWL_TLC_MNG_HT_RATE_MCS9,
108 IWL_TLC_MNG_HT_RATE_MCS10,
109 IWL_TLC_MNG_HT_RATE_MCS11,
110 IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11,
111};
112
113enum IWL_TLC_MNG_NSS {
114 IWL_TLC_NSS_1,
115 IWL_TLC_NSS_2,
116 IWL_TLC_NSS_MAX
117};
118
119/**
120 * enum IWL_TLC_MCS_PER_BW - mcs index per BW
121 * @IWL_TLC_MCS_PER_BW_80: mcs for bw - 20Hhz, 40Hhz, 80Hhz
122 * @IWL_TLC_MCS_PER_BW_160: mcs for bw - 160Mhz
123 * @IWL_TLC_MCS_PER_BW_320: mcs for bw - 320Mhz
124 * @IWL_TLC_MCS_PER_BW_NUM_V3: number of entries up to version 3
125 * @IWL_TLC_MCS_PER_BW_NUM_V4: number of entries from version 4
126 */
127enum IWL_TLC_MCS_PER_BW {
128 IWL_TLC_MCS_PER_BW_80,
129 IWL_TLC_MCS_PER_BW_160,
130 IWL_TLC_MCS_PER_BW_320,
131 IWL_TLC_MCS_PER_BW_NUM_V3 = IWL_TLC_MCS_PER_BW_160 + 1,
132 IWL_TLC_MCS_PER_BW_NUM_V4 = IWL_TLC_MCS_PER_BW_320 + 1,
133};
134
135/**
136 * struct iwl_tlc_config_cmd_v3 - TLC configuration
137 * @sta_id: station id
138 * @reserved1: reserved
139 * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw
140 * @mode: &enum iwl_tlc_mng_cfg_mode
141 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains
142 * @amsdu: TX amsdu is supported
143 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags
144 * @non_ht_rates: bitmap of supported legacy rates
145 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per &enum IWL_TLC_MCS_PER_BW
146 * <nss, channel-width> pair (0 - 80mhz width and below, 1 - 160mhz).
147 * @max_mpdu_len: max MPDU length, in bytes
148 * @sgi_ch_width_supp: bitmap of SGI support per channel width
149 * use BIT(@enum iwl_tlc_mng_cfg_cw)
150 * @reserved2: reserved
151 * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI),
152 * set zero for no limit.
153 */
154struct iwl_tlc_config_cmd_v3 {
155 u8 sta_id;
156 u8 reserved1[3];
157 u8 max_ch_width;
158 u8 mode;
159 u8 chains;
160 u8 amsdu;
161 __le16 flags;
162 __le16 non_ht_rates;
163 __le16 ht_rates[IWL_TLC_NSS_MAX][IWL_TLC_MCS_PER_BW_NUM_V3];
164 __le16 max_mpdu_len;
165 u8 sgi_ch_width_supp;
166 u8 reserved2;
167 __le32 max_tx_op;
168} __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_3 */
169
170/**
171 * struct iwl_tlc_config_cmd_v4 - TLC configuration
172 * @sta_id: station id
173 * @reserved1: reserved
174 * @max_ch_width: max supported channel width from &enum iwl_tlc_mng_cfg_cw
175 * @mode: &enum iwl_tlc_mng_cfg_mode
176 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains
177 * @sgi_ch_width_supp: bitmap of SGI support per channel width
178 * use BIT(&enum iwl_tlc_mng_cfg_cw)
179 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags
180 * @non_ht_rates: bitmap of supported legacy rates
181 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width>
182 * pair (0 - 80mhz width and below, 1 - 160mhz, 2 - 320mhz).
183 * @max_mpdu_len: max MPDU length, in bytes
184 * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI),
185 * set zero for no limit.
186 */
187struct iwl_tlc_config_cmd_v4 {
188 u8 sta_id;
189 u8 reserved1[3];
190 u8 max_ch_width;
191 u8 mode;
192 u8 chains;
193 u8 sgi_ch_width_supp;
194 __le16 flags;
195 __le16 non_ht_rates;
196 __le16 ht_rates[IWL_TLC_NSS_MAX][IWL_TLC_MCS_PER_BW_NUM_V4];
197 __le16 max_mpdu_len;
198 __le16 max_tx_op;
199} __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_4 */
200
201/**
202 * enum iwl_tlc_update_flags - updated fields
203 * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update
204 * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update
205 */
206enum iwl_tlc_update_flags {
207 IWL_TLC_NOTIF_FLAG_RATE = BIT(0),
208 IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1),
209};
210
211/**
212 * struct iwl_tlc_update_notif - TLC notification from FW
213 * @sta_id: station id
214 * @reserved: reserved
215 * @flags: bitmap of notifications reported
216 * @rate: current initial rate
217 * @amsdu_size: Max AMSDU size, in bytes
218 * @amsdu_enabled: bitmap for per-TID AMSDU enablement
219 */
220struct iwl_tlc_update_notif {
221 u8 sta_id;
222 u8 reserved[3];
223 __le32 flags;
224 __le32 rate;
225 __le32 amsdu_size;
226 __le32 amsdu_enabled;
227} __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */
228
229
230#define IWL_MAX_MCS_DISPLAY_SIZE 12
231
232struct iwl_rate_mcs_info {
233 char mbps[IWL_MAX_MCS_DISPLAY_SIZE];
234 char mcs[IWL_MAX_MCS_DISPLAY_SIZE];
235};
236
237/*
238 * These serve as indexes into
239 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
240 * TODO: avoid overlap between legacy and HT rates
241 */
242enum {
243 IWL_RATE_1M_INDEX = 0,
244 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
245 IWL_RATE_2M_INDEX,
246 IWL_RATE_5M_INDEX,
247 IWL_RATE_11M_INDEX,
248 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
249 IWL_RATE_6M_INDEX,
250 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
251 IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
252 IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
253 IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
254 IWL_RATE_9M_INDEX,
255 IWL_RATE_12M_INDEX,
256 IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
257 IWL_RATE_18M_INDEX,
258 IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
259 IWL_RATE_24M_INDEX,
260 IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
261 IWL_RATE_36M_INDEX,
262 IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
263 IWL_RATE_48M_INDEX,
264 IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
265 IWL_RATE_54M_INDEX,
266 IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
267 IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
268 IWL_RATE_60M_INDEX,
269 IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
270 IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
271 IWL_RATE_MCS_8_INDEX,
272 IWL_RATE_MCS_9_INDEX,
273 IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
274 IWL_RATE_MCS_10_INDEX,
275 IWL_RATE_MCS_11_INDEX,
276 IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX,
277 IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
278 IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1,
279 IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
280 IWL_RATE_INVALID = IWL_RATE_COUNT,
281};
282
283#define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
284
285/* fw API values for legacy bit rates, both OFDM and CCK */
286enum {
287 IWL_RATE_6M_PLCP = 13,
288 IWL_RATE_9M_PLCP = 15,
289 IWL_RATE_12M_PLCP = 5,
290 IWL_RATE_18M_PLCP = 7,
291 IWL_RATE_24M_PLCP = 9,
292 IWL_RATE_36M_PLCP = 11,
293 IWL_RATE_48M_PLCP = 1,
294 IWL_RATE_54M_PLCP = 3,
295 IWL_RATE_1M_PLCP = 10,
296 IWL_RATE_2M_PLCP = 20,
297 IWL_RATE_5M_PLCP = 55,
298 IWL_RATE_11M_PLCP = 110,
299 IWL_RATE_INVM_PLCP = -1,
300};
301
302/*
303 * rate_n_flags bit fields version 1
304 *
305 * The 32-bit value has different layouts in the low 8 bites depending on the
306 * format. There are three formats, HT, VHT and legacy (11abg, with subformats
307 * for CCK and OFDM).
308 *
309 * High-throughput (HT) rate format
310 * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
311 * Very High-throughput (VHT) rate format
312 * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
313 * Legacy OFDM rate format for bits 7:0
314 * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
315 * Legacy CCK rate format for bits 7:0:
316 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
317 */
318
319/* Bit 8: (1) HT format, (0) legacy or VHT format */
320#define RATE_MCS_HT_POS 8
321#define RATE_MCS_HT_MSK_V1 BIT(RATE_MCS_HT_POS)
322
323/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
324#define RATE_MCS_CCK_POS_V1 9
325#define RATE_MCS_CCK_MSK_V1 BIT(RATE_MCS_CCK_POS_V1)
326
327/* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
328#define RATE_MCS_VHT_POS_V1 26
329#define RATE_MCS_VHT_MSK_V1 BIT(RATE_MCS_VHT_POS_V1)
330
331
332/*
333 * High-throughput (HT) rate format for bits 7:0
334 *
335 * 2-0: MCS rate base
336 * 0) 6 Mbps
337 * 1) 12 Mbps
338 * 2) 18 Mbps
339 * 3) 24 Mbps
340 * 4) 36 Mbps
341 * 5) 48 Mbps
342 * 6) 54 Mbps
343 * 7) 60 Mbps
344 * 4-3: 0) Single stream (SISO)
345 * 1) Dual stream (MIMO)
346 * 2) Triple stream (MIMO)
347 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
348 * (bits 7-6 are zero)
349 *
350 * Together the low 5 bits work out to the MCS index because we don't
351 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
352 * streams and 16-23 have three streams. We could also support MCS 32
353 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
354 */
355#define RATE_HT_MCS_RATE_CODE_MSK_V1 0x7
356#define RATE_HT_MCS_NSS_POS_V1 3
357#define RATE_HT_MCS_NSS_MSK_V1 (3 << RATE_HT_MCS_NSS_POS_V1)
358#define RATE_HT_MCS_MIMO2_MSK BIT(RATE_HT_MCS_NSS_POS_V1)
359
360/* Bit 10: (1) Use Green Field preamble */
361#define RATE_HT_MCS_GF_POS 10
362#define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS)
363
364#define RATE_HT_MCS_INDEX_MSK_V1 0x3f
365
366/*
367 * Very High-throughput (VHT) rate format for bits 7:0
368 *
369 * 3-0: VHT MCS (0-9)
370 * 5-4: number of streams - 1:
371 * 0) Single stream (SISO)
372 * 1) Dual stream (MIMO)
373 * 2) Triple stream (MIMO)
374 */
375
376/* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
377#define RATE_VHT_MCS_RATE_CODE_MSK 0xf
378
379/*
380 * Legacy OFDM rate format for bits 7:0
381 *
382 * 3-0: 0xD) 6 Mbps
383 * 0xF) 9 Mbps
384 * 0x5) 12 Mbps
385 * 0x7) 18 Mbps
386 * 0x9) 24 Mbps
387 * 0xB) 36 Mbps
388 * 0x1) 48 Mbps
389 * 0x3) 54 Mbps
390 * (bits 7-4 are 0)
391 *
392 * Legacy CCK rate format for bits 7:0:
393 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
394 *
395 * 6-0: 10) 1 Mbps
396 * 20) 2 Mbps
397 * 55) 5.5 Mbps
398 * 110) 11 Mbps
399 * (bit 7 is 0)
400 */
401#define RATE_LEGACY_RATE_MSK_V1 0xff
402
403/* Bit 10 - OFDM HE */
404#define RATE_MCS_HE_POS_V1 10
405#define RATE_MCS_HE_MSK_V1 BIT(RATE_MCS_HE_POS_V1)
406
407/*
408 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
409 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
410 */
411#define RATE_MCS_CHAN_WIDTH_POS 11
412#define RATE_MCS_CHAN_WIDTH_MSK_V1 (3 << RATE_MCS_CHAN_WIDTH_POS)
413
414/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
415#define RATE_MCS_SGI_POS_V1 13
416#define RATE_MCS_SGI_MSK_V1 BIT(RATE_MCS_SGI_POS_V1)
417
418/* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
419#define RATE_MCS_ANT_POS 14
420#define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS)
421#define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS)
422#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \
423 RATE_MCS_ANT_B_MSK)
424#define RATE_MCS_ANT_MSK RATE_MCS_ANT_AB_MSK
425
426/* Bit 17: (0) SS, (1) SS*2 */
427#define RATE_MCS_STBC_POS 17
428#define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS)
429
430/* Bit 18: OFDM-HE dual carrier mode */
431#define RATE_HE_DUAL_CARRIER_MODE 18
432#define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE)
433
434/* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
435#define RATE_MCS_BF_POS 19
436#define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS)
437
438/*
439 * Bit 20-21: HE LTF type and guard interval
440 * HE (ext) SU:
441 * 0 1xLTF+0.8us
442 * 1 2xLTF+0.8us
443 * 2 2xLTF+1.6us
444 * 3 & SGI (bit 13) clear 4xLTF+3.2us
445 * 3 & SGI (bit 13) set 4xLTF+0.8us
446 * HE MU:
447 * 0 4xLTF+0.8us
448 * 1 2xLTF+0.8us
449 * 2 2xLTF+1.6us
450 * 3 4xLTF+3.2us
451 * HE-EHT TRIG:
452 * 0 1xLTF+1.6us
453 * 1 2xLTF+1.6us
454 * 2 4xLTF+3.2us
455 * 3 (does not occur)
456 * EHT MU:
457 * 0 2xLTF+0.8us
458 * 1 2xLTF+1.6us
459 * 2 4xLTF+0.8us
460 * 3 4xLTF+3.2us
461 */
462#define RATE_MCS_HE_GI_LTF_POS 20
463#define RATE_MCS_HE_GI_LTF_MSK_V1 (3 << RATE_MCS_HE_GI_LTF_POS)
464
465/* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
466#define RATE_MCS_HE_TYPE_POS_V1 22
467#define RATE_MCS_HE_TYPE_SU_V1 (0 << RATE_MCS_HE_TYPE_POS_V1)
468#define RATE_MCS_HE_TYPE_EXT_SU_V1 BIT(RATE_MCS_HE_TYPE_POS_V1)
469#define RATE_MCS_HE_TYPE_MU_V1 (2 << RATE_MCS_HE_TYPE_POS_V1)
470#define RATE_MCS_HE_TYPE_TRIG_V1 (3 << RATE_MCS_HE_TYPE_POS_V1)
471#define RATE_MCS_HE_TYPE_MSK_V1 (3 << RATE_MCS_HE_TYPE_POS_V1)
472
473/* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
474#define RATE_MCS_DUP_POS_V1 24
475#define RATE_MCS_DUP_MSK_V1 (3 << RATE_MCS_DUP_POS_V1)
476
477/* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
478#define RATE_MCS_LDPC_POS_V1 27
479#define RATE_MCS_LDPC_MSK_V1 BIT(RATE_MCS_LDPC_POS_V1)
480
481/* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
482#define RATE_MCS_HE_106T_POS_V1 28
483#define RATE_MCS_HE_106T_MSK_V1 BIT(RATE_MCS_HE_106T_POS_V1)
484
485/* Bit 30-31: (1) RTS, (2) CTS */
486#define RATE_MCS_RTS_REQUIRED_POS (30)
487#define RATE_MCS_RTS_REQUIRED_MSK (0x1 << RATE_MCS_RTS_REQUIRED_POS)
488
489#define RATE_MCS_CTS_REQUIRED_POS (31)
490#define RATE_MCS_CTS_REQUIRED_MSK (0x1 << RATE_MCS_CTS_REQUIRED_POS)
491
492/* rate_n_flags bit field version 2
493 *
494 * The 32-bit value has different layouts in the low 8 bits depending on the
495 * format. There are three formats, HT, VHT and legacy (11abg, with subformats
496 * for CCK and OFDM).
497 *
498 */
499
500/* Bits 10-8: rate format
501 * (0) Legacy CCK (1) Legacy OFDM (2) High-throughput (HT)
502 * (3) Very High-throughput (VHT) (4) High-efficiency (HE)
503 * (5) Extremely High-throughput (EHT)
504 */
505#define RATE_MCS_MOD_TYPE_POS 8
506#define RATE_MCS_MOD_TYPE_MSK (0x7 << RATE_MCS_MOD_TYPE_POS)
507#define RATE_MCS_CCK_MSK (0 << RATE_MCS_MOD_TYPE_POS)
508#define RATE_MCS_LEGACY_OFDM_MSK (1 << RATE_MCS_MOD_TYPE_POS)
509#define RATE_MCS_HT_MSK (2 << RATE_MCS_MOD_TYPE_POS)
510#define RATE_MCS_VHT_MSK (3 << RATE_MCS_MOD_TYPE_POS)
511#define RATE_MCS_HE_MSK (4 << RATE_MCS_MOD_TYPE_POS)
512#define RATE_MCS_EHT_MSK (5 << RATE_MCS_MOD_TYPE_POS)
513
514/*
515 * Legacy CCK rate format for bits 0:3:
516 *
517 * (0) 0xa - 1 Mbps
518 * (1) 0x14 - 2 Mbps
519 * (2) 0x37 - 5.5 Mbps
520 * (3) 0x6e - 11 nbps
521 *
522 * Legacy OFDM rate format for bis 3:0:
523 *
524 * (0) 6 Mbps
525 * (1) 9 Mbps
526 * (2) 12 Mbps
527 * (3) 18 Mbps
528 * (4) 24 Mbps
529 * (5) 36 Mbps
530 * (6) 48 Mbps
531 * (7) 54 Mbps
532 *
533 */
534#define RATE_LEGACY_RATE_MSK 0x7
535
536/*
537 * HT, VHT, HE, EHT rate format for bits 3:0
538 * 3-0: MCS
539 *
540 */
541#define RATE_HT_MCS_CODE_MSK 0x7
542#define RATE_MCS_NSS_POS 4
543#define RATE_MCS_NSS_MSK (1 << RATE_MCS_NSS_POS)
544#define RATE_MCS_CODE_MSK 0xf
545#define RATE_HT_MCS_INDEX(r) ((((r) & RATE_MCS_NSS_MSK) >> 1) | \
546 ((r) & RATE_HT_MCS_CODE_MSK))
547
548/* Bits 7-5: reserved */
549
550/*
551 * Bits 13-11: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz, (4) 320MHz
552 */
553#define RATE_MCS_CHAN_WIDTH_MSK (0x7 << RATE_MCS_CHAN_WIDTH_POS)
554#define RATE_MCS_CHAN_WIDTH_20_VAL 0
555#define RATE_MCS_CHAN_WIDTH_20 (RATE_MCS_CHAN_WIDTH_20_VAL << RATE_MCS_CHAN_WIDTH_POS)
556#define RATE_MCS_CHAN_WIDTH_40_VAL 1
557#define RATE_MCS_CHAN_WIDTH_40 (RATE_MCS_CHAN_WIDTH_40_VAL << RATE_MCS_CHAN_WIDTH_POS)
558#define RATE_MCS_CHAN_WIDTH_80_VAL 2
559#define RATE_MCS_CHAN_WIDTH_80 (RATE_MCS_CHAN_WIDTH_80_VAL << RATE_MCS_CHAN_WIDTH_POS)
560#define RATE_MCS_CHAN_WIDTH_160_VAL 3
561#define RATE_MCS_CHAN_WIDTH_160 (RATE_MCS_CHAN_WIDTH_160_VAL << RATE_MCS_CHAN_WIDTH_POS)
562#define RATE_MCS_CHAN_WIDTH_320_VAL 4
563#define RATE_MCS_CHAN_WIDTH_320 (RATE_MCS_CHAN_WIDTH_320_VAL << RATE_MCS_CHAN_WIDTH_POS)
564
565/* Bit 15-14: Antenna selection:
566 * Bit 14: Ant A active
567 * Bit 15: Ant B active
568 *
569 * All relevant definitions are same as in v1
570 */
571
572/* Bit 16 (1) LDPC enables, (0) LDPC disabled */
573#define RATE_MCS_LDPC_POS 16
574#define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS)
575
576/* Bit 17: (0) SS, (1) SS*2 (same as v1) */
577
578/* Bit 18: OFDM-HE dual carrier mode (same as v1) */
579
580/* Bit 19: (0) Beamforming is off, (1) Beamforming is on (same as v1) */
581
582/*
583 * Bit 22-20: HE LTF type and guard interval
584 * CCK:
585 * 0 long preamble
586 * 1 short preamble
587 * HT/VHT:
588 * 0 0.8us
589 * 1 0.4us
590 * HE (ext) SU:
591 * 0 1xLTF+0.8us
592 * 1 2xLTF+0.8us
593 * 2 2xLTF+1.6us
594 * 3 4xLTF+3.2us
595 * 4 4xLTF+0.8us
596 * HE MU:
597 * 0 4xLTF+0.8us
598 * 1 2xLTF+0.8us
599 * 2 2xLTF+1.6us
600 * 3 4xLTF+3.2us
601 * HE TRIG:
602 * 0 1xLTF+1.6us
603 * 1 2xLTF+1.6us
604 * 2 4xLTF+3.2us
605 * */
606#define RATE_MCS_HE_GI_LTF_MSK (0x7 << RATE_MCS_HE_GI_LTF_POS)
607#define RATE_MCS_SGI_POS RATE_MCS_HE_GI_LTF_POS
608#define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS)
609#define RATE_MCS_HE_SU_4_LTF 3
610#define RATE_MCS_HE_SU_4_LTF_08_GI 4
611
612/* Bit 24-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
613#define RATE_MCS_HE_TYPE_POS 23
614#define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS)
615#define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS)
616#define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS)
617#define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS)
618#define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS)
619
620/* Bit 25: duplicate channel enabled
621 *
622 * if this bit is set, duplicate is according to BW (bits 11-13):
623 *
624 * CCK: 2x 20MHz
625 * OFDM Legacy: N x 20Mhz, (N = BW \ 2 , either 2, 4, 8, 16)
626 * EHT: 2 x BW/2, (80 - 2x40, 160 - 2x80, 320 - 2x160)
627 * */
628#define RATE_MCS_DUP_POS 25
629#define RATE_MCS_DUP_MSK (1 << RATE_MCS_DUP_POS)
630
631/* Bit 26: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
632#define RATE_MCS_HE_106T_POS 26
633#define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS)
634
635/* Bit 27: EHT extra LTF:
636 * instead of 1 LTF for SISO use 2 LTFs,
637 * instead of 2 LTFs for NSTS=2 use 4 LTFs*/
638#define RATE_MCS_EHT_EXTRA_LTF_POS 27
639#define RATE_MCS_EHT_EXTRA_LTF_MSK (1 << RATE_MCS_EHT_EXTRA_LTF_POS)
640
641/* Bit 31-28: reserved */
642
643/* Link Quality definitions */
644
645/* # entries in rate scale table to support Tx retries */
646#define LQ_MAX_RETRY_NUM 16
647
648/* Link quality command flags bit fields */
649
650/* Bit 0: (0) Don't use RTS (1) Use RTS */
651#define LQ_FLAG_USE_RTS_POS 0
652#define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS)
653
654/* Bit 1-3: LQ command color. Used to match responses to LQ commands */
655#define LQ_FLAG_COLOR_POS 1
656#define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS)
657#define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\
658 LQ_FLAG_COLOR_POS)
659#define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\
660 LQ_FLAG_COLOR_MSK)
661#define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK))
662
663/* Bit 4-5: Tx RTS BW Signalling
664 * (0) No RTS BW signalling
665 * (1) Static BW signalling
666 * (2) Dynamic BW signalling
667 */
668#define LQ_FLAG_RTS_BW_SIG_POS 4
669#define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS)
670#define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS)
671#define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS)
672
673/* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
674 * Dyanmic BW selection allows Tx with narrower BW then requested in rates
675 */
676#define LQ_FLAG_DYNAMIC_BW_POS 6
677#define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS)
678
679/* Single Stream Tx Parameters (lq_cmd->ss_params)
680 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be
681 * used for single stream Tx.
682 */
683
684/* Bit 0-1: Max STBC streams allowed. Can be 0-3.
685 * (0) - No STBC allowed
686 * (1) - 2x1 STBC allowed (HT/VHT)
687 * (2) - 4x2 STBC allowed (HT/VHT)
688 * (3) - 3x2 STBC allowed (HT only)
689 * All our chips are at most 2 antennas so only (1) is valid for now.
690 */
691#define LQ_SS_STBC_ALLOWED_POS 0
692#define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK)
693
694/* 2x1 STBC is allowed */
695#define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS)
696
697/* Bit 2: Beamformer (VHT only) is allowed */
698#define LQ_SS_BFER_ALLOWED_POS 2
699#define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS)
700
701/* Bit 3: Force BFER or STBC for testing
702 * If this is set:
703 * If BFER is allowed then force the ucode to choose BFER else
704 * If STBC is allowed then force the ucode to choose STBC over SISO
705 */
706#define LQ_SS_FORCE_POS 3
707#define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS)
708
709/* Bit 31: ss_params field is valid. Used for FW backward compatibility
710 * with other drivers which don't support the ss_params API yet
711 */
712#define LQ_SS_PARAMS_VALID_POS 31
713#define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS)
714
715/**
716 * struct iwl_lq_cmd - link quality command
717 * @sta_id: station to update
718 * @reduced_tpc: reduced transmit power control value
719 * @control: not used
720 * @flags: combination of LQ_FLAG_*
721 * @mimo_delim: the first SISO index in rs_table, which separates MIMO
722 * and SISO rates
723 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
724 * Should be ANT_[ABC]
725 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
726 * @initial_rate_index: first index from rs_table per AC category
727 * @agg_time_limit: aggregation max time threshold in usec/100, meaning
728 * value of 100 is one usec. Range is 100 to 8000
729 * @agg_disable_start_th: try-count threshold for starting aggregation.
730 * If a frame has higher try-count, it should not be selected for
731 * starting an aggregation sequence.
732 * @agg_frame_cnt_limit: max frame count in an aggregation.
733 * 0: no limit
734 * 1: no aggregation (one frame per aggregation)
735 * 2 - 0x3f: maximal number of frames (up to 3f == 63)
736 * @reserved2: reserved
737 * @rs_table: array of rates for each TX try, each is rate_n_flags,
738 * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
739 * @ss_params: single stream features. declare whether STBC or BFER are allowed.
740 */
741struct iwl_lq_cmd {
742 u8 sta_id;
743 u8 reduced_tpc;
744 __le16 control;
745 /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
746 u8 flags;
747 u8 mimo_delim;
748 u8 single_stream_ant_msk;
749 u8 dual_stream_ant_msk;
750 u8 initial_rate_index[AC_NUM];
751 /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
752 __le16 agg_time_limit;
753 u8 agg_disable_start_th;
754 u8 agg_frame_cnt_limit;
755 __le32 reserved2;
756 __le32 rs_table[LQ_MAX_RETRY_NUM];
757 __le32 ss_params;
758}; /* LINK_QUALITY_CMD_API_S_VER_1 */
759
760u8 iwl_fw_rate_idx_to_plcp(int idx);
761u32 iwl_new_rate_from_v1(u32 rate_v1);
762const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx);
763const char *iwl_rs_pretty_ant(u8 ant);
764const char *iwl_rs_pretty_bw(int bw);
765int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate);
766bool iwl_he_is_sgi(u32 rate_n_flags);
767
768#endif /* __iwl_fw_api_rs_h__ */
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2017 Intel Deutschland GmbH
10 * Copyright(c) 2018 - 2019 Intel Corporation
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called COPYING.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <linuxwifi@intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 * BSD LICENSE
29 *
30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
31 * Copyright(c) 2017 Intel Deutschland GmbH
32 * Copyright(c) 2018 - 2019 Intel Corporation
33 * All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
37 * are met:
38 *
39 * * Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * * Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in
43 * the documentation and/or other materials provided with the
44 * distribution.
45 * * Neither the name Intel Corporation nor the names of its
46 * contributors may be used to endorse or promote products derived
47 * from this software without specific prior written permission.
48 *
49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
50 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
51 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
52 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
53 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
54 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
55 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60 *****************************************************************************/
61
62#ifndef __iwl_fw_api_rs_h__
63#define __iwl_fw_api_rs_h__
64
65#include "mac.h"
66
67/**
68 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags
69 * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for
70 * bandwidths <= 80MHz
71 * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC
72 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
73 * bandwidth
74 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation
75 * for BPSK (MCS 0) with 1 spatial
76 * stream
77 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation
78 * for BPSK (MCS 0) with 2 spatial
79 * streams
80 */
81enum iwl_tlc_mng_cfg_flags {
82 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0),
83 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1),
84 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2),
85 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3),
86 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4),
87};
88
89/**
90 * enum iwl_tlc_mng_cfg_cw - channel width options
91 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
92 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
93 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
94 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
95 * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value
96 */
97enum iwl_tlc_mng_cfg_cw {
98 IWL_TLC_MNG_CH_WIDTH_20MHZ,
99 IWL_TLC_MNG_CH_WIDTH_40MHZ,
100 IWL_TLC_MNG_CH_WIDTH_80MHZ,
101 IWL_TLC_MNG_CH_WIDTH_160MHZ,
102 IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ,
103};
104
105/**
106 * enum iwl_tlc_mng_cfg_chains - possible chains
107 * @IWL_TLC_MNG_CHAIN_A_MSK: chain A
108 * @IWL_TLC_MNG_CHAIN_B_MSK: chain B
109 */
110enum iwl_tlc_mng_cfg_chains {
111 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0),
112 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1),
113};
114
115/**
116 * enum iwl_tlc_mng_cfg_mode - supported modes
117 * @IWL_TLC_MNG_MODE_CCK: enable CCK
118 * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT)
119 * @IWL_TLC_MNG_MODE_NON_HT: enable non HT
120 * @IWL_TLC_MNG_MODE_HT: enable HT
121 * @IWL_TLC_MNG_MODE_VHT: enable VHT
122 * @IWL_TLC_MNG_MODE_HE: enable HE
123 * @IWL_TLC_MNG_MODE_INVALID: invalid value
124 * @IWL_TLC_MNG_MODE_NUM: a count of possible modes
125 */
126enum iwl_tlc_mng_cfg_mode {
127 IWL_TLC_MNG_MODE_CCK = 0,
128 IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK,
129 IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK,
130 IWL_TLC_MNG_MODE_HT,
131 IWL_TLC_MNG_MODE_VHT,
132 IWL_TLC_MNG_MODE_HE,
133 IWL_TLC_MNG_MODE_INVALID,
134 IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID,
135};
136
137/**
138 * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates
139 * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0
140 * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1
141 * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2
142 * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3
143 * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4
144 * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5
145 * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6
146 * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7
147 * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8
148 * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9
149 * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10
150 * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11
151 * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT
152 */
153enum iwl_tlc_mng_ht_rates {
154 IWL_TLC_MNG_HT_RATE_MCS0 = 0,
155 IWL_TLC_MNG_HT_RATE_MCS1,
156 IWL_TLC_MNG_HT_RATE_MCS2,
157 IWL_TLC_MNG_HT_RATE_MCS3,
158 IWL_TLC_MNG_HT_RATE_MCS4,
159 IWL_TLC_MNG_HT_RATE_MCS5,
160 IWL_TLC_MNG_HT_RATE_MCS6,
161 IWL_TLC_MNG_HT_RATE_MCS7,
162 IWL_TLC_MNG_HT_RATE_MCS8,
163 IWL_TLC_MNG_HT_RATE_MCS9,
164 IWL_TLC_MNG_HT_RATE_MCS10,
165 IWL_TLC_MNG_HT_RATE_MCS11,
166 IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11,
167};
168
169enum IWL_TLC_MNG_NSS {
170 IWL_TLC_NSS_1,
171 IWL_TLC_NSS_2,
172 IWL_TLC_NSS_MAX
173};
174
175enum IWL_TLC_HT_BW_RATES {
176 IWL_TLC_HT_BW_NONE_160,
177 IWL_TLC_HT_BW_160,
178};
179
180/**
181 * struct tlc_config_cmd - TLC configuration
182 * @sta_id: station id
183 * @reserved1: reserved
184 * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw
185 * @mode: &enum iwl_tlc_mng_cfg_mode
186 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains
187 * @amsdu: TX amsdu is supported
188 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags
189 * @non_ht_rates: bitmap of supported legacy rates
190 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width>
191 * pair (0 - 80mhz width and below, 1 - 160mhz).
192 * @max_mpdu_len: max MPDU length, in bytes
193 * @sgi_ch_width_supp: bitmap of SGI support per channel width
194 * use BIT(@enum iwl_tlc_mng_cfg_cw)
195 * @reserved2: reserved
196 */
197struct iwl_tlc_config_cmd {
198 u8 sta_id;
199 u8 reserved1[3];
200 u8 max_ch_width;
201 u8 mode;
202 u8 chains;
203 u8 amsdu;
204 __le16 flags;
205 __le16 non_ht_rates;
206 __le16 ht_rates[IWL_TLC_NSS_MAX][2];
207 __le16 max_mpdu_len;
208 u8 sgi_ch_width_supp;
209 u8 reserved2[1];
210} __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_2 */
211
212/**
213 * enum iwl_tlc_update_flags - updated fields
214 * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update
215 * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update
216 */
217enum iwl_tlc_update_flags {
218 IWL_TLC_NOTIF_FLAG_RATE = BIT(0),
219 IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1),
220};
221
222/**
223 * struct iwl_tlc_update_notif - TLC notification from FW
224 * @sta_id: station id
225 * @reserved: reserved
226 * @flags: bitmap of notifications reported
227 * @rate: current initial rate
228 * @amsdu_size: Max AMSDU size, in bytes
229 * @amsdu_enabled: bitmap for per-TID AMSDU enablement
230 */
231struct iwl_tlc_update_notif {
232 u8 sta_id;
233 u8 reserved[3];
234 __le32 flags;
235 __le32 rate;
236 __le32 amsdu_size;
237 __le32 amsdu_enabled;
238} __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */
239
240/*
241 * These serve as indexes into
242 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
243 * TODO: avoid overlap between legacy and HT rates
244 */
245enum {
246 IWL_RATE_1M_INDEX = 0,
247 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
248 IWL_RATE_2M_INDEX,
249 IWL_RATE_5M_INDEX,
250 IWL_RATE_11M_INDEX,
251 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
252 IWL_RATE_6M_INDEX,
253 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
254 IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
255 IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
256 IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
257 IWL_RATE_9M_INDEX,
258 IWL_RATE_12M_INDEX,
259 IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
260 IWL_RATE_18M_INDEX,
261 IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
262 IWL_RATE_24M_INDEX,
263 IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
264 IWL_RATE_36M_INDEX,
265 IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
266 IWL_RATE_48M_INDEX,
267 IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
268 IWL_RATE_54M_INDEX,
269 IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
270 IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
271 IWL_RATE_60M_INDEX,
272 IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
273 IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
274 IWL_RATE_MCS_8_INDEX,
275 IWL_RATE_MCS_9_INDEX,
276 IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
277 IWL_RATE_MCS_10_INDEX,
278 IWL_RATE_MCS_11_INDEX,
279 IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX,
280 IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
281 IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1,
282};
283
284#define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
285
286/* fw API values for legacy bit rates, both OFDM and CCK */
287enum {
288 IWL_RATE_6M_PLCP = 13,
289 IWL_RATE_9M_PLCP = 15,
290 IWL_RATE_12M_PLCP = 5,
291 IWL_RATE_18M_PLCP = 7,
292 IWL_RATE_24M_PLCP = 9,
293 IWL_RATE_36M_PLCP = 11,
294 IWL_RATE_48M_PLCP = 1,
295 IWL_RATE_54M_PLCP = 3,
296 IWL_RATE_1M_PLCP = 10,
297 IWL_RATE_2M_PLCP = 20,
298 IWL_RATE_5M_PLCP = 55,
299 IWL_RATE_11M_PLCP = 110,
300 IWL_RATE_INVM_PLCP = -1,
301};
302
303/*
304 * rate_n_flags bit fields
305 *
306 * The 32-bit value has different layouts in the low 8 bites depending on the
307 * format. There are three formats, HT, VHT and legacy (11abg, with subformats
308 * for CCK and OFDM).
309 *
310 * High-throughput (HT) rate format
311 * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
312 * Very High-throughput (VHT) rate format
313 * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
314 * Legacy OFDM rate format for bits 7:0
315 * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
316 * Legacy CCK rate format for bits 7:0:
317 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
318 */
319
320/* Bit 8: (1) HT format, (0) legacy or VHT format */
321#define RATE_MCS_HT_POS 8
322#define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS)
323
324/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
325#define RATE_MCS_CCK_POS 9
326#define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS)
327
328/* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
329#define RATE_MCS_VHT_POS 26
330#define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS)
331
332
333/*
334 * High-throughput (HT) rate format for bits 7:0
335 *
336 * 2-0: MCS rate base
337 * 0) 6 Mbps
338 * 1) 12 Mbps
339 * 2) 18 Mbps
340 * 3) 24 Mbps
341 * 4) 36 Mbps
342 * 5) 48 Mbps
343 * 6) 54 Mbps
344 * 7) 60 Mbps
345 * 4-3: 0) Single stream (SISO)
346 * 1) Dual stream (MIMO)
347 * 2) Triple stream (MIMO)
348 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
349 * (bits 7-6 are zero)
350 *
351 * Together the low 5 bits work out to the MCS index because we don't
352 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
353 * streams and 16-23 have three streams. We could also support MCS 32
354 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
355 */
356#define RATE_HT_MCS_RATE_CODE_MSK 0x7
357#define RATE_HT_MCS_NSS_POS 3
358#define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS)
359
360/* Bit 10: (1) Use Green Field preamble */
361#define RATE_HT_MCS_GF_POS 10
362#define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS)
363
364#define RATE_HT_MCS_INDEX_MSK 0x3f
365
366/*
367 * Very High-throughput (VHT) rate format for bits 7:0
368 *
369 * 3-0: VHT MCS (0-9)
370 * 5-4: number of streams - 1:
371 * 0) Single stream (SISO)
372 * 1) Dual stream (MIMO)
373 * 2) Triple stream (MIMO)
374 */
375
376/* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
377#define RATE_VHT_MCS_RATE_CODE_MSK 0xf
378#define RATE_VHT_MCS_NSS_POS 4
379#define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS)
380
381/*
382 * Legacy OFDM rate format for bits 7:0
383 *
384 * 3-0: 0xD) 6 Mbps
385 * 0xF) 9 Mbps
386 * 0x5) 12 Mbps
387 * 0x7) 18 Mbps
388 * 0x9) 24 Mbps
389 * 0xB) 36 Mbps
390 * 0x1) 48 Mbps
391 * 0x3) 54 Mbps
392 * (bits 7-4 are 0)
393 *
394 * Legacy CCK rate format for bits 7:0:
395 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
396 *
397 * 6-0: 10) 1 Mbps
398 * 20) 2 Mbps
399 * 55) 5.5 Mbps
400 * 110) 11 Mbps
401 * (bit 7 is 0)
402 */
403#define RATE_LEGACY_RATE_MSK 0xff
404
405/* Bit 10 - OFDM HE */
406#define RATE_MCS_HE_POS 10
407#define RATE_MCS_HE_MSK BIT(RATE_MCS_HE_POS)
408
409/*
410 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
411 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
412 */
413#define RATE_MCS_CHAN_WIDTH_POS 11
414#define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS)
415#define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS)
416#define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS)
417#define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS)
418#define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS)
419
420/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
421#define RATE_MCS_SGI_POS 13
422#define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS)
423
424/* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
425#define RATE_MCS_ANT_POS 14
426#define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS)
427#define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS)
428#define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS)
429#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \
430 RATE_MCS_ANT_B_MSK)
431#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \
432 RATE_MCS_ANT_C_MSK)
433#define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK
434
435/* Bit 17: (0) SS, (1) SS*2 */
436#define RATE_MCS_STBC_POS 17
437#define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS)
438
439/* Bit 18: OFDM-HE dual carrier mode */
440#define RATE_HE_DUAL_CARRIER_MODE 18
441#define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE)
442
443/* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
444#define RATE_MCS_BF_POS 19
445#define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS)
446
447/*
448 * Bit 20-21: HE LTF type and guard interval
449 * HE (ext) SU:
450 * 0 1xLTF+0.8us
451 * 1 2xLTF+0.8us
452 * 2 2xLTF+1.6us
453 * 3 & SGI (bit 13) clear 4xLTF+3.2us
454 * 3 & SGI (bit 13) set 4xLTF+0.8us
455 * HE MU:
456 * 0 4xLTF+0.8us
457 * 1 2xLTF+0.8us
458 * 2 2xLTF+1.6us
459 * 3 4xLTF+3.2us
460 * HE TRIG:
461 * 0 1xLTF+1.6us
462 * 1 2xLTF+1.6us
463 * 2 4xLTF+3.2us
464 * 3 (does not occur)
465 */
466#define RATE_MCS_HE_GI_LTF_POS 20
467#define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS)
468
469/* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
470#define RATE_MCS_HE_TYPE_POS 22
471#define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS)
472#define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS)
473#define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS)
474#define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS)
475#define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS)
476
477/* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
478#define RATE_MCS_DUP_POS 24
479#define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS)
480
481/* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
482#define RATE_MCS_LDPC_POS 27
483#define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS)
484
485/* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
486#define RATE_MCS_HE_106T_POS 28
487#define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS)
488
489/* Link Quality definitions */
490
491/* # entries in rate scale table to support Tx retries */
492#define LQ_MAX_RETRY_NUM 16
493
494/* Link quality command flags bit fields */
495
496/* Bit 0: (0) Don't use RTS (1) Use RTS */
497#define LQ_FLAG_USE_RTS_POS 0
498#define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS)
499
500/* Bit 1-3: LQ command color. Used to match responses to LQ commands */
501#define LQ_FLAG_COLOR_POS 1
502#define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS)
503#define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\
504 LQ_FLAG_COLOR_POS)
505#define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\
506 LQ_FLAG_COLOR_MSK)
507#define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK))
508
509/* Bit 4-5: Tx RTS BW Signalling
510 * (0) No RTS BW signalling
511 * (1) Static BW signalling
512 * (2) Dynamic BW signalling
513 */
514#define LQ_FLAG_RTS_BW_SIG_POS 4
515#define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS)
516#define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS)
517#define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS)
518
519/* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
520 * Dyanmic BW selection allows Tx with narrower BW then requested in rates
521 */
522#define LQ_FLAG_DYNAMIC_BW_POS 6
523#define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS)
524
525/* Single Stream Tx Parameters (lq_cmd->ss_params)
526 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be
527 * used for single stream Tx.
528 */
529
530/* Bit 0-1: Max STBC streams allowed. Can be 0-3.
531 * (0) - No STBC allowed
532 * (1) - 2x1 STBC allowed (HT/VHT)
533 * (2) - 4x2 STBC allowed (HT/VHT)
534 * (3) - 3x2 STBC allowed (HT only)
535 * All our chips are at most 2 antennas so only (1) is valid for now.
536 */
537#define LQ_SS_STBC_ALLOWED_POS 0
538#define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK)
539
540/* 2x1 STBC is allowed */
541#define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS)
542
543/* Bit 2: Beamformer (VHT only) is allowed */
544#define LQ_SS_BFER_ALLOWED_POS 2
545#define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS)
546
547/* Bit 3: Force BFER or STBC for testing
548 * If this is set:
549 * If BFER is allowed then force the ucode to choose BFER else
550 * If STBC is allowed then force the ucode to choose STBC over SISO
551 */
552#define LQ_SS_FORCE_POS 3
553#define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS)
554
555/* Bit 31: ss_params field is valid. Used for FW backward compatibility
556 * with other drivers which don't support the ss_params API yet
557 */
558#define LQ_SS_PARAMS_VALID_POS 31
559#define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS)
560
561/**
562 * struct iwl_lq_cmd - link quality command
563 * @sta_id: station to update
564 * @reduced_tpc: reduced transmit power control value
565 * @control: not used
566 * @flags: combination of LQ_FLAG_*
567 * @mimo_delim: the first SISO index in rs_table, which separates MIMO
568 * and SISO rates
569 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
570 * Should be ANT_[ABC]
571 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
572 * @initial_rate_index: first index from rs_table per AC category
573 * @agg_time_limit: aggregation max time threshold in usec/100, meaning
574 * value of 100 is one usec. Range is 100 to 8000
575 * @agg_disable_start_th: try-count threshold for starting aggregation.
576 * If a frame has higher try-count, it should not be selected for
577 * starting an aggregation sequence.
578 * @agg_frame_cnt_limit: max frame count in an aggregation.
579 * 0: no limit
580 * 1: no aggregation (one frame per aggregation)
581 * 2 - 0x3f: maximal number of frames (up to 3f == 63)
582 * @reserved2: reserved
583 * @rs_table: array of rates for each TX try, each is rate_n_flags,
584 * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
585 * @ss_params: single stream features. declare whether STBC or BFER are allowed.
586 */
587struct iwl_lq_cmd {
588 u8 sta_id;
589 u8 reduced_tpc;
590 __le16 control;
591 /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
592 u8 flags;
593 u8 mimo_delim;
594 u8 single_stream_ant_msk;
595 u8 dual_stream_ant_msk;
596 u8 initial_rate_index[AC_NUM];
597 /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
598 __le16 agg_time_limit;
599 u8 agg_disable_start_th;
600 u8 agg_frame_cnt_limit;
601 __le32 reserved2;
602 __le32 rs_table[LQ_MAX_RETRY_NUM];
603 __le32 ss_params;
604}; /* LINK_QUALITY_CMD_API_S_VER_1 */
605
606#endif /* __iwl_fw_api_rs_h__ */