1// SPDX-License-Identifier: GPL-2.0
  2/* Qualcomm IPQ8064 MDIO interface driver
  3 *
  4 * Copyright (C) 2019 Christian Lamparter <chunkeey@gmail.com>
  5 * Copyright (C) 2020 Ansuel Smith <ansuelsmth@gmail.com>
  6 */
  7
  8#include <linux/delay.h>
  9#include <linux/kernel.h>
 10#include <linux/module.h>
 11#include <linux/of_mdio.h>
 12#include <linux/of_address.h>
 13#include <linux/platform_device.h>
 14#include <linux/regmap.h>
 15
 16/* MII address register definitions */
 17#define MII_ADDR_REG_ADDR			0x10
 18#define MII_BUSY				BIT(0)
 19#define MII_WRITE				BIT(1)
 20#define MII_CLKRANGE(x)				((x) << 2)
 21#define MII_CLKRANGE_60_100M			MII_CLKRANGE(0)
 22#define MII_CLKRANGE_100_150M			MII_CLKRANGE(1)
 23#define MII_CLKRANGE_20_35M			MII_CLKRANGE(2)
 24#define MII_CLKRANGE_35_60M			MII_CLKRANGE(3)
 25#define MII_CLKRANGE_150_250M			MII_CLKRANGE(4)
 26#define MII_CLKRANGE_250_300M			MII_CLKRANGE(5)
 27#define MII_CLKRANGE_MASK			GENMASK(4, 2)
 28#define MII_REG_SHIFT				6
 29#define MII_REG_MASK				GENMASK(10, 6)
 30#define MII_ADDR_SHIFT				11
 31#define MII_ADDR_MASK				GENMASK(15, 11)
 32
 33#define MII_DATA_REG_ADDR			0x14
 34
 35#define MII_MDIO_DELAY_USEC			(1000)
 36#define MII_MDIO_RETRY_MSEC			(10)
 37
 38struct ipq8064_mdio {
 39	struct regmap *base; /* NSS_GMAC0_BASE */
 40};
 41
 42static int
 43ipq8064_mdio_wait_busy(struct ipq8064_mdio *priv)
 44{
 45	u32 busy;
 46
 47	return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy,
 48					!(busy & MII_BUSY), MII_MDIO_DELAY_USEC,
 49					MII_MDIO_RETRY_MSEC * USEC_PER_MSEC);
 50}
 51
 52static int
 53ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset)
 54{
 55	u32 miiaddr = MII_BUSY | MII_CLKRANGE_250_300M;
 56	struct ipq8064_mdio *priv = bus->priv;
 57	u32 ret_val;
 58	int err;
 59
 60	miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
 61		   ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
 62
 63	regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
 64	usleep_range(10, 13);
 65
 66	err = ipq8064_mdio_wait_busy(priv);
 67	if (err)
 68		return err;
 69
 70	regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val);
 71	return (int)ret_val;
 72}
 73
 74static int
 75ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data)
 76{
 77	u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M;
 78	struct ipq8064_mdio *priv = bus->priv;
 79
 80	regmap_write(priv->base, MII_DATA_REG_ADDR, data);
 81
 82	miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
 83		   ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
 84
 85	regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
 86
 87	/* For the specific reg 31 extra time is needed or the next
 88	 * read will produce garbage data.
 89	 */
 90	if (reg_offset == 31)
 91		usleep_range(30, 43);
 92	else
 93		usleep_range(10, 13);
 94
 95	return ipq8064_mdio_wait_busy(priv);
 96}
 97
 98static const struct regmap_config ipq8064_mdio_regmap_config = {
 99	.reg_bits = 32,
100	.reg_stride = 4,
101	.val_bits = 32,
102	.can_multi_write = false,
103	/* the mdio lock is used by any user of this mdio driver */
104	.disable_locking = true,
105
106	.cache_type = REGCACHE_NONE,
107};
108
109static int
110ipq8064_mdio_probe(struct platform_device *pdev)
111{
112	struct device_node *np = pdev->dev.of_node;
113	struct ipq8064_mdio *priv;
114	struct resource res;
115	struct mii_bus *bus;
116	void __iomem *base;
117	int ret;
118
119	if (of_address_to_resource(np, 0, &res))
120		return -ENOMEM;
121
122	base = devm_ioremap(&pdev->dev, res.start, resource_size(&res));
123	if (!base)
124		return -ENOMEM;
125
126	bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv));
127	if (!bus)
128		return -ENOMEM;
129
130	bus->name = "ipq8064_mdio_bus";
131	bus->read = ipq8064_mdio_read;
132	bus->write = ipq8064_mdio_write;
133	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
134	bus->parent = &pdev->dev;
135
136	priv = bus->priv;
137	priv->base = devm_regmap_init_mmio(&pdev->dev, base,
138					   &ipq8064_mdio_regmap_config);
139	if (IS_ERR(priv->base))
140		return PTR_ERR(priv->base);
141
142	ret = of_mdiobus_register(bus, np);
143	if (ret)
144		return ret;
145
146	platform_set_drvdata(pdev, bus);
147	return 0;
148}
149
150static void ipq8064_mdio_remove(struct platform_device *pdev)
151{
152	struct mii_bus *bus = platform_get_drvdata(pdev);
153
154	mdiobus_unregister(bus);
155}
156
157static const struct of_device_id ipq8064_mdio_dt_ids[] = {
158	{ .compatible = "qcom,ipq8064-mdio" },
159	{ }
160};
161MODULE_DEVICE_TABLE(of, ipq8064_mdio_dt_ids);
162
163static struct platform_driver ipq8064_mdio_driver = {
164	.probe = ipq8064_mdio_probe,
165	.remove_new = ipq8064_mdio_remove,
166	.driver = {
167		.name = "ipq8064-mdio",
168		.of_match_table = ipq8064_mdio_dt_ids,
169	},
170};
171
172module_platform_driver(ipq8064_mdio_driver);
173
174MODULE_DESCRIPTION("Qualcomm IPQ8064 MDIO interface driver");
175MODULE_AUTHOR("Christian Lamparter <chunkeey@gmail.com>");
176MODULE_AUTHOR("Ansuel Smith <ansuelsmth@gmail.com>");
177MODULE_LICENSE("GPL");