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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2018 Intel Corporation. */
3
4#include <linux/bpf_trace.h>
5#include <net/xdp_sock_drv.h>
6#include <net/xdp.h>
7
8#include "ixgbe.h"
9#include "ixgbe_txrx_common.h"
10
11struct xsk_buff_pool *ixgbe_xsk_pool(struct ixgbe_adapter *adapter,
12 struct ixgbe_ring *ring)
13{
14 bool xdp_on = READ_ONCE(adapter->xdp_prog);
15 int qid = ring->ring_idx;
16
17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps))
18 return NULL;
19
20 return xsk_get_pool_from_qid(adapter->netdev, qid);
21}
22
23static int ixgbe_xsk_pool_enable(struct ixgbe_adapter *adapter,
24 struct xsk_buff_pool *pool,
25 u16 qid)
26{
27 struct net_device *netdev = adapter->netdev;
28 bool if_running;
29 int err;
30
31 if (qid >= adapter->num_rx_queues)
32 return -EINVAL;
33
34 if (qid >= netdev->real_num_rx_queues ||
35 qid >= netdev->real_num_tx_queues)
36 return -EINVAL;
37
38 err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR);
39 if (err)
40 return err;
41
42 if_running = netif_running(adapter->netdev) &&
43 ixgbe_enabled_xdp_adapter(adapter);
44
45 if (if_running)
46 ixgbe_txrx_ring_disable(adapter, qid);
47
48 set_bit(qid, adapter->af_xdp_zc_qps);
49
50 if (if_running) {
51 ixgbe_txrx_ring_enable(adapter, qid);
52
53 /* Kick start the NAPI context so that receiving will start */
54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX);
55 if (err) {
56 clear_bit(qid, adapter->af_xdp_zc_qps);
57 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR);
58 return err;
59 }
60 }
61
62 return 0;
63}
64
65static int ixgbe_xsk_pool_disable(struct ixgbe_adapter *adapter, u16 qid)
66{
67 struct xsk_buff_pool *pool;
68 bool if_running;
69
70 pool = xsk_get_pool_from_qid(adapter->netdev, qid);
71 if (!pool)
72 return -EINVAL;
73
74 if_running = netif_running(adapter->netdev) &&
75 ixgbe_enabled_xdp_adapter(adapter);
76
77 if (if_running)
78 ixgbe_txrx_ring_disable(adapter, qid);
79
80 clear_bit(qid, adapter->af_xdp_zc_qps);
81 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR);
82
83 if (if_running)
84 ixgbe_txrx_ring_enable(adapter, qid);
85
86 return 0;
87}
88
89int ixgbe_xsk_pool_setup(struct ixgbe_adapter *adapter,
90 struct xsk_buff_pool *pool,
91 u16 qid)
92{
93 return pool ? ixgbe_xsk_pool_enable(adapter, pool, qid) :
94 ixgbe_xsk_pool_disable(adapter, qid);
95}
96
97static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter,
98 struct ixgbe_ring *rx_ring,
99 struct xdp_buff *xdp)
100{
101 int err, result = IXGBE_XDP_PASS;
102 struct bpf_prog *xdp_prog;
103 struct ixgbe_ring *ring;
104 struct xdp_frame *xdpf;
105 u32 act;
106
107 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
108 act = bpf_prog_run_xdp(xdp_prog, xdp);
109
110 if (likely(act == XDP_REDIRECT)) {
111 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
112 if (!err)
113 return IXGBE_XDP_REDIR;
114 if (xsk_uses_need_wakeup(rx_ring->xsk_pool) && err == -ENOBUFS)
115 result = IXGBE_XDP_EXIT;
116 else
117 result = IXGBE_XDP_CONSUMED;
118 goto out_failure;
119 }
120
121 switch (act) {
122 case XDP_PASS:
123 break;
124 case XDP_TX:
125 xdpf = xdp_convert_buff_to_frame(xdp);
126 if (unlikely(!xdpf))
127 goto out_failure;
128 ring = ixgbe_determine_xdp_ring(adapter);
129 if (static_branch_unlikely(&ixgbe_xdp_locking_key))
130 spin_lock(&ring->tx_lock);
131 result = ixgbe_xmit_xdp_ring(ring, xdpf);
132 if (static_branch_unlikely(&ixgbe_xdp_locking_key))
133 spin_unlock(&ring->tx_lock);
134 if (result == IXGBE_XDP_CONSUMED)
135 goto out_failure;
136 break;
137 case XDP_DROP:
138 result = IXGBE_XDP_CONSUMED;
139 break;
140 default:
141 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
142 fallthrough;
143 case XDP_ABORTED:
144 result = IXGBE_XDP_CONSUMED;
145out_failure:
146 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
147 }
148 return result;
149}
150
151bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count)
152{
153 union ixgbe_adv_rx_desc *rx_desc;
154 struct ixgbe_rx_buffer *bi;
155 u16 i = rx_ring->next_to_use;
156 dma_addr_t dma;
157 bool ok = true;
158
159 /* nothing to do */
160 if (!count)
161 return true;
162
163 rx_desc = IXGBE_RX_DESC(rx_ring, i);
164 bi = &rx_ring->rx_buffer_info[i];
165 i -= rx_ring->count;
166
167 do {
168 bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool);
169 if (!bi->xdp) {
170 ok = false;
171 break;
172 }
173
174 dma = xsk_buff_xdp_get_dma(bi->xdp);
175
176 /* Refresh the desc even if buffer_addrs didn't change
177 * because each write-back erases this info.
178 */
179 rx_desc->read.pkt_addr = cpu_to_le64(dma);
180
181 rx_desc++;
182 bi++;
183 i++;
184 if (unlikely(!i)) {
185 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
186 bi = rx_ring->rx_buffer_info;
187 i -= rx_ring->count;
188 }
189
190 /* clear the length for the next_to_use descriptor */
191 rx_desc->wb.upper.length = 0;
192
193 count--;
194 } while (count);
195
196 i += rx_ring->count;
197
198 if (rx_ring->next_to_use != i) {
199 rx_ring->next_to_use = i;
200
201 /* Force memory writes to complete before letting h/w
202 * know there are new descriptors to fetch. (Only
203 * applicable for weak-ordered memory model archs,
204 * such as IA-64).
205 */
206 wmb();
207 writel(i, rx_ring->tail);
208 }
209
210 return ok;
211}
212
213static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring,
214 const struct xdp_buff *xdp)
215{
216 unsigned int totalsize = xdp->data_end - xdp->data_meta;
217 unsigned int metasize = xdp->data - xdp->data_meta;
218 struct sk_buff *skb;
219
220 net_prefetch(xdp->data_meta);
221
222 /* allocate a skb to store the frags */
223 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, totalsize,
224 GFP_ATOMIC | __GFP_NOWARN);
225 if (unlikely(!skb))
226 return NULL;
227
228 memcpy(__skb_put(skb, totalsize), xdp->data_meta,
229 ALIGN(totalsize, sizeof(long)));
230
231 if (metasize) {
232 skb_metadata_set(skb, metasize);
233 __skb_pull(skb, metasize);
234 }
235
236 return skb;
237}
238
239static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring)
240{
241 u32 ntc = rx_ring->next_to_clean + 1;
242
243 ntc = (ntc < rx_ring->count) ? ntc : 0;
244 rx_ring->next_to_clean = ntc;
245 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
246}
247
248int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector,
249 struct ixgbe_ring *rx_ring,
250 const int budget)
251{
252 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
253 struct ixgbe_adapter *adapter = q_vector->adapter;
254 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
255 unsigned int xdp_res, xdp_xmit = 0;
256 bool failure = false;
257 struct sk_buff *skb;
258
259 while (likely(total_rx_packets < budget)) {
260 union ixgbe_adv_rx_desc *rx_desc;
261 struct ixgbe_rx_buffer *bi;
262 unsigned int size;
263
264 /* return some buffers to hardware, one at a time is too slow */
265 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
266 failure = failure ||
267 !ixgbe_alloc_rx_buffers_zc(rx_ring,
268 cleaned_count);
269 cleaned_count = 0;
270 }
271
272 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
273 size = le16_to_cpu(rx_desc->wb.upper.length);
274 if (!size)
275 break;
276
277 /* This memory barrier is needed to keep us from reading
278 * any other fields out of the rx_desc until we know the
279 * descriptor has been written back
280 */
281 dma_rmb();
282
283 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
284
285 if (unlikely(!ixgbe_test_staterr(rx_desc,
286 IXGBE_RXD_STAT_EOP))) {
287 struct ixgbe_rx_buffer *next_bi;
288
289 xsk_buff_free(bi->xdp);
290 bi->xdp = NULL;
291 ixgbe_inc_ntc(rx_ring);
292 next_bi =
293 &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
294 next_bi->discard = true;
295 continue;
296 }
297
298 if (unlikely(bi->discard)) {
299 xsk_buff_free(bi->xdp);
300 bi->xdp = NULL;
301 bi->discard = false;
302 ixgbe_inc_ntc(rx_ring);
303 continue;
304 }
305
306 bi->xdp->data_end = bi->xdp->data + size;
307 xsk_buff_dma_sync_for_cpu(bi->xdp, rx_ring->xsk_pool);
308 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp);
309
310 if (likely(xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR))) {
311 xdp_xmit |= xdp_res;
312 } else if (xdp_res == IXGBE_XDP_EXIT) {
313 failure = true;
314 break;
315 } else if (xdp_res == IXGBE_XDP_CONSUMED) {
316 xsk_buff_free(bi->xdp);
317 } else if (xdp_res == IXGBE_XDP_PASS) {
318 goto construct_skb;
319 }
320
321 bi->xdp = NULL;
322 total_rx_packets++;
323 total_rx_bytes += size;
324
325 cleaned_count++;
326 ixgbe_inc_ntc(rx_ring);
327 continue;
328
329construct_skb:
330 /* XDP_PASS path */
331 skb = ixgbe_construct_skb_zc(rx_ring, bi->xdp);
332 if (!skb) {
333 rx_ring->rx_stats.alloc_rx_buff_failed++;
334 break;
335 }
336
337 xsk_buff_free(bi->xdp);
338 bi->xdp = NULL;
339
340 cleaned_count++;
341 ixgbe_inc_ntc(rx_ring);
342
343 if (eth_skb_pad(skb))
344 continue;
345
346 total_rx_bytes += skb->len;
347 total_rx_packets++;
348
349 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
350 ixgbe_rx_skb(q_vector, skb);
351 }
352
353 if (xdp_xmit & IXGBE_XDP_REDIR)
354 xdp_do_flush();
355
356 if (xdp_xmit & IXGBE_XDP_TX) {
357 struct ixgbe_ring *ring = ixgbe_determine_xdp_ring(adapter);
358
359 ixgbe_xdp_ring_update_tail_locked(ring);
360 }
361
362 u64_stats_update_begin(&rx_ring->syncp);
363 rx_ring->stats.packets += total_rx_packets;
364 rx_ring->stats.bytes += total_rx_bytes;
365 u64_stats_update_end(&rx_ring->syncp);
366 q_vector->rx.total_packets += total_rx_packets;
367 q_vector->rx.total_bytes += total_rx_bytes;
368
369 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) {
370 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use)
371 xsk_set_rx_need_wakeup(rx_ring->xsk_pool);
372 else
373 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool);
374
375 return (int)total_rx_packets;
376 }
377 return failure ? budget : (int)total_rx_packets;
378}
379
380void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring)
381{
382 struct ixgbe_rx_buffer *bi;
383 u16 i;
384
385 for (i = 0; i < rx_ring->count; i++) {
386 bi = &rx_ring->rx_buffer_info[i];
387
388 if (!bi->xdp)
389 continue;
390
391 xsk_buff_free(bi->xdp);
392 bi->xdp = NULL;
393 }
394}
395
396static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)
397{
398 struct xsk_buff_pool *pool = xdp_ring->xsk_pool;
399 union ixgbe_adv_tx_desc *tx_desc = NULL;
400 struct ixgbe_tx_buffer *tx_bi;
401 bool work_done = true;
402 struct xdp_desc desc;
403 dma_addr_t dma;
404 u32 cmd_type;
405
406 while (budget-- > 0) {
407 if (unlikely(!ixgbe_desc_unused(xdp_ring))) {
408 work_done = false;
409 break;
410 }
411
412 if (!netif_carrier_ok(xdp_ring->netdev))
413 break;
414
415 if (!xsk_tx_peek_desc(pool, &desc))
416 break;
417
418 dma = xsk_buff_raw_get_dma(pool, desc.addr);
419 xsk_buff_raw_dma_sync_for_device(pool, dma, desc.len);
420
421 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use];
422 tx_bi->bytecount = desc.len;
423 tx_bi->xdpf = NULL;
424 tx_bi->gso_segs = 1;
425
426 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use);
427 tx_desc->read.buffer_addr = cpu_to_le64(dma);
428
429 /* put descriptor type bits */
430 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
431 IXGBE_ADVTXD_DCMD_DEXT |
432 IXGBE_ADVTXD_DCMD_IFCS;
433 cmd_type |= desc.len | IXGBE_TXD_CMD;
434 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
435 tx_desc->read.olinfo_status =
436 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT);
437
438 xdp_ring->next_to_use++;
439 if (xdp_ring->next_to_use == xdp_ring->count)
440 xdp_ring->next_to_use = 0;
441 }
442
443 if (tx_desc) {
444 ixgbe_xdp_ring_update_tail(xdp_ring);
445 xsk_tx_release(pool);
446 }
447
448 return !!budget && work_done;
449}
450
451static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring,
452 struct ixgbe_tx_buffer *tx_bi)
453{
454 xdp_return_frame(tx_bi->xdpf);
455 dma_unmap_single(tx_ring->dev,
456 dma_unmap_addr(tx_bi, dma),
457 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
458 dma_unmap_len_set(tx_bi, len, 0);
459}
460
461bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,
462 struct ixgbe_ring *tx_ring, int napi_budget)
463{
464 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
465 unsigned int total_packets = 0, total_bytes = 0;
466 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
467 union ixgbe_adv_tx_desc *tx_desc;
468 struct ixgbe_tx_buffer *tx_bi;
469 u32 xsk_frames = 0;
470
471 tx_bi = &tx_ring->tx_buffer_info[ntc];
472 tx_desc = IXGBE_TX_DESC(tx_ring, ntc);
473
474 while (ntc != ntu) {
475 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
476 break;
477
478 total_bytes += tx_bi->bytecount;
479 total_packets += tx_bi->gso_segs;
480
481 if (tx_bi->xdpf)
482 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
483 else
484 xsk_frames++;
485
486 tx_bi->xdpf = NULL;
487
488 tx_bi++;
489 tx_desc++;
490 ntc++;
491 if (unlikely(ntc == tx_ring->count)) {
492 ntc = 0;
493 tx_bi = tx_ring->tx_buffer_info;
494 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
495 }
496
497 /* issue prefetch for next Tx descriptor */
498 prefetch(tx_desc);
499 }
500
501 tx_ring->next_to_clean = ntc;
502
503 u64_stats_update_begin(&tx_ring->syncp);
504 tx_ring->stats.bytes += total_bytes;
505 tx_ring->stats.packets += total_packets;
506 u64_stats_update_end(&tx_ring->syncp);
507 q_vector->tx.total_bytes += total_bytes;
508 q_vector->tx.total_packets += total_packets;
509
510 if (xsk_frames)
511 xsk_tx_completed(pool, xsk_frames);
512
513 if (xsk_uses_need_wakeup(pool))
514 xsk_set_tx_need_wakeup(pool);
515
516 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit);
517}
518
519int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)
520{
521 struct ixgbe_adapter *adapter = netdev_priv(dev);
522 struct ixgbe_ring *ring;
523
524 if (test_bit(__IXGBE_DOWN, &adapter->state))
525 return -ENETDOWN;
526
527 if (!READ_ONCE(adapter->xdp_prog))
528 return -EINVAL;
529
530 if (qid >= adapter->num_xdp_queues)
531 return -EINVAL;
532
533 ring = adapter->xdp_ring[qid];
534
535 if (test_bit(__IXGBE_TX_DISABLED, &ring->state))
536 return -ENETDOWN;
537
538 if (!ring->xsk_pool)
539 return -EINVAL;
540
541 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {
542 u64 eics = BIT_ULL(ring->q_vector->v_idx);
543
544 ixgbe_irq_rearm_queues(adapter, eics);
545 }
546
547 return 0;
548}
549
550void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring)
551{
552 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
553 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
554 struct ixgbe_tx_buffer *tx_bi;
555 u32 xsk_frames = 0;
556
557 while (ntc != ntu) {
558 tx_bi = &tx_ring->tx_buffer_info[ntc];
559
560 if (tx_bi->xdpf)
561 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
562 else
563 xsk_frames++;
564
565 tx_bi->xdpf = NULL;
566
567 ntc++;
568 if (ntc == tx_ring->count)
569 ntc = 0;
570 }
571
572 if (xsk_frames)
573 xsk_tx_completed(pool, xsk_frames);
574}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2018 Intel Corporation. */
3
4#include <linux/bpf_trace.h>
5#include <net/xdp_sock_drv.h>
6#include <net/xdp.h>
7
8#include "ixgbe.h"
9#include "ixgbe_txrx_common.h"
10
11struct xdp_umem *ixgbe_xsk_umem(struct ixgbe_adapter *adapter,
12 struct ixgbe_ring *ring)
13{
14 bool xdp_on = READ_ONCE(adapter->xdp_prog);
15 int qid = ring->ring_idx;
16
17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps))
18 return NULL;
19
20 return xdp_get_umem_from_qid(adapter->netdev, qid);
21}
22
23static int ixgbe_xsk_umem_enable(struct ixgbe_adapter *adapter,
24 struct xdp_umem *umem,
25 u16 qid)
26{
27 struct net_device *netdev = adapter->netdev;
28 bool if_running;
29 int err;
30
31 if (qid >= adapter->num_rx_queues)
32 return -EINVAL;
33
34 if (qid >= netdev->real_num_rx_queues ||
35 qid >= netdev->real_num_tx_queues)
36 return -EINVAL;
37
38 err = xsk_buff_dma_map(umem, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR);
39 if (err)
40 return err;
41
42 if_running = netif_running(adapter->netdev) &&
43 ixgbe_enabled_xdp_adapter(adapter);
44
45 if (if_running)
46 ixgbe_txrx_ring_disable(adapter, qid);
47
48 set_bit(qid, adapter->af_xdp_zc_qps);
49
50 if (if_running) {
51 ixgbe_txrx_ring_enable(adapter, qid);
52
53 /* Kick start the NAPI context so that receiving will start */
54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX);
55 if (err)
56 return err;
57 }
58
59 return 0;
60}
61
62static int ixgbe_xsk_umem_disable(struct ixgbe_adapter *adapter, u16 qid)
63{
64 struct xdp_umem *umem;
65 bool if_running;
66
67 umem = xdp_get_umem_from_qid(adapter->netdev, qid);
68 if (!umem)
69 return -EINVAL;
70
71 if_running = netif_running(adapter->netdev) &&
72 ixgbe_enabled_xdp_adapter(adapter);
73
74 if (if_running)
75 ixgbe_txrx_ring_disable(adapter, qid);
76
77 clear_bit(qid, adapter->af_xdp_zc_qps);
78 xsk_buff_dma_unmap(umem, IXGBE_RX_DMA_ATTR);
79
80 if (if_running)
81 ixgbe_txrx_ring_enable(adapter, qid);
82
83 return 0;
84}
85
86int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xdp_umem *umem,
87 u16 qid)
88{
89 return umem ? ixgbe_xsk_umem_enable(adapter, umem, qid) :
90 ixgbe_xsk_umem_disable(adapter, qid);
91}
92
93static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter,
94 struct ixgbe_ring *rx_ring,
95 struct xdp_buff *xdp)
96{
97 int err, result = IXGBE_XDP_PASS;
98 struct bpf_prog *xdp_prog;
99 struct xdp_frame *xdpf;
100 u32 act;
101
102 rcu_read_lock();
103 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
104 act = bpf_prog_run_xdp(xdp_prog, xdp);
105
106 switch (act) {
107 case XDP_PASS:
108 break;
109 case XDP_TX:
110 xdpf = xdp_convert_buff_to_frame(xdp);
111 if (unlikely(!xdpf)) {
112 result = IXGBE_XDP_CONSUMED;
113 break;
114 }
115 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
116 break;
117 case XDP_REDIRECT:
118 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
119 result = !err ? IXGBE_XDP_REDIR : IXGBE_XDP_CONSUMED;
120 break;
121 default:
122 bpf_warn_invalid_xdp_action(act);
123 fallthrough;
124 case XDP_ABORTED:
125 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
126 fallthrough; /* handle aborts by dropping packet */
127 case XDP_DROP:
128 result = IXGBE_XDP_CONSUMED;
129 break;
130 }
131 rcu_read_unlock();
132 return result;
133}
134
135bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count)
136{
137 union ixgbe_adv_rx_desc *rx_desc;
138 struct ixgbe_rx_buffer *bi;
139 u16 i = rx_ring->next_to_use;
140 dma_addr_t dma;
141 bool ok = true;
142
143 /* nothing to do */
144 if (!count)
145 return true;
146
147 rx_desc = IXGBE_RX_DESC(rx_ring, i);
148 bi = &rx_ring->rx_buffer_info[i];
149 i -= rx_ring->count;
150
151 do {
152 bi->xdp = xsk_buff_alloc(rx_ring->xsk_umem);
153 if (!bi->xdp) {
154 ok = false;
155 break;
156 }
157
158 dma = xsk_buff_xdp_get_dma(bi->xdp);
159
160 /* Refresh the desc even if buffer_addrs didn't change
161 * because each write-back erases this info.
162 */
163 rx_desc->read.pkt_addr = cpu_to_le64(dma);
164
165 rx_desc++;
166 bi++;
167 i++;
168 if (unlikely(!i)) {
169 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
170 bi = rx_ring->rx_buffer_info;
171 i -= rx_ring->count;
172 }
173
174 /* clear the length for the next_to_use descriptor */
175 rx_desc->wb.upper.length = 0;
176
177 count--;
178 } while (count);
179
180 i += rx_ring->count;
181
182 if (rx_ring->next_to_use != i) {
183 rx_ring->next_to_use = i;
184
185 /* Force memory writes to complete before letting h/w
186 * know there are new descriptors to fetch. (Only
187 * applicable for weak-ordered memory model archs,
188 * such as IA-64).
189 */
190 wmb();
191 writel(i, rx_ring->tail);
192 }
193
194 return ok;
195}
196
197static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring,
198 struct ixgbe_rx_buffer *bi)
199{
200 unsigned int metasize = bi->xdp->data - bi->xdp->data_meta;
201 unsigned int datasize = bi->xdp->data_end - bi->xdp->data;
202 struct sk_buff *skb;
203
204 /* allocate a skb to store the frags */
205 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
206 bi->xdp->data_end - bi->xdp->data_hard_start,
207 GFP_ATOMIC | __GFP_NOWARN);
208 if (unlikely(!skb))
209 return NULL;
210
211 skb_reserve(skb, bi->xdp->data - bi->xdp->data_hard_start);
212 memcpy(__skb_put(skb, datasize), bi->xdp->data, datasize);
213 if (metasize)
214 skb_metadata_set(skb, metasize);
215
216 xsk_buff_free(bi->xdp);
217 bi->xdp = NULL;
218 return skb;
219}
220
221static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring)
222{
223 u32 ntc = rx_ring->next_to_clean + 1;
224
225 ntc = (ntc < rx_ring->count) ? ntc : 0;
226 rx_ring->next_to_clean = ntc;
227 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
228}
229
230int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector,
231 struct ixgbe_ring *rx_ring,
232 const int budget)
233{
234 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
235 struct ixgbe_adapter *adapter = q_vector->adapter;
236 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
237 unsigned int xdp_res, xdp_xmit = 0;
238 bool failure = false;
239 struct sk_buff *skb;
240
241 while (likely(total_rx_packets < budget)) {
242 union ixgbe_adv_rx_desc *rx_desc;
243 struct ixgbe_rx_buffer *bi;
244 unsigned int size;
245
246 /* return some buffers to hardware, one at a time is too slow */
247 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
248 failure = failure ||
249 !ixgbe_alloc_rx_buffers_zc(rx_ring,
250 cleaned_count);
251 cleaned_count = 0;
252 }
253
254 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
255 size = le16_to_cpu(rx_desc->wb.upper.length);
256 if (!size)
257 break;
258
259 /* This memory barrier is needed to keep us from reading
260 * any other fields out of the rx_desc until we know the
261 * descriptor has been written back
262 */
263 dma_rmb();
264
265 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
266
267 if (unlikely(!ixgbe_test_staterr(rx_desc,
268 IXGBE_RXD_STAT_EOP))) {
269 struct ixgbe_rx_buffer *next_bi;
270
271 xsk_buff_free(bi->xdp);
272 bi->xdp = NULL;
273 ixgbe_inc_ntc(rx_ring);
274 next_bi =
275 &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
276 next_bi->discard = true;
277 continue;
278 }
279
280 if (unlikely(bi->discard)) {
281 xsk_buff_free(bi->xdp);
282 bi->xdp = NULL;
283 bi->discard = false;
284 ixgbe_inc_ntc(rx_ring);
285 continue;
286 }
287
288 bi->xdp->data_end = bi->xdp->data + size;
289 xsk_buff_dma_sync_for_cpu(bi->xdp);
290 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp);
291
292 if (xdp_res) {
293 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR))
294 xdp_xmit |= xdp_res;
295 else
296 xsk_buff_free(bi->xdp);
297
298 bi->xdp = NULL;
299 total_rx_packets++;
300 total_rx_bytes += size;
301
302 cleaned_count++;
303 ixgbe_inc_ntc(rx_ring);
304 continue;
305 }
306
307 /* XDP_PASS path */
308 skb = ixgbe_construct_skb_zc(rx_ring, bi);
309 if (!skb) {
310 rx_ring->rx_stats.alloc_rx_buff_failed++;
311 break;
312 }
313
314 cleaned_count++;
315 ixgbe_inc_ntc(rx_ring);
316
317 if (eth_skb_pad(skb))
318 continue;
319
320 total_rx_bytes += skb->len;
321 total_rx_packets++;
322
323 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
324 ixgbe_rx_skb(q_vector, skb);
325 }
326
327 if (xdp_xmit & IXGBE_XDP_REDIR)
328 xdp_do_flush_map();
329
330 if (xdp_xmit & IXGBE_XDP_TX) {
331 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
332
333 /* Force memory writes to complete before letting h/w
334 * know there are new descriptors to fetch.
335 */
336 wmb();
337 writel(ring->next_to_use, ring->tail);
338 }
339
340 u64_stats_update_begin(&rx_ring->syncp);
341 rx_ring->stats.packets += total_rx_packets;
342 rx_ring->stats.bytes += total_rx_bytes;
343 u64_stats_update_end(&rx_ring->syncp);
344 q_vector->rx.total_packets += total_rx_packets;
345 q_vector->rx.total_bytes += total_rx_bytes;
346
347 if (xsk_umem_uses_need_wakeup(rx_ring->xsk_umem)) {
348 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use)
349 xsk_set_rx_need_wakeup(rx_ring->xsk_umem);
350 else
351 xsk_clear_rx_need_wakeup(rx_ring->xsk_umem);
352
353 return (int)total_rx_packets;
354 }
355 return failure ? budget : (int)total_rx_packets;
356}
357
358void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring)
359{
360 struct ixgbe_rx_buffer *bi;
361 u16 i;
362
363 for (i = 0; i < rx_ring->count; i++) {
364 bi = &rx_ring->rx_buffer_info[i];
365
366 if (!bi->xdp)
367 continue;
368
369 xsk_buff_free(bi->xdp);
370 bi->xdp = NULL;
371 }
372}
373
374static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)
375{
376 union ixgbe_adv_tx_desc *tx_desc = NULL;
377 struct ixgbe_tx_buffer *tx_bi;
378 bool work_done = true;
379 struct xdp_desc desc;
380 dma_addr_t dma;
381 u32 cmd_type;
382
383 while (budget-- > 0) {
384 if (unlikely(!ixgbe_desc_unused(xdp_ring)) ||
385 !netif_carrier_ok(xdp_ring->netdev)) {
386 work_done = false;
387 break;
388 }
389
390 if (!xsk_umem_consume_tx(xdp_ring->xsk_umem, &desc))
391 break;
392
393 dma = xsk_buff_raw_get_dma(xdp_ring->xsk_umem, desc.addr);
394 xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_umem, dma,
395 desc.len);
396
397 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use];
398 tx_bi->bytecount = desc.len;
399 tx_bi->xdpf = NULL;
400 tx_bi->gso_segs = 1;
401
402 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use);
403 tx_desc->read.buffer_addr = cpu_to_le64(dma);
404
405 /* put descriptor type bits */
406 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
407 IXGBE_ADVTXD_DCMD_DEXT |
408 IXGBE_ADVTXD_DCMD_IFCS;
409 cmd_type |= desc.len | IXGBE_TXD_CMD;
410 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
411 tx_desc->read.olinfo_status =
412 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT);
413
414 xdp_ring->next_to_use++;
415 if (xdp_ring->next_to_use == xdp_ring->count)
416 xdp_ring->next_to_use = 0;
417 }
418
419 if (tx_desc) {
420 ixgbe_xdp_ring_update_tail(xdp_ring);
421 xsk_umem_consume_tx_done(xdp_ring->xsk_umem);
422 }
423
424 return !!budget && work_done;
425}
426
427static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring,
428 struct ixgbe_tx_buffer *tx_bi)
429{
430 xdp_return_frame(tx_bi->xdpf);
431 dma_unmap_single(tx_ring->dev,
432 dma_unmap_addr(tx_bi, dma),
433 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
434 dma_unmap_len_set(tx_bi, len, 0);
435}
436
437bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,
438 struct ixgbe_ring *tx_ring, int napi_budget)
439{
440 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
441 unsigned int total_packets = 0, total_bytes = 0;
442 struct xdp_umem *umem = tx_ring->xsk_umem;
443 union ixgbe_adv_tx_desc *tx_desc;
444 struct ixgbe_tx_buffer *tx_bi;
445 u32 xsk_frames = 0;
446
447 tx_bi = &tx_ring->tx_buffer_info[ntc];
448 tx_desc = IXGBE_TX_DESC(tx_ring, ntc);
449
450 while (ntc != ntu) {
451 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
452 break;
453
454 total_bytes += tx_bi->bytecount;
455 total_packets += tx_bi->gso_segs;
456
457 if (tx_bi->xdpf)
458 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
459 else
460 xsk_frames++;
461
462 tx_bi->xdpf = NULL;
463
464 tx_bi++;
465 tx_desc++;
466 ntc++;
467 if (unlikely(ntc == tx_ring->count)) {
468 ntc = 0;
469 tx_bi = tx_ring->tx_buffer_info;
470 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
471 }
472
473 /* issue prefetch for next Tx descriptor */
474 prefetch(tx_desc);
475 }
476
477 tx_ring->next_to_clean = ntc;
478
479 u64_stats_update_begin(&tx_ring->syncp);
480 tx_ring->stats.bytes += total_bytes;
481 tx_ring->stats.packets += total_packets;
482 u64_stats_update_end(&tx_ring->syncp);
483 q_vector->tx.total_bytes += total_bytes;
484 q_vector->tx.total_packets += total_packets;
485
486 if (xsk_frames)
487 xsk_umem_complete_tx(umem, xsk_frames);
488
489 if (xsk_umem_uses_need_wakeup(tx_ring->xsk_umem))
490 xsk_set_tx_need_wakeup(tx_ring->xsk_umem);
491
492 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit);
493}
494
495int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)
496{
497 struct ixgbe_adapter *adapter = netdev_priv(dev);
498 struct ixgbe_ring *ring;
499
500 if (test_bit(__IXGBE_DOWN, &adapter->state))
501 return -ENETDOWN;
502
503 if (!READ_ONCE(adapter->xdp_prog))
504 return -ENXIO;
505
506 if (qid >= adapter->num_xdp_queues)
507 return -ENXIO;
508
509 ring = adapter->xdp_ring[qid];
510
511 if (test_bit(__IXGBE_TX_DISABLED, &ring->state))
512 return -ENETDOWN;
513
514 if (!ring->xsk_umem)
515 return -ENXIO;
516
517 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {
518 u64 eics = BIT_ULL(ring->q_vector->v_idx);
519
520 ixgbe_irq_rearm_queues(adapter, eics);
521 }
522
523 return 0;
524}
525
526void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring)
527{
528 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
529 struct xdp_umem *umem = tx_ring->xsk_umem;
530 struct ixgbe_tx_buffer *tx_bi;
531 u32 xsk_frames = 0;
532
533 while (ntc != ntu) {
534 tx_bi = &tx_ring->tx_buffer_info[ntc];
535
536 if (tx_bi->xdpf)
537 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
538 else
539 xsk_frames++;
540
541 tx_bi->xdpf = NULL;
542
543 ntc++;
544 if (ntc == tx_ring->count)
545 ntc = 0;
546 }
547
548 if (xsk_frames)
549 xsk_umem_complete_tx(umem, xsk_frames);
550}