1/*
  2 *
  3 * BRIEF MODULE DESCRIPTION
  4 *      IT8172 IDE controller support
  5 *
  6 * Copyright (C) 2000 MontaVista Software Inc.
  7 * Copyright (C) 2008 Shane McDonald
  8 *
  9 *  This program is free software; you can redistribute  it and/or modify it
 10 *  under  the terms of  the GNU General  Public License as published by the
 11 *  Free Software Foundation;  either version 2 of the  License, or (at your
 12 *  option) any later version.
 13 *
 14 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
 15 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
 16 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 17 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
 18 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 19 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
 20 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 21 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
 22 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 23 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 24 *
 25 *  You should have received a copy of the  GNU General Public License along
 26 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 27 *  675 Mass Ave, Cambridge, MA 02139, USA.
 28 */
 29
 30#include <linux/module.h>
 31#include <linux/types.h>
 32#include <linux/kernel.h>
 33#include <linux/ioport.h>
 34#include <linux/pci.h>
 35#include <linux/ide.h>
 36#include <linux/init.h>
 37
 38#define DRV_NAME "IT8172"
 39
 40static void it8172_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 41{
 42	struct pci_dev *dev	= to_pci_dev(hwif->dev);
 43	u16 drive_enables;
 44	u32 drive_timing;
 45	const u8 pio = drive->pio_mode - XFER_PIO_0;
 46
 47	/*
 48	 * The highest value of DIOR/DIOW pulse width and recovery time
 49	 * that can be set in the IT8172 is 8 PCI clock cycles.  As a result,
 50	 * it cannot be configured for PIO mode 0.  This table sets these
 51	 * parameters to the maximum supported by the IT8172.
 52	 */
 53	static const u8 timings[] = { 0x3f, 0x3c, 0x1b, 0x12, 0x0a };
 54
 55	pci_read_config_word(dev, 0x40, &drive_enables);
 56	pci_read_config_dword(dev, 0x44, &drive_timing);
 57
 58	/*
 59	 * Enable port 0x44. The IT8172 spec is confused; it calls
 60	 * this register the "Slave IDE Timing Register", but in fact,
 61	 * it controls timing for both master and slave drives.
 62	 */
 63	drive_enables |= 0x4000;
 64
 65	drive_enables &= drive->dn ? 0xc006 : 0xc060;
 66	if (drive->media == ide_disk)
 67		/* enable prefetch */
 68		drive_enables |= 0x0004 << (drive->dn * 4);
 69	if (ide_pio_need_iordy(drive, pio))
 70		/* enable IORDY sample-point */
 71		drive_enables |= 0x0002 << (drive->dn * 4);
 72
 73	drive_timing &= drive->dn ? 0x00003f00 : 0x000fc000;
 74	drive_timing |= timings[pio] << (drive->dn * 6 + 8);
 75
 76	pci_write_config_word(dev, 0x40, drive_enables);
 77	pci_write_config_dword(dev, 0x44, drive_timing);
 78}
 79
 80static void it8172_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 81{
 82	struct pci_dev *dev	= to_pci_dev(hwif->dev);
 83	int a_speed		= 3 << (drive->dn * 4);
 84	int u_flag		= 1 << drive->dn;
 85	int u_speed		= 0;
 86	u8 reg48, reg4a;
 87	const u8 speed		= drive->dma_mode;
 88
 89	pci_read_config_byte(dev, 0x48, &reg48);
 90	pci_read_config_byte(dev, 0x4a, &reg4a);
 91
 92	if (speed >= XFER_UDMA_0) {
 93		u8 udma = speed - XFER_UDMA_0;
 94		u_speed = udma << (drive->dn * 4);
 95
 96		pci_write_config_byte(dev, 0x48, reg48 | u_flag);
 97		reg4a &= ~a_speed;
 98		pci_write_config_byte(dev, 0x4a, reg4a | u_speed);
 99	} else {
100		const u8 mwdma_to_pio[] = { 0, 3, 4 };
101
102		pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
103		pci_write_config_byte(dev, 0x4a, reg4a & ~a_speed);
104
105		drive->pio_mode =
106			mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
107
108		it8172_set_pio_mode(hwif, drive);
109	}
110}
111
112
113static const struct ide_port_ops it8172_port_ops = {
114	.set_pio_mode	= it8172_set_pio_mode,
115	.set_dma_mode	= it8172_set_dma_mode,
116};
117
118static const struct ide_port_info it8172_port_info = {
119	.name		= DRV_NAME,
120	.port_ops	= &it8172_port_ops,
121	.enablebits	= { {0x41, 0x80, 0x80}, {0x00, 0x00, 0x00} },
122	.host_flags	= IDE_HFLAG_SINGLE,
123	.pio_mask	= ATA_PIO4 & ~ATA_PIO0,
124	.mwdma_mask	= ATA_MWDMA2,
125	.udma_mask	= ATA_UDMA2,
126};
127
128static int it8172_init_one(struct pci_dev *dev, const struct pci_device_id *id)
129{
130	if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
131		return -ENODEV; /* IT8172 is more than an IDE controller */
132	return ide_pci_init_one(dev, &it8172_port_info, NULL);
133}
134
135static struct pci_device_id it8172_pci_tbl[] = {
136	{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8172), 0 },
137	{ 0, },
138};
139MODULE_DEVICE_TABLE(pci, it8172_pci_tbl);
140
141static struct pci_driver it8172_pci_driver = {
142	.name		= "IT8172_IDE",
143	.id_table	= it8172_pci_tbl,
144	.probe		= it8172_init_one,
145	.remove		= ide_pci_remove,
146	.suspend	= ide_pci_suspend,
147	.resume		= ide_pci_resume,
148};
149
150static int __init it8172_ide_init(void)
151{
152	return ide_pci_register_driver(&it8172_pci_driver);
153}
154
155static void __exit it8172_ide_exit(void)
156{
157	pci_unregister_driver(&it8172_pci_driver);
158}
159
160module_init(it8172_ide_init);
161module_exit(it8172_ide_exit);
162
163MODULE_AUTHOR("Steve Longerbeam");
164MODULE_DESCRIPTION("PCI driver module for ITE 8172 IDE");
165MODULE_LICENSE("GPL");