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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2010 Google, Inc.
4 *
5 * Author:
6 * Colin Cross <ccross@google.com>
7 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
8 */
9
10#include <linux/bits.h>
11#include <linux/cpu.h>
12#include <linux/err.h>
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/platform_device.h>
17#include <linux/pm_opp.h>
18#include <linux/types.h>
19
20#include <soc/tegra/common.h>
21#include <soc/tegra/fuse.h>
22
23static bool cpu0_node_has_opp_v2_prop(void)
24{
25 struct device_node *np = of_cpu_device_node_get(0);
26 bool ret = false;
27
28 if (of_property_present(np, "operating-points-v2"))
29 ret = true;
30
31 of_node_put(np);
32 return ret;
33}
34
35static void tegra20_cpufreq_put_supported_hw(void *opp_token)
36{
37 dev_pm_opp_put_supported_hw((unsigned long) opp_token);
38}
39
40static void tegra20_cpufreq_dt_unregister(void *cpufreq_dt)
41{
42 platform_device_unregister(cpufreq_dt);
43}
44
45static int tegra20_cpufreq_probe(struct platform_device *pdev)
46{
47 struct platform_device *cpufreq_dt;
48 struct device *cpu_dev;
49 u32 versions[2];
50 int err;
51
52 if (!cpu0_node_has_opp_v2_prop()) {
53 dev_err(&pdev->dev, "operating points not found\n");
54 dev_err(&pdev->dev, "please update your device tree\n");
55 return -ENODEV;
56 }
57
58 if (of_machine_is_compatible("nvidia,tegra20")) {
59 versions[0] = BIT(tegra_sku_info.cpu_process_id);
60 versions[1] = BIT(tegra_sku_info.soc_speedo_id);
61 } else {
62 versions[0] = BIT(tegra_sku_info.cpu_process_id);
63 versions[1] = BIT(tegra_sku_info.cpu_speedo_id);
64 }
65
66 dev_info(&pdev->dev, "hardware version 0x%x 0x%x\n",
67 versions[0], versions[1]);
68
69 cpu_dev = get_cpu_device(0);
70 if (WARN_ON(!cpu_dev))
71 return -ENODEV;
72
73 err = dev_pm_opp_set_supported_hw(cpu_dev, versions, 2);
74 if (err < 0) {
75 dev_err(&pdev->dev, "failed to set supported hw: %d\n", err);
76 return err;
77 }
78
79 err = devm_add_action_or_reset(&pdev->dev,
80 tegra20_cpufreq_put_supported_hw,
81 (void *)((unsigned long) err));
82 if (err)
83 return err;
84
85 cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
86 err = PTR_ERR_OR_ZERO(cpufreq_dt);
87 if (err) {
88 dev_err(&pdev->dev,
89 "failed to create cpufreq-dt device: %d\n", err);
90 return err;
91 }
92
93 err = devm_add_action_or_reset(&pdev->dev,
94 tegra20_cpufreq_dt_unregister,
95 cpufreq_dt);
96 if (err)
97 return err;
98
99 return 0;
100}
101
102static struct platform_driver tegra20_cpufreq_driver = {
103 .probe = tegra20_cpufreq_probe,
104 .driver = {
105 .name = "tegra20-cpufreq",
106 },
107};
108module_platform_driver(tegra20_cpufreq_driver);
109
110MODULE_ALIAS("platform:tegra20-cpufreq");
111MODULE_AUTHOR("Colin Cross <ccross@android.com>");
112MODULE_DESCRIPTION("NVIDIA Tegra20 cpufreq driver");
113MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2010 Google, Inc.
4 *
5 * Author:
6 * Colin Cross <ccross@google.com>
7 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
8 */
9
10#include <linux/bits.h>
11#include <linux/cpu.h>
12#include <linux/err.h>
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/of_device.h>
16#include <linux/platform_device.h>
17#include <linux/pm_opp.h>
18#include <linux/types.h>
19
20#include <soc/tegra/common.h>
21#include <soc/tegra/fuse.h>
22
23static bool cpu0_node_has_opp_v2_prop(void)
24{
25 struct device_node *np = of_cpu_device_node_get(0);
26 bool ret = false;
27
28 if (of_get_property(np, "operating-points-v2", NULL))
29 ret = true;
30
31 of_node_put(np);
32 return ret;
33}
34
35static int tegra20_cpufreq_probe(struct platform_device *pdev)
36{
37 struct platform_device *cpufreq_dt;
38 struct opp_table *opp_table;
39 struct device *cpu_dev;
40 u32 versions[2];
41 int err;
42
43 if (!cpu0_node_has_opp_v2_prop()) {
44 dev_err(&pdev->dev, "operating points not found\n");
45 dev_err(&pdev->dev, "please update your device tree\n");
46 return -ENODEV;
47 }
48
49 if (of_machine_is_compatible("nvidia,tegra20")) {
50 versions[0] = BIT(tegra_sku_info.cpu_process_id);
51 versions[1] = BIT(tegra_sku_info.soc_speedo_id);
52 } else {
53 versions[0] = BIT(tegra_sku_info.cpu_process_id);
54 versions[1] = BIT(tegra_sku_info.cpu_speedo_id);
55 }
56
57 dev_info(&pdev->dev, "hardware version 0x%x 0x%x\n",
58 versions[0], versions[1]);
59
60 cpu_dev = get_cpu_device(0);
61 if (WARN_ON(!cpu_dev))
62 return -ENODEV;
63
64 opp_table = dev_pm_opp_set_supported_hw(cpu_dev, versions, 2);
65 err = PTR_ERR_OR_ZERO(opp_table);
66 if (err) {
67 dev_err(&pdev->dev, "failed to set supported hw: %d\n", err);
68 return err;
69 }
70
71 cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
72 err = PTR_ERR_OR_ZERO(cpufreq_dt);
73 if (err) {
74 dev_err(&pdev->dev,
75 "failed to create cpufreq-dt device: %d\n", err);
76 goto err_put_supported_hw;
77 }
78
79 platform_set_drvdata(pdev, cpufreq_dt);
80
81 return 0;
82
83err_put_supported_hw:
84 dev_pm_opp_put_supported_hw(opp_table);
85
86 return err;
87}
88
89static int tegra20_cpufreq_remove(struct platform_device *pdev)
90{
91 struct platform_device *cpufreq_dt;
92 struct opp_table *opp_table;
93
94 cpufreq_dt = platform_get_drvdata(pdev);
95 platform_device_unregister(cpufreq_dt);
96
97 opp_table = dev_pm_opp_get_opp_table(get_cpu_device(0));
98 dev_pm_opp_put_supported_hw(opp_table);
99 dev_pm_opp_put_opp_table(opp_table);
100
101 return 0;
102}
103
104static struct platform_driver tegra20_cpufreq_driver = {
105 .probe = tegra20_cpufreq_probe,
106 .remove = tegra20_cpufreq_remove,
107 .driver = {
108 .name = "tegra20-cpufreq",
109 },
110};
111module_platform_driver(tegra20_cpufreq_driver);
112
113MODULE_ALIAS("platform:tegra20-cpufreq");
114MODULE_AUTHOR("Colin Cross <ccross@android.com>");
115MODULE_DESCRIPTION("NVIDIA Tegra20 cpufreq driver");
116MODULE_LICENSE("GPL");