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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Universal Interface for Intel High Definition Audio Codec
4 *
5 * HD audio interface patch for SigmaTel STAC92xx
6 *
7 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
8 * Matt Porter <mporter@embeddedalley.com>
9 *
10 * Based on patch_cmedia.c and patch_realtek.c
11 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
12 */
13
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/slab.h>
17#include <linux/pci.h>
18#include <linux/dmi.h>
19#include <linux/module.h>
20#include <sound/core.h>
21#include <sound/jack.h>
22#include <sound/hda_codec.h>
23#include "hda_local.h"
24#include "hda_auto_parser.h"
25#include "hda_beep.h"
26#include "hda_jack.h"
27#include "hda_generic.h"
28
29enum {
30 STAC_REF,
31 STAC_9200_OQO,
32 STAC_9200_DELL_D21,
33 STAC_9200_DELL_D22,
34 STAC_9200_DELL_D23,
35 STAC_9200_DELL_M21,
36 STAC_9200_DELL_M22,
37 STAC_9200_DELL_M23,
38 STAC_9200_DELL_M24,
39 STAC_9200_DELL_M25,
40 STAC_9200_DELL_M26,
41 STAC_9200_DELL_M27,
42 STAC_9200_M4,
43 STAC_9200_M4_2,
44 STAC_9200_PANASONIC,
45 STAC_9200_EAPD_INIT,
46 STAC_9200_MODELS
47};
48
49enum {
50 STAC_9205_REF,
51 STAC_9205_DELL_M42,
52 STAC_9205_DELL_M43,
53 STAC_9205_DELL_M44,
54 STAC_9205_EAPD,
55 STAC_9205_MODELS
56};
57
58enum {
59 STAC_92HD73XX_NO_JD, /* no jack-detection */
60 STAC_92HD73XX_REF,
61 STAC_92HD73XX_INTEL,
62 STAC_DELL_M6_AMIC,
63 STAC_DELL_M6_DMIC,
64 STAC_DELL_M6_BOTH,
65 STAC_DELL_EQ,
66 STAC_ALIENWARE_M17X,
67 STAC_ELO_VUPOINT_15MX,
68 STAC_92HD89XX_HP_FRONT_JACK,
69 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
70 STAC_92HD73XX_ASUS_MOBO,
71 STAC_92HD73XX_MODELS
72};
73
74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_PWR_REF,
77 STAC_DELL_S14,
78 STAC_DELL_VOSTRO_3500,
79 STAC_92HD83XXX_HP_cNB11_INTQUAD,
80 STAC_HP_DV7_4000,
81 STAC_HP_ZEPHYR,
82 STAC_92HD83XXX_HP_LED,
83 STAC_92HD83XXX_HP_INV_LED,
84 STAC_92HD83XXX_HP_MIC_LED,
85 STAC_HP_LED_GPIO10,
86 STAC_92HD83XXX_HEADSET_JACK,
87 STAC_92HD83XXX_HP,
88 STAC_HP_ENVY_BASS,
89 STAC_HP_BNB13_EQ,
90 STAC_HP_ENVY_TS_BASS,
91 STAC_HP_ENVY_TS_DAC_BIND,
92 STAC_92HD83XXX_GPIO10_EAPD,
93 STAC_92HD83XXX_MODELS
94};
95
96enum {
97 STAC_92HD71BXX_REF,
98 STAC_DELL_M4_1,
99 STAC_DELL_M4_2,
100 STAC_DELL_M4_3,
101 STAC_HP_M4,
102 STAC_HP_DV4,
103 STAC_HP_DV5,
104 STAC_HP_HDX,
105 STAC_92HD71BXX_HP,
106 STAC_92HD71BXX_NO_DMIC,
107 STAC_92HD71BXX_NO_SMUX,
108 STAC_92HD71BXX_MODELS
109};
110
111enum {
112 STAC_92HD95_HP_LED,
113 STAC_92HD95_HP_BASS,
114 STAC_92HD95_MODELS
115};
116
117enum {
118 STAC_925x_REF,
119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
122 STAC_M2_2,
123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
126 STAC_925x_MODELS
127};
128
129enum {
130 STAC_D945_REF,
131 STAC_D945GTP3,
132 STAC_D945GTP5,
133 STAC_INTEL_MAC_V1,
134 STAC_INTEL_MAC_V2,
135 STAC_INTEL_MAC_V3,
136 STAC_INTEL_MAC_V4,
137 STAC_INTEL_MAC_V5,
138 STAC_INTEL_MAC_AUTO,
139 STAC_ECS_202,
140 STAC_922X_DELL_D81,
141 STAC_922X_DELL_D82,
142 STAC_922X_DELL_M81,
143 STAC_922X_DELL_M82,
144 STAC_922X_INTEL_MAC_GPIO,
145 STAC_922X_MODELS
146};
147
148enum {
149 STAC_D965_REF_NO_JD, /* no jack-detection */
150 STAC_D965_REF,
151 STAC_D965_3ST,
152 STAC_D965_5ST,
153 STAC_D965_5ST_NO_FP,
154 STAC_D965_VERBS,
155 STAC_DELL_3ST,
156 STAC_DELL_BIOS,
157 STAC_NEMO_DEFAULT,
158 STAC_DELL_BIOS_AMIC,
159 STAC_DELL_BIOS_SPDIF,
160 STAC_927X_DELL_DMIC,
161 STAC_927X_VOLKNOB,
162 STAC_927X_MODELS
163};
164
165enum {
166 STAC_9872_VAIO,
167 STAC_9872_MODELS
168};
169
170struct sigmatel_spec {
171 struct hda_gen_spec gen;
172
173 unsigned int eapd_switch: 1;
174 unsigned int linear_tone_beep:1;
175 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
176 unsigned int volknob_init:1; /* special volume-knob initialization */
177 unsigned int powerdown_adcs:1;
178 unsigned int have_spdif_mux:1;
179
180 /* gpio lines */
181 unsigned int eapd_mask;
182 unsigned int gpio_mask;
183 unsigned int gpio_dir;
184 unsigned int gpio_data;
185 unsigned int gpio_mute;
186 unsigned int gpio_led;
187 unsigned int gpio_led_polarity;
188 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
189 unsigned int vref_led;
190 int default_polarity;
191
192 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
193 unsigned int mic_enabled; /* current mic mute state (bitmask) */
194
195 /* stream */
196 unsigned int stream_delay;
197
198 /* analog loopback */
199 const struct snd_kcontrol_new *aloopback_ctl;
200 unsigned int aloopback;
201 unsigned char aloopback_mask;
202 unsigned char aloopback_shift;
203
204 /* power management */
205 unsigned int power_map_bits;
206 unsigned int num_pwrs;
207 const hda_nid_t *pwr_nids;
208 unsigned int active_adcs;
209
210 /* beep widgets */
211 hda_nid_t anabeep_nid;
212 bool beep_power_on;
213
214 /* SPDIF-out mux */
215 const char * const *spdif_labels;
216 struct hda_input_mux spdif_mux;
217 unsigned int cur_smux[2];
218};
219
220#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
221#define AC_VERB_IDT_GET_POWER_MAP 0xfec
222
223static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
224 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
225 0x0f, 0x10, 0x11
226};
227
228static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
229 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
230 0x0f, 0x10
231};
232
233static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
234 0x0a, 0x0d, 0x0f
235};
236
237
238/*
239 * PCM hooks
240 */
241static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
242 struct hda_codec *codec,
243 struct snd_pcm_substream *substream,
244 int action)
245{
246 struct sigmatel_spec *spec = codec->spec;
247 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
248 msleep(spec->stream_delay);
249}
250
251static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
252 struct hda_codec *codec,
253 struct snd_pcm_substream *substream,
254 int action)
255{
256 struct sigmatel_spec *spec = codec->spec;
257 int i, idx = 0;
258
259 if (!spec->powerdown_adcs)
260 return;
261
262 for (i = 0; i < spec->gen.num_all_adcs; i++) {
263 if (spec->gen.all_adcs[i] == hinfo->nid) {
264 idx = i;
265 break;
266 }
267 }
268
269 switch (action) {
270 case HDA_GEN_PCM_ACT_OPEN:
271 msleep(40);
272 snd_hda_codec_write(codec, hinfo->nid, 0,
273 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
274 spec->active_adcs |= (1 << idx);
275 break;
276 case HDA_GEN_PCM_ACT_CLOSE:
277 snd_hda_codec_write(codec, hinfo->nid, 0,
278 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
279 spec->active_adcs &= ~(1 << idx);
280 break;
281 }
282}
283
284/*
285 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
286 * funky external mute control using GPIO pins.
287 */
288
289static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
290 unsigned int dir_mask, unsigned int data)
291{
292 unsigned int gpiostate, gpiomask, gpiodir;
293 hda_nid_t fg = codec->core.afg;
294
295 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
296
297 gpiostate = snd_hda_codec_read(codec, fg, 0,
298 AC_VERB_GET_GPIO_DATA, 0);
299 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
300
301 gpiomask = snd_hda_codec_read(codec, fg, 0,
302 AC_VERB_GET_GPIO_MASK, 0);
303 gpiomask |= mask;
304
305 gpiodir = snd_hda_codec_read(codec, fg, 0,
306 AC_VERB_GET_GPIO_DIRECTION, 0);
307 gpiodir |= dir_mask;
308
309 /* Configure GPIOx as CMOS */
310 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
311
312 snd_hda_codec_write(codec, fg, 0,
313 AC_VERB_SET_GPIO_MASK, gpiomask);
314 snd_hda_codec_read(codec, fg, 0,
315 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
316
317 msleep(1);
318
319 snd_hda_codec_read(codec, fg, 0,
320 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
321}
322
323/* hook for controlling mic-mute LED GPIO */
324static int stac_capture_led_update(struct led_classdev *led_cdev,
325 enum led_brightness brightness)
326{
327 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
328 struct sigmatel_spec *spec = codec->spec;
329
330 if (brightness)
331 spec->gpio_data |= spec->mic_mute_led_gpio;
332 else
333 spec->gpio_data &= ~spec->mic_mute_led_gpio;
334 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
335 return 0;
336}
337
338static int stac_vrefout_set(struct hda_codec *codec,
339 hda_nid_t nid, unsigned int new_vref)
340{
341 int error, pinctl;
342
343 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
344 pinctl = snd_hda_codec_read(codec, nid, 0,
345 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
346
347 if (pinctl < 0)
348 return pinctl;
349
350 pinctl &= 0xff;
351 pinctl &= ~AC_PINCTL_VREFEN;
352 pinctl |= (new_vref & AC_PINCTL_VREFEN);
353
354 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
355 if (error < 0)
356 return error;
357
358 return 1;
359}
360
361/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
362/* this hook is set in stac_setup_gpio() */
363static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
364 hda_nid_t nid,
365 unsigned int power_state)
366{
367 if (nid == codec->core.afg && power_state == AC_PWRST_D3)
368 return AC_PWRST_D1;
369 return snd_hda_gen_path_power_filter(codec, nid, power_state);
370}
371
372/* update mute-LED accoring to the master switch */
373static void stac_update_led_status(struct hda_codec *codec, bool muted)
374{
375 struct sigmatel_spec *spec = codec->spec;
376
377 if (!spec->gpio_led)
378 return;
379
380 /* LED state is inverted on these systems */
381 if (spec->gpio_led_polarity)
382 muted = !muted;
383
384 if (!spec->vref_mute_led_nid) {
385 if (muted)
386 spec->gpio_data |= spec->gpio_led;
387 else
388 spec->gpio_data &= ~spec->gpio_led;
389 stac_gpio_set(codec, spec->gpio_mask,
390 spec->gpio_dir, spec->gpio_data);
391 } else {
392 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
393 stac_vrefout_set(codec, spec->vref_mute_led_nid,
394 spec->vref_led);
395 }
396}
397
398/* vmaster hook to update mute LED */
399static int stac_vmaster_hook(struct led_classdev *led_cdev,
400 enum led_brightness brightness)
401{
402 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
403
404 stac_update_led_status(codec, brightness);
405 return 0;
406}
407
408/* automute hook to handle GPIO mute and EAPD updates */
409static void stac_update_outputs(struct hda_codec *codec)
410{
411 struct sigmatel_spec *spec = codec->spec;
412
413 if (spec->gpio_mute)
414 spec->gen.master_mute =
415 !(snd_hda_codec_read(codec, codec->core.afg, 0,
416 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
417
418 snd_hda_gen_update_outputs(codec);
419
420 if (spec->eapd_mask && spec->eapd_switch) {
421 unsigned int val = spec->gpio_data;
422 if (spec->gen.speaker_muted)
423 val &= ~spec->eapd_mask;
424 else
425 val |= spec->eapd_mask;
426 if (spec->gpio_data != val) {
427 spec->gpio_data = val;
428 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
429 val);
430 }
431 }
432}
433
434static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
435 bool enable, bool do_write)
436{
437 struct sigmatel_spec *spec = codec->spec;
438 unsigned int idx, val;
439
440 for (idx = 0; idx < spec->num_pwrs; idx++) {
441 if (spec->pwr_nids[idx] == nid)
442 break;
443 }
444 if (idx >= spec->num_pwrs)
445 return;
446
447 idx = 1 << idx;
448
449 val = spec->power_map_bits;
450 if (enable)
451 val &= ~idx;
452 else
453 val |= idx;
454
455 /* power down unused output ports */
456 if (val != spec->power_map_bits) {
457 spec->power_map_bits = val;
458 if (do_write)
459 snd_hda_codec_write(codec, codec->core.afg, 0,
460 AC_VERB_IDT_SET_POWER_MAP, val);
461 }
462}
463
464/* update power bit per jack plug/unplug */
465static void jack_update_power(struct hda_codec *codec,
466 struct hda_jack_callback *jack)
467{
468 struct sigmatel_spec *spec = codec->spec;
469 int i;
470
471 if (!spec->num_pwrs)
472 return;
473
474 if (jack && jack->nid) {
475 stac_toggle_power_map(codec, jack->nid,
476 snd_hda_jack_detect(codec, jack->nid),
477 true);
478 return;
479 }
480
481 /* update all jacks */
482 for (i = 0; i < spec->num_pwrs; i++) {
483 hda_nid_t nid = spec->pwr_nids[i];
484 if (!snd_hda_jack_tbl_get(codec, nid))
485 continue;
486 stac_toggle_power_map(codec, nid,
487 snd_hda_jack_detect(codec, nid),
488 false);
489 }
490
491 snd_hda_codec_write(codec, codec->core.afg, 0,
492 AC_VERB_IDT_SET_POWER_MAP,
493 spec->power_map_bits);
494}
495
496static void stac_vref_event(struct hda_codec *codec,
497 struct hda_jack_callback *event)
498{
499 unsigned int data;
500
501 data = snd_hda_codec_read(codec, codec->core.afg, 0,
502 AC_VERB_GET_GPIO_DATA, 0);
503 /* toggle VREF state based on GPIOx status */
504 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
505 !!(data & (1 << event->private_data)));
506}
507
508/* initialize the power map and enable the power event to jacks that
509 * haven't been assigned to automute
510 */
511static void stac_init_power_map(struct hda_codec *codec)
512{
513 struct sigmatel_spec *spec = codec->spec;
514 int i;
515
516 for (i = 0; i < spec->num_pwrs; i++) {
517 hda_nid_t nid = spec->pwr_nids[i];
518 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
519 def_conf = get_defcfg_connect(def_conf);
520 if (def_conf == AC_JACK_PORT_COMPLEX &&
521 spec->vref_mute_led_nid != nid &&
522 is_jack_detectable(codec, nid)) {
523 snd_hda_jack_detect_enable_callback(codec, nid,
524 jack_update_power);
525 } else {
526 if (def_conf == AC_JACK_PORT_NONE)
527 stac_toggle_power_map(codec, nid, false, false);
528 else
529 stac_toggle_power_map(codec, nid, true, false);
530 }
531 }
532}
533
534/*
535 */
536
537static inline bool get_int_hint(struct hda_codec *codec, const char *key,
538 int *valp)
539{
540 return !snd_hda_get_int_hint(codec, key, valp);
541}
542
543/* override some hints from the hwdep entry */
544static void stac_store_hints(struct hda_codec *codec)
545{
546 struct sigmatel_spec *spec = codec->spec;
547 int val;
548
549 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
550 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
551 spec->gpio_mask;
552 }
553 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
554 spec->gpio_dir &= spec->gpio_mask;
555 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
556 spec->gpio_data &= spec->gpio_mask;
557 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
558 spec->eapd_mask &= spec->gpio_mask;
559 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
560 spec->gpio_mute &= spec->gpio_mask;
561 val = snd_hda_get_bool_hint(codec, "eapd_switch");
562 if (val >= 0)
563 spec->eapd_switch = val;
564}
565
566/*
567 * loopback controls
568 */
569
570#define stac_aloopback_info snd_ctl_boolean_mono_info
571
572static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
573 struct snd_ctl_elem_value *ucontrol)
574{
575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
576 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
577 struct sigmatel_spec *spec = codec->spec;
578
579 ucontrol->value.integer.value[0] = !!(spec->aloopback &
580 (spec->aloopback_mask << idx));
581 return 0;
582}
583
584static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
585 struct snd_ctl_elem_value *ucontrol)
586{
587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
588 struct sigmatel_spec *spec = codec->spec;
589 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
590 unsigned int dac_mode;
591 unsigned int val, idx_val;
592
593 idx_val = spec->aloopback_mask << idx;
594 if (ucontrol->value.integer.value[0])
595 val = spec->aloopback | idx_val;
596 else
597 val = spec->aloopback & ~idx_val;
598 if (spec->aloopback == val)
599 return 0;
600
601 spec->aloopback = val;
602
603 /* Only return the bits defined by the shift value of the
604 * first two bytes of the mask
605 */
606 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
607 kcontrol->private_value & 0xFFFF, 0x0);
608 dac_mode >>= spec->aloopback_shift;
609
610 if (spec->aloopback & idx_val) {
611 snd_hda_power_up(codec);
612 dac_mode |= idx_val;
613 } else {
614 snd_hda_power_down(codec);
615 dac_mode &= ~idx_val;
616 }
617
618 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
619 kcontrol->private_value >> 16, dac_mode);
620
621 return 1;
622}
623
624#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
625 { \
626 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
627 .name = "Analog Loopback", \
628 .count = cnt, \
629 .info = stac_aloopback_info, \
630 .get = stac_aloopback_get, \
631 .put = stac_aloopback_put, \
632 .private_value = verb_read | (verb_write << 16), \
633 }
634
635/*
636 * Mute LED handling on HP laptops
637 */
638
639/* check whether it's a HP laptop with a docking port */
640static bool hp_bnb2011_with_dock(struct hda_codec *codec)
641{
642 if (codec->core.vendor_id != 0x111d7605 &&
643 codec->core.vendor_id != 0x111d76d1)
644 return false;
645
646 switch (codec->core.subsystem_id) {
647 case 0x103c1618:
648 case 0x103c1619:
649 case 0x103c161a:
650 case 0x103c161b:
651 case 0x103c161c:
652 case 0x103c161d:
653 case 0x103c161e:
654 case 0x103c161f:
655
656 case 0x103c162a:
657 case 0x103c162b:
658
659 case 0x103c1630:
660 case 0x103c1631:
661
662 case 0x103c1633:
663 case 0x103c1634:
664 case 0x103c1635:
665
666 case 0x103c3587:
667 case 0x103c3588:
668 case 0x103c3589:
669 case 0x103c358a:
670
671 case 0x103c3667:
672 case 0x103c3668:
673 case 0x103c3669:
674
675 return true;
676 }
677 return false;
678}
679
680static bool hp_blike_system(u32 subsystem_id)
681{
682 switch (subsystem_id) {
683 case 0x103c1473: /* HP ProBook 6550b */
684 case 0x103c1520:
685 case 0x103c1521:
686 case 0x103c1523:
687 case 0x103c1524:
688 case 0x103c1525:
689 case 0x103c1722:
690 case 0x103c1723:
691 case 0x103c1724:
692 case 0x103c1725:
693 case 0x103c1726:
694 case 0x103c1727:
695 case 0x103c1728:
696 case 0x103c1729:
697 case 0x103c172a:
698 case 0x103c172b:
699 case 0x103c307e:
700 case 0x103c307f:
701 case 0x103c3080:
702 case 0x103c3081:
703 case 0x103c7007:
704 case 0x103c7008:
705 return true;
706 }
707 return false;
708}
709
710static void set_hp_led_gpio(struct hda_codec *codec)
711{
712 struct sigmatel_spec *spec = codec->spec;
713 unsigned int gpio;
714
715 if (spec->gpio_led)
716 return;
717
718 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
719 gpio &= AC_GPIO_IO_COUNT;
720 if (gpio > 3)
721 spec->gpio_led = 0x08; /* GPIO 3 */
722 else
723 spec->gpio_led = 0x01; /* GPIO 0 */
724}
725
726/*
727 * This method searches for the mute LED GPIO configuration
728 * provided as OEM string in SMBIOS. The format of that string
729 * is HP_Mute_LED_P_G or HP_Mute_LED_P
730 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
731 * that corresponds to the NOT muted state of the master volume
732 * and G is the index of the GPIO to use as the mute LED control (0..9)
733 * If _G portion is missing it is assigned based on the codec ID
734 *
735 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
736 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
737 *
738 *
739 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
740 * SMBIOS - at least the ones I have seen do not have them - which include
741 * my own system (HP Pavilion dv6-1110ax) and my cousin's
742 * HP Pavilion dv9500t CTO.
743 * Need more information on whether it is true across the entire series.
744 * -- kunal
745 */
746static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
747{
748 struct sigmatel_spec *spec = codec->spec;
749 const struct dmi_device *dev = NULL;
750
751 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
752 get_int_hint(codec, "gpio_led_polarity",
753 &spec->gpio_led_polarity);
754 return 1;
755 }
756
757 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
758 if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
759 &spec->gpio_led_polarity,
760 &spec->gpio_led) == 2) {
761 unsigned int max_gpio;
762 max_gpio = snd_hda_param_read(codec, codec->core.afg,
763 AC_PAR_GPIO_CAP);
764 max_gpio &= AC_GPIO_IO_COUNT;
765 if (spec->gpio_led < max_gpio)
766 spec->gpio_led = 1 << spec->gpio_led;
767 else
768 spec->vref_mute_led_nid = spec->gpio_led;
769 return 1;
770 }
771 if (sscanf(dev->name, "HP_Mute_LED_%u",
772 &spec->gpio_led_polarity) == 1) {
773 set_hp_led_gpio(codec);
774 return 1;
775 }
776 /* BIOS bug: unfilled OEM string */
777 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
778 set_hp_led_gpio(codec);
779 if (default_polarity >= 0)
780 spec->gpio_led_polarity = default_polarity;
781 else
782 spec->gpio_led_polarity = 1;
783 return 1;
784 }
785 }
786
787 /*
788 * Fallback case - if we don't find the DMI strings,
789 * we statically set the GPIO - if not a B-series system
790 * and default polarity is provided
791 */
792 if (!hp_blike_system(codec->core.subsystem_id) &&
793 (default_polarity == 0 || default_polarity == 1)) {
794 set_hp_led_gpio(codec);
795 spec->gpio_led_polarity = default_polarity;
796 return 1;
797 }
798 return 0;
799}
800
801/* check whether a built-in speaker is included in parsed pins */
802static bool has_builtin_speaker(struct hda_codec *codec)
803{
804 struct sigmatel_spec *spec = codec->spec;
805 const hda_nid_t *nid_pin;
806 int nids, i;
807
808 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
809 nid_pin = spec->gen.autocfg.line_out_pins;
810 nids = spec->gen.autocfg.line_outs;
811 } else {
812 nid_pin = spec->gen.autocfg.speaker_pins;
813 nids = spec->gen.autocfg.speaker_outs;
814 }
815
816 for (i = 0; i < nids; i++) {
817 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
818 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
819 return true;
820 }
821 return false;
822}
823
824/*
825 * PC beep controls
826 */
827
828/* create PC beep volume controls */
829static int stac_auto_create_beep_ctls(struct hda_codec *codec,
830 hda_nid_t nid)
831{
832 struct sigmatel_spec *spec = codec->spec;
833 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
834 struct snd_kcontrol_new *knew;
835 static const struct snd_kcontrol_new abeep_mute_ctl =
836 HDA_CODEC_MUTE(NULL, 0, 0, 0);
837 static const struct snd_kcontrol_new dbeep_mute_ctl =
838 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
839 static const struct snd_kcontrol_new beep_vol_ctl =
840 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
841
842 /* check for mute support for the amp */
843 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
844 const struct snd_kcontrol_new *temp;
845 if (spec->anabeep_nid == nid)
846 temp = &abeep_mute_ctl;
847 else
848 temp = &dbeep_mute_ctl;
849 knew = snd_hda_gen_add_kctl(&spec->gen,
850 "Beep Playback Switch", temp);
851 if (!knew)
852 return -ENOMEM;
853 knew->private_value =
854 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
855 }
856
857 /* check to see if there is volume support for the amp */
858 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
859 knew = snd_hda_gen_add_kctl(&spec->gen,
860 "Beep Playback Volume",
861 &beep_vol_ctl);
862 if (!knew)
863 return -ENOMEM;
864 knew->private_value =
865 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
866 }
867 return 0;
868}
869
870#ifdef CONFIG_SND_HDA_INPUT_BEEP
871#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
872
873static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
874 struct snd_ctl_elem_value *ucontrol)
875{
876 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
877 ucontrol->value.integer.value[0] = codec->beep->enabled;
878 return 0;
879}
880
881static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
882 struct snd_ctl_elem_value *ucontrol)
883{
884 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
885 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
886}
887
888static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
889 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
890 .name = "Beep Playback Switch",
891 .info = stac_dig_beep_switch_info,
892 .get = stac_dig_beep_switch_get,
893 .put = stac_dig_beep_switch_put,
894};
895
896static int stac_beep_switch_ctl(struct hda_codec *codec)
897{
898 struct sigmatel_spec *spec = codec->spec;
899
900 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
901 return -ENOMEM;
902 return 0;
903}
904#endif
905
906/*
907 * SPDIF-out mux controls
908 */
909
910static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_info *uinfo)
912{
913 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
914 struct sigmatel_spec *spec = codec->spec;
915 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
916}
917
918static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
919 struct snd_ctl_elem_value *ucontrol)
920{
921 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
922 struct sigmatel_spec *spec = codec->spec;
923 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
924
925 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
926 return 0;
927}
928
929static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
930 struct snd_ctl_elem_value *ucontrol)
931{
932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
933 struct sigmatel_spec *spec = codec->spec;
934 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
935
936 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
937 spec->gen.autocfg.dig_out_pins[smux_idx],
938 &spec->cur_smux[smux_idx]);
939}
940
941static const struct snd_kcontrol_new stac_smux_mixer = {
942 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
943 .name = "IEC958 Playback Source",
944 /* count set later */
945 .info = stac_smux_enum_info,
946 .get = stac_smux_enum_get,
947 .put = stac_smux_enum_put,
948};
949
950static const char * const stac_spdif_labels[] = {
951 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
952};
953
954static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
955{
956 struct sigmatel_spec *spec = codec->spec;
957 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
958 const char * const *labels = spec->spdif_labels;
959 struct snd_kcontrol_new *kctl;
960 int i, num_cons;
961
962 if (cfg->dig_outs < 1)
963 return 0;
964
965 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
966 if (num_cons <= 1)
967 return 0;
968
969 if (!labels)
970 labels = stac_spdif_labels;
971 for (i = 0; i < num_cons; i++) {
972 if (snd_BUG_ON(!labels[i]))
973 return -EINVAL;
974 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
975 }
976
977 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
978 if (!kctl)
979 return -ENOMEM;
980 kctl->count = cfg->dig_outs;
981
982 return 0;
983}
984
985static const struct hda_verb stac9200_eapd_init[] = {
986 /* set dac0mux for dac converter */
987 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
988 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
989 {}
990};
991
992static const struct hda_verb dell_eq_core_init[] = {
993 /* set master volume to max value without distortion
994 * and direct control */
995 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
996 {}
997};
998
999static const struct hda_verb stac92hd73xx_core_init[] = {
1000 /* set master volume and direct control */
1001 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1002 {}
1003};
1004
1005static const struct hda_verb stac92hd83xxx_core_init[] = {
1006 /* power state controls amps */
1007 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1008 {}
1009};
1010
1011static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1012 { 0x22, 0x785, 0x43 },
1013 { 0x22, 0x782, 0xe0 },
1014 { 0x22, 0x795, 0x00 },
1015 {}
1016};
1017
1018static const struct hda_verb stac92hd71bxx_core_init[] = {
1019 /* set master volume and direct control */
1020 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1021 {}
1022};
1023
1024static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
1025 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1026 0x0f, 0x0a, 0x0d, 0
1027};
1028
1029static const struct hda_verb stac925x_core_init[] = {
1030 /* set dac0mux for dac converter */
1031 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1032 /* mute the master volume */
1033 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1034 {}
1035};
1036
1037static const struct hda_verb stac922x_core_init[] = {
1038 /* set master volume and direct control */
1039 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1040 {}
1041};
1042
1043static const struct hda_verb d965_core_init[] = {
1044 /* unmute node 0x1b */
1045 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1046 /* select node 0x03 as DAC */
1047 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1048 {}
1049};
1050
1051static const struct hda_verb dell_3st_core_init[] = {
1052 /* don't set delta bit */
1053 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1054 /* unmute node 0x1b */
1055 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1056 /* select node 0x03 as DAC */
1057 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1058 {}
1059};
1060
1061static const struct hda_verb stac927x_core_init[] = {
1062 /* set master volume and direct control */
1063 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1064 /* enable analog pc beep path */
1065 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1066 {}
1067};
1068
1069static const struct hda_verb stac927x_volknob_core_init[] = {
1070 /* don't set delta bit */
1071 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1072 /* enable analog pc beep path */
1073 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1074 {}
1075};
1076
1077static const struct hda_verb stac9205_core_init[] = {
1078 /* set master volume and direct control */
1079 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1080 /* enable analog pc beep path */
1081 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1082 {}
1083};
1084
1085static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1086 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1087
1088static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1089 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1090
1091static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1092 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1093
1094static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1095 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1096
1097static const struct snd_kcontrol_new stac9205_loopback =
1098 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1099
1100static const struct snd_kcontrol_new stac927x_loopback =
1101 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1102
1103static const struct hda_pintbl ref9200_pin_configs[] = {
1104 { 0x08, 0x01c47010 },
1105 { 0x09, 0x01447010 },
1106 { 0x0d, 0x0221401f },
1107 { 0x0e, 0x01114010 },
1108 { 0x0f, 0x02a19020 },
1109 { 0x10, 0x01a19021 },
1110 { 0x11, 0x90100140 },
1111 { 0x12, 0x01813122 },
1112 {}
1113};
1114
1115static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1116 { 0x08, 0x400000fe },
1117 { 0x09, 0x404500f4 },
1118 { 0x0d, 0x400100f0 },
1119 { 0x0e, 0x90110010 },
1120 { 0x0f, 0x400100f1 },
1121 { 0x10, 0x02a1902e },
1122 { 0x11, 0x500000f2 },
1123 { 0x12, 0x500000f3 },
1124 {}
1125};
1126
1127static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1128 { 0x08, 0x400000fe },
1129 { 0x09, 0x404500f4 },
1130 { 0x0d, 0x400100f0 },
1131 { 0x0e, 0x90110010 },
1132 { 0x0f, 0x400100f1 },
1133 { 0x10, 0x02a1902e },
1134 { 0x11, 0x500000f2 },
1135 { 0x12, 0x500000f3 },
1136 {}
1137};
1138
1139/*
1140 STAC 9200 pin configs for
1141 102801A8
1142 102801DE
1143 102801E8
1144*/
1145static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1146 { 0x08, 0x400001f0 },
1147 { 0x09, 0x400001f1 },
1148 { 0x0d, 0x02214030 },
1149 { 0x0e, 0x01014010 },
1150 { 0x0f, 0x02a19020 },
1151 { 0x10, 0x01a19021 },
1152 { 0x11, 0x90100140 },
1153 { 0x12, 0x01813122 },
1154 {}
1155};
1156
1157/*
1158 STAC 9200 pin configs for
1159 102801C0
1160 102801C1
1161*/
1162static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1163 { 0x08, 0x400001f0 },
1164 { 0x09, 0x400001f1 },
1165 { 0x0d, 0x0221401f },
1166 { 0x0e, 0x01014010 },
1167 { 0x0f, 0x01813020 },
1168 { 0x10, 0x02a19021 },
1169 { 0x11, 0x90100140 },
1170 { 0x12, 0x400001f2 },
1171 {}
1172};
1173
1174/*
1175 STAC 9200 pin configs for
1176 102801C4 (Dell Dimension E310)
1177 102801C5
1178 102801C7
1179 102801D9
1180 102801DA
1181 102801E3
1182*/
1183static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1184 { 0x08, 0x400001f0 },
1185 { 0x09, 0x400001f1 },
1186 { 0x0d, 0x0221401f },
1187 { 0x0e, 0x01014010 },
1188 { 0x0f, 0x01813020 },
1189 { 0x10, 0x01a19021 },
1190 { 0x11, 0x90100140 },
1191 { 0x12, 0x400001f2 },
1192 {}
1193};
1194
1195
1196/*
1197 STAC 9200-32 pin configs for
1198 102801B5 (Dell Inspiron 630m)
1199 102801D8 (Dell Inspiron 640m)
1200*/
1201static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1202 { 0x08, 0x40c003fa },
1203 { 0x09, 0x03441340 },
1204 { 0x0d, 0x0321121f },
1205 { 0x0e, 0x90170310 },
1206 { 0x0f, 0x408003fb },
1207 { 0x10, 0x03a11020 },
1208 { 0x11, 0x401003fc },
1209 { 0x12, 0x403003fd },
1210 {}
1211};
1212
1213/*
1214 STAC 9200-32 pin configs for
1215 102801C2 (Dell Latitude D620)
1216 102801C8
1217 102801CC (Dell Latitude D820)
1218 102801D4
1219 102801D6
1220*/
1221static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1222 { 0x08, 0x40c003fa },
1223 { 0x09, 0x0144131f },
1224 { 0x0d, 0x0321121f },
1225 { 0x0e, 0x90170310 },
1226 { 0x0f, 0x90a70321 },
1227 { 0x10, 0x03a11020 },
1228 { 0x11, 0x401003fb },
1229 { 0x12, 0x40f000fc },
1230 {}
1231};
1232
1233/*
1234 STAC 9200-32 pin configs for
1235 102801CE (Dell XPS M1710)
1236 102801CF (Dell Precision M90)
1237*/
1238static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1239 { 0x08, 0x40c003fa },
1240 { 0x09, 0x01441340 },
1241 { 0x0d, 0x0421421f },
1242 { 0x0e, 0x90170310 },
1243 { 0x0f, 0x408003fb },
1244 { 0x10, 0x04a1102e },
1245 { 0x11, 0x90170311 },
1246 { 0x12, 0x403003fc },
1247 {}
1248};
1249
1250/*
1251 STAC 9200-32 pin configs for
1252 102801C9
1253 102801CA
1254 102801CB (Dell Latitude 120L)
1255 102801D3
1256*/
1257static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1258 { 0x08, 0x40c003fa },
1259 { 0x09, 0x404003fb },
1260 { 0x0d, 0x0321121f },
1261 { 0x0e, 0x90170310 },
1262 { 0x0f, 0x408003fc },
1263 { 0x10, 0x03a11020 },
1264 { 0x11, 0x401003fd },
1265 { 0x12, 0x403003fe },
1266 {}
1267};
1268
1269/*
1270 STAC 9200-32 pin configs for
1271 102801BD (Dell Inspiron E1505n)
1272 102801EE
1273 102801EF
1274*/
1275static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1276 { 0x08, 0x40c003fa },
1277 { 0x09, 0x01441340 },
1278 { 0x0d, 0x0421121f },
1279 { 0x0e, 0x90170310 },
1280 { 0x0f, 0x408003fb },
1281 { 0x10, 0x04a11020 },
1282 { 0x11, 0x401003fc },
1283 { 0x12, 0x403003fd },
1284 {}
1285};
1286
1287/*
1288 STAC 9200-32 pin configs for
1289 102801F5 (Dell Inspiron 1501)
1290 102801F6
1291*/
1292static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1293 { 0x08, 0x40c003fa },
1294 { 0x09, 0x404003fb },
1295 { 0x0d, 0x0421121f },
1296 { 0x0e, 0x90170310 },
1297 { 0x0f, 0x408003fc },
1298 { 0x10, 0x04a11020 },
1299 { 0x11, 0x401003fd },
1300 { 0x12, 0x403003fe },
1301 {}
1302};
1303
1304/*
1305 STAC 9200-32
1306 102801CD (Dell Inspiron E1705/9400)
1307*/
1308static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1309 { 0x08, 0x40c003fa },
1310 { 0x09, 0x01441340 },
1311 { 0x0d, 0x0421121f },
1312 { 0x0e, 0x90170310 },
1313 { 0x0f, 0x90170310 },
1314 { 0x10, 0x04a11020 },
1315 { 0x11, 0x90170310 },
1316 { 0x12, 0x40f003fc },
1317 {}
1318};
1319
1320static const struct hda_pintbl oqo9200_pin_configs[] = {
1321 { 0x08, 0x40c000f0 },
1322 { 0x09, 0x404000f1 },
1323 { 0x0d, 0x0221121f },
1324 { 0x0e, 0x02211210 },
1325 { 0x0f, 0x90170111 },
1326 { 0x10, 0x90a70120 },
1327 { 0x11, 0x400000f2 },
1328 { 0x12, 0x400000f3 },
1329 {}
1330};
1331
1332/*
1333 * STAC 92HD700
1334 * 18881000 Amigaone X1000
1335 */
1336static const struct hda_pintbl nemo_pin_configs[] = {
1337 { 0x0a, 0x02214020 }, /* Front panel HP socket */
1338 { 0x0b, 0x02a19080 }, /* Front Mic */
1339 { 0x0c, 0x0181304e }, /* Line in */
1340 { 0x0d, 0x01014010 }, /* Line out */
1341 { 0x0e, 0x01a19040 }, /* Rear Mic */
1342 { 0x0f, 0x01011012 }, /* Rear speakers */
1343 { 0x10, 0x01016011 }, /* Center speaker */
1344 { 0x11, 0x01012014 }, /* Side speakers (7.1) */
1345 { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */
1346 { 0x13, 0x411111f0 }, /* Unused */
1347 { 0x14, 0x411111f0 }, /* Unused */
1348 { 0x21, 0x01442170 }, /* S/PDIF line out */
1349 { 0x22, 0x411111f0 }, /* Unused */
1350 { 0x23, 0x411111f0 }, /* Unused */
1351 {}
1352};
1353
1354static void stac9200_fixup_panasonic(struct hda_codec *codec,
1355 const struct hda_fixup *fix, int action)
1356{
1357 struct sigmatel_spec *spec = codec->spec;
1358
1359 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1360 spec->gpio_mask = spec->gpio_dir = 0x09;
1361 spec->gpio_data = 0x00;
1362 /* CF-74 has no headphone detection, and the driver should *NOT*
1363 * do detection and HP/speaker toggle because the hardware does it.
1364 */
1365 spec->gen.suppress_auto_mute = 1;
1366 }
1367}
1368
1369
1370static const struct hda_fixup stac9200_fixups[] = {
1371 [STAC_REF] = {
1372 .type = HDA_FIXUP_PINS,
1373 .v.pins = ref9200_pin_configs,
1374 },
1375 [STAC_9200_OQO] = {
1376 .type = HDA_FIXUP_PINS,
1377 .v.pins = oqo9200_pin_configs,
1378 .chained = true,
1379 .chain_id = STAC_9200_EAPD_INIT,
1380 },
1381 [STAC_9200_DELL_D21] = {
1382 .type = HDA_FIXUP_PINS,
1383 .v.pins = dell9200_d21_pin_configs,
1384 },
1385 [STAC_9200_DELL_D22] = {
1386 .type = HDA_FIXUP_PINS,
1387 .v.pins = dell9200_d22_pin_configs,
1388 },
1389 [STAC_9200_DELL_D23] = {
1390 .type = HDA_FIXUP_PINS,
1391 .v.pins = dell9200_d23_pin_configs,
1392 },
1393 [STAC_9200_DELL_M21] = {
1394 .type = HDA_FIXUP_PINS,
1395 .v.pins = dell9200_m21_pin_configs,
1396 },
1397 [STAC_9200_DELL_M22] = {
1398 .type = HDA_FIXUP_PINS,
1399 .v.pins = dell9200_m22_pin_configs,
1400 },
1401 [STAC_9200_DELL_M23] = {
1402 .type = HDA_FIXUP_PINS,
1403 .v.pins = dell9200_m23_pin_configs,
1404 },
1405 [STAC_9200_DELL_M24] = {
1406 .type = HDA_FIXUP_PINS,
1407 .v.pins = dell9200_m24_pin_configs,
1408 },
1409 [STAC_9200_DELL_M25] = {
1410 .type = HDA_FIXUP_PINS,
1411 .v.pins = dell9200_m25_pin_configs,
1412 },
1413 [STAC_9200_DELL_M26] = {
1414 .type = HDA_FIXUP_PINS,
1415 .v.pins = dell9200_m26_pin_configs,
1416 },
1417 [STAC_9200_DELL_M27] = {
1418 .type = HDA_FIXUP_PINS,
1419 .v.pins = dell9200_m27_pin_configs,
1420 },
1421 [STAC_9200_M4] = {
1422 .type = HDA_FIXUP_PINS,
1423 .v.pins = gateway9200_m4_pin_configs,
1424 .chained = true,
1425 .chain_id = STAC_9200_EAPD_INIT,
1426 },
1427 [STAC_9200_M4_2] = {
1428 .type = HDA_FIXUP_PINS,
1429 .v.pins = gateway9200_m4_2_pin_configs,
1430 .chained = true,
1431 .chain_id = STAC_9200_EAPD_INIT,
1432 },
1433 [STAC_9200_PANASONIC] = {
1434 .type = HDA_FIXUP_FUNC,
1435 .v.func = stac9200_fixup_panasonic,
1436 },
1437 [STAC_9200_EAPD_INIT] = {
1438 .type = HDA_FIXUP_VERBS,
1439 .v.verbs = (const struct hda_verb[]) {
1440 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1441 {}
1442 },
1443 },
1444};
1445
1446static const struct hda_model_fixup stac9200_models[] = {
1447 { .id = STAC_REF, .name = "ref" },
1448 { .id = STAC_9200_OQO, .name = "oqo" },
1449 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1450 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1451 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1452 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1453 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1454 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1455 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1456 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1457 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1458 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1459 { .id = STAC_9200_M4, .name = "gateway-m4" },
1460 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1461 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1462 {}
1463};
1464
1465static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1466 /* SigmaTel reference board */
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1468 "DFI LanParty", STAC_REF),
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1470 "DFI LanParty", STAC_REF),
1471 /* Dell laptops have BIOS problem */
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1473 "unknown Dell", STAC_9200_DELL_D21),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1475 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1477 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1479 "unknown Dell", STAC_9200_DELL_D22),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1481 "unknown Dell", STAC_9200_DELL_D22),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1483 "Dell Latitude D620", STAC_9200_DELL_M22),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1485 "unknown Dell", STAC_9200_DELL_D23),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1487 "unknown Dell", STAC_9200_DELL_D23),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1489 "unknown Dell", STAC_9200_DELL_M22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1491 "unknown Dell", STAC_9200_DELL_M24),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1493 "unknown Dell", STAC_9200_DELL_M24),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1495 "Dell Latitude 120L", STAC_9200_DELL_M24),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1497 "Dell Latitude D820", STAC_9200_DELL_M22),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1499 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1501 "Dell XPS M1710", STAC_9200_DELL_M23),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1503 "Dell Precision M90", STAC_9200_DELL_M23),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1505 "unknown Dell", STAC_9200_DELL_M22),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1507 "unknown Dell", STAC_9200_DELL_M22),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1509 "unknown Dell", STAC_9200_DELL_M22),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1511 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1513 "unknown Dell", STAC_9200_DELL_D23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1515 "unknown Dell", STAC_9200_DELL_D23),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1517 "unknown Dell", STAC_9200_DELL_D21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1521 "unknown Dell", STAC_9200_DELL_D21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1523 "unknown Dell", STAC_9200_DELL_M25),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1525 "unknown Dell", STAC_9200_DELL_M25),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1527 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1529 "unknown Dell", STAC_9200_DELL_M26),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
1531 "Dell Latitude D430", STAC_9200_DELL_M22),
1532 /* Panasonic */
1533 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1534 /* Gateway machines needs EAPD to be set on resume */
1535 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1536 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1537 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1538 /* OQO Mobile */
1539 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1540 {} /* terminator */
1541};
1542
1543static const struct hda_pintbl ref925x_pin_configs[] = {
1544 { 0x07, 0x40c003f0 },
1545 { 0x08, 0x424503f2 },
1546 { 0x0a, 0x01813022 },
1547 { 0x0b, 0x02a19021 },
1548 { 0x0c, 0x90a70320 },
1549 { 0x0d, 0x02214210 },
1550 { 0x10, 0x01019020 },
1551 { 0x11, 0x9033032e },
1552 {}
1553};
1554
1555static const struct hda_pintbl stac925xM1_pin_configs[] = {
1556 { 0x07, 0x40c003f4 },
1557 { 0x08, 0x424503f2 },
1558 { 0x0a, 0x400000f3 },
1559 { 0x0b, 0x02a19020 },
1560 { 0x0c, 0x40a000f0 },
1561 { 0x0d, 0x90100210 },
1562 { 0x10, 0x400003f1 },
1563 { 0x11, 0x9033032e },
1564 {}
1565};
1566
1567static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1568 { 0x07, 0x40c003f4 },
1569 { 0x08, 0x424503f2 },
1570 { 0x0a, 0x400000f3 },
1571 { 0x0b, 0x02a19020 },
1572 { 0x0c, 0x40a000f0 },
1573 { 0x0d, 0x90100210 },
1574 { 0x10, 0x400003f1 },
1575 { 0x11, 0x9033032e },
1576 {}
1577};
1578
1579static const struct hda_pintbl stac925xM2_pin_configs[] = {
1580 { 0x07, 0x40c003f4 },
1581 { 0x08, 0x424503f2 },
1582 { 0x0a, 0x400000f3 },
1583 { 0x0b, 0x02a19020 },
1584 { 0x0c, 0x40a000f0 },
1585 { 0x0d, 0x90100210 },
1586 { 0x10, 0x400003f1 },
1587 { 0x11, 0x9033032e },
1588 {}
1589};
1590
1591static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1592 { 0x07, 0x40c003f4 },
1593 { 0x08, 0x424503f2 },
1594 { 0x0a, 0x400000f3 },
1595 { 0x0b, 0x02a19020 },
1596 { 0x0c, 0x40a000f0 },
1597 { 0x0d, 0x90100210 },
1598 { 0x10, 0x400003f1 },
1599 { 0x11, 0x9033032e },
1600 {}
1601};
1602
1603static const struct hda_pintbl stac925xM3_pin_configs[] = {
1604 { 0x07, 0x40c003f4 },
1605 { 0x08, 0x424503f2 },
1606 { 0x0a, 0x400000f3 },
1607 { 0x0b, 0x02a19020 },
1608 { 0x0c, 0x40a000f0 },
1609 { 0x0d, 0x90100210 },
1610 { 0x10, 0x400003f1 },
1611 { 0x11, 0x503303f3 },
1612 {}
1613};
1614
1615static const struct hda_pintbl stac925xM5_pin_configs[] = {
1616 { 0x07, 0x40c003f4 },
1617 { 0x08, 0x424503f2 },
1618 { 0x0a, 0x400000f3 },
1619 { 0x0b, 0x02a19020 },
1620 { 0x0c, 0x40a000f0 },
1621 { 0x0d, 0x90100210 },
1622 { 0x10, 0x400003f1 },
1623 { 0x11, 0x9033032e },
1624 {}
1625};
1626
1627static const struct hda_pintbl stac925xM6_pin_configs[] = {
1628 { 0x07, 0x40c003f4 },
1629 { 0x08, 0x424503f2 },
1630 { 0x0a, 0x400000f3 },
1631 { 0x0b, 0x02a19020 },
1632 { 0x0c, 0x40a000f0 },
1633 { 0x0d, 0x90100210 },
1634 { 0x10, 0x400003f1 },
1635 { 0x11, 0x90330320 },
1636 {}
1637};
1638
1639static const struct hda_fixup stac925x_fixups[] = {
1640 [STAC_REF] = {
1641 .type = HDA_FIXUP_PINS,
1642 .v.pins = ref925x_pin_configs,
1643 },
1644 [STAC_M1] = {
1645 .type = HDA_FIXUP_PINS,
1646 .v.pins = stac925xM1_pin_configs,
1647 },
1648 [STAC_M1_2] = {
1649 .type = HDA_FIXUP_PINS,
1650 .v.pins = stac925xM1_2_pin_configs,
1651 },
1652 [STAC_M2] = {
1653 .type = HDA_FIXUP_PINS,
1654 .v.pins = stac925xM2_pin_configs,
1655 },
1656 [STAC_M2_2] = {
1657 .type = HDA_FIXUP_PINS,
1658 .v.pins = stac925xM2_2_pin_configs,
1659 },
1660 [STAC_M3] = {
1661 .type = HDA_FIXUP_PINS,
1662 .v.pins = stac925xM3_pin_configs,
1663 },
1664 [STAC_M5] = {
1665 .type = HDA_FIXUP_PINS,
1666 .v.pins = stac925xM5_pin_configs,
1667 },
1668 [STAC_M6] = {
1669 .type = HDA_FIXUP_PINS,
1670 .v.pins = stac925xM6_pin_configs,
1671 },
1672};
1673
1674static const struct hda_model_fixup stac925x_models[] = {
1675 { .id = STAC_REF, .name = "ref" },
1676 { .id = STAC_M1, .name = "m1" },
1677 { .id = STAC_M1_2, .name = "m1-2" },
1678 { .id = STAC_M2, .name = "m2" },
1679 { .id = STAC_M2_2, .name = "m2-2" },
1680 { .id = STAC_M3, .name = "m3" },
1681 { .id = STAC_M5, .name = "m5" },
1682 { .id = STAC_M6, .name = "m6" },
1683 {}
1684};
1685
1686static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1687 /* SigmaTel reference board */
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1690 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1691
1692 /* Default table for unknown ID */
1693 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1694
1695 /* gateway machines are checked via codec ssid */
1696 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1697 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1698 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1699 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1700 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1701 /* Not sure about the brand name for those */
1702 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1703 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1704 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1705 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1706 {} /* terminator */
1707};
1708
1709static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1710 // Port A-H
1711 { 0x0a, 0x02214030 },
1712 { 0x0b, 0x02a19040 },
1713 { 0x0c, 0x01a19020 },
1714 { 0x0d, 0x02214030 },
1715 { 0x0e, 0x0181302e },
1716 { 0x0f, 0x01014010 },
1717 { 0x10, 0x01014020 },
1718 { 0x11, 0x01014030 },
1719 // CD in
1720 { 0x12, 0x02319040 },
1721 // Digial Mic ins
1722 { 0x13, 0x90a000f0 },
1723 { 0x14, 0x90a000f0 },
1724 // Digital outs
1725 { 0x22, 0x01452050 },
1726 { 0x23, 0x01452050 },
1727 {}
1728};
1729
1730static const struct hda_pintbl dell_m6_pin_configs[] = {
1731 { 0x0a, 0x0321101f },
1732 { 0x0b, 0x4f00000f },
1733 { 0x0c, 0x4f0000f0 },
1734 { 0x0d, 0x90170110 },
1735 { 0x0e, 0x03a11020 },
1736 { 0x0f, 0x0321101f },
1737 { 0x10, 0x4f0000f0 },
1738 { 0x11, 0x4f0000f0 },
1739 { 0x12, 0x4f0000f0 },
1740 { 0x13, 0x90a60160 },
1741 { 0x14, 0x4f0000f0 },
1742 { 0x22, 0x4f0000f0 },
1743 { 0x23, 0x4f0000f0 },
1744 {}
1745};
1746
1747static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1748 { 0x0a, 0x0321101f },
1749 { 0x0b, 0x0321101f },
1750 { 0x0c, 0x03a11020 },
1751 { 0x0d, 0x03014020 },
1752 { 0x0e, 0x90170110 },
1753 { 0x0f, 0x4f0000f0 },
1754 { 0x10, 0x4f0000f0 },
1755 { 0x11, 0x4f0000f0 },
1756 { 0x12, 0x4f0000f0 },
1757 { 0x13, 0x90a60160 },
1758 { 0x14, 0x4f0000f0 },
1759 { 0x22, 0x4f0000f0 },
1760 { 0x23, 0x904601b0 },
1761 {}
1762};
1763
1764static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1765 // Analog outputs
1766 { 0x0a, 0x02214230 },
1767 { 0x0b, 0x02A19240 },
1768 { 0x0c, 0x01013214 },
1769 { 0x0d, 0x01014210 },
1770 { 0x0e, 0x01A19250 },
1771 { 0x0f, 0x01011212 },
1772 { 0x10, 0x01016211 },
1773 // Digital output
1774 { 0x22, 0x01451380 },
1775 { 0x23, 0x40f000f0 },
1776 {}
1777};
1778
1779static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1780 { 0x0a, 0x02214030 },
1781 { 0x0b, 0x02A19010 },
1782 {}
1783};
1784
1785static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1786 { 0x0e, 0x400000f0 },
1787 {}
1788};
1789
1790static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1791 const struct hda_fixup *fix, int action)
1792{
1793 struct sigmatel_spec *spec = codec->spec;
1794
1795 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1796 return;
1797
1798 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1799 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1800}
1801
1802static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1803{
1804 struct sigmatel_spec *spec = codec->spec;
1805
1806 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1807 spec->eapd_switch = 0;
1808}
1809
1810static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1811 const struct hda_fixup *fix, int action)
1812{
1813 struct sigmatel_spec *spec = codec->spec;
1814
1815 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1816 return;
1817
1818 stac92hd73xx_fixup_dell(codec);
1819 snd_hda_add_verbs(codec, dell_eq_core_init);
1820 spec->volknob_init = 1;
1821}
1822
1823/* Analog Mics */
1824static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1825 const struct hda_fixup *fix, int action)
1826{
1827 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1828 return;
1829
1830 stac92hd73xx_fixup_dell(codec);
1831 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1832}
1833
1834/* Digital Mics */
1835static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1836 const struct hda_fixup *fix, int action)
1837{
1838 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1839 return;
1840
1841 stac92hd73xx_fixup_dell(codec);
1842 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1843}
1844
1845/* Both */
1846static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1847 const struct hda_fixup *fix, int action)
1848{
1849 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1850 return;
1851
1852 stac92hd73xx_fixup_dell(codec);
1853 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1854 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1855}
1856
1857static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1858 const struct hda_fixup *fix, int action)
1859{
1860 struct sigmatel_spec *spec = codec->spec;
1861
1862 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1863 return;
1864
1865 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1866 spec->eapd_switch = 0;
1867}
1868
1869static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1870 const struct hda_fixup *fix, int action)
1871{
1872 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1873 codec->no_jack_detect = 1;
1874}
1875
1876
1877static void stac92hd73xx_disable_automute(struct hda_codec *codec,
1878 const struct hda_fixup *fix, int action)
1879{
1880 struct sigmatel_spec *spec = codec->spec;
1881
1882 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1883 return;
1884
1885 spec->gen.suppress_auto_mute = 1;
1886}
1887
1888static const struct hda_fixup stac92hd73xx_fixups[] = {
1889 [STAC_92HD73XX_REF] = {
1890 .type = HDA_FIXUP_FUNC,
1891 .v.func = stac92hd73xx_fixup_ref,
1892 },
1893 [STAC_DELL_M6_AMIC] = {
1894 .type = HDA_FIXUP_FUNC,
1895 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1896 },
1897 [STAC_DELL_M6_DMIC] = {
1898 .type = HDA_FIXUP_FUNC,
1899 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1900 },
1901 [STAC_DELL_M6_BOTH] = {
1902 .type = HDA_FIXUP_FUNC,
1903 .v.func = stac92hd73xx_fixup_dell_m6_both,
1904 },
1905 [STAC_DELL_EQ] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_dell_eq,
1908 },
1909 [STAC_ALIENWARE_M17X] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_alienware_m17x,
1912 },
1913 [STAC_ELO_VUPOINT_15MX] = {
1914 .type = HDA_FIXUP_FUNC,
1915 .v.func = stac92hd73xx_disable_automute,
1916 },
1917 [STAC_92HD73XX_INTEL] = {
1918 .type = HDA_FIXUP_PINS,
1919 .v.pins = intel_dg45id_pin_configs,
1920 },
1921 [STAC_92HD73XX_NO_JD] = {
1922 .type = HDA_FIXUP_FUNC,
1923 .v.func = stac92hd73xx_fixup_no_jd,
1924 },
1925 [STAC_92HD89XX_HP_FRONT_JACK] = {
1926 .type = HDA_FIXUP_PINS,
1927 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1928 },
1929 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1930 .type = HDA_FIXUP_PINS,
1931 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1932 },
1933 [STAC_92HD73XX_ASUS_MOBO] = {
1934 .type = HDA_FIXUP_PINS,
1935 .v.pins = (const struct hda_pintbl[]) {
1936 /* enable 5.1 and SPDIF out */
1937 { 0x0c, 0x01014411 },
1938 { 0x0d, 0x01014410 },
1939 { 0x0e, 0x01014412 },
1940 { 0x22, 0x014b1180 },
1941 { }
1942 }
1943 },
1944};
1945
1946static const struct hda_model_fixup stac92hd73xx_models[] = {
1947 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1948 { .id = STAC_92HD73XX_REF, .name = "ref" },
1949 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1950 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1951 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1952 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1953 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1954 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1955 { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" },
1956 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
1957 {}
1958};
1959
1960static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1961 /* SigmaTel reference board */
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1963 "DFI LanParty", STAC_92HD73XX_REF),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1965 "DFI LanParty", STAC_92HD73XX_REF),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5001,
1967 "Intel DP45SG", STAC_92HD73XX_INTEL),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1969 "Intel DG45ID", STAC_92HD73XX_INTEL),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1971 "Intel DG45FC", STAC_92HD73XX_INTEL),
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1973 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1975 "unknown Dell", STAC_DELL_M6_DMIC),
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1977 "unknown Dell", STAC_DELL_M6_BOTH),
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1979 "unknown Dell", STAC_DELL_M6_BOTH),
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1981 "unknown Dell", STAC_DELL_M6_AMIC),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1983 "unknown Dell", STAC_DELL_M6_AMIC),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1985 "unknown Dell", STAC_DELL_M6_DMIC),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1987 "unknown Dell", STAC_DELL_M6_DMIC),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1989 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1991 "Dell Studio 17", STAC_DELL_M6_DMIC),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1993 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1995 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1997 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1999 "Dell Studio 1558", STAC_DELL_M6_DMIC),
2000 /* codec SSID matching */
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
2002 "Alienware M17x", STAC_ALIENWARE_M17X),
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
2004 "Alienware M17x", STAC_ALIENWARE_M17X),
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
2006 "Alienware M17x R3", STAC_DELL_EQ),
2007 SND_PCI_QUIRK(0x1059, 0x1011,
2008 "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
2010 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
2012 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
2014 STAC_92HD73XX_ASUS_MOBO),
2015 {} /* terminator */
2016};
2017
2018static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2019 { 0x0a, 0x02214030 },
2020 { 0x0b, 0x02211010 },
2021 { 0x0c, 0x02a19020 },
2022 { 0x0d, 0x02170130 },
2023 { 0x0e, 0x01014050 },
2024 { 0x0f, 0x01819040 },
2025 { 0x10, 0x01014020 },
2026 { 0x11, 0x90a3014e },
2027 { 0x1f, 0x01451160 },
2028 { 0x20, 0x98560170 },
2029 {}
2030};
2031
2032static const struct hda_pintbl dell_s14_pin_configs[] = {
2033 { 0x0a, 0x0221403f },
2034 { 0x0b, 0x0221101f },
2035 { 0x0c, 0x02a19020 },
2036 { 0x0d, 0x90170110 },
2037 { 0x0e, 0x40f000f0 },
2038 { 0x0f, 0x40f000f0 },
2039 { 0x10, 0x40f000f0 },
2040 { 0x11, 0x90a60160 },
2041 { 0x1f, 0x40f000f0 },
2042 { 0x20, 0x40f000f0 },
2043 {}
2044};
2045
2046static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2047 { 0x0a, 0x02a11020 },
2048 { 0x0b, 0x0221101f },
2049 { 0x0c, 0x400000f0 },
2050 { 0x0d, 0x90170110 },
2051 { 0x0e, 0x400000f1 },
2052 { 0x0f, 0x400000f2 },
2053 { 0x10, 0x400000f3 },
2054 { 0x11, 0x90a60160 },
2055 { 0x1f, 0x400000f4 },
2056 { 0x20, 0x400000f5 },
2057 {}
2058};
2059
2060static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2061 { 0x0a, 0x03a12050 },
2062 { 0x0b, 0x0321201f },
2063 { 0x0c, 0x40f000f0 },
2064 { 0x0d, 0x90170110 },
2065 { 0x0e, 0x40f000f0 },
2066 { 0x0f, 0x40f000f0 },
2067 { 0x10, 0x90170110 },
2068 { 0x11, 0xd5a30140 },
2069 { 0x1f, 0x40f000f0 },
2070 { 0x20, 0x40f000f0 },
2071 {}
2072};
2073
2074static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2075 { 0x0a, 0x01813050 },
2076 { 0x0b, 0x0421201f },
2077 { 0x0c, 0x04a1205e },
2078 { 0x0d, 0x96130310 },
2079 { 0x0e, 0x96130310 },
2080 { 0x0f, 0x0101401f },
2081 { 0x10, 0x1111611f },
2082 { 0x11, 0xd5a30130 },
2083 {}
2084};
2085
2086static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2087 { 0x0a, 0x40f000f0 },
2088 { 0x0b, 0x0221101f },
2089 { 0x0c, 0x02a11020 },
2090 { 0x0d, 0x92170110 },
2091 { 0x0e, 0x40f000f0 },
2092 { 0x0f, 0x92170110 },
2093 { 0x10, 0x40f000f0 },
2094 { 0x11, 0xd5a30130 },
2095 { 0x1f, 0x40f000f0 },
2096 { 0x20, 0x40f000f0 },
2097 {}
2098};
2099
2100static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2101 const struct hda_fixup *fix, int action)
2102{
2103 struct sigmatel_spec *spec = codec->spec;
2104
2105 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2106 return;
2107
2108 if (hp_bnb2011_with_dock(codec)) {
2109 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2110 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2111 }
2112
2113 if (find_mute_led_cfg(codec, spec->default_polarity))
2114 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
2115 spec->gpio_led,
2116 spec->gpio_led_polarity);
2117
2118 /* allow auto-switching of dock line-in */
2119 spec->gen.line_in_auto_switch = true;
2120}
2121
2122static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2123 const struct hda_fixup *fix, int action)
2124{
2125 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2126 return;
2127
2128 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2129 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2130}
2131
2132static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2133 const struct hda_fixup *fix, int action)
2134{
2135 struct sigmatel_spec *spec = codec->spec;
2136
2137 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2138 spec->default_polarity = 0;
2139}
2140
2141static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2142 const struct hda_fixup *fix, int action)
2143{
2144 struct sigmatel_spec *spec = codec->spec;
2145
2146 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2147 spec->default_polarity = 1;
2148}
2149
2150static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2151 const struct hda_fixup *fix, int action)
2152{
2153 struct sigmatel_spec *spec = codec->spec;
2154
2155 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2156 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2157#ifdef CONFIG_PM
2158 /* resetting controller clears GPIO, so we need to keep on */
2159 codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
2160#endif
2161 }
2162}
2163
2164static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2165 const struct hda_fixup *fix, int action)
2166{
2167 struct sigmatel_spec *spec = codec->spec;
2168
2169 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2170 spec->gpio_led = 0x10; /* GPIO4 */
2171 spec->default_polarity = 0;
2172 }
2173}
2174
2175static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2176 const struct hda_fixup *fix, int action)
2177{
2178 struct sigmatel_spec *spec = codec->spec;
2179
2180 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2181 spec->headset_jack = 1;
2182}
2183
2184static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2185 const struct hda_fixup *fix,
2186 int action)
2187{
2188 struct sigmatel_spec *spec = codec->spec;
2189
2190 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2191 return;
2192 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2193 spec->gpio_data = 0x10;
2194 spec->eapd_switch = 0;
2195}
2196
2197static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2198 const struct hda_fixup *fix,
2199 int action)
2200{
2201 struct sigmatel_spec *spec = codec->spec;
2202 static const hda_nid_t preferred_pairs[] = {
2203 0xd, 0x13,
2204 0
2205 };
2206
2207 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2208 return;
2209
2210 spec->gen.preferred_dacs = preferred_pairs;
2211}
2212
2213static const struct hda_verb hp_bnb13_eq_verbs[] = {
2214 /* 44.1KHz base */
2215 { 0x22, 0x7A6, 0x3E },
2216 { 0x22, 0x7A7, 0x68 },
2217 { 0x22, 0x7A8, 0x17 },
2218 { 0x22, 0x7A9, 0x3E },
2219 { 0x22, 0x7AA, 0x68 },
2220 { 0x22, 0x7AB, 0x17 },
2221 { 0x22, 0x7AC, 0x00 },
2222 { 0x22, 0x7AD, 0x80 },
2223 { 0x22, 0x7A6, 0x83 },
2224 { 0x22, 0x7A7, 0x2F },
2225 { 0x22, 0x7A8, 0xD1 },
2226 { 0x22, 0x7A9, 0x83 },
2227 { 0x22, 0x7AA, 0x2F },
2228 { 0x22, 0x7AB, 0xD1 },
2229 { 0x22, 0x7AC, 0x01 },
2230 { 0x22, 0x7AD, 0x80 },
2231 { 0x22, 0x7A6, 0x3E },
2232 { 0x22, 0x7A7, 0x68 },
2233 { 0x22, 0x7A8, 0x17 },
2234 { 0x22, 0x7A9, 0x3E },
2235 { 0x22, 0x7AA, 0x68 },
2236 { 0x22, 0x7AB, 0x17 },
2237 { 0x22, 0x7AC, 0x02 },
2238 { 0x22, 0x7AD, 0x80 },
2239 { 0x22, 0x7A6, 0x7C },
2240 { 0x22, 0x7A7, 0xC6 },
2241 { 0x22, 0x7A8, 0x0C },
2242 { 0x22, 0x7A9, 0x7C },
2243 { 0x22, 0x7AA, 0xC6 },
2244 { 0x22, 0x7AB, 0x0C },
2245 { 0x22, 0x7AC, 0x03 },
2246 { 0x22, 0x7AD, 0x80 },
2247 { 0x22, 0x7A6, 0xC3 },
2248 { 0x22, 0x7A7, 0x25 },
2249 { 0x22, 0x7A8, 0xAF },
2250 { 0x22, 0x7A9, 0xC3 },
2251 { 0x22, 0x7AA, 0x25 },
2252 { 0x22, 0x7AB, 0xAF },
2253 { 0x22, 0x7AC, 0x04 },
2254 { 0x22, 0x7AD, 0x80 },
2255 { 0x22, 0x7A6, 0x3E },
2256 { 0x22, 0x7A7, 0x85 },
2257 { 0x22, 0x7A8, 0x73 },
2258 { 0x22, 0x7A9, 0x3E },
2259 { 0x22, 0x7AA, 0x85 },
2260 { 0x22, 0x7AB, 0x73 },
2261 { 0x22, 0x7AC, 0x05 },
2262 { 0x22, 0x7AD, 0x80 },
2263 { 0x22, 0x7A6, 0x85 },
2264 { 0x22, 0x7A7, 0x39 },
2265 { 0x22, 0x7A8, 0xC7 },
2266 { 0x22, 0x7A9, 0x85 },
2267 { 0x22, 0x7AA, 0x39 },
2268 { 0x22, 0x7AB, 0xC7 },
2269 { 0x22, 0x7AC, 0x06 },
2270 { 0x22, 0x7AD, 0x80 },
2271 { 0x22, 0x7A6, 0x3C },
2272 { 0x22, 0x7A7, 0x90 },
2273 { 0x22, 0x7A8, 0xB0 },
2274 { 0x22, 0x7A9, 0x3C },
2275 { 0x22, 0x7AA, 0x90 },
2276 { 0x22, 0x7AB, 0xB0 },
2277 { 0x22, 0x7AC, 0x07 },
2278 { 0x22, 0x7AD, 0x80 },
2279 { 0x22, 0x7A6, 0x7A },
2280 { 0x22, 0x7A7, 0xC6 },
2281 { 0x22, 0x7A8, 0x39 },
2282 { 0x22, 0x7A9, 0x7A },
2283 { 0x22, 0x7AA, 0xC6 },
2284 { 0x22, 0x7AB, 0x39 },
2285 { 0x22, 0x7AC, 0x08 },
2286 { 0x22, 0x7AD, 0x80 },
2287 { 0x22, 0x7A6, 0xC4 },
2288 { 0x22, 0x7A7, 0xE9 },
2289 { 0x22, 0x7A8, 0xDC },
2290 { 0x22, 0x7A9, 0xC4 },
2291 { 0x22, 0x7AA, 0xE9 },
2292 { 0x22, 0x7AB, 0xDC },
2293 { 0x22, 0x7AC, 0x09 },
2294 { 0x22, 0x7AD, 0x80 },
2295 { 0x22, 0x7A6, 0x3D },
2296 { 0x22, 0x7A7, 0xE1 },
2297 { 0x22, 0x7A8, 0x0D },
2298 { 0x22, 0x7A9, 0x3D },
2299 { 0x22, 0x7AA, 0xE1 },
2300 { 0x22, 0x7AB, 0x0D },
2301 { 0x22, 0x7AC, 0x0A },
2302 { 0x22, 0x7AD, 0x80 },
2303 { 0x22, 0x7A6, 0x89 },
2304 { 0x22, 0x7A7, 0xB6 },
2305 { 0x22, 0x7A8, 0xEB },
2306 { 0x22, 0x7A9, 0x89 },
2307 { 0x22, 0x7AA, 0xB6 },
2308 { 0x22, 0x7AB, 0xEB },
2309 { 0x22, 0x7AC, 0x0B },
2310 { 0x22, 0x7AD, 0x80 },
2311 { 0x22, 0x7A6, 0x39 },
2312 { 0x22, 0x7A7, 0x9D },
2313 { 0x22, 0x7A8, 0xFE },
2314 { 0x22, 0x7A9, 0x39 },
2315 { 0x22, 0x7AA, 0x9D },
2316 { 0x22, 0x7AB, 0xFE },
2317 { 0x22, 0x7AC, 0x0C },
2318 { 0x22, 0x7AD, 0x80 },
2319 { 0x22, 0x7A6, 0x76 },
2320 { 0x22, 0x7A7, 0x49 },
2321 { 0x22, 0x7A8, 0x15 },
2322 { 0x22, 0x7A9, 0x76 },
2323 { 0x22, 0x7AA, 0x49 },
2324 { 0x22, 0x7AB, 0x15 },
2325 { 0x22, 0x7AC, 0x0D },
2326 { 0x22, 0x7AD, 0x80 },
2327 { 0x22, 0x7A6, 0xC8 },
2328 { 0x22, 0x7A7, 0x80 },
2329 { 0x22, 0x7A8, 0xF5 },
2330 { 0x22, 0x7A9, 0xC8 },
2331 { 0x22, 0x7AA, 0x80 },
2332 { 0x22, 0x7AB, 0xF5 },
2333 { 0x22, 0x7AC, 0x0E },
2334 { 0x22, 0x7AD, 0x80 },
2335 { 0x22, 0x7A6, 0x40 },
2336 { 0x22, 0x7A7, 0x00 },
2337 { 0x22, 0x7A8, 0x00 },
2338 { 0x22, 0x7A9, 0x40 },
2339 { 0x22, 0x7AA, 0x00 },
2340 { 0x22, 0x7AB, 0x00 },
2341 { 0x22, 0x7AC, 0x0F },
2342 { 0x22, 0x7AD, 0x80 },
2343 { 0x22, 0x7A6, 0x90 },
2344 { 0x22, 0x7A7, 0x68 },
2345 { 0x22, 0x7A8, 0xF1 },
2346 { 0x22, 0x7A9, 0x90 },
2347 { 0x22, 0x7AA, 0x68 },
2348 { 0x22, 0x7AB, 0xF1 },
2349 { 0x22, 0x7AC, 0x10 },
2350 { 0x22, 0x7AD, 0x80 },
2351 { 0x22, 0x7A6, 0x34 },
2352 { 0x22, 0x7A7, 0x47 },
2353 { 0x22, 0x7A8, 0x6C },
2354 { 0x22, 0x7A9, 0x34 },
2355 { 0x22, 0x7AA, 0x47 },
2356 { 0x22, 0x7AB, 0x6C },
2357 { 0x22, 0x7AC, 0x11 },
2358 { 0x22, 0x7AD, 0x80 },
2359 { 0x22, 0x7A6, 0x6F },
2360 { 0x22, 0x7A7, 0x97 },
2361 { 0x22, 0x7A8, 0x0F },
2362 { 0x22, 0x7A9, 0x6F },
2363 { 0x22, 0x7AA, 0x97 },
2364 { 0x22, 0x7AB, 0x0F },
2365 { 0x22, 0x7AC, 0x12 },
2366 { 0x22, 0x7AD, 0x80 },
2367 { 0x22, 0x7A6, 0xCB },
2368 { 0x22, 0x7A7, 0xB8 },
2369 { 0x22, 0x7A8, 0x94 },
2370 { 0x22, 0x7A9, 0xCB },
2371 { 0x22, 0x7AA, 0xB8 },
2372 { 0x22, 0x7AB, 0x94 },
2373 { 0x22, 0x7AC, 0x13 },
2374 { 0x22, 0x7AD, 0x80 },
2375 { 0x22, 0x7A6, 0x40 },
2376 { 0x22, 0x7A7, 0x00 },
2377 { 0x22, 0x7A8, 0x00 },
2378 { 0x22, 0x7A9, 0x40 },
2379 { 0x22, 0x7AA, 0x00 },
2380 { 0x22, 0x7AB, 0x00 },
2381 { 0x22, 0x7AC, 0x14 },
2382 { 0x22, 0x7AD, 0x80 },
2383 { 0x22, 0x7A6, 0x95 },
2384 { 0x22, 0x7A7, 0x76 },
2385 { 0x22, 0x7A8, 0x5B },
2386 { 0x22, 0x7A9, 0x95 },
2387 { 0x22, 0x7AA, 0x76 },
2388 { 0x22, 0x7AB, 0x5B },
2389 { 0x22, 0x7AC, 0x15 },
2390 { 0x22, 0x7AD, 0x80 },
2391 { 0x22, 0x7A6, 0x31 },
2392 { 0x22, 0x7A7, 0xAC },
2393 { 0x22, 0x7A8, 0x31 },
2394 { 0x22, 0x7A9, 0x31 },
2395 { 0x22, 0x7AA, 0xAC },
2396 { 0x22, 0x7AB, 0x31 },
2397 { 0x22, 0x7AC, 0x16 },
2398 { 0x22, 0x7AD, 0x80 },
2399 { 0x22, 0x7A6, 0x6A },
2400 { 0x22, 0x7A7, 0x89 },
2401 { 0x22, 0x7A8, 0xA5 },
2402 { 0x22, 0x7A9, 0x6A },
2403 { 0x22, 0x7AA, 0x89 },
2404 { 0x22, 0x7AB, 0xA5 },
2405 { 0x22, 0x7AC, 0x17 },
2406 { 0x22, 0x7AD, 0x80 },
2407 { 0x22, 0x7A6, 0xCE },
2408 { 0x22, 0x7A7, 0x53 },
2409 { 0x22, 0x7A8, 0xCF },
2410 { 0x22, 0x7A9, 0xCE },
2411 { 0x22, 0x7AA, 0x53 },
2412 { 0x22, 0x7AB, 0xCF },
2413 { 0x22, 0x7AC, 0x18 },
2414 { 0x22, 0x7AD, 0x80 },
2415 { 0x22, 0x7A6, 0x40 },
2416 { 0x22, 0x7A7, 0x00 },
2417 { 0x22, 0x7A8, 0x00 },
2418 { 0x22, 0x7A9, 0x40 },
2419 { 0x22, 0x7AA, 0x00 },
2420 { 0x22, 0x7AB, 0x00 },
2421 { 0x22, 0x7AC, 0x19 },
2422 { 0x22, 0x7AD, 0x80 },
2423 /* 48KHz base */
2424 { 0x22, 0x7A6, 0x3E },
2425 { 0x22, 0x7A7, 0x88 },
2426 { 0x22, 0x7A8, 0xDC },
2427 { 0x22, 0x7A9, 0x3E },
2428 { 0x22, 0x7AA, 0x88 },
2429 { 0x22, 0x7AB, 0xDC },
2430 { 0x22, 0x7AC, 0x1A },
2431 { 0x22, 0x7AD, 0x80 },
2432 { 0x22, 0x7A6, 0x82 },
2433 { 0x22, 0x7A7, 0xEE },
2434 { 0x22, 0x7A8, 0x46 },
2435 { 0x22, 0x7A9, 0x82 },
2436 { 0x22, 0x7AA, 0xEE },
2437 { 0x22, 0x7AB, 0x46 },
2438 { 0x22, 0x7AC, 0x1B },
2439 { 0x22, 0x7AD, 0x80 },
2440 { 0x22, 0x7A6, 0x3E },
2441 { 0x22, 0x7A7, 0x88 },
2442 { 0x22, 0x7A8, 0xDC },
2443 { 0x22, 0x7A9, 0x3E },
2444 { 0x22, 0x7AA, 0x88 },
2445 { 0x22, 0x7AB, 0xDC },
2446 { 0x22, 0x7AC, 0x1C },
2447 { 0x22, 0x7AD, 0x80 },
2448 { 0x22, 0x7A6, 0x7D },
2449 { 0x22, 0x7A7, 0x09 },
2450 { 0x22, 0x7A8, 0x28 },
2451 { 0x22, 0x7A9, 0x7D },
2452 { 0x22, 0x7AA, 0x09 },
2453 { 0x22, 0x7AB, 0x28 },
2454 { 0x22, 0x7AC, 0x1D },
2455 { 0x22, 0x7AD, 0x80 },
2456 { 0x22, 0x7A6, 0xC2 },
2457 { 0x22, 0x7A7, 0xE5 },
2458 { 0x22, 0x7A8, 0xB4 },
2459 { 0x22, 0x7A9, 0xC2 },
2460 { 0x22, 0x7AA, 0xE5 },
2461 { 0x22, 0x7AB, 0xB4 },
2462 { 0x22, 0x7AC, 0x1E },
2463 { 0x22, 0x7AD, 0x80 },
2464 { 0x22, 0x7A6, 0x3E },
2465 { 0x22, 0x7A7, 0xA3 },
2466 { 0x22, 0x7A8, 0x1F },
2467 { 0x22, 0x7A9, 0x3E },
2468 { 0x22, 0x7AA, 0xA3 },
2469 { 0x22, 0x7AB, 0x1F },
2470 { 0x22, 0x7AC, 0x1F },
2471 { 0x22, 0x7AD, 0x80 },
2472 { 0x22, 0x7A6, 0x84 },
2473 { 0x22, 0x7A7, 0xCA },
2474 { 0x22, 0x7A8, 0xF1 },
2475 { 0x22, 0x7A9, 0x84 },
2476 { 0x22, 0x7AA, 0xCA },
2477 { 0x22, 0x7AB, 0xF1 },
2478 { 0x22, 0x7AC, 0x20 },
2479 { 0x22, 0x7AD, 0x80 },
2480 { 0x22, 0x7A6, 0x3C },
2481 { 0x22, 0x7A7, 0xD5 },
2482 { 0x22, 0x7A8, 0x9C },
2483 { 0x22, 0x7A9, 0x3C },
2484 { 0x22, 0x7AA, 0xD5 },
2485 { 0x22, 0x7AB, 0x9C },
2486 { 0x22, 0x7AC, 0x21 },
2487 { 0x22, 0x7AD, 0x80 },
2488 { 0x22, 0x7A6, 0x7B },
2489 { 0x22, 0x7A7, 0x35 },
2490 { 0x22, 0x7A8, 0x0F },
2491 { 0x22, 0x7A9, 0x7B },
2492 { 0x22, 0x7AA, 0x35 },
2493 { 0x22, 0x7AB, 0x0F },
2494 { 0x22, 0x7AC, 0x22 },
2495 { 0x22, 0x7AD, 0x80 },
2496 { 0x22, 0x7A6, 0xC4 },
2497 { 0x22, 0x7A7, 0x87 },
2498 { 0x22, 0x7A8, 0x45 },
2499 { 0x22, 0x7A9, 0xC4 },
2500 { 0x22, 0x7AA, 0x87 },
2501 { 0x22, 0x7AB, 0x45 },
2502 { 0x22, 0x7AC, 0x23 },
2503 { 0x22, 0x7AD, 0x80 },
2504 { 0x22, 0x7A6, 0x3E },
2505 { 0x22, 0x7A7, 0x0A },
2506 { 0x22, 0x7A8, 0x78 },
2507 { 0x22, 0x7A9, 0x3E },
2508 { 0x22, 0x7AA, 0x0A },
2509 { 0x22, 0x7AB, 0x78 },
2510 { 0x22, 0x7AC, 0x24 },
2511 { 0x22, 0x7AD, 0x80 },
2512 { 0x22, 0x7A6, 0x88 },
2513 { 0x22, 0x7A7, 0xE2 },
2514 { 0x22, 0x7A8, 0x05 },
2515 { 0x22, 0x7A9, 0x88 },
2516 { 0x22, 0x7AA, 0xE2 },
2517 { 0x22, 0x7AB, 0x05 },
2518 { 0x22, 0x7AC, 0x25 },
2519 { 0x22, 0x7AD, 0x80 },
2520 { 0x22, 0x7A6, 0x3A },
2521 { 0x22, 0x7A7, 0x1A },
2522 { 0x22, 0x7A8, 0xA3 },
2523 { 0x22, 0x7A9, 0x3A },
2524 { 0x22, 0x7AA, 0x1A },
2525 { 0x22, 0x7AB, 0xA3 },
2526 { 0x22, 0x7AC, 0x26 },
2527 { 0x22, 0x7AD, 0x80 },
2528 { 0x22, 0x7A6, 0x77 },
2529 { 0x22, 0x7A7, 0x1D },
2530 { 0x22, 0x7A8, 0xFB },
2531 { 0x22, 0x7A9, 0x77 },
2532 { 0x22, 0x7AA, 0x1D },
2533 { 0x22, 0x7AB, 0xFB },
2534 { 0x22, 0x7AC, 0x27 },
2535 { 0x22, 0x7AD, 0x80 },
2536 { 0x22, 0x7A6, 0xC7 },
2537 { 0x22, 0x7A7, 0xDA },
2538 { 0x22, 0x7A8, 0xE5 },
2539 { 0x22, 0x7A9, 0xC7 },
2540 { 0x22, 0x7AA, 0xDA },
2541 { 0x22, 0x7AB, 0xE5 },
2542 { 0x22, 0x7AC, 0x28 },
2543 { 0x22, 0x7AD, 0x80 },
2544 { 0x22, 0x7A6, 0x40 },
2545 { 0x22, 0x7A7, 0x00 },
2546 { 0x22, 0x7A8, 0x00 },
2547 { 0x22, 0x7A9, 0x40 },
2548 { 0x22, 0x7AA, 0x00 },
2549 { 0x22, 0x7AB, 0x00 },
2550 { 0x22, 0x7AC, 0x29 },
2551 { 0x22, 0x7AD, 0x80 },
2552 { 0x22, 0x7A6, 0x8E },
2553 { 0x22, 0x7A7, 0xD7 },
2554 { 0x22, 0x7A8, 0x22 },
2555 { 0x22, 0x7A9, 0x8E },
2556 { 0x22, 0x7AA, 0xD7 },
2557 { 0x22, 0x7AB, 0x22 },
2558 { 0x22, 0x7AC, 0x2A },
2559 { 0x22, 0x7AD, 0x80 },
2560 { 0x22, 0x7A6, 0x35 },
2561 { 0x22, 0x7A7, 0x26 },
2562 { 0x22, 0x7A8, 0xC6 },
2563 { 0x22, 0x7A9, 0x35 },
2564 { 0x22, 0x7AA, 0x26 },
2565 { 0x22, 0x7AB, 0xC6 },
2566 { 0x22, 0x7AC, 0x2B },
2567 { 0x22, 0x7AD, 0x80 },
2568 { 0x22, 0x7A6, 0x71 },
2569 { 0x22, 0x7A7, 0x28 },
2570 { 0x22, 0x7A8, 0xDE },
2571 { 0x22, 0x7A9, 0x71 },
2572 { 0x22, 0x7AA, 0x28 },
2573 { 0x22, 0x7AB, 0xDE },
2574 { 0x22, 0x7AC, 0x2C },
2575 { 0x22, 0x7AD, 0x80 },
2576 { 0x22, 0x7A6, 0xCA },
2577 { 0x22, 0x7A7, 0xD9 },
2578 { 0x22, 0x7A8, 0x3A },
2579 { 0x22, 0x7A9, 0xCA },
2580 { 0x22, 0x7AA, 0xD9 },
2581 { 0x22, 0x7AB, 0x3A },
2582 { 0x22, 0x7AC, 0x2D },
2583 { 0x22, 0x7AD, 0x80 },
2584 { 0x22, 0x7A6, 0x40 },
2585 { 0x22, 0x7A7, 0x00 },
2586 { 0x22, 0x7A8, 0x00 },
2587 { 0x22, 0x7A9, 0x40 },
2588 { 0x22, 0x7AA, 0x00 },
2589 { 0x22, 0x7AB, 0x00 },
2590 { 0x22, 0x7AC, 0x2E },
2591 { 0x22, 0x7AD, 0x80 },
2592 { 0x22, 0x7A6, 0x93 },
2593 { 0x22, 0x7A7, 0x5E },
2594 { 0x22, 0x7A8, 0xD8 },
2595 { 0x22, 0x7A9, 0x93 },
2596 { 0x22, 0x7AA, 0x5E },
2597 { 0x22, 0x7AB, 0xD8 },
2598 { 0x22, 0x7AC, 0x2F },
2599 { 0x22, 0x7AD, 0x80 },
2600 { 0x22, 0x7A6, 0x32 },
2601 { 0x22, 0x7A7, 0xB7 },
2602 { 0x22, 0x7A8, 0xB1 },
2603 { 0x22, 0x7A9, 0x32 },
2604 { 0x22, 0x7AA, 0xB7 },
2605 { 0x22, 0x7AB, 0xB1 },
2606 { 0x22, 0x7AC, 0x30 },
2607 { 0x22, 0x7AD, 0x80 },
2608 { 0x22, 0x7A6, 0x6C },
2609 { 0x22, 0x7A7, 0xA1 },
2610 { 0x22, 0x7A8, 0x28 },
2611 { 0x22, 0x7A9, 0x6C },
2612 { 0x22, 0x7AA, 0xA1 },
2613 { 0x22, 0x7AB, 0x28 },
2614 { 0x22, 0x7AC, 0x31 },
2615 { 0x22, 0x7AD, 0x80 },
2616 { 0x22, 0x7A6, 0xCD },
2617 { 0x22, 0x7A7, 0x48 },
2618 { 0x22, 0x7A8, 0x4F },
2619 { 0x22, 0x7A9, 0xCD },
2620 { 0x22, 0x7AA, 0x48 },
2621 { 0x22, 0x7AB, 0x4F },
2622 { 0x22, 0x7AC, 0x32 },
2623 { 0x22, 0x7AD, 0x80 },
2624 { 0x22, 0x7A6, 0x40 },
2625 { 0x22, 0x7A7, 0x00 },
2626 { 0x22, 0x7A8, 0x00 },
2627 { 0x22, 0x7A9, 0x40 },
2628 { 0x22, 0x7AA, 0x00 },
2629 { 0x22, 0x7AB, 0x00 },
2630 { 0x22, 0x7AC, 0x33 },
2631 { 0x22, 0x7AD, 0x80 },
2632 /* common */
2633 { 0x22, 0x782, 0xC1 },
2634 { 0x22, 0x771, 0x2C },
2635 { 0x22, 0x772, 0x2C },
2636 { 0x22, 0x788, 0x04 },
2637 { 0x01, 0x7B0, 0x08 },
2638 {}
2639};
2640
2641static const struct hda_fixup stac92hd83xxx_fixups[] = {
2642 [STAC_92HD83XXX_REF] = {
2643 .type = HDA_FIXUP_PINS,
2644 .v.pins = ref92hd83xxx_pin_configs,
2645 },
2646 [STAC_92HD83XXX_PWR_REF] = {
2647 .type = HDA_FIXUP_PINS,
2648 .v.pins = ref92hd83xxx_pin_configs,
2649 },
2650 [STAC_DELL_S14] = {
2651 .type = HDA_FIXUP_PINS,
2652 .v.pins = dell_s14_pin_configs,
2653 },
2654 [STAC_DELL_VOSTRO_3500] = {
2655 .type = HDA_FIXUP_PINS,
2656 .v.pins = dell_vostro_3500_pin_configs,
2657 },
2658 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2659 .type = HDA_FIXUP_PINS,
2660 .v.pins = hp_cNB11_intquad_pin_configs,
2661 .chained = true,
2662 .chain_id = STAC_92HD83XXX_HP,
2663 },
2664 [STAC_92HD83XXX_HP] = {
2665 .type = HDA_FIXUP_FUNC,
2666 .v.func = stac92hd83xxx_fixup_hp,
2667 },
2668 [STAC_HP_DV7_4000] = {
2669 .type = HDA_FIXUP_PINS,
2670 .v.pins = hp_dv7_4000_pin_configs,
2671 .chained = true,
2672 .chain_id = STAC_92HD83XXX_HP,
2673 },
2674 [STAC_HP_ZEPHYR] = {
2675 .type = HDA_FIXUP_FUNC,
2676 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2677 .chained = true,
2678 .chain_id = STAC_92HD83XXX_HP,
2679 },
2680 [STAC_92HD83XXX_HP_LED] = {
2681 .type = HDA_FIXUP_FUNC,
2682 .v.func = stac92hd83xxx_fixup_hp_led,
2683 .chained = true,
2684 .chain_id = STAC_92HD83XXX_HP,
2685 },
2686 [STAC_92HD83XXX_HP_INV_LED] = {
2687 .type = HDA_FIXUP_FUNC,
2688 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2689 .chained = true,
2690 .chain_id = STAC_92HD83XXX_HP,
2691 },
2692 [STAC_92HD83XXX_HP_MIC_LED] = {
2693 .type = HDA_FIXUP_FUNC,
2694 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2695 .chained = true,
2696 .chain_id = STAC_92HD83XXX_HP,
2697 },
2698 [STAC_HP_LED_GPIO10] = {
2699 .type = HDA_FIXUP_FUNC,
2700 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2701 .chained = true,
2702 .chain_id = STAC_92HD83XXX_HP,
2703 },
2704 [STAC_92HD83XXX_HEADSET_JACK] = {
2705 .type = HDA_FIXUP_FUNC,
2706 .v.func = stac92hd83xxx_fixup_headset_jack,
2707 },
2708 [STAC_HP_ENVY_BASS] = {
2709 .type = HDA_FIXUP_PINS,
2710 .v.pins = (const struct hda_pintbl[]) {
2711 { 0x0f, 0x90170111 },
2712 {}
2713 },
2714 },
2715 [STAC_HP_BNB13_EQ] = {
2716 .type = HDA_FIXUP_VERBS,
2717 .v.verbs = hp_bnb13_eq_verbs,
2718 .chained = true,
2719 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2720 },
2721 [STAC_HP_ENVY_TS_BASS] = {
2722 .type = HDA_FIXUP_PINS,
2723 .v.pins = (const struct hda_pintbl[]) {
2724 { 0x10, 0x92170111 },
2725 {}
2726 },
2727 },
2728 [STAC_HP_ENVY_TS_DAC_BIND] = {
2729 .type = HDA_FIXUP_FUNC,
2730 .v.func = hp_envy_ts_fixup_dac_bind,
2731 .chained = true,
2732 .chain_id = STAC_HP_ENVY_TS_BASS,
2733 },
2734 [STAC_92HD83XXX_GPIO10_EAPD] = {
2735 .type = HDA_FIXUP_FUNC,
2736 .v.func = stac92hd83xxx_fixup_gpio10_eapd,
2737 },
2738};
2739
2740static const struct hda_model_fixup stac92hd83xxx_models[] = {
2741 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2742 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2743 { .id = STAC_DELL_S14, .name = "dell-s14" },
2744 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2745 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2746 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2747 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2748 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2749 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2750 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2751 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2752 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2753 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2754 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
2755 {}
2756};
2757
2758static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2759 /* SigmaTel reference board */
2760 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2761 "DFI LanParty", STAC_92HD83XXX_REF),
2762 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2763 "DFI LanParty", STAC_92HD83XXX_REF),
2764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2765 "unknown Dell", STAC_DELL_S14),
2766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2767 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2769 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2771 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2773 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2775 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2777 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2779 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2781 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2783 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2785 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2787 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2789 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2791 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2793 "HP Pavilion dv7", STAC_HP_DV7_4000),
2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2795 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2797 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2799 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2801 "HP Folio 13", STAC_HP_LED_GPIO10),
2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2803 "HP Folio", STAC_HP_BNB13_EQ),
2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2805 "HP bNB13", STAC_HP_BNB13_EQ),
2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2807 "HP bNB13", STAC_HP_BNB13_EQ),
2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2809 "HP bNB13", STAC_HP_BNB13_EQ),
2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2811 "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2813 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2815 "HP bNB13", STAC_HP_BNB13_EQ),
2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2817 "HP bNB13", STAC_HP_BNB13_EQ),
2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2819 "HP bNB13", STAC_HP_BNB13_EQ),
2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2821 "HP bNB13", STAC_HP_BNB13_EQ),
2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2823 "HP bNB13", STAC_HP_BNB13_EQ),
2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2825 "HP bNB13", STAC_HP_BNB13_EQ),
2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2827 "HP bNB13", STAC_HP_BNB13_EQ),
2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2829 "HP bNB13", STAC_HP_BNB13_EQ),
2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2831 "HP bNB13", STAC_HP_BNB13_EQ),
2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2833 "HP bNB13", STAC_HP_BNB13_EQ),
2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2835 "HP bNB13", STAC_HP_BNB13_EQ),
2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2837 "HP bNB13", STAC_HP_BNB13_EQ),
2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2839 "HP bNB13", STAC_HP_BNB13_EQ),
2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2841 "HP bNB13", STAC_HP_BNB13_EQ),
2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2843 "HP bNB13", STAC_HP_BNB13_EQ),
2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2845 "HP bNB13", STAC_HP_BNB13_EQ),
2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2847 "HP bNB13", STAC_HP_BNB13_EQ),
2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2849 "HP bNB13", STAC_HP_BNB13_EQ),
2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2851 "HP bNB13", STAC_HP_BNB13_EQ),
2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2853 "HP bNB13", STAC_HP_BNB13_EQ),
2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2855 "HP bNB13", STAC_HP_BNB13_EQ),
2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2857 "HP bNB13", STAC_HP_BNB13_EQ),
2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2859 "HP bNB13", STAC_HP_BNB13_EQ),
2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2861 "HP bNB13", STAC_HP_BNB13_EQ),
2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2863 "HP bNB13", STAC_HP_BNB13_EQ),
2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2865 "HP bNB13", STAC_HP_BNB13_EQ),
2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2867 "HP bNB13", STAC_HP_BNB13_EQ),
2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2869 "HP bNB13", STAC_HP_BNB13_EQ),
2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2871 "HP bNB13", STAC_HP_BNB13_EQ),
2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2873 "HP bNB13", STAC_HP_BNB13_EQ),
2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2875 "HP bNB13", STAC_HP_BNB13_EQ),
2876 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2877 "HP bNB13", STAC_HP_BNB13_EQ),
2878 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2879 "HP bNB13", STAC_HP_BNB13_EQ),
2880 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2881 "HP bNB13", STAC_HP_BNB13_EQ),
2882 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2883 "HP bNB13", STAC_HP_BNB13_EQ),
2884 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2885 "HP bNB13", STAC_HP_BNB13_EQ),
2886 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2887 "HP bNB13", STAC_HP_BNB13_EQ),
2888 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2889 "HP bNB13", STAC_HP_BNB13_EQ),
2890 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2891 "HP bNB13", STAC_HP_BNB13_EQ),
2892 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2893 "HP bNB13", STAC_HP_BNB13_EQ),
2894 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2895 "HP bNB13", STAC_HP_BNB13_EQ),
2896 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2897 "HP bNB13", STAC_HP_BNB13_EQ),
2898 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2899 "HP bNB13", STAC_HP_BNB13_EQ),
2900 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2901 "HP bNB13", STAC_HP_BNB13_EQ),
2902 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2903 "HP", STAC_92HD83XXX_HP_MIC_LED),
2904 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2905 "HP", STAC_92HD83XXX_HP_MIC_LED),
2906 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2907 "HP", STAC_92HD83XXX_HP_MIC_LED),
2908 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2909 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2910 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2911 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2912 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2913 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2914 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2915 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2916 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2917 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2918 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2919 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2920 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2921 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2922 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2923 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2924 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2925 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2926 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2927 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2928 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2929 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2930 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2931 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2932 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2933 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2934 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2935 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2936 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2937 "HP", STAC_HP_ZEPHYR),
2938 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2939 "HP Mini", STAC_92HD83XXX_HP_LED),
2940 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2941 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2942 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2943 "HP Mini", STAC_92HD83XXX_HP_LED),
2944 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2945 /* match both for 0xfa91 and 0xfa93 */
2946 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
2947 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
2948 {} /* terminator */
2949};
2950
2951/* HP dv7 bass switch - GPIO5 */
2952#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2953static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2954 struct snd_ctl_elem_value *ucontrol)
2955{
2956 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2957 struct sigmatel_spec *spec = codec->spec;
2958 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2959 return 0;
2960}
2961
2962static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2963 struct snd_ctl_elem_value *ucontrol)
2964{
2965 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2966 struct sigmatel_spec *spec = codec->spec;
2967 unsigned int gpio_data;
2968
2969 gpio_data = (spec->gpio_data & ~0x20) |
2970 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2971 if (gpio_data == spec->gpio_data)
2972 return 0;
2973 spec->gpio_data = gpio_data;
2974 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2975 return 1;
2976}
2977
2978static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2979 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2980 .info = stac_hp_bass_gpio_info,
2981 .get = stac_hp_bass_gpio_get,
2982 .put = stac_hp_bass_gpio_put,
2983};
2984
2985static int stac_add_hp_bass_switch(struct hda_codec *codec)
2986{
2987 struct sigmatel_spec *spec = codec->spec;
2988
2989 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2990 &stac_hp_bass_sw_ctrl))
2991 return -ENOMEM;
2992
2993 spec->gpio_mask |= 0x20;
2994 spec->gpio_dir |= 0x20;
2995 spec->gpio_data |= 0x20;
2996 return 0;
2997}
2998
2999static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
3000 { 0x0a, 0x02214030 },
3001 { 0x0b, 0x02a19040 },
3002 { 0x0c, 0x01a19020 },
3003 { 0x0d, 0x01014010 },
3004 { 0x0e, 0x0181302e },
3005 { 0x0f, 0x01014010 },
3006 { 0x14, 0x01019020 },
3007 { 0x18, 0x90a000f0 },
3008 { 0x19, 0x90a000f0 },
3009 { 0x1e, 0x01452050 },
3010 { 0x1f, 0x01452050 },
3011 {}
3012};
3013
3014static const struct hda_pintbl dell_m4_1_pin_configs[] = {
3015 { 0x0a, 0x0421101f },
3016 { 0x0b, 0x04a11221 },
3017 { 0x0c, 0x40f000f0 },
3018 { 0x0d, 0x90170110 },
3019 { 0x0e, 0x23a1902e },
3020 { 0x0f, 0x23014250 },
3021 { 0x14, 0x40f000f0 },
3022 { 0x18, 0x90a000f0 },
3023 { 0x19, 0x40f000f0 },
3024 { 0x1e, 0x4f0000f0 },
3025 { 0x1f, 0x4f0000f0 },
3026 {}
3027};
3028
3029static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3030 { 0x0a, 0x0421101f },
3031 { 0x0b, 0x04a11221 },
3032 { 0x0c, 0x90a70330 },
3033 { 0x0d, 0x90170110 },
3034 { 0x0e, 0x23a1902e },
3035 { 0x0f, 0x23014250 },
3036 { 0x14, 0x40f000f0 },
3037 { 0x18, 0x40f000f0 },
3038 { 0x19, 0x40f000f0 },
3039 { 0x1e, 0x044413b0 },
3040 { 0x1f, 0x044413b0 },
3041 {}
3042};
3043
3044static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3045 { 0x0a, 0x0421101f },
3046 { 0x0b, 0x04a11221 },
3047 { 0x0c, 0x90a70330 },
3048 { 0x0d, 0x90170110 },
3049 { 0x0e, 0x40f000f0 },
3050 { 0x0f, 0x40f000f0 },
3051 { 0x14, 0x40f000f0 },
3052 { 0x18, 0x90a000f0 },
3053 { 0x19, 0x40f000f0 },
3054 { 0x1e, 0x044413b0 },
3055 { 0x1f, 0x044413b0 },
3056 {}
3057};
3058
3059static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3060 const struct hda_fixup *fix, int action)
3061{
3062 struct sigmatel_spec *spec = codec->spec;
3063
3064 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3065 return;
3066
3067 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3068 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3069}
3070
3071static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3072 const struct hda_fixup *fix, int action)
3073{
3074 struct sigmatel_spec *spec = codec->spec;
3075 struct hda_jack_callback *jack;
3076
3077 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3078 return;
3079
3080 /* Enable VREF power saving on GPIO1 detect */
3081 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
3082 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3083 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
3084 stac_vref_event);
3085 if (!IS_ERR(jack))
3086 jack->private_data = 0x02;
3087
3088 spec->gpio_mask |= 0x02;
3089
3090 /* enable internal microphone */
3091 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3092}
3093
3094static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3095 const struct hda_fixup *fix, int action)
3096{
3097 struct sigmatel_spec *spec = codec->spec;
3098
3099 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3100 return;
3101 spec->gpio_led = 0x01;
3102}
3103
3104static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3105 const struct hda_fixup *fix, int action)
3106{
3107 unsigned int cap;
3108
3109 switch (action) {
3110 case HDA_FIXUP_ACT_PRE_PROBE:
3111 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3112 break;
3113
3114 case HDA_FIXUP_ACT_PROBE:
3115 /* enable bass on HP dv7 */
3116 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3117 cap &= AC_GPIO_IO_COUNT;
3118 if (cap >= 6)
3119 stac_add_hp_bass_switch(codec);
3120 break;
3121 }
3122}
3123
3124static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3125 const struct hda_fixup *fix, int action)
3126{
3127 struct sigmatel_spec *spec = codec->spec;
3128
3129 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3130 return;
3131 spec->gpio_led = 0x08;
3132}
3133
3134static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3135{
3136 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3137
3138 /* count line-out, too, as BIOS sets often so */
3139 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3140 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3141 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3142}
3143
3144static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3145{
3146 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3147
3148 /* It was changed in the BIOS to just satisfy MS DTM.
3149 * Lets turn it back into follower HP
3150 */
3151 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3152 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3153 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3154 0x1f;
3155 snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3156}
3157
3158static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3159 const struct hda_fixup *fix, int action)
3160{
3161 struct sigmatel_spec *spec = codec->spec;
3162
3163 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3164 return;
3165
3166 /* when both output A and F are assigned, these are supposedly
3167 * dock and built-in headphones; fix both pin configs
3168 */
3169 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3170 fixup_hp_headphone(codec, 0x0a);
3171 fixup_hp_headphone(codec, 0x0f);
3172 }
3173
3174 if (find_mute_led_cfg(codec, 1))
3175 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
3176 spec->gpio_led,
3177 spec->gpio_led_polarity);
3178
3179}
3180
3181static const struct hda_fixup stac92hd71bxx_fixups[] = {
3182 [STAC_92HD71BXX_REF] = {
3183 .type = HDA_FIXUP_FUNC,
3184 .v.func = stac92hd71bxx_fixup_ref,
3185 },
3186 [STAC_DELL_M4_1] = {
3187 .type = HDA_FIXUP_PINS,
3188 .v.pins = dell_m4_1_pin_configs,
3189 },
3190 [STAC_DELL_M4_2] = {
3191 .type = HDA_FIXUP_PINS,
3192 .v.pins = dell_m4_2_pin_configs,
3193 },
3194 [STAC_DELL_M4_3] = {
3195 .type = HDA_FIXUP_PINS,
3196 .v.pins = dell_m4_3_pin_configs,
3197 },
3198 [STAC_HP_M4] = {
3199 .type = HDA_FIXUP_FUNC,
3200 .v.func = stac92hd71bxx_fixup_hp_m4,
3201 .chained = true,
3202 .chain_id = STAC_92HD71BXX_HP,
3203 },
3204 [STAC_HP_DV4] = {
3205 .type = HDA_FIXUP_FUNC,
3206 .v.func = stac92hd71bxx_fixup_hp_dv4,
3207 .chained = true,
3208 .chain_id = STAC_HP_DV5,
3209 },
3210 [STAC_HP_DV5] = {
3211 .type = HDA_FIXUP_FUNC,
3212 .v.func = stac92hd71bxx_fixup_hp_dv5,
3213 .chained = true,
3214 .chain_id = STAC_92HD71BXX_HP,
3215 },
3216 [STAC_HP_HDX] = {
3217 .type = HDA_FIXUP_FUNC,
3218 .v.func = stac92hd71bxx_fixup_hp_hdx,
3219 .chained = true,
3220 .chain_id = STAC_92HD71BXX_HP,
3221 },
3222 [STAC_92HD71BXX_HP] = {
3223 .type = HDA_FIXUP_FUNC,
3224 .v.func = stac92hd71bxx_fixup_hp,
3225 },
3226};
3227
3228static const struct hda_model_fixup stac92hd71bxx_models[] = {
3229 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3230 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3231 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3232 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3233 { .id = STAC_HP_M4, .name = "hp-m4" },
3234 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3235 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3236 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3237 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3238 {}
3239};
3240
3241static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3242 /* SigmaTel reference board */
3243 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3244 "DFI LanParty", STAC_92HD71BXX_REF),
3245 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3246 "DFI LanParty", STAC_92HD71BXX_REF),
3247 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3248 "HP", STAC_HP_DV5),
3249 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3250 "HP", STAC_HP_DV5),
3251 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3252 "HP dv4-7", STAC_HP_DV4),
3253 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3254 "HP dv4-7", STAC_HP_DV5),
3255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3256 "HP HDX", STAC_HP_HDX), /* HDX18 */
3257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3258 "HP mini 1000", STAC_HP_M4),
3259 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3260 "HP HDX", STAC_HP_HDX), /* HDX16 */
3261 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3262 "HP dv6", STAC_HP_DV5),
3263 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3264 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3265 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3266 "HP DV6", STAC_HP_DV5),
3267 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3268 "HP", STAC_HP_DV5),
3269 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3271 "unknown Dell", STAC_DELL_M4_1),
3272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3273 "unknown Dell", STAC_DELL_M4_1),
3274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3275 "unknown Dell", STAC_DELL_M4_1),
3276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3277 "unknown Dell", STAC_DELL_M4_1),
3278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3279 "unknown Dell", STAC_DELL_M4_1),
3280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3281 "unknown Dell", STAC_DELL_M4_1),
3282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3283 "unknown Dell", STAC_DELL_M4_1),
3284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3285 "unknown Dell", STAC_DELL_M4_2),
3286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3287 "unknown Dell", STAC_DELL_M4_2),
3288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3289 "unknown Dell", STAC_DELL_M4_2),
3290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3291 "unknown Dell", STAC_DELL_M4_2),
3292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3293 "unknown Dell", STAC_DELL_M4_3),
3294 {} /* terminator */
3295};
3296
3297static const struct hda_pintbl ref922x_pin_configs[] = {
3298 { 0x0a, 0x01014010 },
3299 { 0x0b, 0x01016011 },
3300 { 0x0c, 0x01012012 },
3301 { 0x0d, 0x0221401f },
3302 { 0x0e, 0x01813122 },
3303 { 0x0f, 0x01011014 },
3304 { 0x10, 0x01441030 },
3305 { 0x11, 0x01c41030 },
3306 { 0x15, 0x40000100 },
3307 { 0x1b, 0x40000100 },
3308 {}
3309};
3310
3311/*
3312 STAC 922X pin configs for
3313 102801A7
3314 102801AB
3315 102801A9
3316 102801D1
3317 102801D2
3318*/
3319static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3320 { 0x0a, 0x02214030 },
3321 { 0x0b, 0x01a19021 },
3322 { 0x0c, 0x01111012 },
3323 { 0x0d, 0x01114010 },
3324 { 0x0e, 0x02a19020 },
3325 { 0x0f, 0x01117011 },
3326 { 0x10, 0x400001f0 },
3327 { 0x11, 0x400001f1 },
3328 { 0x15, 0x01813122 },
3329 { 0x1b, 0x400001f2 },
3330 {}
3331};
3332
3333/*
3334 STAC 922X pin configs for
3335 102801AC
3336 102801D0
3337*/
3338static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3339 { 0x0a, 0x02214030 },
3340 { 0x0b, 0x01a19021 },
3341 { 0x0c, 0x01111012 },
3342 { 0x0d, 0x01114010 },
3343 { 0x0e, 0x02a19020 },
3344 { 0x0f, 0x01117011 },
3345 { 0x10, 0x01451140 },
3346 { 0x11, 0x400001f0 },
3347 { 0x15, 0x01813122 },
3348 { 0x1b, 0x400001f1 },
3349 {}
3350};
3351
3352/*
3353 STAC 922X pin configs for
3354 102801BF
3355*/
3356static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3357 { 0x0a, 0x0321101f },
3358 { 0x0b, 0x01112024 },
3359 { 0x0c, 0x01111222 },
3360 { 0x0d, 0x91174220 },
3361 { 0x0e, 0x03a11050 },
3362 { 0x0f, 0x01116221 },
3363 { 0x10, 0x90a70330 },
3364 { 0x11, 0x01452340 },
3365 { 0x15, 0x40C003f1 },
3366 { 0x1b, 0x405003f0 },
3367 {}
3368};
3369
3370/*
3371 STAC 9221 A1 pin configs for
3372 102801D7 (Dell XPS M1210)
3373*/
3374static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3375 { 0x0a, 0x02211211 },
3376 { 0x0b, 0x408103ff },
3377 { 0x0c, 0x02a1123e },
3378 { 0x0d, 0x90100310 },
3379 { 0x0e, 0x408003f1 },
3380 { 0x0f, 0x0221121f },
3381 { 0x10, 0x03451340 },
3382 { 0x11, 0x40c003f2 },
3383 { 0x15, 0x508003f3 },
3384 { 0x1b, 0x405003f4 },
3385 {}
3386};
3387
3388static const struct hda_pintbl d945gtp3_pin_configs[] = {
3389 { 0x0a, 0x0221401f },
3390 { 0x0b, 0x01a19022 },
3391 { 0x0c, 0x01813021 },
3392 { 0x0d, 0x01014010 },
3393 { 0x0e, 0x40000100 },
3394 { 0x0f, 0x40000100 },
3395 { 0x10, 0x40000100 },
3396 { 0x11, 0x40000100 },
3397 { 0x15, 0x02a19120 },
3398 { 0x1b, 0x40000100 },
3399 {}
3400};
3401
3402static const struct hda_pintbl d945gtp5_pin_configs[] = {
3403 { 0x0a, 0x0221401f },
3404 { 0x0b, 0x01011012 },
3405 { 0x0c, 0x01813024 },
3406 { 0x0d, 0x01014010 },
3407 { 0x0e, 0x01a19021 },
3408 { 0x0f, 0x01016011 },
3409 { 0x10, 0x01452130 },
3410 { 0x11, 0x40000100 },
3411 { 0x15, 0x02a19320 },
3412 { 0x1b, 0x40000100 },
3413 {}
3414};
3415
3416static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3417 { 0x0a, 0x0121e21f },
3418 { 0x0b, 0x400000ff },
3419 { 0x0c, 0x9017e110 },
3420 { 0x0d, 0x400000fd },
3421 { 0x0e, 0x400000fe },
3422 { 0x0f, 0x0181e020 },
3423 { 0x10, 0x1145e030 },
3424 { 0x11, 0x11c5e240 },
3425 { 0x15, 0x400000fc },
3426 { 0x1b, 0x400000fb },
3427 {}
3428};
3429
3430static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3431 { 0x0a, 0x0121e21f },
3432 { 0x0b, 0x90a7012e },
3433 { 0x0c, 0x9017e110 },
3434 { 0x0d, 0x400000fd },
3435 { 0x0e, 0x400000fe },
3436 { 0x0f, 0x0181e020 },
3437 { 0x10, 0x1145e230 },
3438 { 0x11, 0x500000fa },
3439 { 0x15, 0x400000fc },
3440 { 0x1b, 0x400000fb },
3441 {}
3442};
3443
3444static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3445 { 0x0a, 0x0121e21f },
3446 { 0x0b, 0x90a7012e },
3447 { 0x0c, 0x9017e110 },
3448 { 0x0d, 0x400000fd },
3449 { 0x0e, 0x400000fe },
3450 { 0x0f, 0x0181e020 },
3451 { 0x10, 0x1145e230 },
3452 { 0x11, 0x11c5e240 },
3453 { 0x15, 0x400000fc },
3454 { 0x1b, 0x400000fb },
3455 {}
3456};
3457
3458static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3459 { 0x0a, 0x0321e21f },
3460 { 0x0b, 0x03a1e02e },
3461 { 0x0c, 0x9017e110 },
3462 { 0x0d, 0x9017e11f },
3463 { 0x0e, 0x400000fe },
3464 { 0x0f, 0x0381e020 },
3465 { 0x10, 0x1345e230 },
3466 { 0x11, 0x13c5e240 },
3467 { 0x15, 0x400000fc },
3468 { 0x1b, 0x400000fb },
3469 {}
3470};
3471
3472static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3473 { 0x0a, 0x0321e21f },
3474 { 0x0b, 0x03a1e02e },
3475 { 0x0c, 0x9017e110 },
3476 { 0x0d, 0x9017e11f },
3477 { 0x0e, 0x400000fe },
3478 { 0x0f, 0x0381e020 },
3479 { 0x10, 0x1345e230 },
3480 { 0x11, 0x13c5e240 },
3481 { 0x15, 0x400000fc },
3482 { 0x1b, 0x400000fb },
3483 {}
3484};
3485
3486static const struct hda_pintbl ecs202_pin_configs[] = {
3487 { 0x0a, 0x0221401f },
3488 { 0x0b, 0x02a19020 },
3489 { 0x0c, 0x01a19020 },
3490 { 0x0d, 0x01114010 },
3491 { 0x0e, 0x408000f0 },
3492 { 0x0f, 0x01813022 },
3493 { 0x10, 0x074510a0 },
3494 { 0x11, 0x40c400f1 },
3495 { 0x15, 0x9037012e },
3496 { 0x1b, 0x40e000f2 },
3497 {}
3498};
3499
3500/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3501static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3502 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3503 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3504 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3505 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3506 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3507 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3508 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3509 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3510 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3511 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3512 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3513 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3514 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3515 {}
3516};
3517
3518static const struct hda_fixup stac922x_fixups[];
3519
3520/* remap the fixup from codec SSID and apply it */
3521static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3522 const struct hda_fixup *fix,
3523 int action)
3524{
3525 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3526 return;
3527
3528 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
3529 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3530 stac922x_fixups);
3531 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
3532 snd_hda_apply_fixup(codec, action);
3533}
3534
3535static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3536 const struct hda_fixup *fix,
3537 int action)
3538{
3539 struct sigmatel_spec *spec = codec->spec;
3540
3541 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3542 spec->gpio_mask = spec->gpio_dir = 0x03;
3543 spec->gpio_data = 0x03;
3544 }
3545}
3546
3547static const struct hda_fixup stac922x_fixups[] = {
3548 [STAC_D945_REF] = {
3549 .type = HDA_FIXUP_PINS,
3550 .v.pins = ref922x_pin_configs,
3551 },
3552 [STAC_D945GTP3] = {
3553 .type = HDA_FIXUP_PINS,
3554 .v.pins = d945gtp3_pin_configs,
3555 },
3556 [STAC_D945GTP5] = {
3557 .type = HDA_FIXUP_PINS,
3558 .v.pins = d945gtp5_pin_configs,
3559 },
3560 [STAC_INTEL_MAC_AUTO] = {
3561 .type = HDA_FIXUP_FUNC,
3562 .v.func = stac922x_fixup_intel_mac_auto,
3563 },
3564 [STAC_INTEL_MAC_V1] = {
3565 .type = HDA_FIXUP_PINS,
3566 .v.pins = intel_mac_v1_pin_configs,
3567 .chained = true,
3568 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3569 },
3570 [STAC_INTEL_MAC_V2] = {
3571 .type = HDA_FIXUP_PINS,
3572 .v.pins = intel_mac_v2_pin_configs,
3573 .chained = true,
3574 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3575 },
3576 [STAC_INTEL_MAC_V3] = {
3577 .type = HDA_FIXUP_PINS,
3578 .v.pins = intel_mac_v3_pin_configs,
3579 .chained = true,
3580 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3581 },
3582 [STAC_INTEL_MAC_V4] = {
3583 .type = HDA_FIXUP_PINS,
3584 .v.pins = intel_mac_v4_pin_configs,
3585 .chained = true,
3586 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3587 },
3588 [STAC_INTEL_MAC_V5] = {
3589 .type = HDA_FIXUP_PINS,
3590 .v.pins = intel_mac_v5_pin_configs,
3591 .chained = true,
3592 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3593 },
3594 [STAC_922X_INTEL_MAC_GPIO] = {
3595 .type = HDA_FIXUP_FUNC,
3596 .v.func = stac922x_fixup_intel_mac_gpio,
3597 },
3598 [STAC_ECS_202] = {
3599 .type = HDA_FIXUP_PINS,
3600 .v.pins = ecs202_pin_configs,
3601 },
3602 [STAC_922X_DELL_D81] = {
3603 .type = HDA_FIXUP_PINS,
3604 .v.pins = dell_922x_d81_pin_configs,
3605 },
3606 [STAC_922X_DELL_D82] = {
3607 .type = HDA_FIXUP_PINS,
3608 .v.pins = dell_922x_d82_pin_configs,
3609 },
3610 [STAC_922X_DELL_M81] = {
3611 .type = HDA_FIXUP_PINS,
3612 .v.pins = dell_922x_m81_pin_configs,
3613 },
3614 [STAC_922X_DELL_M82] = {
3615 .type = HDA_FIXUP_PINS,
3616 .v.pins = dell_922x_m82_pin_configs,
3617 },
3618};
3619
3620static const struct hda_model_fixup stac922x_models[] = {
3621 { .id = STAC_D945_REF, .name = "ref" },
3622 { .id = STAC_D945GTP5, .name = "5stack" },
3623 { .id = STAC_D945GTP3, .name = "3stack" },
3624 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3625 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3626 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3627 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3628 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3629 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3630 { .id = STAC_ECS_202, .name = "ecs202" },
3631 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3632 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3633 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3634 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3635 /* for backward compatibility */
3636 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3637 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3638 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3639 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3640 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3641 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3642 {}
3643};
3644
3645static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3646 /* SigmaTel reference board */
3647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3648 "DFI LanParty", STAC_D945_REF),
3649 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3650 "DFI LanParty", STAC_D945_REF),
3651 /* Intel 945G based systems */
3652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3653 "Intel D945G", STAC_D945GTP3),
3654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3655 "Intel D945G", STAC_D945GTP3),
3656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3657 "Intel D945G", STAC_D945GTP3),
3658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3659 "Intel D945G", STAC_D945GTP3),
3660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3661 "Intel D945G", STAC_D945GTP3),
3662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3663 "Intel D945G", STAC_D945GTP3),
3664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3665 "Intel D945G", STAC_D945GTP3),
3666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3667 "Intel D945G", STAC_D945GTP3),
3668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3669 "Intel D945G", STAC_D945GTP3),
3670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3671 "Intel D945G", STAC_D945GTP3),
3672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3673 "Intel D945G", STAC_D945GTP3),
3674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3675 "Intel D945G", STAC_D945GTP3),
3676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3677 "Intel D945G", STAC_D945GTP3),
3678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3679 "Intel D945G", STAC_D945GTP3),
3680 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3681 "Intel D945G", STAC_D945GTP3),
3682 /* Intel D945G 5-stack systems */
3683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3684 "Intel D945G", STAC_D945GTP5),
3685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3686 "Intel D945G", STAC_D945GTP5),
3687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3688 "Intel D945G", STAC_D945GTP5),
3689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3690 "Intel D945G", STAC_D945GTP5),
3691 /* Intel 945P based systems */
3692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3693 "Intel D945P", STAC_D945GTP3),
3694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3695 "Intel D945P", STAC_D945GTP3),
3696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3697 "Intel D945P", STAC_D945GTP3),
3698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3699 "Intel D945P", STAC_D945GTP3),
3700 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3701 "Intel D945P", STAC_D945GTP3),
3702 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3703 "Intel D945P", STAC_D945GTP5),
3704 /* other intel */
3705 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3706 "Intel D945", STAC_D945_REF),
3707 /* other systems */
3708
3709 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3710 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3711
3712 /* Dell systems */
3713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3714 "unknown Dell", STAC_922X_DELL_D81),
3715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3716 "unknown Dell", STAC_922X_DELL_D81),
3717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3718 "unknown Dell", STAC_922X_DELL_D81),
3719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3720 "unknown Dell", STAC_922X_DELL_D82),
3721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3722 "unknown Dell", STAC_922X_DELL_M81),
3723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3724 "unknown Dell", STAC_922X_DELL_D82),
3725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3726 "unknown Dell", STAC_922X_DELL_D81),
3727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3728 "unknown Dell", STAC_922X_DELL_D81),
3729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3730 "Dell XPS M1210", STAC_922X_DELL_M82),
3731 /* ECS/PC Chips boards */
3732 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3733 "ECS/PC chips", STAC_ECS_202),
3734 {} /* terminator */
3735};
3736
3737static const struct hda_pintbl ref927x_pin_configs[] = {
3738 { 0x0a, 0x02214020 },
3739 { 0x0b, 0x02a19080 },
3740 { 0x0c, 0x0181304e },
3741 { 0x0d, 0x01014010 },
3742 { 0x0e, 0x01a19040 },
3743 { 0x0f, 0x01011012 },
3744 { 0x10, 0x01016011 },
3745 { 0x11, 0x0101201f },
3746 { 0x12, 0x183301f0 },
3747 { 0x13, 0x18a001f0 },
3748 { 0x14, 0x18a001f0 },
3749 { 0x21, 0x01442070 },
3750 { 0x22, 0x01c42190 },
3751 { 0x23, 0x40000100 },
3752 {}
3753};
3754
3755static const struct hda_pintbl d965_3st_pin_configs[] = {
3756 { 0x0a, 0x0221401f },
3757 { 0x0b, 0x02a19120 },
3758 { 0x0c, 0x40000100 },
3759 { 0x0d, 0x01014011 },
3760 { 0x0e, 0x01a19021 },
3761 { 0x0f, 0x01813024 },
3762 { 0x10, 0x40000100 },
3763 { 0x11, 0x40000100 },
3764 { 0x12, 0x40000100 },
3765 { 0x13, 0x40000100 },
3766 { 0x14, 0x40000100 },
3767 { 0x21, 0x40000100 },
3768 { 0x22, 0x40000100 },
3769 { 0x23, 0x40000100 },
3770 {}
3771};
3772
3773static const struct hda_pintbl d965_5st_pin_configs[] = {
3774 { 0x0a, 0x02214020 },
3775 { 0x0b, 0x02a19080 },
3776 { 0x0c, 0x0181304e },
3777 { 0x0d, 0x01014010 },
3778 { 0x0e, 0x01a19040 },
3779 { 0x0f, 0x01011012 },
3780 { 0x10, 0x01016011 },
3781 { 0x11, 0x40000100 },
3782 { 0x12, 0x40000100 },
3783 { 0x13, 0x40000100 },
3784 { 0x14, 0x40000100 },
3785 { 0x21, 0x01442070 },
3786 { 0x22, 0x40000100 },
3787 { 0x23, 0x40000100 },
3788 {}
3789};
3790
3791static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3792 { 0x0a, 0x40000100 },
3793 { 0x0b, 0x40000100 },
3794 { 0x0c, 0x0181304e },
3795 { 0x0d, 0x01014010 },
3796 { 0x0e, 0x01a19040 },
3797 { 0x0f, 0x01011012 },
3798 { 0x10, 0x01016011 },
3799 { 0x11, 0x40000100 },
3800 { 0x12, 0x40000100 },
3801 { 0x13, 0x40000100 },
3802 { 0x14, 0x40000100 },
3803 { 0x21, 0x01442070 },
3804 { 0x22, 0x40000100 },
3805 { 0x23, 0x40000100 },
3806 {}
3807};
3808
3809static const struct hda_pintbl dell_3st_pin_configs[] = {
3810 { 0x0a, 0x02211230 },
3811 { 0x0b, 0x02a11220 },
3812 { 0x0c, 0x01a19040 },
3813 { 0x0d, 0x01114210 },
3814 { 0x0e, 0x01111212 },
3815 { 0x0f, 0x01116211 },
3816 { 0x10, 0x01813050 },
3817 { 0x11, 0x01112214 },
3818 { 0x12, 0x403003fa },
3819 { 0x13, 0x90a60040 },
3820 { 0x14, 0x90a60040 },
3821 { 0x21, 0x404003fb },
3822 { 0x22, 0x40c003fc },
3823 { 0x23, 0x40000100 },
3824 {}
3825};
3826
3827static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3828 const struct hda_fixup *fix, int action)
3829{
3830 /* no jack detecion for ref-no-jd model */
3831 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3832 codec->no_jack_detect = 1;
3833}
3834
3835static void stac927x_fixup_ref(struct hda_codec *codec,
3836 const struct hda_fixup *fix, int action)
3837{
3838 struct sigmatel_spec *spec = codec->spec;
3839
3840 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3841 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3842 spec->eapd_mask = spec->gpio_mask = 0;
3843 spec->gpio_dir = spec->gpio_data = 0;
3844 }
3845}
3846
3847static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3848 const struct hda_fixup *fix, int action)
3849{
3850 struct sigmatel_spec *spec = codec->spec;
3851
3852 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3853 return;
3854
3855 if (codec->core.subsystem_id != 0x1028022f) {
3856 /* GPIO2 High = Enable EAPD */
3857 spec->eapd_mask = spec->gpio_mask = 0x04;
3858 spec->gpio_dir = spec->gpio_data = 0x04;
3859 }
3860
3861 snd_hda_add_verbs(codec, dell_3st_core_init);
3862 spec->volknob_init = 1;
3863}
3864
3865static void stac927x_fixup_volknob(struct hda_codec *codec,
3866 const struct hda_fixup *fix, int action)
3867{
3868 struct sigmatel_spec *spec = codec->spec;
3869
3870 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3871 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3872 spec->volknob_init = 1;
3873 }
3874}
3875
3876static const struct hda_fixup stac927x_fixups[] = {
3877 [STAC_D965_REF_NO_JD] = {
3878 .type = HDA_FIXUP_FUNC,
3879 .v.func = stac927x_fixup_ref_no_jd,
3880 .chained = true,
3881 .chain_id = STAC_D965_REF,
3882 },
3883 [STAC_D965_REF] = {
3884 .type = HDA_FIXUP_FUNC,
3885 .v.func = stac927x_fixup_ref,
3886 },
3887 [STAC_D965_3ST] = {
3888 .type = HDA_FIXUP_PINS,
3889 .v.pins = d965_3st_pin_configs,
3890 .chained = true,
3891 .chain_id = STAC_D965_VERBS,
3892 },
3893 [STAC_D965_5ST] = {
3894 .type = HDA_FIXUP_PINS,
3895 .v.pins = d965_5st_pin_configs,
3896 .chained = true,
3897 .chain_id = STAC_D965_VERBS,
3898 },
3899 [STAC_D965_VERBS] = {
3900 .type = HDA_FIXUP_VERBS,
3901 .v.verbs = d965_core_init,
3902 },
3903 [STAC_D965_5ST_NO_FP] = {
3904 .type = HDA_FIXUP_PINS,
3905 .v.pins = d965_5st_no_fp_pin_configs,
3906 },
3907 [STAC_NEMO_DEFAULT] = {
3908 .type = HDA_FIXUP_PINS,
3909 .v.pins = nemo_pin_configs,
3910 },
3911 [STAC_DELL_3ST] = {
3912 .type = HDA_FIXUP_PINS,
3913 .v.pins = dell_3st_pin_configs,
3914 .chained = true,
3915 .chain_id = STAC_927X_DELL_DMIC,
3916 },
3917 [STAC_DELL_BIOS] = {
3918 .type = HDA_FIXUP_PINS,
3919 .v.pins = (const struct hda_pintbl[]) {
3920 /* correct the front output jack as a hp out */
3921 { 0x0f, 0x0221101f },
3922 /* correct the front input jack as a mic */
3923 { 0x0e, 0x02a79130 },
3924 {}
3925 },
3926 .chained = true,
3927 .chain_id = STAC_927X_DELL_DMIC,
3928 },
3929 [STAC_DELL_BIOS_AMIC] = {
3930 .type = HDA_FIXUP_PINS,
3931 .v.pins = (const struct hda_pintbl[]) {
3932 /* configure the analog microphone on some laptops */
3933 { 0x0c, 0x90a79130 },
3934 {}
3935 },
3936 .chained = true,
3937 .chain_id = STAC_DELL_BIOS,
3938 },
3939 [STAC_DELL_BIOS_SPDIF] = {
3940 .type = HDA_FIXUP_PINS,
3941 .v.pins = (const struct hda_pintbl[]) {
3942 /* correct the device field to SPDIF out */
3943 { 0x21, 0x01442070 },
3944 {}
3945 },
3946 .chained = true,
3947 .chain_id = STAC_DELL_BIOS,
3948 },
3949 [STAC_927X_DELL_DMIC] = {
3950 .type = HDA_FIXUP_FUNC,
3951 .v.func = stac927x_fixup_dell_dmic,
3952 },
3953 [STAC_927X_VOLKNOB] = {
3954 .type = HDA_FIXUP_FUNC,
3955 .v.func = stac927x_fixup_volknob,
3956 },
3957};
3958
3959static const struct hda_model_fixup stac927x_models[] = {
3960 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3961 { .id = STAC_D965_REF, .name = "ref" },
3962 { .id = STAC_D965_3ST, .name = "3stack" },
3963 { .id = STAC_D965_5ST, .name = "5stack" },
3964 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3965 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3966 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3967 { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
3968 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3969 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3970 {}
3971};
3972
3973static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3974 /* SigmaTel reference board */
3975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3976 "DFI LanParty", STAC_D965_REF),
3977 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3978 "DFI LanParty", STAC_D965_REF),
3979 /* Intel 946 based systems */
3980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3982 /* 965 based 3 stack systems */
3983 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3984 "Intel D965", STAC_D965_3ST),
3985 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3986 "Intel D965", STAC_D965_3ST),
3987 /* Dell 3 stack systems */
3988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3991 /* Dell 3 stack systems with verb table in BIOS */
3992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
4000 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
4001 /* 965 based 5 stack systems */
4002 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
4003 "Intel D965", STAC_D965_5ST),
4004 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
4005 "Intel D965", STAC_D965_5ST),
4006 /* Nemo */
4007 SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
4008 /* volume-knob fixes */
4009 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
4010 {} /* terminator */
4011};
4012
4013static const struct hda_pintbl ref9205_pin_configs[] = {
4014 { 0x0a, 0x40000100 },
4015 { 0x0b, 0x40000100 },
4016 { 0x0c, 0x01016011 },
4017 { 0x0d, 0x01014010 },
4018 { 0x0e, 0x01813122 },
4019 { 0x0f, 0x01a19021 },
4020 { 0x14, 0x01019020 },
4021 { 0x16, 0x40000100 },
4022 { 0x17, 0x90a000f0 },
4023 { 0x18, 0x90a000f0 },
4024 { 0x21, 0x01441030 },
4025 { 0x22, 0x01c41030 },
4026 {}
4027};
4028
4029/*
4030 STAC 9205 pin configs for
4031 102801F1
4032 102801F2
4033 102801FC
4034 102801FD
4035 10280204
4036 1028021F
4037 10280228 (Dell Vostro 1500)
4038 10280229 (Dell Vostro 1700)
4039*/
4040static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4041 { 0x0a, 0x0321101F },
4042 { 0x0b, 0x03A11020 },
4043 { 0x0c, 0x400003FA },
4044 { 0x0d, 0x90170310 },
4045 { 0x0e, 0x400003FB },
4046 { 0x0f, 0x400003FC },
4047 { 0x14, 0x400003FD },
4048 { 0x16, 0x40F000F9 },
4049 { 0x17, 0x90A60330 },
4050 { 0x18, 0x400003FF },
4051 { 0x21, 0x0144131F },
4052 { 0x22, 0x40C003FE },
4053 {}
4054};
4055
4056/*
4057 STAC 9205 pin configs for
4058 102801F9
4059 102801FA
4060 102801FE
4061 102801FF (Dell Precision M4300)
4062 10280206
4063 10280200
4064 10280201
4065*/
4066static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4067 { 0x0a, 0x0321101f },
4068 { 0x0b, 0x03a11020 },
4069 { 0x0c, 0x90a70330 },
4070 { 0x0d, 0x90170310 },
4071 { 0x0e, 0x400000fe },
4072 { 0x0f, 0x400000ff },
4073 { 0x14, 0x400000fd },
4074 { 0x16, 0x40f000f9 },
4075 { 0x17, 0x400000fa },
4076 { 0x18, 0x400000fc },
4077 { 0x21, 0x0144131f },
4078 { 0x22, 0x40c003f8 },
4079 /* Enable SPDIF in/out */
4080 { 0x1f, 0x01441030 },
4081 { 0x20, 0x1c410030 },
4082 {}
4083};
4084
4085static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4086 { 0x0a, 0x0421101f },
4087 { 0x0b, 0x04a11020 },
4088 { 0x0c, 0x400003fa },
4089 { 0x0d, 0x90170310 },
4090 { 0x0e, 0x400003fb },
4091 { 0x0f, 0x400003fc },
4092 { 0x14, 0x400003fd },
4093 { 0x16, 0x400003f9 },
4094 { 0x17, 0x90a60330 },
4095 { 0x18, 0x400003ff },
4096 { 0x21, 0x01441340 },
4097 { 0x22, 0x40c003fe },
4098 {}
4099};
4100
4101static void stac9205_fixup_ref(struct hda_codec *codec,
4102 const struct hda_fixup *fix, int action)
4103{
4104 struct sigmatel_spec *spec = codec->spec;
4105
4106 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4107 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4108 /* SPDIF-In enabled */
4109 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4110 }
4111}
4112
4113static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4114 const struct hda_fixup *fix, int action)
4115{
4116 struct sigmatel_spec *spec = codec->spec;
4117 struct hda_jack_callback *jack;
4118
4119 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4120 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4121
4122 /* Enable unsol response for GPIO4/Dock HP connection */
4123 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
4124 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4125 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
4126 stac_vref_event);
4127 if (!IS_ERR(jack))
4128 jack->private_data = 0x01;
4129
4130 spec->gpio_dir = 0x0b;
4131 spec->eapd_mask = 0x01;
4132 spec->gpio_mask = 0x1b;
4133 spec->gpio_mute = 0x10;
4134 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4135 * GPIO3 Low = DRM
4136 */
4137 spec->gpio_data = 0x01;
4138 }
4139}
4140
4141static void stac9205_fixup_eapd(struct hda_codec *codec,
4142 const struct hda_fixup *fix, int action)
4143{
4144 struct sigmatel_spec *spec = codec->spec;
4145
4146 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4147 spec->eapd_switch = 0;
4148}
4149
4150static const struct hda_fixup stac9205_fixups[] = {
4151 [STAC_9205_REF] = {
4152 .type = HDA_FIXUP_FUNC,
4153 .v.func = stac9205_fixup_ref,
4154 },
4155 [STAC_9205_DELL_M42] = {
4156 .type = HDA_FIXUP_PINS,
4157 .v.pins = dell_9205_m42_pin_configs,
4158 },
4159 [STAC_9205_DELL_M43] = {
4160 .type = HDA_FIXUP_FUNC,
4161 .v.func = stac9205_fixup_dell_m43,
4162 },
4163 [STAC_9205_DELL_M44] = {
4164 .type = HDA_FIXUP_PINS,
4165 .v.pins = dell_9205_m44_pin_configs,
4166 },
4167 [STAC_9205_EAPD] = {
4168 .type = HDA_FIXUP_FUNC,
4169 .v.func = stac9205_fixup_eapd,
4170 },
4171 {}
4172};
4173
4174static const struct hda_model_fixup stac9205_models[] = {
4175 { .id = STAC_9205_REF, .name = "ref" },
4176 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4177 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4178 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4179 { .id = STAC_9205_EAPD, .name = "eapd" },
4180 {}
4181};
4182
4183static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4184 /* SigmaTel reference board */
4185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4186 "DFI LanParty", STAC_9205_REF),
4187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4188 "SigmaTel", STAC_9205_REF),
4189 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4190 "DFI LanParty", STAC_9205_REF),
4191 /* Dell */
4192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4193 "unknown Dell", STAC_9205_DELL_M42),
4194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4195 "unknown Dell", STAC_9205_DELL_M42),
4196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4197 "Dell Precision", STAC_9205_DELL_M43),
4198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4199 "Dell Precision", STAC_9205_DELL_M43),
4200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4201 "Dell Precision", STAC_9205_DELL_M43),
4202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4203 "unknown Dell", STAC_9205_DELL_M42),
4204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4205 "unknown Dell", STAC_9205_DELL_M42),
4206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4207 "Dell Precision", STAC_9205_DELL_M43),
4208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4209 "Dell Precision M4300", STAC_9205_DELL_M43),
4210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4211 "unknown Dell", STAC_9205_DELL_M42),
4212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4213 "Dell Precision", STAC_9205_DELL_M43),
4214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4215 "Dell Precision", STAC_9205_DELL_M43),
4216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4217 "Dell Precision", STAC_9205_DELL_M43),
4218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4219 "Dell Inspiron", STAC_9205_DELL_M44),
4220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4221 "Dell Vostro 1500", STAC_9205_DELL_M42),
4222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4223 "Dell Vostro 1700", STAC_9205_DELL_M42),
4224 /* Gateway */
4225 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4226 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4227 {} /* terminator */
4228};
4229
4230static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4231 const struct hda_fixup *fix, int action)
4232{
4233 struct sigmatel_spec *spec = codec->spec;
4234
4235 if (action != HDA_FIXUP_ACT_PRE_PROBE)
4236 return;
4237
4238 if (find_mute_led_cfg(codec, spec->default_polarity))
4239 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4240 spec->gpio_led,
4241 spec->gpio_led_polarity);
4242}
4243
4244static const struct hda_fixup stac92hd95_fixups[] = {
4245 [STAC_92HD95_HP_LED] = {
4246 .type = HDA_FIXUP_FUNC,
4247 .v.func = stac92hd95_fixup_hp_led,
4248 },
4249 [STAC_92HD95_HP_BASS] = {
4250 .type = HDA_FIXUP_VERBS,
4251 .v.verbs = (const struct hda_verb[]) {
4252 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4253 {}
4254 },
4255 .chained = true,
4256 .chain_id = STAC_92HD95_HP_LED,
4257 },
4258};
4259
4260static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4261 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4262 {} /* terminator */
4263};
4264
4265static const struct hda_model_fixup stac92hd95_models[] = {
4266 { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4267 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4268 {}
4269};
4270
4271
4272static int stac_parse_auto_config(struct hda_codec *codec)
4273{
4274 struct sigmatel_spec *spec = codec->spec;
4275 int err;
4276 int flags = 0;
4277
4278 if (spec->headset_jack)
4279 flags |= HDA_PINCFG_HEADSET_MIC;
4280
4281 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4282 if (err < 0)
4283 return err;
4284
4285 /* add hooks */
4286 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4287 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4288
4289 spec->gen.automute_hook = stac_update_outputs;
4290
4291 if (spec->gpio_led)
4292 snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook);
4293
4294 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4295 if (err < 0)
4296 return err;
4297
4298 if (spec->vref_mute_led_nid) {
4299 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4300 if (err < 0)
4301 return err;
4302 }
4303
4304 /* setup analog beep controls */
4305 if (spec->anabeep_nid > 0) {
4306 err = stac_auto_create_beep_ctls(codec,
4307 spec->anabeep_nid);
4308 if (err < 0)
4309 return err;
4310 }
4311
4312 /* setup digital beep controls and input device */
4313#ifdef CONFIG_SND_HDA_INPUT_BEEP
4314 if (spec->gen.beep_nid) {
4315 hda_nid_t nid = spec->gen.beep_nid;
4316 unsigned int caps;
4317
4318 err = stac_auto_create_beep_ctls(codec, nid);
4319 if (err < 0)
4320 return err;
4321 if (codec->beep) {
4322 /* IDT/STAC codecs have linear beep tone parameter */
4323 codec->beep->linear_tone = spec->linear_tone_beep;
4324 /* keep power up while beep is enabled */
4325 codec->beep->keep_power_at_enable = 1;
4326 /* if no beep switch is available, make its own one */
4327 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4328 if (!(caps & AC_AMPCAP_MUTE)) {
4329 err = stac_beep_switch_ctl(codec);
4330 if (err < 0)
4331 return err;
4332 }
4333 }
4334 }
4335#endif
4336
4337 if (spec->aloopback_ctl &&
4338 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4339 unsigned int wr_verb =
4340 spec->aloopback_ctl->private_value >> 16;
4341 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4342 return -ENOMEM;
4343 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4344 return -ENOMEM;
4345 }
4346
4347 if (spec->have_spdif_mux) {
4348 err = stac_create_spdif_mux_ctls(codec);
4349 if (err < 0)
4350 return err;
4351 }
4352
4353 stac_init_power_map(codec);
4354
4355 return 0;
4356}
4357
4358static int stac_init(struct hda_codec *codec)
4359{
4360 struct sigmatel_spec *spec = codec->spec;
4361 int i;
4362
4363 /* override some hints */
4364 stac_store_hints(codec);
4365
4366 /* set up GPIO */
4367 /* turn on EAPD statically when spec->eapd_switch isn't set.
4368 * otherwise, unsol event will turn it on/off dynamically
4369 */
4370 if (!spec->eapd_switch)
4371 spec->gpio_data |= spec->eapd_mask;
4372 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4373
4374 snd_hda_gen_init(codec);
4375
4376 /* sync the power-map */
4377 if (spec->num_pwrs)
4378 snd_hda_codec_write(codec, codec->core.afg, 0,
4379 AC_VERB_IDT_SET_POWER_MAP,
4380 spec->power_map_bits);
4381
4382 /* power down inactive ADCs */
4383 if (spec->powerdown_adcs) {
4384 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4385 if (spec->active_adcs & (1 << i))
4386 continue;
4387 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4388 AC_VERB_SET_POWER_STATE,
4389 AC_PWRST_D3);
4390 }
4391 }
4392
4393 return 0;
4394}
4395
4396#define stac_free snd_hda_gen_free
4397
4398#ifdef CONFIG_SND_PROC_FS
4399static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4400 struct hda_codec *codec, hda_nid_t nid)
4401{
4402 if (nid == codec->core.afg)
4403 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4404 snd_hda_codec_read(codec, nid, 0,
4405 AC_VERB_IDT_GET_POWER_MAP, 0));
4406}
4407
4408static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4409 struct hda_codec *codec,
4410 unsigned int verb)
4411{
4412 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4413 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
4414}
4415
4416/* stac92hd71bxx, stac92hd73xx */
4417static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4418 struct hda_codec *codec, hda_nid_t nid)
4419{
4420 stac92hd_proc_hook(buffer, codec, nid);
4421 if (nid == codec->core.afg)
4422 analog_loop_proc_hook(buffer, codec, 0xfa0);
4423}
4424
4425static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4426 struct hda_codec *codec, hda_nid_t nid)
4427{
4428 if (nid == codec->core.afg)
4429 analog_loop_proc_hook(buffer, codec, 0xfe0);
4430}
4431
4432static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4433 struct hda_codec *codec, hda_nid_t nid)
4434{
4435 if (nid == codec->core.afg)
4436 analog_loop_proc_hook(buffer, codec, 0xfeb);
4437}
4438#else
4439#define stac92hd_proc_hook NULL
4440#define stac92hd7x_proc_hook NULL
4441#define stac9205_proc_hook NULL
4442#define stac927x_proc_hook NULL
4443#endif
4444
4445#ifdef CONFIG_PM
4446static int stac_suspend(struct hda_codec *codec)
4447{
4448 struct sigmatel_spec *spec = codec->spec;
4449
4450 snd_hda_shutup_pins(codec);
4451
4452 if (spec->eapd_mask)
4453 stac_gpio_set(codec, spec->gpio_mask,
4454 spec->gpio_dir, spec->gpio_data &
4455 ~spec->eapd_mask);
4456
4457 return 0;
4458}
4459#else
4460#define stac_suspend NULL
4461#endif /* CONFIG_PM */
4462
4463static const struct hda_codec_ops stac_patch_ops = {
4464 .build_controls = snd_hda_gen_build_controls,
4465 .build_pcms = snd_hda_gen_build_pcms,
4466 .init = stac_init,
4467 .free = stac_free,
4468 .unsol_event = snd_hda_jack_unsol_event,
4469#ifdef CONFIG_PM
4470 .suspend = stac_suspend,
4471#endif
4472};
4473
4474static int alloc_stac_spec(struct hda_codec *codec)
4475{
4476 struct sigmatel_spec *spec;
4477
4478 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4479 if (!spec)
4480 return -ENOMEM;
4481 snd_hda_gen_spec_init(&spec->gen);
4482 codec->spec = spec;
4483 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4484 spec->gen.dac_min_mute = true;
4485 codec->patch_ops = stac_patch_ops;
4486 return 0;
4487}
4488
4489static int patch_stac9200(struct hda_codec *codec)
4490{
4491 struct sigmatel_spec *spec;
4492 int err;
4493
4494 err = alloc_stac_spec(codec);
4495 if (err < 0)
4496 return err;
4497
4498 spec = codec->spec;
4499 spec->linear_tone_beep = 1;
4500 spec->gen.own_eapd_ctl = 1;
4501
4502 codec->power_filter = snd_hda_codec_eapd_power_filter;
4503
4504 snd_hda_add_verbs(codec, stac9200_eapd_init);
4505
4506 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4507 stac9200_fixups);
4508 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4509
4510 err = stac_parse_auto_config(codec);
4511 if (err < 0) {
4512 stac_free(codec);
4513 return err;
4514 }
4515
4516 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4517
4518 return 0;
4519}
4520
4521static int patch_stac925x(struct hda_codec *codec)
4522{
4523 struct sigmatel_spec *spec;
4524 int err;
4525
4526 err = alloc_stac_spec(codec);
4527 if (err < 0)
4528 return err;
4529
4530 spec = codec->spec;
4531 spec->linear_tone_beep = 1;
4532 spec->gen.own_eapd_ctl = 1;
4533
4534 snd_hda_add_verbs(codec, stac925x_core_init);
4535
4536 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4537 stac925x_fixups);
4538 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4539
4540 err = stac_parse_auto_config(codec);
4541 if (err < 0) {
4542 stac_free(codec);
4543 return err;
4544 }
4545
4546 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4547
4548 return 0;
4549}
4550
4551static int patch_stac92hd73xx(struct hda_codec *codec)
4552{
4553 struct sigmatel_spec *spec;
4554 int err;
4555 int num_dacs;
4556
4557 err = alloc_stac_spec(codec);
4558 if (err < 0)
4559 return err;
4560
4561 spec = codec->spec;
4562 /* enable power_save_node only for new 92HD89xx chips, as it causes
4563 * click noises on old 92HD73xx chips.
4564 */
4565 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4566 codec->power_save_node = 1;
4567 spec->linear_tone_beep = 0;
4568 spec->gen.mixer_nid = 0x1d;
4569 spec->have_spdif_mux = 1;
4570
4571 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4572 if (num_dacs < 3 || num_dacs > 5) {
4573 codec_warn(codec,
4574 "Could not determine number of channels defaulting to DAC count\n");
4575 num_dacs = 5;
4576 }
4577
4578 switch (num_dacs) {
4579 case 0x3: /* 6 Channel */
4580 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4581 break;
4582 case 0x4: /* 8 Channel */
4583 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4584 break;
4585 case 0x5: /* 10 Channel */
4586 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4587 break;
4588 }
4589
4590 spec->aloopback_mask = 0x01;
4591 spec->aloopback_shift = 8;
4592
4593 spec->gen.beep_nid = 0x1c; /* digital beep */
4594
4595 /* GPIO0 High = Enable EAPD */
4596 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4597 spec->gpio_data = 0x01;
4598
4599 spec->eapd_switch = 1;
4600
4601 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4602 spec->pwr_nids = stac92hd73xx_pwr_nids;
4603
4604 spec->gen.own_eapd_ctl = 1;
4605 spec->gen.power_down_unused = 1;
4606
4607 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4608 stac92hd73xx_fixups);
4609 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4610
4611 if (!spec->volknob_init)
4612 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4613
4614 err = stac_parse_auto_config(codec);
4615 if (err < 0) {
4616 stac_free(codec);
4617 return err;
4618 }
4619
4620 /* Don't GPIO-mute speakers if there are no internal speakers, because
4621 * the GPIO might be necessary for Headphone
4622 */
4623 if (spec->eapd_switch && !has_builtin_speaker(codec))
4624 spec->eapd_switch = 0;
4625
4626 codec->proc_widget_hook = stac92hd7x_proc_hook;
4627
4628 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4629
4630 return 0;
4631}
4632
4633static void stac_setup_gpio(struct hda_codec *codec)
4634{
4635 struct sigmatel_spec *spec = codec->spec;
4636
4637 spec->gpio_mask |= spec->eapd_mask;
4638 if (spec->gpio_led) {
4639 if (!spec->vref_mute_led_nid) {
4640 spec->gpio_mask |= spec->gpio_led;
4641 spec->gpio_dir |= spec->gpio_led;
4642 spec->gpio_data |= spec->gpio_led;
4643 } else {
4644 codec->power_filter = stac_vref_led_power_filter;
4645 }
4646 }
4647
4648 if (spec->mic_mute_led_gpio) {
4649 spec->gpio_mask |= spec->mic_mute_led_gpio;
4650 spec->gpio_dir |= spec->mic_mute_led_gpio;
4651 spec->mic_enabled = 0;
4652 spec->gpio_data |= spec->mic_mute_led_gpio;
4653 snd_hda_gen_add_micmute_led_cdev(codec, stac_capture_led_update);
4654 }
4655}
4656
4657static int patch_stac92hd83xxx(struct hda_codec *codec)
4658{
4659 struct sigmatel_spec *spec;
4660 int err;
4661
4662 err = alloc_stac_spec(codec);
4663 if (err < 0)
4664 return err;
4665
4666 /* longer delay needed for D3 */
4667 codec->core.power_caps &= ~AC_PWRST_EPSS;
4668
4669 spec = codec->spec;
4670 codec->power_save_node = 1;
4671 spec->linear_tone_beep = 0;
4672 spec->gen.own_eapd_ctl = 1;
4673 spec->gen.power_down_unused = 1;
4674 spec->gen.mixer_nid = 0x1b;
4675
4676 spec->gen.beep_nid = 0x21; /* digital beep */
4677 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4678 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4679 spec->default_polarity = -1; /* no default cfg */
4680
4681 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4682
4683 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4684 stac92hd83xxx_fixups);
4685 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4686
4687 stac_setup_gpio(codec);
4688
4689 err = stac_parse_auto_config(codec);
4690 if (err < 0) {
4691 stac_free(codec);
4692 return err;
4693 }
4694
4695 codec->proc_widget_hook = stac92hd_proc_hook;
4696
4697 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4698
4699 return 0;
4700}
4701
4702static const hda_nid_t stac92hd95_pwr_nids[] = {
4703 0x0a, 0x0b, 0x0c, 0x0d
4704};
4705
4706static int patch_stac92hd95(struct hda_codec *codec)
4707{
4708 struct sigmatel_spec *spec;
4709 int err;
4710
4711 err = alloc_stac_spec(codec);
4712 if (err < 0)
4713 return err;
4714
4715 /* longer delay needed for D3 */
4716 codec->core.power_caps &= ~AC_PWRST_EPSS;
4717
4718 spec = codec->spec;
4719 codec->power_save_node = 1;
4720 spec->linear_tone_beep = 0;
4721 spec->gen.own_eapd_ctl = 1;
4722 spec->gen.power_down_unused = 1;
4723
4724 spec->gen.beep_nid = 0x19; /* digital beep */
4725 spec->pwr_nids = stac92hd95_pwr_nids;
4726 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4727 spec->default_polarity = 0;
4728
4729 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4730 stac92hd95_fixups);
4731 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4732
4733 stac_setup_gpio(codec);
4734
4735 err = stac_parse_auto_config(codec);
4736 if (err < 0) {
4737 stac_free(codec);
4738 return err;
4739 }
4740
4741 codec->proc_widget_hook = stac92hd_proc_hook;
4742
4743 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4744
4745 return 0;
4746}
4747
4748static int patch_stac92hd71bxx(struct hda_codec *codec)
4749{
4750 struct sigmatel_spec *spec;
4751 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
4752 int err;
4753
4754 err = alloc_stac_spec(codec);
4755 if (err < 0)
4756 return err;
4757
4758 spec = codec->spec;
4759 /* disabled power_save_node since it causes noises on a Dell machine */
4760 /* codec->power_save_node = 1; */
4761 spec->linear_tone_beep = 0;
4762 spec->gen.own_eapd_ctl = 1;
4763 spec->gen.power_down_unused = 1;
4764 spec->gen.mixer_nid = 0x17;
4765 spec->have_spdif_mux = 1;
4766
4767 /* GPIO0 = EAPD */
4768 spec->gpio_mask = 0x01;
4769 spec->gpio_dir = 0x01;
4770 spec->gpio_data = 0x01;
4771
4772 switch (codec->core.vendor_id) {
4773 case 0x111d76b6: /* 4 Port without Analog Mixer */
4774 case 0x111d76b7:
4775 unmute_nids++;
4776 break;
4777 case 0x111d7608: /* 5 Port with Analog Mixer */
4778 if ((codec->core.revision_id & 0xf) == 0 ||
4779 (codec->core.revision_id & 0xf) == 1)
4780 spec->stream_delay = 40; /* 40 milliseconds */
4781
4782 /* disable VSW */
4783 unmute_nids++;
4784 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4785 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4786 break;
4787 case 0x111d7603: /* 6 Port with Analog Mixer */
4788 if ((codec->core.revision_id & 0xf) == 1)
4789 spec->stream_delay = 40; /* 40 milliseconds */
4790
4791 break;
4792 }
4793
4794 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4795 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4796
4797 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4798 const hda_nid_t *p;
4799 for (p = unmute_nids; *p; p++)
4800 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4801 0xff, 0x00);
4802 }
4803
4804 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4805 spec->aloopback_mask = 0x50;
4806 spec->aloopback_shift = 0;
4807
4808 spec->powerdown_adcs = 1;
4809 spec->gen.beep_nid = 0x26; /* digital beep */
4810 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4811 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4812
4813 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4814 stac92hd71bxx_fixups);
4815 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4816
4817 stac_setup_gpio(codec);
4818
4819 err = stac_parse_auto_config(codec);
4820 if (err < 0) {
4821 stac_free(codec);
4822 return err;
4823 }
4824
4825 codec->proc_widget_hook = stac92hd7x_proc_hook;
4826
4827 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4828
4829 return 0;
4830}
4831
4832static int patch_stac922x(struct hda_codec *codec)
4833{
4834 struct sigmatel_spec *spec;
4835 int err;
4836
4837 err = alloc_stac_spec(codec);
4838 if (err < 0)
4839 return err;
4840
4841 spec = codec->spec;
4842 spec->linear_tone_beep = 1;
4843 spec->gen.own_eapd_ctl = 1;
4844
4845 snd_hda_add_verbs(codec, stac922x_core_init);
4846
4847 /* Fix Mux capture level; max to 2 */
4848 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4849 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4850 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4851 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4852 (0 << AC_AMPCAP_MUTE_SHIFT));
4853
4854 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4855 stac922x_fixups);
4856 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4857
4858 err = stac_parse_auto_config(codec);
4859 if (err < 0) {
4860 stac_free(codec);
4861 return err;
4862 }
4863
4864 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4865
4866 return 0;
4867}
4868
4869static const char * const stac927x_spdif_labels[] = {
4870 "Digital Playback", "ADAT", "Analog Mux 1",
4871 "Analog Mux 2", "Analog Mux 3", NULL
4872};
4873
4874static int patch_stac927x(struct hda_codec *codec)
4875{
4876 struct sigmatel_spec *spec;
4877 int err;
4878
4879 err = alloc_stac_spec(codec);
4880 if (err < 0)
4881 return err;
4882
4883 spec = codec->spec;
4884 spec->linear_tone_beep = 1;
4885 spec->gen.own_eapd_ctl = 1;
4886 spec->have_spdif_mux = 1;
4887 spec->spdif_labels = stac927x_spdif_labels;
4888
4889 spec->gen.beep_nid = 0x23; /* digital beep */
4890
4891 /* GPIO0 High = Enable EAPD */
4892 spec->eapd_mask = spec->gpio_mask = 0x01;
4893 spec->gpio_dir = spec->gpio_data = 0x01;
4894
4895 spec->aloopback_ctl = &stac927x_loopback;
4896 spec->aloopback_mask = 0x40;
4897 spec->aloopback_shift = 0;
4898 spec->eapd_switch = 1;
4899
4900 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4901 stac927x_fixups);
4902 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4903
4904 if (!spec->volknob_init)
4905 snd_hda_add_verbs(codec, stac927x_core_init);
4906
4907 err = stac_parse_auto_config(codec);
4908 if (err < 0) {
4909 stac_free(codec);
4910 return err;
4911 }
4912
4913 codec->proc_widget_hook = stac927x_proc_hook;
4914
4915 /*
4916 * !!FIXME!!
4917 * The STAC927x seem to require fairly long delays for certain
4918 * command sequences. With too short delays (even if the answer
4919 * is set to RIRB properly), it results in the silence output
4920 * on some hardwares like Dell.
4921 *
4922 * The below flag enables the longer delay (see get_response
4923 * in hda_intel.c).
4924 */
4925 codec->bus->core.needs_damn_long_delay = 1;
4926
4927 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4928
4929 return 0;
4930}
4931
4932static int patch_stac9205(struct hda_codec *codec)
4933{
4934 struct sigmatel_spec *spec;
4935 int err;
4936
4937 err = alloc_stac_spec(codec);
4938 if (err < 0)
4939 return err;
4940
4941 spec = codec->spec;
4942 spec->linear_tone_beep = 1;
4943 spec->gen.own_eapd_ctl = 1;
4944 spec->have_spdif_mux = 1;
4945
4946 spec->gen.beep_nid = 0x23; /* digital beep */
4947
4948 snd_hda_add_verbs(codec, stac9205_core_init);
4949 spec->aloopback_ctl = &stac9205_loopback;
4950
4951 spec->aloopback_mask = 0x40;
4952 spec->aloopback_shift = 0;
4953
4954 /* GPIO0 High = EAPD */
4955 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4956 spec->gpio_data = 0x01;
4957
4958 /* Turn on/off EAPD per HP plugging */
4959 spec->eapd_switch = 1;
4960
4961 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4962 stac9205_fixups);
4963 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4964
4965 err = stac_parse_auto_config(codec);
4966 if (err < 0) {
4967 stac_free(codec);
4968 return err;
4969 }
4970
4971 codec->proc_widget_hook = stac9205_proc_hook;
4972
4973 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4974
4975 return 0;
4976}
4977
4978/*
4979 * STAC9872 hack
4980 */
4981
4982static const struct hda_verb stac9872_core_init[] = {
4983 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4984 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4985 {}
4986};
4987
4988static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4989 { 0x0a, 0x03211020 },
4990 { 0x0b, 0x411111f0 },
4991 { 0x0c, 0x411111f0 },
4992 { 0x0d, 0x03a15030 },
4993 { 0x0e, 0x411111f0 },
4994 { 0x0f, 0x90170110 },
4995 { 0x11, 0x411111f0 },
4996 { 0x13, 0x411111f0 },
4997 { 0x14, 0x90a7013e },
4998 {}
4999};
5000
5001static const struct hda_model_fixup stac9872_models[] = {
5002 { .id = STAC_9872_VAIO, .name = "vaio" },
5003 {}
5004};
5005
5006static const struct hda_fixup stac9872_fixups[] = {
5007 [STAC_9872_VAIO] = {
5008 .type = HDA_FIXUP_PINS,
5009 .v.pins = stac9872_vaio_pin_configs,
5010 },
5011};
5012
5013static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
5014 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5015 "Sony VAIO F/S", STAC_9872_VAIO),
5016 {} /* terminator */
5017};
5018
5019static int patch_stac9872(struct hda_codec *codec)
5020{
5021 struct sigmatel_spec *spec;
5022 int err;
5023
5024 err = alloc_stac_spec(codec);
5025 if (err < 0)
5026 return err;
5027
5028 spec = codec->spec;
5029 spec->linear_tone_beep = 1;
5030 spec->gen.own_eapd_ctl = 1;
5031
5032 snd_hda_add_verbs(codec, stac9872_core_init);
5033
5034 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5035 stac9872_fixups);
5036 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5037
5038 err = stac_parse_auto_config(codec);
5039 if (err < 0) {
5040 stac_free(codec);
5041 return -EINVAL;
5042 }
5043
5044 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5045
5046 return 0;
5047}
5048
5049
5050/*
5051 * patch entries
5052 */
5053static const struct hda_device_id snd_hda_id_sigmatel[] = {
5054 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5055 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5056 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5057 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5058 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5059 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5060 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5061 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5062 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
5063 HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
5064 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5065 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5066 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5067 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5068 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5069 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5070 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5071 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5072 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5073 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5074 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5075 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5076 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5077 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5078 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
5079 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5080 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5081 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5082 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5083 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5084 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5085 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5086 /* The following does not take into account .id=0x83847661 when subsys =
5087 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5088 * currently not fully supported.
5089 */
5090 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5091 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5092 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5093 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5094 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5095 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5096 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5097 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5098 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5099 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5100 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5101 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5102 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5103 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5104 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5105 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5106 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5107 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5108 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5109 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5110 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5111 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5112 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5113 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5114 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5115 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5116 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5117 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5118 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5119 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5120 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5121 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5122 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5123 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5124 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5125 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5126 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5127 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5128 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5129 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5130 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5131 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5132 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5133 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5134 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5135 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5136 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5137 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5138 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5139 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5140 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5141 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5142 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5143 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5144 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5145 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5146 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5147 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5148 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5149 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5150 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5151 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5152 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5153 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5154 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5155 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5156 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5157 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
5158 {} /* terminator */
5159};
5160MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
5161
5162MODULE_LICENSE("GPL");
5163MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5164
5165static struct hda_codec_driver sigmatel_driver = {
5166 .id = snd_hda_id_sigmatel,
5167};
5168
5169module_hda_codec_driver(sigmatel_driver);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Universal Interface for Intel High Definition Audio Codec
4 *
5 * HD audio interface patch for SigmaTel STAC92xx
6 *
7 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
8 * Matt Porter <mporter@embeddedalley.com>
9 *
10 * Based on patch_cmedia.c and patch_realtek.c
11 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
12 */
13
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/slab.h>
17#include <linux/pci.h>
18#include <linux/dmi.h>
19#include <linux/module.h>
20#include <sound/core.h>
21#include <sound/jack.h>
22#include <sound/hda_codec.h>
23#include "hda_local.h"
24#include "hda_auto_parser.h"
25#include "hda_beep.h"
26#include "hda_jack.h"
27#include "hda_generic.h"
28
29enum {
30 STAC_REF,
31 STAC_9200_OQO,
32 STAC_9200_DELL_D21,
33 STAC_9200_DELL_D22,
34 STAC_9200_DELL_D23,
35 STAC_9200_DELL_M21,
36 STAC_9200_DELL_M22,
37 STAC_9200_DELL_M23,
38 STAC_9200_DELL_M24,
39 STAC_9200_DELL_M25,
40 STAC_9200_DELL_M26,
41 STAC_9200_DELL_M27,
42 STAC_9200_M4,
43 STAC_9200_M4_2,
44 STAC_9200_PANASONIC,
45 STAC_9200_EAPD_INIT,
46 STAC_9200_MODELS
47};
48
49enum {
50 STAC_9205_REF,
51 STAC_9205_DELL_M42,
52 STAC_9205_DELL_M43,
53 STAC_9205_DELL_M44,
54 STAC_9205_EAPD,
55 STAC_9205_MODELS
56};
57
58enum {
59 STAC_92HD73XX_NO_JD, /* no jack-detection */
60 STAC_92HD73XX_REF,
61 STAC_92HD73XX_INTEL,
62 STAC_DELL_M6_AMIC,
63 STAC_DELL_M6_DMIC,
64 STAC_DELL_M6_BOTH,
65 STAC_DELL_EQ,
66 STAC_ALIENWARE_M17X,
67 STAC_ELO_VUPOINT_15MX,
68 STAC_92HD89XX_HP_FRONT_JACK,
69 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
70 STAC_92HD73XX_ASUS_MOBO,
71 STAC_92HD73XX_MODELS
72};
73
74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_PWR_REF,
77 STAC_DELL_S14,
78 STAC_DELL_VOSTRO_3500,
79 STAC_92HD83XXX_HP_cNB11_INTQUAD,
80 STAC_HP_DV7_4000,
81 STAC_HP_ZEPHYR,
82 STAC_92HD83XXX_HP_LED,
83 STAC_92HD83XXX_HP_INV_LED,
84 STAC_92HD83XXX_HP_MIC_LED,
85 STAC_HP_LED_GPIO10,
86 STAC_92HD83XXX_HEADSET_JACK,
87 STAC_92HD83XXX_HP,
88 STAC_HP_ENVY_BASS,
89 STAC_HP_BNB13_EQ,
90 STAC_HP_ENVY_TS_BASS,
91 STAC_HP_ENVY_TS_DAC_BIND,
92 STAC_92HD83XXX_GPIO10_EAPD,
93 STAC_92HD83XXX_MODELS
94};
95
96enum {
97 STAC_92HD71BXX_REF,
98 STAC_DELL_M4_1,
99 STAC_DELL_M4_2,
100 STAC_DELL_M4_3,
101 STAC_HP_M4,
102 STAC_HP_DV4,
103 STAC_HP_DV5,
104 STAC_HP_HDX,
105 STAC_92HD71BXX_HP,
106 STAC_92HD71BXX_NO_DMIC,
107 STAC_92HD71BXX_NO_SMUX,
108 STAC_92HD71BXX_MODELS
109};
110
111enum {
112 STAC_92HD95_HP_LED,
113 STAC_92HD95_HP_BASS,
114 STAC_92HD95_MODELS
115};
116
117enum {
118 STAC_925x_REF,
119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
122 STAC_M2_2,
123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
126 STAC_925x_MODELS
127};
128
129enum {
130 STAC_D945_REF,
131 STAC_D945GTP3,
132 STAC_D945GTP5,
133 STAC_INTEL_MAC_V1,
134 STAC_INTEL_MAC_V2,
135 STAC_INTEL_MAC_V3,
136 STAC_INTEL_MAC_V4,
137 STAC_INTEL_MAC_V5,
138 STAC_INTEL_MAC_AUTO,
139 STAC_ECS_202,
140 STAC_922X_DELL_D81,
141 STAC_922X_DELL_D82,
142 STAC_922X_DELL_M81,
143 STAC_922X_DELL_M82,
144 STAC_922X_INTEL_MAC_GPIO,
145 STAC_922X_MODELS
146};
147
148enum {
149 STAC_D965_REF_NO_JD, /* no jack-detection */
150 STAC_D965_REF,
151 STAC_D965_3ST,
152 STAC_D965_5ST,
153 STAC_D965_5ST_NO_FP,
154 STAC_D965_VERBS,
155 STAC_DELL_3ST,
156 STAC_DELL_BIOS,
157 STAC_NEMO_DEFAULT,
158 STAC_DELL_BIOS_AMIC,
159 STAC_DELL_BIOS_SPDIF,
160 STAC_927X_DELL_DMIC,
161 STAC_927X_VOLKNOB,
162 STAC_927X_MODELS
163};
164
165enum {
166 STAC_9872_VAIO,
167 STAC_9872_MODELS
168};
169
170struct sigmatel_spec {
171 struct hda_gen_spec gen;
172
173 unsigned int eapd_switch: 1;
174 unsigned int linear_tone_beep:1;
175 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
176 unsigned int volknob_init:1; /* special volume-knob initialization */
177 unsigned int powerdown_adcs:1;
178 unsigned int have_spdif_mux:1;
179
180 /* gpio lines */
181 unsigned int eapd_mask;
182 unsigned int gpio_mask;
183 unsigned int gpio_dir;
184 unsigned int gpio_data;
185 unsigned int gpio_mute;
186 unsigned int gpio_led;
187 unsigned int gpio_led_polarity;
188 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
189 unsigned int vref_led;
190 int default_polarity;
191
192 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
193 unsigned int mic_enabled; /* current mic mute state (bitmask) */
194
195 /* stream */
196 unsigned int stream_delay;
197
198 /* analog loopback */
199 const struct snd_kcontrol_new *aloopback_ctl;
200 unsigned int aloopback;
201 unsigned char aloopback_mask;
202 unsigned char aloopback_shift;
203
204 /* power management */
205 unsigned int power_map_bits;
206 unsigned int num_pwrs;
207 const hda_nid_t *pwr_nids;
208 unsigned int active_adcs;
209
210 /* beep widgets */
211 hda_nid_t anabeep_nid;
212
213 /* SPDIF-out mux */
214 const char * const *spdif_labels;
215 struct hda_input_mux spdif_mux;
216 unsigned int cur_smux[2];
217};
218
219#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
220#define AC_VERB_IDT_GET_POWER_MAP 0xfec
221
222static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
223 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
224 0x0f, 0x10, 0x11
225};
226
227static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
228 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
229 0x0f, 0x10
230};
231
232static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
233 0x0a, 0x0d, 0x0f
234};
235
236
237/*
238 * PCM hooks
239 */
240static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
241 struct hda_codec *codec,
242 struct snd_pcm_substream *substream,
243 int action)
244{
245 struct sigmatel_spec *spec = codec->spec;
246 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
247 msleep(spec->stream_delay);
248}
249
250static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
251 struct hda_codec *codec,
252 struct snd_pcm_substream *substream,
253 int action)
254{
255 struct sigmatel_spec *spec = codec->spec;
256 int i, idx = 0;
257
258 if (!spec->powerdown_adcs)
259 return;
260
261 for (i = 0; i < spec->gen.num_all_adcs; i++) {
262 if (spec->gen.all_adcs[i] == hinfo->nid) {
263 idx = i;
264 break;
265 }
266 }
267
268 switch (action) {
269 case HDA_GEN_PCM_ACT_OPEN:
270 msleep(40);
271 snd_hda_codec_write(codec, hinfo->nid, 0,
272 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
273 spec->active_adcs |= (1 << idx);
274 break;
275 case HDA_GEN_PCM_ACT_CLOSE:
276 snd_hda_codec_write(codec, hinfo->nid, 0,
277 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
278 spec->active_adcs &= ~(1 << idx);
279 break;
280 }
281}
282
283/*
284 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
285 * funky external mute control using GPIO pins.
286 */
287
288static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
289 unsigned int dir_mask, unsigned int data)
290{
291 unsigned int gpiostate, gpiomask, gpiodir;
292 hda_nid_t fg = codec->core.afg;
293
294 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
295
296 gpiostate = snd_hda_codec_read(codec, fg, 0,
297 AC_VERB_GET_GPIO_DATA, 0);
298 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
299
300 gpiomask = snd_hda_codec_read(codec, fg, 0,
301 AC_VERB_GET_GPIO_MASK, 0);
302 gpiomask |= mask;
303
304 gpiodir = snd_hda_codec_read(codec, fg, 0,
305 AC_VERB_GET_GPIO_DIRECTION, 0);
306 gpiodir |= dir_mask;
307
308 /* Configure GPIOx as CMOS */
309 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
310
311 snd_hda_codec_write(codec, fg, 0,
312 AC_VERB_SET_GPIO_MASK, gpiomask);
313 snd_hda_codec_read(codec, fg, 0,
314 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
315
316 msleep(1);
317
318 snd_hda_codec_read(codec, fg, 0,
319 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
320}
321
322/* hook for controlling mic-mute LED GPIO */
323static int stac_capture_led_update(struct led_classdev *led_cdev,
324 enum led_brightness brightness)
325{
326 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
327 struct sigmatel_spec *spec = codec->spec;
328
329 if (brightness)
330 spec->gpio_data |= spec->mic_mute_led_gpio;
331 else
332 spec->gpio_data &= ~spec->mic_mute_led_gpio;
333 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
334 return 0;
335}
336
337static int stac_vrefout_set(struct hda_codec *codec,
338 hda_nid_t nid, unsigned int new_vref)
339{
340 int error, pinctl;
341
342 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
343 pinctl = snd_hda_codec_read(codec, nid, 0,
344 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
345
346 if (pinctl < 0)
347 return pinctl;
348
349 pinctl &= 0xff;
350 pinctl &= ~AC_PINCTL_VREFEN;
351 pinctl |= (new_vref & AC_PINCTL_VREFEN);
352
353 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
354 if (error < 0)
355 return error;
356
357 return 1;
358}
359
360/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
361/* this hook is set in stac_setup_gpio() */
362static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
363 hda_nid_t nid,
364 unsigned int power_state)
365{
366 if (nid == codec->core.afg && power_state == AC_PWRST_D3)
367 return AC_PWRST_D1;
368 return snd_hda_gen_path_power_filter(codec, nid, power_state);
369}
370
371/* update mute-LED accoring to the master switch */
372static void stac_update_led_status(struct hda_codec *codec, bool muted)
373{
374 struct sigmatel_spec *spec = codec->spec;
375
376 if (!spec->gpio_led)
377 return;
378
379 /* LED state is inverted on these systems */
380 if (spec->gpio_led_polarity)
381 muted = !muted;
382
383 if (!spec->vref_mute_led_nid) {
384 if (muted)
385 spec->gpio_data |= spec->gpio_led;
386 else
387 spec->gpio_data &= ~spec->gpio_led;
388 stac_gpio_set(codec, spec->gpio_mask,
389 spec->gpio_dir, spec->gpio_data);
390 } else {
391 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
392 stac_vrefout_set(codec, spec->vref_mute_led_nid,
393 spec->vref_led);
394 }
395}
396
397/* vmaster hook to update mute LED */
398static int stac_vmaster_hook(struct led_classdev *led_cdev,
399 enum led_brightness brightness)
400{
401 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
402
403 stac_update_led_status(codec, brightness);
404 return 0;
405}
406
407/* automute hook to handle GPIO mute and EAPD updates */
408static void stac_update_outputs(struct hda_codec *codec)
409{
410 struct sigmatel_spec *spec = codec->spec;
411
412 if (spec->gpio_mute)
413 spec->gen.master_mute =
414 !(snd_hda_codec_read(codec, codec->core.afg, 0,
415 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
416
417 snd_hda_gen_update_outputs(codec);
418
419 if (spec->eapd_mask && spec->eapd_switch) {
420 unsigned int val = spec->gpio_data;
421 if (spec->gen.speaker_muted)
422 val &= ~spec->eapd_mask;
423 else
424 val |= spec->eapd_mask;
425 if (spec->gpio_data != val) {
426 spec->gpio_data = val;
427 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
428 val);
429 }
430 }
431}
432
433static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
434 bool enable, bool do_write)
435{
436 struct sigmatel_spec *spec = codec->spec;
437 unsigned int idx, val;
438
439 for (idx = 0; idx < spec->num_pwrs; idx++) {
440 if (spec->pwr_nids[idx] == nid)
441 break;
442 }
443 if (idx >= spec->num_pwrs)
444 return;
445
446 idx = 1 << idx;
447
448 val = spec->power_map_bits;
449 if (enable)
450 val &= ~idx;
451 else
452 val |= idx;
453
454 /* power down unused output ports */
455 if (val != spec->power_map_bits) {
456 spec->power_map_bits = val;
457 if (do_write)
458 snd_hda_codec_write(codec, codec->core.afg, 0,
459 AC_VERB_IDT_SET_POWER_MAP, val);
460 }
461}
462
463/* update power bit per jack plug/unplug */
464static void jack_update_power(struct hda_codec *codec,
465 struct hda_jack_callback *jack)
466{
467 struct sigmatel_spec *spec = codec->spec;
468 int i;
469
470 if (!spec->num_pwrs)
471 return;
472
473 if (jack && jack->nid) {
474 stac_toggle_power_map(codec, jack->nid,
475 snd_hda_jack_detect(codec, jack->nid),
476 true);
477 return;
478 }
479
480 /* update all jacks */
481 for (i = 0; i < spec->num_pwrs; i++) {
482 hda_nid_t nid = spec->pwr_nids[i];
483 if (!snd_hda_jack_tbl_get(codec, nid))
484 continue;
485 stac_toggle_power_map(codec, nid,
486 snd_hda_jack_detect(codec, nid),
487 false);
488 }
489
490 snd_hda_codec_write(codec, codec->core.afg, 0,
491 AC_VERB_IDT_SET_POWER_MAP,
492 spec->power_map_bits);
493}
494
495static void stac_vref_event(struct hda_codec *codec,
496 struct hda_jack_callback *event)
497{
498 unsigned int data;
499
500 data = snd_hda_codec_read(codec, codec->core.afg, 0,
501 AC_VERB_GET_GPIO_DATA, 0);
502 /* toggle VREF state based on GPIOx status */
503 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
504 !!(data & (1 << event->private_data)));
505}
506
507/* initialize the power map and enable the power event to jacks that
508 * haven't been assigned to automute
509 */
510static void stac_init_power_map(struct hda_codec *codec)
511{
512 struct sigmatel_spec *spec = codec->spec;
513 int i;
514
515 for (i = 0; i < spec->num_pwrs; i++) {
516 hda_nid_t nid = spec->pwr_nids[i];
517 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
518 def_conf = get_defcfg_connect(def_conf);
519 if (def_conf == AC_JACK_PORT_COMPLEX &&
520 spec->vref_mute_led_nid != nid &&
521 is_jack_detectable(codec, nid)) {
522 snd_hda_jack_detect_enable_callback(codec, nid,
523 jack_update_power);
524 } else {
525 if (def_conf == AC_JACK_PORT_NONE)
526 stac_toggle_power_map(codec, nid, false, false);
527 else
528 stac_toggle_power_map(codec, nid, true, false);
529 }
530 }
531}
532
533/*
534 */
535
536static inline bool get_int_hint(struct hda_codec *codec, const char *key,
537 int *valp)
538{
539 return !snd_hda_get_int_hint(codec, key, valp);
540}
541
542/* override some hints from the hwdep entry */
543static void stac_store_hints(struct hda_codec *codec)
544{
545 struct sigmatel_spec *spec = codec->spec;
546 int val;
547
548 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
549 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
550 spec->gpio_mask;
551 }
552 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
553 spec->gpio_dir &= spec->gpio_mask;
554 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
555 spec->gpio_data &= spec->gpio_mask;
556 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
557 spec->eapd_mask &= spec->gpio_mask;
558 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
559 spec->gpio_mute &= spec->gpio_mask;
560 val = snd_hda_get_bool_hint(codec, "eapd_switch");
561 if (val >= 0)
562 spec->eapd_switch = val;
563}
564
565/*
566 * loopback controls
567 */
568
569#define stac_aloopback_info snd_ctl_boolean_mono_info
570
571static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
572 struct snd_ctl_elem_value *ucontrol)
573{
574 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
575 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
576 struct sigmatel_spec *spec = codec->spec;
577
578 ucontrol->value.integer.value[0] = !!(spec->aloopback &
579 (spec->aloopback_mask << idx));
580 return 0;
581}
582
583static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
584 struct snd_ctl_elem_value *ucontrol)
585{
586 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
587 struct sigmatel_spec *spec = codec->spec;
588 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
589 unsigned int dac_mode;
590 unsigned int val, idx_val;
591
592 idx_val = spec->aloopback_mask << idx;
593 if (ucontrol->value.integer.value[0])
594 val = spec->aloopback | idx_val;
595 else
596 val = spec->aloopback & ~idx_val;
597 if (spec->aloopback == val)
598 return 0;
599
600 spec->aloopback = val;
601
602 /* Only return the bits defined by the shift value of the
603 * first two bytes of the mask
604 */
605 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
606 kcontrol->private_value & 0xFFFF, 0x0);
607 dac_mode >>= spec->aloopback_shift;
608
609 if (spec->aloopback & idx_val) {
610 snd_hda_power_up(codec);
611 dac_mode |= idx_val;
612 } else {
613 snd_hda_power_down(codec);
614 dac_mode &= ~idx_val;
615 }
616
617 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
618 kcontrol->private_value >> 16, dac_mode);
619
620 return 1;
621}
622
623#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
624 { \
625 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
626 .name = "Analog Loopback", \
627 .count = cnt, \
628 .info = stac_aloopback_info, \
629 .get = stac_aloopback_get, \
630 .put = stac_aloopback_put, \
631 .private_value = verb_read | (verb_write << 16), \
632 }
633
634/*
635 * Mute LED handling on HP laptops
636 */
637
638/* check whether it's a HP laptop with a docking port */
639static bool hp_bnb2011_with_dock(struct hda_codec *codec)
640{
641 if (codec->core.vendor_id != 0x111d7605 &&
642 codec->core.vendor_id != 0x111d76d1)
643 return false;
644
645 switch (codec->core.subsystem_id) {
646 case 0x103c1618:
647 case 0x103c1619:
648 case 0x103c161a:
649 case 0x103c161b:
650 case 0x103c161c:
651 case 0x103c161d:
652 case 0x103c161e:
653 case 0x103c161f:
654
655 case 0x103c162a:
656 case 0x103c162b:
657
658 case 0x103c1630:
659 case 0x103c1631:
660
661 case 0x103c1633:
662 case 0x103c1634:
663 case 0x103c1635:
664
665 case 0x103c3587:
666 case 0x103c3588:
667 case 0x103c3589:
668 case 0x103c358a:
669
670 case 0x103c3667:
671 case 0x103c3668:
672 case 0x103c3669:
673
674 return true;
675 }
676 return false;
677}
678
679static bool hp_blike_system(u32 subsystem_id)
680{
681 switch (subsystem_id) {
682 case 0x103c1473: /* HP ProBook 6550b */
683 case 0x103c1520:
684 case 0x103c1521:
685 case 0x103c1523:
686 case 0x103c1524:
687 case 0x103c1525:
688 case 0x103c1722:
689 case 0x103c1723:
690 case 0x103c1724:
691 case 0x103c1725:
692 case 0x103c1726:
693 case 0x103c1727:
694 case 0x103c1728:
695 case 0x103c1729:
696 case 0x103c172a:
697 case 0x103c172b:
698 case 0x103c307e:
699 case 0x103c307f:
700 case 0x103c3080:
701 case 0x103c3081:
702 case 0x103c7007:
703 case 0x103c7008:
704 return true;
705 }
706 return false;
707}
708
709static void set_hp_led_gpio(struct hda_codec *codec)
710{
711 struct sigmatel_spec *spec = codec->spec;
712 unsigned int gpio;
713
714 if (spec->gpio_led)
715 return;
716
717 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
718 gpio &= AC_GPIO_IO_COUNT;
719 if (gpio > 3)
720 spec->gpio_led = 0x08; /* GPIO 3 */
721 else
722 spec->gpio_led = 0x01; /* GPIO 0 */
723}
724
725/*
726 * This method searches for the mute LED GPIO configuration
727 * provided as OEM string in SMBIOS. The format of that string
728 * is HP_Mute_LED_P_G or HP_Mute_LED_P
729 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
730 * that corresponds to the NOT muted state of the master volume
731 * and G is the index of the GPIO to use as the mute LED control (0..9)
732 * If _G portion is missing it is assigned based on the codec ID
733 *
734 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
735 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
736 *
737 *
738 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
739 * SMBIOS - at least the ones I have seen do not have them - which include
740 * my own system (HP Pavilion dv6-1110ax) and my cousin's
741 * HP Pavilion dv9500t CTO.
742 * Need more information on whether it is true across the entire series.
743 * -- kunal
744 */
745static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
746{
747 struct sigmatel_spec *spec = codec->spec;
748 const struct dmi_device *dev = NULL;
749
750 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
751 get_int_hint(codec, "gpio_led_polarity",
752 &spec->gpio_led_polarity);
753 return 1;
754 }
755
756 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
757 if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
758 &spec->gpio_led_polarity,
759 &spec->gpio_led) == 2) {
760 unsigned int max_gpio;
761 max_gpio = snd_hda_param_read(codec, codec->core.afg,
762 AC_PAR_GPIO_CAP);
763 max_gpio &= AC_GPIO_IO_COUNT;
764 if (spec->gpio_led < max_gpio)
765 spec->gpio_led = 1 << spec->gpio_led;
766 else
767 spec->vref_mute_led_nid = spec->gpio_led;
768 return 1;
769 }
770 if (sscanf(dev->name, "HP_Mute_LED_%u",
771 &spec->gpio_led_polarity) == 1) {
772 set_hp_led_gpio(codec);
773 return 1;
774 }
775 /* BIOS bug: unfilled OEM string */
776 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
777 set_hp_led_gpio(codec);
778 if (default_polarity >= 0)
779 spec->gpio_led_polarity = default_polarity;
780 else
781 spec->gpio_led_polarity = 1;
782 return 1;
783 }
784 }
785
786 /*
787 * Fallback case - if we don't find the DMI strings,
788 * we statically set the GPIO - if not a B-series system
789 * and default polarity is provided
790 */
791 if (!hp_blike_system(codec->core.subsystem_id) &&
792 (default_polarity == 0 || default_polarity == 1)) {
793 set_hp_led_gpio(codec);
794 spec->gpio_led_polarity = default_polarity;
795 return 1;
796 }
797 return 0;
798}
799
800/* check whether a built-in speaker is included in parsed pins */
801static bool has_builtin_speaker(struct hda_codec *codec)
802{
803 struct sigmatel_spec *spec = codec->spec;
804 const hda_nid_t *nid_pin;
805 int nids, i;
806
807 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
808 nid_pin = spec->gen.autocfg.line_out_pins;
809 nids = spec->gen.autocfg.line_outs;
810 } else {
811 nid_pin = spec->gen.autocfg.speaker_pins;
812 nids = spec->gen.autocfg.speaker_outs;
813 }
814
815 for (i = 0; i < nids; i++) {
816 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
817 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
818 return true;
819 }
820 return false;
821}
822
823/*
824 * PC beep controls
825 */
826
827/* create PC beep volume controls */
828static int stac_auto_create_beep_ctls(struct hda_codec *codec,
829 hda_nid_t nid)
830{
831 struct sigmatel_spec *spec = codec->spec;
832 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
833 struct snd_kcontrol_new *knew;
834 static const struct snd_kcontrol_new abeep_mute_ctl =
835 HDA_CODEC_MUTE(NULL, 0, 0, 0);
836 static const struct snd_kcontrol_new dbeep_mute_ctl =
837 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
838 static const struct snd_kcontrol_new beep_vol_ctl =
839 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
840
841 /* check for mute support for the amp */
842 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
843 const struct snd_kcontrol_new *temp;
844 if (spec->anabeep_nid == nid)
845 temp = &abeep_mute_ctl;
846 else
847 temp = &dbeep_mute_ctl;
848 knew = snd_hda_gen_add_kctl(&spec->gen,
849 "Beep Playback Switch", temp);
850 if (!knew)
851 return -ENOMEM;
852 knew->private_value =
853 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
854 }
855
856 /* check to see if there is volume support for the amp */
857 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
858 knew = snd_hda_gen_add_kctl(&spec->gen,
859 "Beep Playback Volume",
860 &beep_vol_ctl);
861 if (!knew)
862 return -ENOMEM;
863 knew->private_value =
864 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
865 }
866 return 0;
867}
868
869#ifdef CONFIG_SND_HDA_INPUT_BEEP
870#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
871
872static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
873 struct snd_ctl_elem_value *ucontrol)
874{
875 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
876 ucontrol->value.integer.value[0] = codec->beep->enabled;
877 return 0;
878}
879
880static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
881 struct snd_ctl_elem_value *ucontrol)
882{
883 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
884 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
885}
886
887static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
888 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
889 .name = "Beep Playback Switch",
890 .info = stac_dig_beep_switch_info,
891 .get = stac_dig_beep_switch_get,
892 .put = stac_dig_beep_switch_put,
893};
894
895static int stac_beep_switch_ctl(struct hda_codec *codec)
896{
897 struct sigmatel_spec *spec = codec->spec;
898
899 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
900 return -ENOMEM;
901 return 0;
902}
903#endif
904
905/*
906 * SPDIF-out mux controls
907 */
908
909static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
910 struct snd_ctl_elem_info *uinfo)
911{
912 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
913 struct sigmatel_spec *spec = codec->spec;
914 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
915}
916
917static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
918 struct snd_ctl_elem_value *ucontrol)
919{
920 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
921 struct sigmatel_spec *spec = codec->spec;
922 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
923
924 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
925 return 0;
926}
927
928static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930{
931 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
932 struct sigmatel_spec *spec = codec->spec;
933 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
934
935 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
936 spec->gen.autocfg.dig_out_pins[smux_idx],
937 &spec->cur_smux[smux_idx]);
938}
939
940static const struct snd_kcontrol_new stac_smux_mixer = {
941 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
942 .name = "IEC958 Playback Source",
943 /* count set later */
944 .info = stac_smux_enum_info,
945 .get = stac_smux_enum_get,
946 .put = stac_smux_enum_put,
947};
948
949static const char * const stac_spdif_labels[] = {
950 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
951};
952
953static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
954{
955 struct sigmatel_spec *spec = codec->spec;
956 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
957 const char * const *labels = spec->spdif_labels;
958 struct snd_kcontrol_new *kctl;
959 int i, num_cons;
960
961 if (cfg->dig_outs < 1)
962 return 0;
963
964 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
965 if (num_cons <= 1)
966 return 0;
967
968 if (!labels)
969 labels = stac_spdif_labels;
970 for (i = 0; i < num_cons; i++) {
971 if (snd_BUG_ON(!labels[i]))
972 return -EINVAL;
973 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
974 }
975
976 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
977 if (!kctl)
978 return -ENOMEM;
979 kctl->count = cfg->dig_outs;
980
981 return 0;
982}
983
984static const struct hda_verb stac9200_eapd_init[] = {
985 /* set dac0mux for dac converter */
986 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
987 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
988 {}
989};
990
991static const struct hda_verb dell_eq_core_init[] = {
992 /* set master volume to max value without distortion
993 * and direct control */
994 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
995 {}
996};
997
998static const struct hda_verb stac92hd73xx_core_init[] = {
999 /* set master volume and direct control */
1000 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1001 {}
1002};
1003
1004static const struct hda_verb stac92hd83xxx_core_init[] = {
1005 /* power state controls amps */
1006 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1007 {}
1008};
1009
1010static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1011 { 0x22, 0x785, 0x43 },
1012 { 0x22, 0x782, 0xe0 },
1013 { 0x22, 0x795, 0x00 },
1014 {}
1015};
1016
1017static const struct hda_verb stac92hd71bxx_core_init[] = {
1018 /* set master volume and direct control */
1019 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1020 {}
1021};
1022
1023static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
1024 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1025 0x0f, 0x0a, 0x0d, 0
1026};
1027
1028static const struct hda_verb stac925x_core_init[] = {
1029 /* set dac0mux for dac converter */
1030 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1031 /* mute the master volume */
1032 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1033 {}
1034};
1035
1036static const struct hda_verb stac922x_core_init[] = {
1037 /* set master volume and direct control */
1038 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1039 {}
1040};
1041
1042static const struct hda_verb d965_core_init[] = {
1043 /* unmute node 0x1b */
1044 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1045 /* select node 0x03 as DAC */
1046 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1047 {}
1048};
1049
1050static const struct hda_verb dell_3st_core_init[] = {
1051 /* don't set delta bit */
1052 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1053 /* unmute node 0x1b */
1054 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1055 /* select node 0x03 as DAC */
1056 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1057 {}
1058};
1059
1060static const struct hda_verb stac927x_core_init[] = {
1061 /* set master volume and direct control */
1062 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1063 /* enable analog pc beep path */
1064 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1065 {}
1066};
1067
1068static const struct hda_verb stac927x_volknob_core_init[] = {
1069 /* don't set delta bit */
1070 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1071 /* enable analog pc beep path */
1072 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1073 {}
1074};
1075
1076static const struct hda_verb stac9205_core_init[] = {
1077 /* set master volume and direct control */
1078 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1079 /* enable analog pc beep path */
1080 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1081 {}
1082};
1083
1084static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1085 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1086
1087static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1088 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1089
1090static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1091 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1092
1093static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1094 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1095
1096static const struct snd_kcontrol_new stac9205_loopback =
1097 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1098
1099static const struct snd_kcontrol_new stac927x_loopback =
1100 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1101
1102static const struct hda_pintbl ref9200_pin_configs[] = {
1103 { 0x08, 0x01c47010 },
1104 { 0x09, 0x01447010 },
1105 { 0x0d, 0x0221401f },
1106 { 0x0e, 0x01114010 },
1107 { 0x0f, 0x02a19020 },
1108 { 0x10, 0x01a19021 },
1109 { 0x11, 0x90100140 },
1110 { 0x12, 0x01813122 },
1111 {}
1112};
1113
1114static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1115 { 0x08, 0x400000fe },
1116 { 0x09, 0x404500f4 },
1117 { 0x0d, 0x400100f0 },
1118 { 0x0e, 0x90110010 },
1119 { 0x0f, 0x400100f1 },
1120 { 0x10, 0x02a1902e },
1121 { 0x11, 0x500000f2 },
1122 { 0x12, 0x500000f3 },
1123 {}
1124};
1125
1126static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1127 { 0x08, 0x400000fe },
1128 { 0x09, 0x404500f4 },
1129 { 0x0d, 0x400100f0 },
1130 { 0x0e, 0x90110010 },
1131 { 0x0f, 0x400100f1 },
1132 { 0x10, 0x02a1902e },
1133 { 0x11, 0x500000f2 },
1134 { 0x12, 0x500000f3 },
1135 {}
1136};
1137
1138/*
1139 STAC 9200 pin configs for
1140 102801A8
1141 102801DE
1142 102801E8
1143*/
1144static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1145 { 0x08, 0x400001f0 },
1146 { 0x09, 0x400001f1 },
1147 { 0x0d, 0x02214030 },
1148 { 0x0e, 0x01014010 },
1149 { 0x0f, 0x02a19020 },
1150 { 0x10, 0x01a19021 },
1151 { 0x11, 0x90100140 },
1152 { 0x12, 0x01813122 },
1153 {}
1154};
1155
1156/*
1157 STAC 9200 pin configs for
1158 102801C0
1159 102801C1
1160*/
1161static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1162 { 0x08, 0x400001f0 },
1163 { 0x09, 0x400001f1 },
1164 { 0x0d, 0x0221401f },
1165 { 0x0e, 0x01014010 },
1166 { 0x0f, 0x01813020 },
1167 { 0x10, 0x02a19021 },
1168 { 0x11, 0x90100140 },
1169 { 0x12, 0x400001f2 },
1170 {}
1171};
1172
1173/*
1174 STAC 9200 pin configs for
1175 102801C4 (Dell Dimension E310)
1176 102801C5
1177 102801C7
1178 102801D9
1179 102801DA
1180 102801E3
1181*/
1182static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1183 { 0x08, 0x400001f0 },
1184 { 0x09, 0x400001f1 },
1185 { 0x0d, 0x0221401f },
1186 { 0x0e, 0x01014010 },
1187 { 0x0f, 0x01813020 },
1188 { 0x10, 0x01a19021 },
1189 { 0x11, 0x90100140 },
1190 { 0x12, 0x400001f2 },
1191 {}
1192};
1193
1194
1195/*
1196 STAC 9200-32 pin configs for
1197 102801B5 (Dell Inspiron 630m)
1198 102801D8 (Dell Inspiron 640m)
1199*/
1200static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1201 { 0x08, 0x40c003fa },
1202 { 0x09, 0x03441340 },
1203 { 0x0d, 0x0321121f },
1204 { 0x0e, 0x90170310 },
1205 { 0x0f, 0x408003fb },
1206 { 0x10, 0x03a11020 },
1207 { 0x11, 0x401003fc },
1208 { 0x12, 0x403003fd },
1209 {}
1210};
1211
1212/*
1213 STAC 9200-32 pin configs for
1214 102801C2 (Dell Latitude D620)
1215 102801C8
1216 102801CC (Dell Latitude D820)
1217 102801D4
1218 102801D6
1219*/
1220static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1221 { 0x08, 0x40c003fa },
1222 { 0x09, 0x0144131f },
1223 { 0x0d, 0x0321121f },
1224 { 0x0e, 0x90170310 },
1225 { 0x0f, 0x90a70321 },
1226 { 0x10, 0x03a11020 },
1227 { 0x11, 0x401003fb },
1228 { 0x12, 0x40f000fc },
1229 {}
1230};
1231
1232/*
1233 STAC 9200-32 pin configs for
1234 102801CE (Dell XPS M1710)
1235 102801CF (Dell Precision M90)
1236*/
1237static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1238 { 0x08, 0x40c003fa },
1239 { 0x09, 0x01441340 },
1240 { 0x0d, 0x0421421f },
1241 { 0x0e, 0x90170310 },
1242 { 0x0f, 0x408003fb },
1243 { 0x10, 0x04a1102e },
1244 { 0x11, 0x90170311 },
1245 { 0x12, 0x403003fc },
1246 {}
1247};
1248
1249/*
1250 STAC 9200-32 pin configs for
1251 102801C9
1252 102801CA
1253 102801CB (Dell Latitude 120L)
1254 102801D3
1255*/
1256static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1257 { 0x08, 0x40c003fa },
1258 { 0x09, 0x404003fb },
1259 { 0x0d, 0x0321121f },
1260 { 0x0e, 0x90170310 },
1261 { 0x0f, 0x408003fc },
1262 { 0x10, 0x03a11020 },
1263 { 0x11, 0x401003fd },
1264 { 0x12, 0x403003fe },
1265 {}
1266};
1267
1268/*
1269 STAC 9200-32 pin configs for
1270 102801BD (Dell Inspiron E1505n)
1271 102801EE
1272 102801EF
1273*/
1274static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1275 { 0x08, 0x40c003fa },
1276 { 0x09, 0x01441340 },
1277 { 0x0d, 0x0421121f },
1278 { 0x0e, 0x90170310 },
1279 { 0x0f, 0x408003fb },
1280 { 0x10, 0x04a11020 },
1281 { 0x11, 0x401003fc },
1282 { 0x12, 0x403003fd },
1283 {}
1284};
1285
1286/*
1287 STAC 9200-32 pin configs for
1288 102801F5 (Dell Inspiron 1501)
1289 102801F6
1290*/
1291static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1292 { 0x08, 0x40c003fa },
1293 { 0x09, 0x404003fb },
1294 { 0x0d, 0x0421121f },
1295 { 0x0e, 0x90170310 },
1296 { 0x0f, 0x408003fc },
1297 { 0x10, 0x04a11020 },
1298 { 0x11, 0x401003fd },
1299 { 0x12, 0x403003fe },
1300 {}
1301};
1302
1303/*
1304 STAC 9200-32
1305 102801CD (Dell Inspiron E1705/9400)
1306*/
1307static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1308 { 0x08, 0x40c003fa },
1309 { 0x09, 0x01441340 },
1310 { 0x0d, 0x0421121f },
1311 { 0x0e, 0x90170310 },
1312 { 0x0f, 0x90170310 },
1313 { 0x10, 0x04a11020 },
1314 { 0x11, 0x90170310 },
1315 { 0x12, 0x40f003fc },
1316 {}
1317};
1318
1319static const struct hda_pintbl oqo9200_pin_configs[] = {
1320 { 0x08, 0x40c000f0 },
1321 { 0x09, 0x404000f1 },
1322 { 0x0d, 0x0221121f },
1323 { 0x0e, 0x02211210 },
1324 { 0x0f, 0x90170111 },
1325 { 0x10, 0x90a70120 },
1326 { 0x11, 0x400000f2 },
1327 { 0x12, 0x400000f3 },
1328 {}
1329};
1330
1331/*
1332 * STAC 92HD700
1333 * 18881000 Amigaone X1000
1334 */
1335static const struct hda_pintbl nemo_pin_configs[] = {
1336 { 0x0a, 0x02214020 }, /* Front panel HP socket */
1337 { 0x0b, 0x02a19080 }, /* Front Mic */
1338 { 0x0c, 0x0181304e }, /* Line in */
1339 { 0x0d, 0x01014010 }, /* Line out */
1340 { 0x0e, 0x01a19040 }, /* Rear Mic */
1341 { 0x0f, 0x01011012 }, /* Rear speakers */
1342 { 0x10, 0x01016011 }, /* Center speaker */
1343 { 0x11, 0x01012014 }, /* Side speakers (7.1) */
1344 { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */
1345 { 0x13, 0x411111f0 }, /* Unused */
1346 { 0x14, 0x411111f0 }, /* Unused */
1347 { 0x21, 0x01442170 }, /* S/PDIF line out */
1348 { 0x22, 0x411111f0 }, /* Unused */
1349 { 0x23, 0x411111f0 }, /* Unused */
1350 {}
1351};
1352
1353static void stac9200_fixup_panasonic(struct hda_codec *codec,
1354 const struct hda_fixup *fix, int action)
1355{
1356 struct sigmatel_spec *spec = codec->spec;
1357
1358 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1359 spec->gpio_mask = spec->gpio_dir = 0x09;
1360 spec->gpio_data = 0x00;
1361 /* CF-74 has no headphone detection, and the driver should *NOT*
1362 * do detection and HP/speaker toggle because the hardware does it.
1363 */
1364 spec->gen.suppress_auto_mute = 1;
1365 }
1366}
1367
1368
1369static const struct hda_fixup stac9200_fixups[] = {
1370 [STAC_REF] = {
1371 .type = HDA_FIXUP_PINS,
1372 .v.pins = ref9200_pin_configs,
1373 },
1374 [STAC_9200_OQO] = {
1375 .type = HDA_FIXUP_PINS,
1376 .v.pins = oqo9200_pin_configs,
1377 .chained = true,
1378 .chain_id = STAC_9200_EAPD_INIT,
1379 },
1380 [STAC_9200_DELL_D21] = {
1381 .type = HDA_FIXUP_PINS,
1382 .v.pins = dell9200_d21_pin_configs,
1383 },
1384 [STAC_9200_DELL_D22] = {
1385 .type = HDA_FIXUP_PINS,
1386 .v.pins = dell9200_d22_pin_configs,
1387 },
1388 [STAC_9200_DELL_D23] = {
1389 .type = HDA_FIXUP_PINS,
1390 .v.pins = dell9200_d23_pin_configs,
1391 },
1392 [STAC_9200_DELL_M21] = {
1393 .type = HDA_FIXUP_PINS,
1394 .v.pins = dell9200_m21_pin_configs,
1395 },
1396 [STAC_9200_DELL_M22] = {
1397 .type = HDA_FIXUP_PINS,
1398 .v.pins = dell9200_m22_pin_configs,
1399 },
1400 [STAC_9200_DELL_M23] = {
1401 .type = HDA_FIXUP_PINS,
1402 .v.pins = dell9200_m23_pin_configs,
1403 },
1404 [STAC_9200_DELL_M24] = {
1405 .type = HDA_FIXUP_PINS,
1406 .v.pins = dell9200_m24_pin_configs,
1407 },
1408 [STAC_9200_DELL_M25] = {
1409 .type = HDA_FIXUP_PINS,
1410 .v.pins = dell9200_m25_pin_configs,
1411 },
1412 [STAC_9200_DELL_M26] = {
1413 .type = HDA_FIXUP_PINS,
1414 .v.pins = dell9200_m26_pin_configs,
1415 },
1416 [STAC_9200_DELL_M27] = {
1417 .type = HDA_FIXUP_PINS,
1418 .v.pins = dell9200_m27_pin_configs,
1419 },
1420 [STAC_9200_M4] = {
1421 .type = HDA_FIXUP_PINS,
1422 .v.pins = gateway9200_m4_pin_configs,
1423 .chained = true,
1424 .chain_id = STAC_9200_EAPD_INIT,
1425 },
1426 [STAC_9200_M4_2] = {
1427 .type = HDA_FIXUP_PINS,
1428 .v.pins = gateway9200_m4_2_pin_configs,
1429 .chained = true,
1430 .chain_id = STAC_9200_EAPD_INIT,
1431 },
1432 [STAC_9200_PANASONIC] = {
1433 .type = HDA_FIXUP_FUNC,
1434 .v.func = stac9200_fixup_panasonic,
1435 },
1436 [STAC_9200_EAPD_INIT] = {
1437 .type = HDA_FIXUP_VERBS,
1438 .v.verbs = (const struct hda_verb[]) {
1439 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1440 {}
1441 },
1442 },
1443};
1444
1445static const struct hda_model_fixup stac9200_models[] = {
1446 { .id = STAC_REF, .name = "ref" },
1447 { .id = STAC_9200_OQO, .name = "oqo" },
1448 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1449 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1450 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1451 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1452 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1453 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1454 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1455 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1456 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1457 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1458 { .id = STAC_9200_M4, .name = "gateway-m4" },
1459 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1460 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1461 {}
1462};
1463
1464static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1465 /* SigmaTel reference board */
1466 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1467 "DFI LanParty", STAC_REF),
1468 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1469 "DFI LanParty", STAC_REF),
1470 /* Dell laptops have BIOS problem */
1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1472 "unknown Dell", STAC_9200_DELL_D21),
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1474 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1476 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1478 "unknown Dell", STAC_9200_DELL_D22),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1480 "unknown Dell", STAC_9200_DELL_D22),
1481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1482 "Dell Latitude D620", STAC_9200_DELL_M22),
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1484 "unknown Dell", STAC_9200_DELL_D23),
1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1486 "unknown Dell", STAC_9200_DELL_D23),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1488 "unknown Dell", STAC_9200_DELL_M22),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1490 "unknown Dell", STAC_9200_DELL_M24),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1492 "unknown Dell", STAC_9200_DELL_M24),
1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1494 "Dell Latitude 120L", STAC_9200_DELL_M24),
1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1496 "Dell Latitude D820", STAC_9200_DELL_M22),
1497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1498 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1500 "Dell XPS M1710", STAC_9200_DELL_M23),
1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1502 "Dell Precision M90", STAC_9200_DELL_M23),
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1504 "unknown Dell", STAC_9200_DELL_M22),
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1506 "unknown Dell", STAC_9200_DELL_M22),
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1508 "unknown Dell", STAC_9200_DELL_M22),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1510 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1512 "unknown Dell", STAC_9200_DELL_D23),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1514 "unknown Dell", STAC_9200_DELL_D23),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1516 "unknown Dell", STAC_9200_DELL_D21),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1518 "unknown Dell", STAC_9200_DELL_D23),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1520 "unknown Dell", STAC_9200_DELL_D21),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1522 "unknown Dell", STAC_9200_DELL_M25),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1524 "unknown Dell", STAC_9200_DELL_M25),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1526 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1528 "unknown Dell", STAC_9200_DELL_M26),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
1530 "Dell Latitude D430", STAC_9200_DELL_M22),
1531 /* Panasonic */
1532 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1533 /* Gateway machines needs EAPD to be set on resume */
1534 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1535 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1536 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1537 /* OQO Mobile */
1538 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1539 {} /* terminator */
1540};
1541
1542static const struct hda_pintbl ref925x_pin_configs[] = {
1543 { 0x07, 0x40c003f0 },
1544 { 0x08, 0x424503f2 },
1545 { 0x0a, 0x01813022 },
1546 { 0x0b, 0x02a19021 },
1547 { 0x0c, 0x90a70320 },
1548 { 0x0d, 0x02214210 },
1549 { 0x10, 0x01019020 },
1550 { 0x11, 0x9033032e },
1551 {}
1552};
1553
1554static const struct hda_pintbl stac925xM1_pin_configs[] = {
1555 { 0x07, 0x40c003f4 },
1556 { 0x08, 0x424503f2 },
1557 { 0x0a, 0x400000f3 },
1558 { 0x0b, 0x02a19020 },
1559 { 0x0c, 0x40a000f0 },
1560 { 0x0d, 0x90100210 },
1561 { 0x10, 0x400003f1 },
1562 { 0x11, 0x9033032e },
1563 {}
1564};
1565
1566static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1567 { 0x07, 0x40c003f4 },
1568 { 0x08, 0x424503f2 },
1569 { 0x0a, 0x400000f3 },
1570 { 0x0b, 0x02a19020 },
1571 { 0x0c, 0x40a000f0 },
1572 { 0x0d, 0x90100210 },
1573 { 0x10, 0x400003f1 },
1574 { 0x11, 0x9033032e },
1575 {}
1576};
1577
1578static const struct hda_pintbl stac925xM2_pin_configs[] = {
1579 { 0x07, 0x40c003f4 },
1580 { 0x08, 0x424503f2 },
1581 { 0x0a, 0x400000f3 },
1582 { 0x0b, 0x02a19020 },
1583 { 0x0c, 0x40a000f0 },
1584 { 0x0d, 0x90100210 },
1585 { 0x10, 0x400003f1 },
1586 { 0x11, 0x9033032e },
1587 {}
1588};
1589
1590static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1591 { 0x07, 0x40c003f4 },
1592 { 0x08, 0x424503f2 },
1593 { 0x0a, 0x400000f3 },
1594 { 0x0b, 0x02a19020 },
1595 { 0x0c, 0x40a000f0 },
1596 { 0x0d, 0x90100210 },
1597 { 0x10, 0x400003f1 },
1598 { 0x11, 0x9033032e },
1599 {}
1600};
1601
1602static const struct hda_pintbl stac925xM3_pin_configs[] = {
1603 { 0x07, 0x40c003f4 },
1604 { 0x08, 0x424503f2 },
1605 { 0x0a, 0x400000f3 },
1606 { 0x0b, 0x02a19020 },
1607 { 0x0c, 0x40a000f0 },
1608 { 0x0d, 0x90100210 },
1609 { 0x10, 0x400003f1 },
1610 { 0x11, 0x503303f3 },
1611 {}
1612};
1613
1614static const struct hda_pintbl stac925xM5_pin_configs[] = {
1615 { 0x07, 0x40c003f4 },
1616 { 0x08, 0x424503f2 },
1617 { 0x0a, 0x400000f3 },
1618 { 0x0b, 0x02a19020 },
1619 { 0x0c, 0x40a000f0 },
1620 { 0x0d, 0x90100210 },
1621 { 0x10, 0x400003f1 },
1622 { 0x11, 0x9033032e },
1623 {}
1624};
1625
1626static const struct hda_pintbl stac925xM6_pin_configs[] = {
1627 { 0x07, 0x40c003f4 },
1628 { 0x08, 0x424503f2 },
1629 { 0x0a, 0x400000f3 },
1630 { 0x0b, 0x02a19020 },
1631 { 0x0c, 0x40a000f0 },
1632 { 0x0d, 0x90100210 },
1633 { 0x10, 0x400003f1 },
1634 { 0x11, 0x90330320 },
1635 {}
1636};
1637
1638static const struct hda_fixup stac925x_fixups[] = {
1639 [STAC_REF] = {
1640 .type = HDA_FIXUP_PINS,
1641 .v.pins = ref925x_pin_configs,
1642 },
1643 [STAC_M1] = {
1644 .type = HDA_FIXUP_PINS,
1645 .v.pins = stac925xM1_pin_configs,
1646 },
1647 [STAC_M1_2] = {
1648 .type = HDA_FIXUP_PINS,
1649 .v.pins = stac925xM1_2_pin_configs,
1650 },
1651 [STAC_M2] = {
1652 .type = HDA_FIXUP_PINS,
1653 .v.pins = stac925xM2_pin_configs,
1654 },
1655 [STAC_M2_2] = {
1656 .type = HDA_FIXUP_PINS,
1657 .v.pins = stac925xM2_2_pin_configs,
1658 },
1659 [STAC_M3] = {
1660 .type = HDA_FIXUP_PINS,
1661 .v.pins = stac925xM3_pin_configs,
1662 },
1663 [STAC_M5] = {
1664 .type = HDA_FIXUP_PINS,
1665 .v.pins = stac925xM5_pin_configs,
1666 },
1667 [STAC_M6] = {
1668 .type = HDA_FIXUP_PINS,
1669 .v.pins = stac925xM6_pin_configs,
1670 },
1671};
1672
1673static const struct hda_model_fixup stac925x_models[] = {
1674 { .id = STAC_REF, .name = "ref" },
1675 { .id = STAC_M1, .name = "m1" },
1676 { .id = STAC_M1_2, .name = "m1-2" },
1677 { .id = STAC_M2, .name = "m2" },
1678 { .id = STAC_M2_2, .name = "m2-2" },
1679 { .id = STAC_M3, .name = "m3" },
1680 { .id = STAC_M5, .name = "m5" },
1681 { .id = STAC_M6, .name = "m6" },
1682 {}
1683};
1684
1685static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1686 /* SigmaTel reference board */
1687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1689 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1690
1691 /* Default table for unknown ID */
1692 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1693
1694 /* gateway machines are checked via codec ssid */
1695 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1696 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1697 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1698 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1699 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1700 /* Not sure about the brand name for those */
1701 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1702 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1703 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1704 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1705 {} /* terminator */
1706};
1707
1708static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1709 { 0x0a, 0x02214030 },
1710 { 0x0b, 0x02a19040 },
1711 { 0x0c, 0x01a19020 },
1712 { 0x0d, 0x02214030 },
1713 { 0x0e, 0x0181302e },
1714 { 0x0f, 0x01014010 },
1715 { 0x10, 0x01014020 },
1716 { 0x11, 0x01014030 },
1717 { 0x12, 0x02319040 },
1718 { 0x13, 0x90a000f0 },
1719 { 0x14, 0x90a000f0 },
1720 { 0x22, 0x01452050 },
1721 { 0x23, 0x01452050 },
1722 {}
1723};
1724
1725static const struct hda_pintbl dell_m6_pin_configs[] = {
1726 { 0x0a, 0x0321101f },
1727 { 0x0b, 0x4f00000f },
1728 { 0x0c, 0x4f0000f0 },
1729 { 0x0d, 0x90170110 },
1730 { 0x0e, 0x03a11020 },
1731 { 0x0f, 0x0321101f },
1732 { 0x10, 0x4f0000f0 },
1733 { 0x11, 0x4f0000f0 },
1734 { 0x12, 0x4f0000f0 },
1735 { 0x13, 0x90a60160 },
1736 { 0x14, 0x4f0000f0 },
1737 { 0x22, 0x4f0000f0 },
1738 { 0x23, 0x4f0000f0 },
1739 {}
1740};
1741
1742static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1743 { 0x0a, 0x0321101f },
1744 { 0x0b, 0x0321101f },
1745 { 0x0c, 0x03a11020 },
1746 { 0x0d, 0x03014020 },
1747 { 0x0e, 0x90170110 },
1748 { 0x0f, 0x4f0000f0 },
1749 { 0x10, 0x4f0000f0 },
1750 { 0x11, 0x4f0000f0 },
1751 { 0x12, 0x4f0000f0 },
1752 { 0x13, 0x90a60160 },
1753 { 0x14, 0x4f0000f0 },
1754 { 0x22, 0x4f0000f0 },
1755 { 0x23, 0x904601b0 },
1756 {}
1757};
1758
1759static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1760 { 0x0a, 0x02214230 },
1761 { 0x0b, 0x02A19240 },
1762 { 0x0c, 0x01013214 },
1763 { 0x0d, 0x01014210 },
1764 { 0x0e, 0x01A19250 },
1765 { 0x0f, 0x01011212 },
1766 { 0x10, 0x01016211 },
1767 {}
1768};
1769
1770static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1771 { 0x0a, 0x02214030 },
1772 { 0x0b, 0x02A19010 },
1773 {}
1774};
1775
1776static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1777 { 0x0e, 0x400000f0 },
1778 {}
1779};
1780
1781static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1782 const struct hda_fixup *fix, int action)
1783{
1784 struct sigmatel_spec *spec = codec->spec;
1785
1786 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1787 return;
1788
1789 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1790 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1791}
1792
1793static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1794{
1795 struct sigmatel_spec *spec = codec->spec;
1796
1797 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1798 spec->eapd_switch = 0;
1799}
1800
1801static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1802 const struct hda_fixup *fix, int action)
1803{
1804 struct sigmatel_spec *spec = codec->spec;
1805
1806 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1807 return;
1808
1809 stac92hd73xx_fixup_dell(codec);
1810 snd_hda_add_verbs(codec, dell_eq_core_init);
1811 spec->volknob_init = 1;
1812}
1813
1814/* Analog Mics */
1815static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1816 const struct hda_fixup *fix, int action)
1817{
1818 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1819 return;
1820
1821 stac92hd73xx_fixup_dell(codec);
1822 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1823}
1824
1825/* Digital Mics */
1826static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1827 const struct hda_fixup *fix, int action)
1828{
1829 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1830 return;
1831
1832 stac92hd73xx_fixup_dell(codec);
1833 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1834}
1835
1836/* Both */
1837static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1838 const struct hda_fixup *fix, int action)
1839{
1840 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1841 return;
1842
1843 stac92hd73xx_fixup_dell(codec);
1844 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1845 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1846}
1847
1848static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1849 const struct hda_fixup *fix, int action)
1850{
1851 struct sigmatel_spec *spec = codec->spec;
1852
1853 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1854 return;
1855
1856 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1857 spec->eapd_switch = 0;
1858}
1859
1860static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1861 const struct hda_fixup *fix, int action)
1862{
1863 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1864 codec->no_jack_detect = 1;
1865}
1866
1867
1868static void stac92hd73xx_disable_automute(struct hda_codec *codec,
1869 const struct hda_fixup *fix, int action)
1870{
1871 struct sigmatel_spec *spec = codec->spec;
1872
1873 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1874 return;
1875
1876 spec->gen.suppress_auto_mute = 1;
1877}
1878
1879static const struct hda_fixup stac92hd73xx_fixups[] = {
1880 [STAC_92HD73XX_REF] = {
1881 .type = HDA_FIXUP_FUNC,
1882 .v.func = stac92hd73xx_fixup_ref,
1883 },
1884 [STAC_DELL_M6_AMIC] = {
1885 .type = HDA_FIXUP_FUNC,
1886 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1887 },
1888 [STAC_DELL_M6_DMIC] = {
1889 .type = HDA_FIXUP_FUNC,
1890 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1891 },
1892 [STAC_DELL_M6_BOTH] = {
1893 .type = HDA_FIXUP_FUNC,
1894 .v.func = stac92hd73xx_fixup_dell_m6_both,
1895 },
1896 [STAC_DELL_EQ] = {
1897 .type = HDA_FIXUP_FUNC,
1898 .v.func = stac92hd73xx_fixup_dell_eq,
1899 },
1900 [STAC_ALIENWARE_M17X] = {
1901 .type = HDA_FIXUP_FUNC,
1902 .v.func = stac92hd73xx_fixup_alienware_m17x,
1903 },
1904 [STAC_ELO_VUPOINT_15MX] = {
1905 .type = HDA_FIXUP_FUNC,
1906 .v.func = stac92hd73xx_disable_automute,
1907 },
1908 [STAC_92HD73XX_INTEL] = {
1909 .type = HDA_FIXUP_PINS,
1910 .v.pins = intel_dg45id_pin_configs,
1911 },
1912 [STAC_92HD73XX_NO_JD] = {
1913 .type = HDA_FIXUP_FUNC,
1914 .v.func = stac92hd73xx_fixup_no_jd,
1915 },
1916 [STAC_92HD89XX_HP_FRONT_JACK] = {
1917 .type = HDA_FIXUP_PINS,
1918 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1919 },
1920 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1921 .type = HDA_FIXUP_PINS,
1922 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1923 },
1924 [STAC_92HD73XX_ASUS_MOBO] = {
1925 .type = HDA_FIXUP_PINS,
1926 .v.pins = (const struct hda_pintbl[]) {
1927 /* enable 5.1 and SPDIF out */
1928 { 0x0c, 0x01014411 },
1929 { 0x0d, 0x01014410 },
1930 { 0x0e, 0x01014412 },
1931 { 0x22, 0x014b1180 },
1932 { }
1933 }
1934 },
1935};
1936
1937static const struct hda_model_fixup stac92hd73xx_models[] = {
1938 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1939 { .id = STAC_92HD73XX_REF, .name = "ref" },
1940 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1941 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1942 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1943 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1944 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1945 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1946 { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" },
1947 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
1948 {}
1949};
1950
1951static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1952 /* SigmaTel reference board */
1953 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1954 "DFI LanParty", STAC_92HD73XX_REF),
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1956 "DFI LanParty", STAC_92HD73XX_REF),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1958 "Intel DG45ID", STAC_92HD73XX_INTEL),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1960 "Intel DG45FC", STAC_92HD73XX_INTEL),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1962 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1964 "unknown Dell", STAC_DELL_M6_DMIC),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1966 "unknown Dell", STAC_DELL_M6_BOTH),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1968 "unknown Dell", STAC_DELL_M6_BOTH),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1970 "unknown Dell", STAC_DELL_M6_AMIC),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1972 "unknown Dell", STAC_DELL_M6_AMIC),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1974 "unknown Dell", STAC_DELL_M6_DMIC),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1976 "unknown Dell", STAC_DELL_M6_DMIC),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1978 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1980 "Dell Studio 17", STAC_DELL_M6_DMIC),
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1982 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1984 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1986 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1988 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1989 /* codec SSID matching */
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1991 "Alienware M17x", STAC_ALIENWARE_M17X),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1993 "Alienware M17x", STAC_ALIENWARE_M17X),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1995 "Alienware M17x R3", STAC_DELL_EQ),
1996 SND_PCI_QUIRK(0x1059, 0x1011,
1997 "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
1999 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
2001 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
2003 STAC_92HD73XX_ASUS_MOBO),
2004 {} /* terminator */
2005};
2006
2007static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2008 { 0x0a, 0x02214030 },
2009 { 0x0b, 0x02211010 },
2010 { 0x0c, 0x02a19020 },
2011 { 0x0d, 0x02170130 },
2012 { 0x0e, 0x01014050 },
2013 { 0x0f, 0x01819040 },
2014 { 0x10, 0x01014020 },
2015 { 0x11, 0x90a3014e },
2016 { 0x1f, 0x01451160 },
2017 { 0x20, 0x98560170 },
2018 {}
2019};
2020
2021static const struct hda_pintbl dell_s14_pin_configs[] = {
2022 { 0x0a, 0x0221403f },
2023 { 0x0b, 0x0221101f },
2024 { 0x0c, 0x02a19020 },
2025 { 0x0d, 0x90170110 },
2026 { 0x0e, 0x40f000f0 },
2027 { 0x0f, 0x40f000f0 },
2028 { 0x10, 0x40f000f0 },
2029 { 0x11, 0x90a60160 },
2030 { 0x1f, 0x40f000f0 },
2031 { 0x20, 0x40f000f0 },
2032 {}
2033};
2034
2035static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2036 { 0x0a, 0x02a11020 },
2037 { 0x0b, 0x0221101f },
2038 { 0x0c, 0x400000f0 },
2039 { 0x0d, 0x90170110 },
2040 { 0x0e, 0x400000f1 },
2041 { 0x0f, 0x400000f2 },
2042 { 0x10, 0x400000f3 },
2043 { 0x11, 0x90a60160 },
2044 { 0x1f, 0x400000f4 },
2045 { 0x20, 0x400000f5 },
2046 {}
2047};
2048
2049static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2050 { 0x0a, 0x03a12050 },
2051 { 0x0b, 0x0321201f },
2052 { 0x0c, 0x40f000f0 },
2053 { 0x0d, 0x90170110 },
2054 { 0x0e, 0x40f000f0 },
2055 { 0x0f, 0x40f000f0 },
2056 { 0x10, 0x90170110 },
2057 { 0x11, 0xd5a30140 },
2058 { 0x1f, 0x40f000f0 },
2059 { 0x20, 0x40f000f0 },
2060 {}
2061};
2062
2063static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2064 { 0x0a, 0x01813050 },
2065 { 0x0b, 0x0421201f },
2066 { 0x0c, 0x04a1205e },
2067 { 0x0d, 0x96130310 },
2068 { 0x0e, 0x96130310 },
2069 { 0x0f, 0x0101401f },
2070 { 0x10, 0x1111611f },
2071 { 0x11, 0xd5a30130 },
2072 {}
2073};
2074
2075static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2076 { 0x0a, 0x40f000f0 },
2077 { 0x0b, 0x0221101f },
2078 { 0x0c, 0x02a11020 },
2079 { 0x0d, 0x92170110 },
2080 { 0x0e, 0x40f000f0 },
2081 { 0x0f, 0x92170110 },
2082 { 0x10, 0x40f000f0 },
2083 { 0x11, 0xd5a30130 },
2084 { 0x1f, 0x40f000f0 },
2085 { 0x20, 0x40f000f0 },
2086 {}
2087};
2088
2089static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2090 const struct hda_fixup *fix, int action)
2091{
2092 struct sigmatel_spec *spec = codec->spec;
2093
2094 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2095 return;
2096
2097 if (hp_bnb2011_with_dock(codec)) {
2098 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2099 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2100 }
2101
2102 if (find_mute_led_cfg(codec, spec->default_polarity))
2103 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
2104 spec->gpio_led,
2105 spec->gpio_led_polarity);
2106
2107 /* allow auto-switching of dock line-in */
2108 spec->gen.line_in_auto_switch = true;
2109}
2110
2111static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2112 const struct hda_fixup *fix, int action)
2113{
2114 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2115 return;
2116
2117 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2118 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2119}
2120
2121static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2122 const struct hda_fixup *fix, int action)
2123{
2124 struct sigmatel_spec *spec = codec->spec;
2125
2126 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2127 spec->default_polarity = 0;
2128}
2129
2130static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2131 const struct hda_fixup *fix, int action)
2132{
2133 struct sigmatel_spec *spec = codec->spec;
2134
2135 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2136 spec->default_polarity = 1;
2137}
2138
2139static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2140 const struct hda_fixup *fix, int action)
2141{
2142 struct sigmatel_spec *spec = codec->spec;
2143
2144 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2145 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2146#ifdef CONFIG_PM
2147 /* resetting controller clears GPIO, so we need to keep on */
2148 codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
2149#endif
2150 }
2151}
2152
2153static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2154 const struct hda_fixup *fix, int action)
2155{
2156 struct sigmatel_spec *spec = codec->spec;
2157
2158 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2159 spec->gpio_led = 0x10; /* GPIO4 */
2160 spec->default_polarity = 0;
2161 }
2162}
2163
2164static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2165 const struct hda_fixup *fix, int action)
2166{
2167 struct sigmatel_spec *spec = codec->spec;
2168
2169 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2170 spec->headset_jack = 1;
2171}
2172
2173static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2174 const struct hda_fixup *fix,
2175 int action)
2176{
2177 struct sigmatel_spec *spec = codec->spec;
2178
2179 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2180 return;
2181 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2182 spec->gpio_data = 0x10;
2183 spec->eapd_switch = 0;
2184}
2185
2186static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2187 const struct hda_fixup *fix,
2188 int action)
2189{
2190 struct sigmatel_spec *spec = codec->spec;
2191 static const hda_nid_t preferred_pairs[] = {
2192 0xd, 0x13,
2193 0
2194 };
2195
2196 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2197 return;
2198
2199 spec->gen.preferred_dacs = preferred_pairs;
2200}
2201
2202static const struct hda_verb hp_bnb13_eq_verbs[] = {
2203 /* 44.1KHz base */
2204 { 0x22, 0x7A6, 0x3E },
2205 { 0x22, 0x7A7, 0x68 },
2206 { 0x22, 0x7A8, 0x17 },
2207 { 0x22, 0x7A9, 0x3E },
2208 { 0x22, 0x7AA, 0x68 },
2209 { 0x22, 0x7AB, 0x17 },
2210 { 0x22, 0x7AC, 0x00 },
2211 { 0x22, 0x7AD, 0x80 },
2212 { 0x22, 0x7A6, 0x83 },
2213 { 0x22, 0x7A7, 0x2F },
2214 { 0x22, 0x7A8, 0xD1 },
2215 { 0x22, 0x7A9, 0x83 },
2216 { 0x22, 0x7AA, 0x2F },
2217 { 0x22, 0x7AB, 0xD1 },
2218 { 0x22, 0x7AC, 0x01 },
2219 { 0x22, 0x7AD, 0x80 },
2220 { 0x22, 0x7A6, 0x3E },
2221 { 0x22, 0x7A7, 0x68 },
2222 { 0x22, 0x7A8, 0x17 },
2223 { 0x22, 0x7A9, 0x3E },
2224 { 0x22, 0x7AA, 0x68 },
2225 { 0x22, 0x7AB, 0x17 },
2226 { 0x22, 0x7AC, 0x02 },
2227 { 0x22, 0x7AD, 0x80 },
2228 { 0x22, 0x7A6, 0x7C },
2229 { 0x22, 0x7A7, 0xC6 },
2230 { 0x22, 0x7A8, 0x0C },
2231 { 0x22, 0x7A9, 0x7C },
2232 { 0x22, 0x7AA, 0xC6 },
2233 { 0x22, 0x7AB, 0x0C },
2234 { 0x22, 0x7AC, 0x03 },
2235 { 0x22, 0x7AD, 0x80 },
2236 { 0x22, 0x7A6, 0xC3 },
2237 { 0x22, 0x7A7, 0x25 },
2238 { 0x22, 0x7A8, 0xAF },
2239 { 0x22, 0x7A9, 0xC3 },
2240 { 0x22, 0x7AA, 0x25 },
2241 { 0x22, 0x7AB, 0xAF },
2242 { 0x22, 0x7AC, 0x04 },
2243 { 0x22, 0x7AD, 0x80 },
2244 { 0x22, 0x7A6, 0x3E },
2245 { 0x22, 0x7A7, 0x85 },
2246 { 0x22, 0x7A8, 0x73 },
2247 { 0x22, 0x7A9, 0x3E },
2248 { 0x22, 0x7AA, 0x85 },
2249 { 0x22, 0x7AB, 0x73 },
2250 { 0x22, 0x7AC, 0x05 },
2251 { 0x22, 0x7AD, 0x80 },
2252 { 0x22, 0x7A6, 0x85 },
2253 { 0x22, 0x7A7, 0x39 },
2254 { 0x22, 0x7A8, 0xC7 },
2255 { 0x22, 0x7A9, 0x85 },
2256 { 0x22, 0x7AA, 0x39 },
2257 { 0x22, 0x7AB, 0xC7 },
2258 { 0x22, 0x7AC, 0x06 },
2259 { 0x22, 0x7AD, 0x80 },
2260 { 0x22, 0x7A6, 0x3C },
2261 { 0x22, 0x7A7, 0x90 },
2262 { 0x22, 0x7A8, 0xB0 },
2263 { 0x22, 0x7A9, 0x3C },
2264 { 0x22, 0x7AA, 0x90 },
2265 { 0x22, 0x7AB, 0xB0 },
2266 { 0x22, 0x7AC, 0x07 },
2267 { 0x22, 0x7AD, 0x80 },
2268 { 0x22, 0x7A6, 0x7A },
2269 { 0x22, 0x7A7, 0xC6 },
2270 { 0x22, 0x7A8, 0x39 },
2271 { 0x22, 0x7A9, 0x7A },
2272 { 0x22, 0x7AA, 0xC6 },
2273 { 0x22, 0x7AB, 0x39 },
2274 { 0x22, 0x7AC, 0x08 },
2275 { 0x22, 0x7AD, 0x80 },
2276 { 0x22, 0x7A6, 0xC4 },
2277 { 0x22, 0x7A7, 0xE9 },
2278 { 0x22, 0x7A8, 0xDC },
2279 { 0x22, 0x7A9, 0xC4 },
2280 { 0x22, 0x7AA, 0xE9 },
2281 { 0x22, 0x7AB, 0xDC },
2282 { 0x22, 0x7AC, 0x09 },
2283 { 0x22, 0x7AD, 0x80 },
2284 { 0x22, 0x7A6, 0x3D },
2285 { 0x22, 0x7A7, 0xE1 },
2286 { 0x22, 0x7A8, 0x0D },
2287 { 0x22, 0x7A9, 0x3D },
2288 { 0x22, 0x7AA, 0xE1 },
2289 { 0x22, 0x7AB, 0x0D },
2290 { 0x22, 0x7AC, 0x0A },
2291 { 0x22, 0x7AD, 0x80 },
2292 { 0x22, 0x7A6, 0x89 },
2293 { 0x22, 0x7A7, 0xB6 },
2294 { 0x22, 0x7A8, 0xEB },
2295 { 0x22, 0x7A9, 0x89 },
2296 { 0x22, 0x7AA, 0xB6 },
2297 { 0x22, 0x7AB, 0xEB },
2298 { 0x22, 0x7AC, 0x0B },
2299 { 0x22, 0x7AD, 0x80 },
2300 { 0x22, 0x7A6, 0x39 },
2301 { 0x22, 0x7A7, 0x9D },
2302 { 0x22, 0x7A8, 0xFE },
2303 { 0x22, 0x7A9, 0x39 },
2304 { 0x22, 0x7AA, 0x9D },
2305 { 0x22, 0x7AB, 0xFE },
2306 { 0x22, 0x7AC, 0x0C },
2307 { 0x22, 0x7AD, 0x80 },
2308 { 0x22, 0x7A6, 0x76 },
2309 { 0x22, 0x7A7, 0x49 },
2310 { 0x22, 0x7A8, 0x15 },
2311 { 0x22, 0x7A9, 0x76 },
2312 { 0x22, 0x7AA, 0x49 },
2313 { 0x22, 0x7AB, 0x15 },
2314 { 0x22, 0x7AC, 0x0D },
2315 { 0x22, 0x7AD, 0x80 },
2316 { 0x22, 0x7A6, 0xC8 },
2317 { 0x22, 0x7A7, 0x80 },
2318 { 0x22, 0x7A8, 0xF5 },
2319 { 0x22, 0x7A9, 0xC8 },
2320 { 0x22, 0x7AA, 0x80 },
2321 { 0x22, 0x7AB, 0xF5 },
2322 { 0x22, 0x7AC, 0x0E },
2323 { 0x22, 0x7AD, 0x80 },
2324 { 0x22, 0x7A6, 0x40 },
2325 { 0x22, 0x7A7, 0x00 },
2326 { 0x22, 0x7A8, 0x00 },
2327 { 0x22, 0x7A9, 0x40 },
2328 { 0x22, 0x7AA, 0x00 },
2329 { 0x22, 0x7AB, 0x00 },
2330 { 0x22, 0x7AC, 0x0F },
2331 { 0x22, 0x7AD, 0x80 },
2332 { 0x22, 0x7A6, 0x90 },
2333 { 0x22, 0x7A7, 0x68 },
2334 { 0x22, 0x7A8, 0xF1 },
2335 { 0x22, 0x7A9, 0x90 },
2336 { 0x22, 0x7AA, 0x68 },
2337 { 0x22, 0x7AB, 0xF1 },
2338 { 0x22, 0x7AC, 0x10 },
2339 { 0x22, 0x7AD, 0x80 },
2340 { 0x22, 0x7A6, 0x34 },
2341 { 0x22, 0x7A7, 0x47 },
2342 { 0x22, 0x7A8, 0x6C },
2343 { 0x22, 0x7A9, 0x34 },
2344 { 0x22, 0x7AA, 0x47 },
2345 { 0x22, 0x7AB, 0x6C },
2346 { 0x22, 0x7AC, 0x11 },
2347 { 0x22, 0x7AD, 0x80 },
2348 { 0x22, 0x7A6, 0x6F },
2349 { 0x22, 0x7A7, 0x97 },
2350 { 0x22, 0x7A8, 0x0F },
2351 { 0x22, 0x7A9, 0x6F },
2352 { 0x22, 0x7AA, 0x97 },
2353 { 0x22, 0x7AB, 0x0F },
2354 { 0x22, 0x7AC, 0x12 },
2355 { 0x22, 0x7AD, 0x80 },
2356 { 0x22, 0x7A6, 0xCB },
2357 { 0x22, 0x7A7, 0xB8 },
2358 { 0x22, 0x7A8, 0x94 },
2359 { 0x22, 0x7A9, 0xCB },
2360 { 0x22, 0x7AA, 0xB8 },
2361 { 0x22, 0x7AB, 0x94 },
2362 { 0x22, 0x7AC, 0x13 },
2363 { 0x22, 0x7AD, 0x80 },
2364 { 0x22, 0x7A6, 0x40 },
2365 { 0x22, 0x7A7, 0x00 },
2366 { 0x22, 0x7A8, 0x00 },
2367 { 0x22, 0x7A9, 0x40 },
2368 { 0x22, 0x7AA, 0x00 },
2369 { 0x22, 0x7AB, 0x00 },
2370 { 0x22, 0x7AC, 0x14 },
2371 { 0x22, 0x7AD, 0x80 },
2372 { 0x22, 0x7A6, 0x95 },
2373 { 0x22, 0x7A7, 0x76 },
2374 { 0x22, 0x7A8, 0x5B },
2375 { 0x22, 0x7A9, 0x95 },
2376 { 0x22, 0x7AA, 0x76 },
2377 { 0x22, 0x7AB, 0x5B },
2378 { 0x22, 0x7AC, 0x15 },
2379 { 0x22, 0x7AD, 0x80 },
2380 { 0x22, 0x7A6, 0x31 },
2381 { 0x22, 0x7A7, 0xAC },
2382 { 0x22, 0x7A8, 0x31 },
2383 { 0x22, 0x7A9, 0x31 },
2384 { 0x22, 0x7AA, 0xAC },
2385 { 0x22, 0x7AB, 0x31 },
2386 { 0x22, 0x7AC, 0x16 },
2387 { 0x22, 0x7AD, 0x80 },
2388 { 0x22, 0x7A6, 0x6A },
2389 { 0x22, 0x7A7, 0x89 },
2390 { 0x22, 0x7A8, 0xA5 },
2391 { 0x22, 0x7A9, 0x6A },
2392 { 0x22, 0x7AA, 0x89 },
2393 { 0x22, 0x7AB, 0xA5 },
2394 { 0x22, 0x7AC, 0x17 },
2395 { 0x22, 0x7AD, 0x80 },
2396 { 0x22, 0x7A6, 0xCE },
2397 { 0x22, 0x7A7, 0x53 },
2398 { 0x22, 0x7A8, 0xCF },
2399 { 0x22, 0x7A9, 0xCE },
2400 { 0x22, 0x7AA, 0x53 },
2401 { 0x22, 0x7AB, 0xCF },
2402 { 0x22, 0x7AC, 0x18 },
2403 { 0x22, 0x7AD, 0x80 },
2404 { 0x22, 0x7A6, 0x40 },
2405 { 0x22, 0x7A7, 0x00 },
2406 { 0x22, 0x7A8, 0x00 },
2407 { 0x22, 0x7A9, 0x40 },
2408 { 0x22, 0x7AA, 0x00 },
2409 { 0x22, 0x7AB, 0x00 },
2410 { 0x22, 0x7AC, 0x19 },
2411 { 0x22, 0x7AD, 0x80 },
2412 /* 48KHz base */
2413 { 0x22, 0x7A6, 0x3E },
2414 { 0x22, 0x7A7, 0x88 },
2415 { 0x22, 0x7A8, 0xDC },
2416 { 0x22, 0x7A9, 0x3E },
2417 { 0x22, 0x7AA, 0x88 },
2418 { 0x22, 0x7AB, 0xDC },
2419 { 0x22, 0x7AC, 0x1A },
2420 { 0x22, 0x7AD, 0x80 },
2421 { 0x22, 0x7A6, 0x82 },
2422 { 0x22, 0x7A7, 0xEE },
2423 { 0x22, 0x7A8, 0x46 },
2424 { 0x22, 0x7A9, 0x82 },
2425 { 0x22, 0x7AA, 0xEE },
2426 { 0x22, 0x7AB, 0x46 },
2427 { 0x22, 0x7AC, 0x1B },
2428 { 0x22, 0x7AD, 0x80 },
2429 { 0x22, 0x7A6, 0x3E },
2430 { 0x22, 0x7A7, 0x88 },
2431 { 0x22, 0x7A8, 0xDC },
2432 { 0x22, 0x7A9, 0x3E },
2433 { 0x22, 0x7AA, 0x88 },
2434 { 0x22, 0x7AB, 0xDC },
2435 { 0x22, 0x7AC, 0x1C },
2436 { 0x22, 0x7AD, 0x80 },
2437 { 0x22, 0x7A6, 0x7D },
2438 { 0x22, 0x7A7, 0x09 },
2439 { 0x22, 0x7A8, 0x28 },
2440 { 0x22, 0x7A9, 0x7D },
2441 { 0x22, 0x7AA, 0x09 },
2442 { 0x22, 0x7AB, 0x28 },
2443 { 0x22, 0x7AC, 0x1D },
2444 { 0x22, 0x7AD, 0x80 },
2445 { 0x22, 0x7A6, 0xC2 },
2446 { 0x22, 0x7A7, 0xE5 },
2447 { 0x22, 0x7A8, 0xB4 },
2448 { 0x22, 0x7A9, 0xC2 },
2449 { 0x22, 0x7AA, 0xE5 },
2450 { 0x22, 0x7AB, 0xB4 },
2451 { 0x22, 0x7AC, 0x1E },
2452 { 0x22, 0x7AD, 0x80 },
2453 { 0x22, 0x7A6, 0x3E },
2454 { 0x22, 0x7A7, 0xA3 },
2455 { 0x22, 0x7A8, 0x1F },
2456 { 0x22, 0x7A9, 0x3E },
2457 { 0x22, 0x7AA, 0xA3 },
2458 { 0x22, 0x7AB, 0x1F },
2459 { 0x22, 0x7AC, 0x1F },
2460 { 0x22, 0x7AD, 0x80 },
2461 { 0x22, 0x7A6, 0x84 },
2462 { 0x22, 0x7A7, 0xCA },
2463 { 0x22, 0x7A8, 0xF1 },
2464 { 0x22, 0x7A9, 0x84 },
2465 { 0x22, 0x7AA, 0xCA },
2466 { 0x22, 0x7AB, 0xF1 },
2467 { 0x22, 0x7AC, 0x20 },
2468 { 0x22, 0x7AD, 0x80 },
2469 { 0x22, 0x7A6, 0x3C },
2470 { 0x22, 0x7A7, 0xD5 },
2471 { 0x22, 0x7A8, 0x9C },
2472 { 0x22, 0x7A9, 0x3C },
2473 { 0x22, 0x7AA, 0xD5 },
2474 { 0x22, 0x7AB, 0x9C },
2475 { 0x22, 0x7AC, 0x21 },
2476 { 0x22, 0x7AD, 0x80 },
2477 { 0x22, 0x7A6, 0x7B },
2478 { 0x22, 0x7A7, 0x35 },
2479 { 0x22, 0x7A8, 0x0F },
2480 { 0x22, 0x7A9, 0x7B },
2481 { 0x22, 0x7AA, 0x35 },
2482 { 0x22, 0x7AB, 0x0F },
2483 { 0x22, 0x7AC, 0x22 },
2484 { 0x22, 0x7AD, 0x80 },
2485 { 0x22, 0x7A6, 0xC4 },
2486 { 0x22, 0x7A7, 0x87 },
2487 { 0x22, 0x7A8, 0x45 },
2488 { 0x22, 0x7A9, 0xC4 },
2489 { 0x22, 0x7AA, 0x87 },
2490 { 0x22, 0x7AB, 0x45 },
2491 { 0x22, 0x7AC, 0x23 },
2492 { 0x22, 0x7AD, 0x80 },
2493 { 0x22, 0x7A6, 0x3E },
2494 { 0x22, 0x7A7, 0x0A },
2495 { 0x22, 0x7A8, 0x78 },
2496 { 0x22, 0x7A9, 0x3E },
2497 { 0x22, 0x7AA, 0x0A },
2498 { 0x22, 0x7AB, 0x78 },
2499 { 0x22, 0x7AC, 0x24 },
2500 { 0x22, 0x7AD, 0x80 },
2501 { 0x22, 0x7A6, 0x88 },
2502 { 0x22, 0x7A7, 0xE2 },
2503 { 0x22, 0x7A8, 0x05 },
2504 { 0x22, 0x7A9, 0x88 },
2505 { 0x22, 0x7AA, 0xE2 },
2506 { 0x22, 0x7AB, 0x05 },
2507 { 0x22, 0x7AC, 0x25 },
2508 { 0x22, 0x7AD, 0x80 },
2509 { 0x22, 0x7A6, 0x3A },
2510 { 0x22, 0x7A7, 0x1A },
2511 { 0x22, 0x7A8, 0xA3 },
2512 { 0x22, 0x7A9, 0x3A },
2513 { 0x22, 0x7AA, 0x1A },
2514 { 0x22, 0x7AB, 0xA3 },
2515 { 0x22, 0x7AC, 0x26 },
2516 { 0x22, 0x7AD, 0x80 },
2517 { 0x22, 0x7A6, 0x77 },
2518 { 0x22, 0x7A7, 0x1D },
2519 { 0x22, 0x7A8, 0xFB },
2520 { 0x22, 0x7A9, 0x77 },
2521 { 0x22, 0x7AA, 0x1D },
2522 { 0x22, 0x7AB, 0xFB },
2523 { 0x22, 0x7AC, 0x27 },
2524 { 0x22, 0x7AD, 0x80 },
2525 { 0x22, 0x7A6, 0xC7 },
2526 { 0x22, 0x7A7, 0xDA },
2527 { 0x22, 0x7A8, 0xE5 },
2528 { 0x22, 0x7A9, 0xC7 },
2529 { 0x22, 0x7AA, 0xDA },
2530 { 0x22, 0x7AB, 0xE5 },
2531 { 0x22, 0x7AC, 0x28 },
2532 { 0x22, 0x7AD, 0x80 },
2533 { 0x22, 0x7A6, 0x40 },
2534 { 0x22, 0x7A7, 0x00 },
2535 { 0x22, 0x7A8, 0x00 },
2536 { 0x22, 0x7A9, 0x40 },
2537 { 0x22, 0x7AA, 0x00 },
2538 { 0x22, 0x7AB, 0x00 },
2539 { 0x22, 0x7AC, 0x29 },
2540 { 0x22, 0x7AD, 0x80 },
2541 { 0x22, 0x7A6, 0x8E },
2542 { 0x22, 0x7A7, 0xD7 },
2543 { 0x22, 0x7A8, 0x22 },
2544 { 0x22, 0x7A9, 0x8E },
2545 { 0x22, 0x7AA, 0xD7 },
2546 { 0x22, 0x7AB, 0x22 },
2547 { 0x22, 0x7AC, 0x2A },
2548 { 0x22, 0x7AD, 0x80 },
2549 { 0x22, 0x7A6, 0x35 },
2550 { 0x22, 0x7A7, 0x26 },
2551 { 0x22, 0x7A8, 0xC6 },
2552 { 0x22, 0x7A9, 0x35 },
2553 { 0x22, 0x7AA, 0x26 },
2554 { 0x22, 0x7AB, 0xC6 },
2555 { 0x22, 0x7AC, 0x2B },
2556 { 0x22, 0x7AD, 0x80 },
2557 { 0x22, 0x7A6, 0x71 },
2558 { 0x22, 0x7A7, 0x28 },
2559 { 0x22, 0x7A8, 0xDE },
2560 { 0x22, 0x7A9, 0x71 },
2561 { 0x22, 0x7AA, 0x28 },
2562 { 0x22, 0x7AB, 0xDE },
2563 { 0x22, 0x7AC, 0x2C },
2564 { 0x22, 0x7AD, 0x80 },
2565 { 0x22, 0x7A6, 0xCA },
2566 { 0x22, 0x7A7, 0xD9 },
2567 { 0x22, 0x7A8, 0x3A },
2568 { 0x22, 0x7A9, 0xCA },
2569 { 0x22, 0x7AA, 0xD9 },
2570 { 0x22, 0x7AB, 0x3A },
2571 { 0x22, 0x7AC, 0x2D },
2572 { 0x22, 0x7AD, 0x80 },
2573 { 0x22, 0x7A6, 0x40 },
2574 { 0x22, 0x7A7, 0x00 },
2575 { 0x22, 0x7A8, 0x00 },
2576 { 0x22, 0x7A9, 0x40 },
2577 { 0x22, 0x7AA, 0x00 },
2578 { 0x22, 0x7AB, 0x00 },
2579 { 0x22, 0x7AC, 0x2E },
2580 { 0x22, 0x7AD, 0x80 },
2581 { 0x22, 0x7A6, 0x93 },
2582 { 0x22, 0x7A7, 0x5E },
2583 { 0x22, 0x7A8, 0xD8 },
2584 { 0x22, 0x7A9, 0x93 },
2585 { 0x22, 0x7AA, 0x5E },
2586 { 0x22, 0x7AB, 0xD8 },
2587 { 0x22, 0x7AC, 0x2F },
2588 { 0x22, 0x7AD, 0x80 },
2589 { 0x22, 0x7A6, 0x32 },
2590 { 0x22, 0x7A7, 0xB7 },
2591 { 0x22, 0x7A8, 0xB1 },
2592 { 0x22, 0x7A9, 0x32 },
2593 { 0x22, 0x7AA, 0xB7 },
2594 { 0x22, 0x7AB, 0xB1 },
2595 { 0x22, 0x7AC, 0x30 },
2596 { 0x22, 0x7AD, 0x80 },
2597 { 0x22, 0x7A6, 0x6C },
2598 { 0x22, 0x7A7, 0xA1 },
2599 { 0x22, 0x7A8, 0x28 },
2600 { 0x22, 0x7A9, 0x6C },
2601 { 0x22, 0x7AA, 0xA1 },
2602 { 0x22, 0x7AB, 0x28 },
2603 { 0x22, 0x7AC, 0x31 },
2604 { 0x22, 0x7AD, 0x80 },
2605 { 0x22, 0x7A6, 0xCD },
2606 { 0x22, 0x7A7, 0x48 },
2607 { 0x22, 0x7A8, 0x4F },
2608 { 0x22, 0x7A9, 0xCD },
2609 { 0x22, 0x7AA, 0x48 },
2610 { 0x22, 0x7AB, 0x4F },
2611 { 0x22, 0x7AC, 0x32 },
2612 { 0x22, 0x7AD, 0x80 },
2613 { 0x22, 0x7A6, 0x40 },
2614 { 0x22, 0x7A7, 0x00 },
2615 { 0x22, 0x7A8, 0x00 },
2616 { 0x22, 0x7A9, 0x40 },
2617 { 0x22, 0x7AA, 0x00 },
2618 { 0x22, 0x7AB, 0x00 },
2619 { 0x22, 0x7AC, 0x33 },
2620 { 0x22, 0x7AD, 0x80 },
2621 /* common */
2622 { 0x22, 0x782, 0xC1 },
2623 { 0x22, 0x771, 0x2C },
2624 { 0x22, 0x772, 0x2C },
2625 { 0x22, 0x788, 0x04 },
2626 { 0x01, 0x7B0, 0x08 },
2627 {}
2628};
2629
2630static const struct hda_fixup stac92hd83xxx_fixups[] = {
2631 [STAC_92HD83XXX_REF] = {
2632 .type = HDA_FIXUP_PINS,
2633 .v.pins = ref92hd83xxx_pin_configs,
2634 },
2635 [STAC_92HD83XXX_PWR_REF] = {
2636 .type = HDA_FIXUP_PINS,
2637 .v.pins = ref92hd83xxx_pin_configs,
2638 },
2639 [STAC_DELL_S14] = {
2640 .type = HDA_FIXUP_PINS,
2641 .v.pins = dell_s14_pin_configs,
2642 },
2643 [STAC_DELL_VOSTRO_3500] = {
2644 .type = HDA_FIXUP_PINS,
2645 .v.pins = dell_vostro_3500_pin_configs,
2646 },
2647 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2648 .type = HDA_FIXUP_PINS,
2649 .v.pins = hp_cNB11_intquad_pin_configs,
2650 .chained = true,
2651 .chain_id = STAC_92HD83XXX_HP,
2652 },
2653 [STAC_92HD83XXX_HP] = {
2654 .type = HDA_FIXUP_FUNC,
2655 .v.func = stac92hd83xxx_fixup_hp,
2656 },
2657 [STAC_HP_DV7_4000] = {
2658 .type = HDA_FIXUP_PINS,
2659 .v.pins = hp_dv7_4000_pin_configs,
2660 .chained = true,
2661 .chain_id = STAC_92HD83XXX_HP,
2662 },
2663 [STAC_HP_ZEPHYR] = {
2664 .type = HDA_FIXUP_FUNC,
2665 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2666 .chained = true,
2667 .chain_id = STAC_92HD83XXX_HP,
2668 },
2669 [STAC_92HD83XXX_HP_LED] = {
2670 .type = HDA_FIXUP_FUNC,
2671 .v.func = stac92hd83xxx_fixup_hp_led,
2672 .chained = true,
2673 .chain_id = STAC_92HD83XXX_HP,
2674 },
2675 [STAC_92HD83XXX_HP_INV_LED] = {
2676 .type = HDA_FIXUP_FUNC,
2677 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2678 .chained = true,
2679 .chain_id = STAC_92HD83XXX_HP,
2680 },
2681 [STAC_92HD83XXX_HP_MIC_LED] = {
2682 .type = HDA_FIXUP_FUNC,
2683 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2684 .chained = true,
2685 .chain_id = STAC_92HD83XXX_HP,
2686 },
2687 [STAC_HP_LED_GPIO10] = {
2688 .type = HDA_FIXUP_FUNC,
2689 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2690 .chained = true,
2691 .chain_id = STAC_92HD83XXX_HP,
2692 },
2693 [STAC_92HD83XXX_HEADSET_JACK] = {
2694 .type = HDA_FIXUP_FUNC,
2695 .v.func = stac92hd83xxx_fixup_headset_jack,
2696 },
2697 [STAC_HP_ENVY_BASS] = {
2698 .type = HDA_FIXUP_PINS,
2699 .v.pins = (const struct hda_pintbl[]) {
2700 { 0x0f, 0x90170111 },
2701 {}
2702 },
2703 },
2704 [STAC_HP_BNB13_EQ] = {
2705 .type = HDA_FIXUP_VERBS,
2706 .v.verbs = hp_bnb13_eq_verbs,
2707 .chained = true,
2708 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2709 },
2710 [STAC_HP_ENVY_TS_BASS] = {
2711 .type = HDA_FIXUP_PINS,
2712 .v.pins = (const struct hda_pintbl[]) {
2713 { 0x10, 0x92170111 },
2714 {}
2715 },
2716 },
2717 [STAC_HP_ENVY_TS_DAC_BIND] = {
2718 .type = HDA_FIXUP_FUNC,
2719 .v.func = hp_envy_ts_fixup_dac_bind,
2720 .chained = true,
2721 .chain_id = STAC_HP_ENVY_TS_BASS,
2722 },
2723 [STAC_92HD83XXX_GPIO10_EAPD] = {
2724 .type = HDA_FIXUP_FUNC,
2725 .v.func = stac92hd83xxx_fixup_gpio10_eapd,
2726 },
2727};
2728
2729static const struct hda_model_fixup stac92hd83xxx_models[] = {
2730 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2731 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2732 { .id = STAC_DELL_S14, .name = "dell-s14" },
2733 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2734 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2735 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2736 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2737 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2738 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2739 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2740 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2741 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2742 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2743 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
2744 {}
2745};
2746
2747static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2748 /* SigmaTel reference board */
2749 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2750 "DFI LanParty", STAC_92HD83XXX_REF),
2751 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2752 "DFI LanParty", STAC_92HD83XXX_REF),
2753 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2754 "unknown Dell", STAC_DELL_S14),
2755 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2756 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2757 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2758 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2759 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2760 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2761 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2762 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2763 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2764 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2765 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2766 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2767 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2768 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2770 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2772 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2774 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2775 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2776 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2777 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2778 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2779 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2780 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2781 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2782 "HP Pavilion dv7", STAC_HP_DV7_4000),
2783 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2784 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2785 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2786 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2787 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2788 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2790 "HP Folio 13", STAC_HP_LED_GPIO10),
2791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2792 "HP Folio", STAC_HP_BNB13_EQ),
2793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2794 "HP bNB13", STAC_HP_BNB13_EQ),
2795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2796 "HP bNB13", STAC_HP_BNB13_EQ),
2797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2798 "HP bNB13", STAC_HP_BNB13_EQ),
2799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2800 "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
2801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2802 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
2803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2804 "HP bNB13", STAC_HP_BNB13_EQ),
2805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2806 "HP bNB13", STAC_HP_BNB13_EQ),
2807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2808 "HP bNB13", STAC_HP_BNB13_EQ),
2809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2810 "HP bNB13", STAC_HP_BNB13_EQ),
2811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2812 "HP bNB13", STAC_HP_BNB13_EQ),
2813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2814 "HP bNB13", STAC_HP_BNB13_EQ),
2815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2816 "HP bNB13", STAC_HP_BNB13_EQ),
2817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2818 "HP bNB13", STAC_HP_BNB13_EQ),
2819 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2820 "HP bNB13", STAC_HP_BNB13_EQ),
2821 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2822 "HP bNB13", STAC_HP_BNB13_EQ),
2823 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2824 "HP bNB13", STAC_HP_BNB13_EQ),
2825 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2826 "HP bNB13", STAC_HP_BNB13_EQ),
2827 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2828 "HP bNB13", STAC_HP_BNB13_EQ),
2829 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2830 "HP bNB13", STAC_HP_BNB13_EQ),
2831 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2832 "HP bNB13", STAC_HP_BNB13_EQ),
2833 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2834 "HP bNB13", STAC_HP_BNB13_EQ),
2835 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2836 "HP bNB13", STAC_HP_BNB13_EQ),
2837 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2838 "HP bNB13", STAC_HP_BNB13_EQ),
2839 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2840 "HP bNB13", STAC_HP_BNB13_EQ),
2841 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2842 "HP bNB13", STAC_HP_BNB13_EQ),
2843 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2844 "HP bNB13", STAC_HP_BNB13_EQ),
2845 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2846 "HP bNB13", STAC_HP_BNB13_EQ),
2847 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2848 "HP bNB13", STAC_HP_BNB13_EQ),
2849 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2850 "HP bNB13", STAC_HP_BNB13_EQ),
2851 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2852 "HP bNB13", STAC_HP_BNB13_EQ),
2853 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2854 "HP bNB13", STAC_HP_BNB13_EQ),
2855 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2856 "HP bNB13", STAC_HP_BNB13_EQ),
2857 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2858 "HP bNB13", STAC_HP_BNB13_EQ),
2859 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2860 "HP bNB13", STAC_HP_BNB13_EQ),
2861 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2862 "HP bNB13", STAC_HP_BNB13_EQ),
2863 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2864 "HP bNB13", STAC_HP_BNB13_EQ),
2865 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2866 "HP bNB13", STAC_HP_BNB13_EQ),
2867 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2868 "HP bNB13", STAC_HP_BNB13_EQ),
2869 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2870 "HP bNB13", STAC_HP_BNB13_EQ),
2871 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2872 "HP bNB13", STAC_HP_BNB13_EQ),
2873 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2874 "HP bNB13", STAC_HP_BNB13_EQ),
2875 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2876 "HP bNB13", STAC_HP_BNB13_EQ),
2877 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2878 "HP bNB13", STAC_HP_BNB13_EQ),
2879 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2880 "HP bNB13", STAC_HP_BNB13_EQ),
2881 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2882 "HP bNB13", STAC_HP_BNB13_EQ),
2883 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2884 "HP bNB13", STAC_HP_BNB13_EQ),
2885 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2886 "HP bNB13", STAC_HP_BNB13_EQ),
2887 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2888 "HP bNB13", STAC_HP_BNB13_EQ),
2889 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2890 "HP bNB13", STAC_HP_BNB13_EQ),
2891 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2892 "HP", STAC_92HD83XXX_HP_MIC_LED),
2893 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2894 "HP", STAC_92HD83XXX_HP_MIC_LED),
2895 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2896 "HP", STAC_92HD83XXX_HP_MIC_LED),
2897 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2898 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2899 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2900 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2901 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2902 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2903 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2904 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2905 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2906 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2907 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2908 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2909 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2910 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2911 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2912 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2913 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2914 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2915 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2916 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2917 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2918 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2919 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2920 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2921 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2922 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2923 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2924 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2925 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2926 "HP", STAC_HP_ZEPHYR),
2927 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2928 "HP Mini", STAC_92HD83XXX_HP_LED),
2929 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2930 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2931 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2932 "HP Mini", STAC_92HD83XXX_HP_LED),
2933 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2934 /* match both for 0xfa91 and 0xfa93 */
2935 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
2936 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
2937 {} /* terminator */
2938};
2939
2940/* HP dv7 bass switch - GPIO5 */
2941#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2942static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2943 struct snd_ctl_elem_value *ucontrol)
2944{
2945 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2946 struct sigmatel_spec *spec = codec->spec;
2947 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2948 return 0;
2949}
2950
2951static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2952 struct snd_ctl_elem_value *ucontrol)
2953{
2954 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2955 struct sigmatel_spec *spec = codec->spec;
2956 unsigned int gpio_data;
2957
2958 gpio_data = (spec->gpio_data & ~0x20) |
2959 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2960 if (gpio_data == spec->gpio_data)
2961 return 0;
2962 spec->gpio_data = gpio_data;
2963 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2964 return 1;
2965}
2966
2967static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2968 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2969 .info = stac_hp_bass_gpio_info,
2970 .get = stac_hp_bass_gpio_get,
2971 .put = stac_hp_bass_gpio_put,
2972};
2973
2974static int stac_add_hp_bass_switch(struct hda_codec *codec)
2975{
2976 struct sigmatel_spec *spec = codec->spec;
2977
2978 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2979 &stac_hp_bass_sw_ctrl))
2980 return -ENOMEM;
2981
2982 spec->gpio_mask |= 0x20;
2983 spec->gpio_dir |= 0x20;
2984 spec->gpio_data |= 0x20;
2985 return 0;
2986}
2987
2988static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2989 { 0x0a, 0x02214030 },
2990 { 0x0b, 0x02a19040 },
2991 { 0x0c, 0x01a19020 },
2992 { 0x0d, 0x01014010 },
2993 { 0x0e, 0x0181302e },
2994 { 0x0f, 0x01014010 },
2995 { 0x14, 0x01019020 },
2996 { 0x18, 0x90a000f0 },
2997 { 0x19, 0x90a000f0 },
2998 { 0x1e, 0x01452050 },
2999 { 0x1f, 0x01452050 },
3000 {}
3001};
3002
3003static const struct hda_pintbl dell_m4_1_pin_configs[] = {
3004 { 0x0a, 0x0421101f },
3005 { 0x0b, 0x04a11221 },
3006 { 0x0c, 0x40f000f0 },
3007 { 0x0d, 0x90170110 },
3008 { 0x0e, 0x23a1902e },
3009 { 0x0f, 0x23014250 },
3010 { 0x14, 0x40f000f0 },
3011 { 0x18, 0x90a000f0 },
3012 { 0x19, 0x40f000f0 },
3013 { 0x1e, 0x4f0000f0 },
3014 { 0x1f, 0x4f0000f0 },
3015 {}
3016};
3017
3018static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3019 { 0x0a, 0x0421101f },
3020 { 0x0b, 0x04a11221 },
3021 { 0x0c, 0x90a70330 },
3022 { 0x0d, 0x90170110 },
3023 { 0x0e, 0x23a1902e },
3024 { 0x0f, 0x23014250 },
3025 { 0x14, 0x40f000f0 },
3026 { 0x18, 0x40f000f0 },
3027 { 0x19, 0x40f000f0 },
3028 { 0x1e, 0x044413b0 },
3029 { 0x1f, 0x044413b0 },
3030 {}
3031};
3032
3033static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3034 { 0x0a, 0x0421101f },
3035 { 0x0b, 0x04a11221 },
3036 { 0x0c, 0x90a70330 },
3037 { 0x0d, 0x90170110 },
3038 { 0x0e, 0x40f000f0 },
3039 { 0x0f, 0x40f000f0 },
3040 { 0x14, 0x40f000f0 },
3041 { 0x18, 0x90a000f0 },
3042 { 0x19, 0x40f000f0 },
3043 { 0x1e, 0x044413b0 },
3044 { 0x1f, 0x044413b0 },
3045 {}
3046};
3047
3048static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3049 const struct hda_fixup *fix, int action)
3050{
3051 struct sigmatel_spec *spec = codec->spec;
3052
3053 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3054 return;
3055
3056 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3057 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3058}
3059
3060static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3061 const struct hda_fixup *fix, int action)
3062{
3063 struct sigmatel_spec *spec = codec->spec;
3064 struct hda_jack_callback *jack;
3065
3066 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3067 return;
3068
3069 /* Enable VREF power saving on GPIO1 detect */
3070 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
3071 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3072 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
3073 stac_vref_event);
3074 if (!IS_ERR(jack))
3075 jack->private_data = 0x02;
3076
3077 spec->gpio_mask |= 0x02;
3078
3079 /* enable internal microphone */
3080 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3081}
3082
3083static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3084 const struct hda_fixup *fix, int action)
3085{
3086 struct sigmatel_spec *spec = codec->spec;
3087
3088 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3089 return;
3090 spec->gpio_led = 0x01;
3091}
3092
3093static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3094 const struct hda_fixup *fix, int action)
3095{
3096 unsigned int cap;
3097
3098 switch (action) {
3099 case HDA_FIXUP_ACT_PRE_PROBE:
3100 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3101 break;
3102
3103 case HDA_FIXUP_ACT_PROBE:
3104 /* enable bass on HP dv7 */
3105 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3106 cap &= AC_GPIO_IO_COUNT;
3107 if (cap >= 6)
3108 stac_add_hp_bass_switch(codec);
3109 break;
3110 }
3111}
3112
3113static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3114 const struct hda_fixup *fix, int action)
3115{
3116 struct sigmatel_spec *spec = codec->spec;
3117
3118 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3119 return;
3120 spec->gpio_led = 0x08;
3121}
3122
3123static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3124{
3125 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3126
3127 /* count line-out, too, as BIOS sets often so */
3128 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3129 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3130 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3131}
3132
3133static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3134{
3135 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3136
3137 /* It was changed in the BIOS to just satisfy MS DTM.
3138 * Lets turn it back into follower HP
3139 */
3140 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3141 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3142 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3143 0x1f;
3144 snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3145}
3146
3147static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3148 const struct hda_fixup *fix, int action)
3149{
3150 struct sigmatel_spec *spec = codec->spec;
3151
3152 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3153 return;
3154
3155 /* when both output A and F are assigned, these are supposedly
3156 * dock and built-in headphones; fix both pin configs
3157 */
3158 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3159 fixup_hp_headphone(codec, 0x0a);
3160 fixup_hp_headphone(codec, 0x0f);
3161 }
3162
3163 if (find_mute_led_cfg(codec, 1))
3164 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
3165 spec->gpio_led,
3166 spec->gpio_led_polarity);
3167
3168}
3169
3170static const struct hda_fixup stac92hd71bxx_fixups[] = {
3171 [STAC_92HD71BXX_REF] = {
3172 .type = HDA_FIXUP_FUNC,
3173 .v.func = stac92hd71bxx_fixup_ref,
3174 },
3175 [STAC_DELL_M4_1] = {
3176 .type = HDA_FIXUP_PINS,
3177 .v.pins = dell_m4_1_pin_configs,
3178 },
3179 [STAC_DELL_M4_2] = {
3180 .type = HDA_FIXUP_PINS,
3181 .v.pins = dell_m4_2_pin_configs,
3182 },
3183 [STAC_DELL_M4_3] = {
3184 .type = HDA_FIXUP_PINS,
3185 .v.pins = dell_m4_3_pin_configs,
3186 },
3187 [STAC_HP_M4] = {
3188 .type = HDA_FIXUP_FUNC,
3189 .v.func = stac92hd71bxx_fixup_hp_m4,
3190 .chained = true,
3191 .chain_id = STAC_92HD71BXX_HP,
3192 },
3193 [STAC_HP_DV4] = {
3194 .type = HDA_FIXUP_FUNC,
3195 .v.func = stac92hd71bxx_fixup_hp_dv4,
3196 .chained = true,
3197 .chain_id = STAC_HP_DV5,
3198 },
3199 [STAC_HP_DV5] = {
3200 .type = HDA_FIXUP_FUNC,
3201 .v.func = stac92hd71bxx_fixup_hp_dv5,
3202 .chained = true,
3203 .chain_id = STAC_92HD71BXX_HP,
3204 },
3205 [STAC_HP_HDX] = {
3206 .type = HDA_FIXUP_FUNC,
3207 .v.func = stac92hd71bxx_fixup_hp_hdx,
3208 .chained = true,
3209 .chain_id = STAC_92HD71BXX_HP,
3210 },
3211 [STAC_92HD71BXX_HP] = {
3212 .type = HDA_FIXUP_FUNC,
3213 .v.func = stac92hd71bxx_fixup_hp,
3214 },
3215};
3216
3217static const struct hda_model_fixup stac92hd71bxx_models[] = {
3218 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3219 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3220 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3221 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3222 { .id = STAC_HP_M4, .name = "hp-m4" },
3223 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3224 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3225 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3226 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3227 {}
3228};
3229
3230static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3231 /* SigmaTel reference board */
3232 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3233 "DFI LanParty", STAC_92HD71BXX_REF),
3234 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3235 "DFI LanParty", STAC_92HD71BXX_REF),
3236 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3237 "HP", STAC_HP_DV5),
3238 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3239 "HP", STAC_HP_DV5),
3240 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3241 "HP dv4-7", STAC_HP_DV4),
3242 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3243 "HP dv4-7", STAC_HP_DV5),
3244 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3245 "HP HDX", STAC_HP_HDX), /* HDX18 */
3246 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3247 "HP mini 1000", STAC_HP_M4),
3248 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3249 "HP HDX", STAC_HP_HDX), /* HDX16 */
3250 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3251 "HP dv6", STAC_HP_DV5),
3252 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3253 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3254 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3255 "HP DV6", STAC_HP_DV5),
3256 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3257 "HP", STAC_HP_DV5),
3258 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3259 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3260 "unknown Dell", STAC_DELL_M4_1),
3261 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3262 "unknown Dell", STAC_DELL_M4_1),
3263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3264 "unknown Dell", STAC_DELL_M4_1),
3265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3266 "unknown Dell", STAC_DELL_M4_1),
3267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3268 "unknown Dell", STAC_DELL_M4_1),
3269 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3270 "unknown Dell", STAC_DELL_M4_1),
3271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3272 "unknown Dell", STAC_DELL_M4_1),
3273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3274 "unknown Dell", STAC_DELL_M4_2),
3275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3276 "unknown Dell", STAC_DELL_M4_2),
3277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3278 "unknown Dell", STAC_DELL_M4_2),
3279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3280 "unknown Dell", STAC_DELL_M4_2),
3281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3282 "unknown Dell", STAC_DELL_M4_3),
3283 {} /* terminator */
3284};
3285
3286static const struct hda_pintbl ref922x_pin_configs[] = {
3287 { 0x0a, 0x01014010 },
3288 { 0x0b, 0x01016011 },
3289 { 0x0c, 0x01012012 },
3290 { 0x0d, 0x0221401f },
3291 { 0x0e, 0x01813122 },
3292 { 0x0f, 0x01011014 },
3293 { 0x10, 0x01441030 },
3294 { 0x11, 0x01c41030 },
3295 { 0x15, 0x40000100 },
3296 { 0x1b, 0x40000100 },
3297 {}
3298};
3299
3300/*
3301 STAC 922X pin configs for
3302 102801A7
3303 102801AB
3304 102801A9
3305 102801D1
3306 102801D2
3307*/
3308static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3309 { 0x0a, 0x02214030 },
3310 { 0x0b, 0x01a19021 },
3311 { 0x0c, 0x01111012 },
3312 { 0x0d, 0x01114010 },
3313 { 0x0e, 0x02a19020 },
3314 { 0x0f, 0x01117011 },
3315 { 0x10, 0x400001f0 },
3316 { 0x11, 0x400001f1 },
3317 { 0x15, 0x01813122 },
3318 { 0x1b, 0x400001f2 },
3319 {}
3320};
3321
3322/*
3323 STAC 922X pin configs for
3324 102801AC
3325 102801D0
3326*/
3327static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3328 { 0x0a, 0x02214030 },
3329 { 0x0b, 0x01a19021 },
3330 { 0x0c, 0x01111012 },
3331 { 0x0d, 0x01114010 },
3332 { 0x0e, 0x02a19020 },
3333 { 0x0f, 0x01117011 },
3334 { 0x10, 0x01451140 },
3335 { 0x11, 0x400001f0 },
3336 { 0x15, 0x01813122 },
3337 { 0x1b, 0x400001f1 },
3338 {}
3339};
3340
3341/*
3342 STAC 922X pin configs for
3343 102801BF
3344*/
3345static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3346 { 0x0a, 0x0321101f },
3347 { 0x0b, 0x01112024 },
3348 { 0x0c, 0x01111222 },
3349 { 0x0d, 0x91174220 },
3350 { 0x0e, 0x03a11050 },
3351 { 0x0f, 0x01116221 },
3352 { 0x10, 0x90a70330 },
3353 { 0x11, 0x01452340 },
3354 { 0x15, 0x40C003f1 },
3355 { 0x1b, 0x405003f0 },
3356 {}
3357};
3358
3359/*
3360 STAC 9221 A1 pin configs for
3361 102801D7 (Dell XPS M1210)
3362*/
3363static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3364 { 0x0a, 0x02211211 },
3365 { 0x0b, 0x408103ff },
3366 { 0x0c, 0x02a1123e },
3367 { 0x0d, 0x90100310 },
3368 { 0x0e, 0x408003f1 },
3369 { 0x0f, 0x0221121f },
3370 { 0x10, 0x03451340 },
3371 { 0x11, 0x40c003f2 },
3372 { 0x15, 0x508003f3 },
3373 { 0x1b, 0x405003f4 },
3374 {}
3375};
3376
3377static const struct hda_pintbl d945gtp3_pin_configs[] = {
3378 { 0x0a, 0x0221401f },
3379 { 0x0b, 0x01a19022 },
3380 { 0x0c, 0x01813021 },
3381 { 0x0d, 0x01014010 },
3382 { 0x0e, 0x40000100 },
3383 { 0x0f, 0x40000100 },
3384 { 0x10, 0x40000100 },
3385 { 0x11, 0x40000100 },
3386 { 0x15, 0x02a19120 },
3387 { 0x1b, 0x40000100 },
3388 {}
3389};
3390
3391static const struct hda_pintbl d945gtp5_pin_configs[] = {
3392 { 0x0a, 0x0221401f },
3393 { 0x0b, 0x01011012 },
3394 { 0x0c, 0x01813024 },
3395 { 0x0d, 0x01014010 },
3396 { 0x0e, 0x01a19021 },
3397 { 0x0f, 0x01016011 },
3398 { 0x10, 0x01452130 },
3399 { 0x11, 0x40000100 },
3400 { 0x15, 0x02a19320 },
3401 { 0x1b, 0x40000100 },
3402 {}
3403};
3404
3405static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3406 { 0x0a, 0x0121e21f },
3407 { 0x0b, 0x400000ff },
3408 { 0x0c, 0x9017e110 },
3409 { 0x0d, 0x400000fd },
3410 { 0x0e, 0x400000fe },
3411 { 0x0f, 0x0181e020 },
3412 { 0x10, 0x1145e030 },
3413 { 0x11, 0x11c5e240 },
3414 { 0x15, 0x400000fc },
3415 { 0x1b, 0x400000fb },
3416 {}
3417};
3418
3419static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3420 { 0x0a, 0x0121e21f },
3421 { 0x0b, 0x90a7012e },
3422 { 0x0c, 0x9017e110 },
3423 { 0x0d, 0x400000fd },
3424 { 0x0e, 0x400000fe },
3425 { 0x0f, 0x0181e020 },
3426 { 0x10, 0x1145e230 },
3427 { 0x11, 0x500000fa },
3428 { 0x15, 0x400000fc },
3429 { 0x1b, 0x400000fb },
3430 {}
3431};
3432
3433static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3434 { 0x0a, 0x0121e21f },
3435 { 0x0b, 0x90a7012e },
3436 { 0x0c, 0x9017e110 },
3437 { 0x0d, 0x400000fd },
3438 { 0x0e, 0x400000fe },
3439 { 0x0f, 0x0181e020 },
3440 { 0x10, 0x1145e230 },
3441 { 0x11, 0x11c5e240 },
3442 { 0x15, 0x400000fc },
3443 { 0x1b, 0x400000fb },
3444 {}
3445};
3446
3447static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3448 { 0x0a, 0x0321e21f },
3449 { 0x0b, 0x03a1e02e },
3450 { 0x0c, 0x9017e110 },
3451 { 0x0d, 0x9017e11f },
3452 { 0x0e, 0x400000fe },
3453 { 0x0f, 0x0381e020 },
3454 { 0x10, 0x1345e230 },
3455 { 0x11, 0x13c5e240 },
3456 { 0x15, 0x400000fc },
3457 { 0x1b, 0x400000fb },
3458 {}
3459};
3460
3461static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3462 { 0x0a, 0x0321e21f },
3463 { 0x0b, 0x03a1e02e },
3464 { 0x0c, 0x9017e110 },
3465 { 0x0d, 0x9017e11f },
3466 { 0x0e, 0x400000fe },
3467 { 0x0f, 0x0381e020 },
3468 { 0x10, 0x1345e230 },
3469 { 0x11, 0x13c5e240 },
3470 { 0x15, 0x400000fc },
3471 { 0x1b, 0x400000fb },
3472 {}
3473};
3474
3475static const struct hda_pintbl ecs202_pin_configs[] = {
3476 { 0x0a, 0x0221401f },
3477 { 0x0b, 0x02a19020 },
3478 { 0x0c, 0x01a19020 },
3479 { 0x0d, 0x01114010 },
3480 { 0x0e, 0x408000f0 },
3481 { 0x0f, 0x01813022 },
3482 { 0x10, 0x074510a0 },
3483 { 0x11, 0x40c400f1 },
3484 { 0x15, 0x9037012e },
3485 { 0x1b, 0x40e000f2 },
3486 {}
3487};
3488
3489/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3490static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3491 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3492 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3493 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3494 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3495 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3496 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3497 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3498 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3499 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3500 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3501 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3502 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3503 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3504 {}
3505};
3506
3507static const struct hda_fixup stac922x_fixups[];
3508
3509/* remap the fixup from codec SSID and apply it */
3510static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3511 const struct hda_fixup *fix,
3512 int action)
3513{
3514 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3515 return;
3516
3517 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
3518 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3519 stac922x_fixups);
3520 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
3521 snd_hda_apply_fixup(codec, action);
3522}
3523
3524static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3525 const struct hda_fixup *fix,
3526 int action)
3527{
3528 struct sigmatel_spec *spec = codec->spec;
3529
3530 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3531 spec->gpio_mask = spec->gpio_dir = 0x03;
3532 spec->gpio_data = 0x03;
3533 }
3534}
3535
3536static const struct hda_fixup stac922x_fixups[] = {
3537 [STAC_D945_REF] = {
3538 .type = HDA_FIXUP_PINS,
3539 .v.pins = ref922x_pin_configs,
3540 },
3541 [STAC_D945GTP3] = {
3542 .type = HDA_FIXUP_PINS,
3543 .v.pins = d945gtp3_pin_configs,
3544 },
3545 [STAC_D945GTP5] = {
3546 .type = HDA_FIXUP_PINS,
3547 .v.pins = d945gtp5_pin_configs,
3548 },
3549 [STAC_INTEL_MAC_AUTO] = {
3550 .type = HDA_FIXUP_FUNC,
3551 .v.func = stac922x_fixup_intel_mac_auto,
3552 },
3553 [STAC_INTEL_MAC_V1] = {
3554 .type = HDA_FIXUP_PINS,
3555 .v.pins = intel_mac_v1_pin_configs,
3556 .chained = true,
3557 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3558 },
3559 [STAC_INTEL_MAC_V2] = {
3560 .type = HDA_FIXUP_PINS,
3561 .v.pins = intel_mac_v2_pin_configs,
3562 .chained = true,
3563 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3564 },
3565 [STAC_INTEL_MAC_V3] = {
3566 .type = HDA_FIXUP_PINS,
3567 .v.pins = intel_mac_v3_pin_configs,
3568 .chained = true,
3569 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3570 },
3571 [STAC_INTEL_MAC_V4] = {
3572 .type = HDA_FIXUP_PINS,
3573 .v.pins = intel_mac_v4_pin_configs,
3574 .chained = true,
3575 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3576 },
3577 [STAC_INTEL_MAC_V5] = {
3578 .type = HDA_FIXUP_PINS,
3579 .v.pins = intel_mac_v5_pin_configs,
3580 .chained = true,
3581 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3582 },
3583 [STAC_922X_INTEL_MAC_GPIO] = {
3584 .type = HDA_FIXUP_FUNC,
3585 .v.func = stac922x_fixup_intel_mac_gpio,
3586 },
3587 [STAC_ECS_202] = {
3588 .type = HDA_FIXUP_PINS,
3589 .v.pins = ecs202_pin_configs,
3590 },
3591 [STAC_922X_DELL_D81] = {
3592 .type = HDA_FIXUP_PINS,
3593 .v.pins = dell_922x_d81_pin_configs,
3594 },
3595 [STAC_922X_DELL_D82] = {
3596 .type = HDA_FIXUP_PINS,
3597 .v.pins = dell_922x_d82_pin_configs,
3598 },
3599 [STAC_922X_DELL_M81] = {
3600 .type = HDA_FIXUP_PINS,
3601 .v.pins = dell_922x_m81_pin_configs,
3602 },
3603 [STAC_922X_DELL_M82] = {
3604 .type = HDA_FIXUP_PINS,
3605 .v.pins = dell_922x_m82_pin_configs,
3606 },
3607};
3608
3609static const struct hda_model_fixup stac922x_models[] = {
3610 { .id = STAC_D945_REF, .name = "ref" },
3611 { .id = STAC_D945GTP5, .name = "5stack" },
3612 { .id = STAC_D945GTP3, .name = "3stack" },
3613 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3614 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3615 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3616 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3617 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3618 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3619 { .id = STAC_ECS_202, .name = "ecs202" },
3620 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3621 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3622 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3623 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3624 /* for backward compatibility */
3625 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3626 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3627 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3628 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3629 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3630 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3631 {}
3632};
3633
3634static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3635 /* SigmaTel reference board */
3636 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3637 "DFI LanParty", STAC_D945_REF),
3638 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3639 "DFI LanParty", STAC_D945_REF),
3640 /* Intel 945G based systems */
3641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3642 "Intel D945G", STAC_D945GTP3),
3643 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3644 "Intel D945G", STAC_D945GTP3),
3645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3646 "Intel D945G", STAC_D945GTP3),
3647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3648 "Intel D945G", STAC_D945GTP3),
3649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3650 "Intel D945G", STAC_D945GTP3),
3651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3652 "Intel D945G", STAC_D945GTP3),
3653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3654 "Intel D945G", STAC_D945GTP3),
3655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3656 "Intel D945G", STAC_D945GTP3),
3657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3658 "Intel D945G", STAC_D945GTP3),
3659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3660 "Intel D945G", STAC_D945GTP3),
3661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3662 "Intel D945G", STAC_D945GTP3),
3663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3664 "Intel D945G", STAC_D945GTP3),
3665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3666 "Intel D945G", STAC_D945GTP3),
3667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3668 "Intel D945G", STAC_D945GTP3),
3669 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3670 "Intel D945G", STAC_D945GTP3),
3671 /* Intel D945G 5-stack systems */
3672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3673 "Intel D945G", STAC_D945GTP5),
3674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3675 "Intel D945G", STAC_D945GTP5),
3676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3677 "Intel D945G", STAC_D945GTP5),
3678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3679 "Intel D945G", STAC_D945GTP5),
3680 /* Intel 945P based systems */
3681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3682 "Intel D945P", STAC_D945GTP3),
3683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3684 "Intel D945P", STAC_D945GTP3),
3685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3686 "Intel D945P", STAC_D945GTP3),
3687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3688 "Intel D945P", STAC_D945GTP3),
3689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3690 "Intel D945P", STAC_D945GTP3),
3691 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3692 "Intel D945P", STAC_D945GTP5),
3693 /* other intel */
3694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3695 "Intel D945", STAC_D945_REF),
3696 /* other systems */
3697
3698 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3699 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3700
3701 /* Dell systems */
3702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3703 "unknown Dell", STAC_922X_DELL_D81),
3704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3705 "unknown Dell", STAC_922X_DELL_D81),
3706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3707 "unknown Dell", STAC_922X_DELL_D81),
3708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3709 "unknown Dell", STAC_922X_DELL_D82),
3710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3711 "unknown Dell", STAC_922X_DELL_M81),
3712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3713 "unknown Dell", STAC_922X_DELL_D82),
3714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3715 "unknown Dell", STAC_922X_DELL_D81),
3716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3717 "unknown Dell", STAC_922X_DELL_D81),
3718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3719 "Dell XPS M1210", STAC_922X_DELL_M82),
3720 /* ECS/PC Chips boards */
3721 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3722 "ECS/PC chips", STAC_ECS_202),
3723 {} /* terminator */
3724};
3725
3726static const struct hda_pintbl ref927x_pin_configs[] = {
3727 { 0x0a, 0x02214020 },
3728 { 0x0b, 0x02a19080 },
3729 { 0x0c, 0x0181304e },
3730 { 0x0d, 0x01014010 },
3731 { 0x0e, 0x01a19040 },
3732 { 0x0f, 0x01011012 },
3733 { 0x10, 0x01016011 },
3734 { 0x11, 0x0101201f },
3735 { 0x12, 0x183301f0 },
3736 { 0x13, 0x18a001f0 },
3737 { 0x14, 0x18a001f0 },
3738 { 0x21, 0x01442070 },
3739 { 0x22, 0x01c42190 },
3740 { 0x23, 0x40000100 },
3741 {}
3742};
3743
3744static const struct hda_pintbl d965_3st_pin_configs[] = {
3745 { 0x0a, 0x0221401f },
3746 { 0x0b, 0x02a19120 },
3747 { 0x0c, 0x40000100 },
3748 { 0x0d, 0x01014011 },
3749 { 0x0e, 0x01a19021 },
3750 { 0x0f, 0x01813024 },
3751 { 0x10, 0x40000100 },
3752 { 0x11, 0x40000100 },
3753 { 0x12, 0x40000100 },
3754 { 0x13, 0x40000100 },
3755 { 0x14, 0x40000100 },
3756 { 0x21, 0x40000100 },
3757 { 0x22, 0x40000100 },
3758 { 0x23, 0x40000100 },
3759 {}
3760};
3761
3762static const struct hda_pintbl d965_5st_pin_configs[] = {
3763 { 0x0a, 0x02214020 },
3764 { 0x0b, 0x02a19080 },
3765 { 0x0c, 0x0181304e },
3766 { 0x0d, 0x01014010 },
3767 { 0x0e, 0x01a19040 },
3768 { 0x0f, 0x01011012 },
3769 { 0x10, 0x01016011 },
3770 { 0x11, 0x40000100 },
3771 { 0x12, 0x40000100 },
3772 { 0x13, 0x40000100 },
3773 { 0x14, 0x40000100 },
3774 { 0x21, 0x01442070 },
3775 { 0x22, 0x40000100 },
3776 { 0x23, 0x40000100 },
3777 {}
3778};
3779
3780static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3781 { 0x0a, 0x40000100 },
3782 { 0x0b, 0x40000100 },
3783 { 0x0c, 0x0181304e },
3784 { 0x0d, 0x01014010 },
3785 { 0x0e, 0x01a19040 },
3786 { 0x0f, 0x01011012 },
3787 { 0x10, 0x01016011 },
3788 { 0x11, 0x40000100 },
3789 { 0x12, 0x40000100 },
3790 { 0x13, 0x40000100 },
3791 { 0x14, 0x40000100 },
3792 { 0x21, 0x01442070 },
3793 { 0x22, 0x40000100 },
3794 { 0x23, 0x40000100 },
3795 {}
3796};
3797
3798static const struct hda_pintbl dell_3st_pin_configs[] = {
3799 { 0x0a, 0x02211230 },
3800 { 0x0b, 0x02a11220 },
3801 { 0x0c, 0x01a19040 },
3802 { 0x0d, 0x01114210 },
3803 { 0x0e, 0x01111212 },
3804 { 0x0f, 0x01116211 },
3805 { 0x10, 0x01813050 },
3806 { 0x11, 0x01112214 },
3807 { 0x12, 0x403003fa },
3808 { 0x13, 0x90a60040 },
3809 { 0x14, 0x90a60040 },
3810 { 0x21, 0x404003fb },
3811 { 0x22, 0x40c003fc },
3812 { 0x23, 0x40000100 },
3813 {}
3814};
3815
3816static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3817 const struct hda_fixup *fix, int action)
3818{
3819 /* no jack detecion for ref-no-jd model */
3820 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3821 codec->no_jack_detect = 1;
3822}
3823
3824static void stac927x_fixup_ref(struct hda_codec *codec,
3825 const struct hda_fixup *fix, int action)
3826{
3827 struct sigmatel_spec *spec = codec->spec;
3828
3829 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3830 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3831 spec->eapd_mask = spec->gpio_mask = 0;
3832 spec->gpio_dir = spec->gpio_data = 0;
3833 }
3834}
3835
3836static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3837 const struct hda_fixup *fix, int action)
3838{
3839 struct sigmatel_spec *spec = codec->spec;
3840
3841 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3842 return;
3843
3844 if (codec->core.subsystem_id != 0x1028022f) {
3845 /* GPIO2 High = Enable EAPD */
3846 spec->eapd_mask = spec->gpio_mask = 0x04;
3847 spec->gpio_dir = spec->gpio_data = 0x04;
3848 }
3849
3850 snd_hda_add_verbs(codec, dell_3st_core_init);
3851 spec->volknob_init = 1;
3852}
3853
3854static void stac927x_fixup_volknob(struct hda_codec *codec,
3855 const struct hda_fixup *fix, int action)
3856{
3857 struct sigmatel_spec *spec = codec->spec;
3858
3859 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3860 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3861 spec->volknob_init = 1;
3862 }
3863}
3864
3865static const struct hda_fixup stac927x_fixups[] = {
3866 [STAC_D965_REF_NO_JD] = {
3867 .type = HDA_FIXUP_FUNC,
3868 .v.func = stac927x_fixup_ref_no_jd,
3869 .chained = true,
3870 .chain_id = STAC_D965_REF,
3871 },
3872 [STAC_D965_REF] = {
3873 .type = HDA_FIXUP_FUNC,
3874 .v.func = stac927x_fixup_ref,
3875 },
3876 [STAC_D965_3ST] = {
3877 .type = HDA_FIXUP_PINS,
3878 .v.pins = d965_3st_pin_configs,
3879 .chained = true,
3880 .chain_id = STAC_D965_VERBS,
3881 },
3882 [STAC_D965_5ST] = {
3883 .type = HDA_FIXUP_PINS,
3884 .v.pins = d965_5st_pin_configs,
3885 .chained = true,
3886 .chain_id = STAC_D965_VERBS,
3887 },
3888 [STAC_D965_VERBS] = {
3889 .type = HDA_FIXUP_VERBS,
3890 .v.verbs = d965_core_init,
3891 },
3892 [STAC_D965_5ST_NO_FP] = {
3893 .type = HDA_FIXUP_PINS,
3894 .v.pins = d965_5st_no_fp_pin_configs,
3895 },
3896 [STAC_NEMO_DEFAULT] = {
3897 .type = HDA_FIXUP_PINS,
3898 .v.pins = nemo_pin_configs,
3899 },
3900 [STAC_DELL_3ST] = {
3901 .type = HDA_FIXUP_PINS,
3902 .v.pins = dell_3st_pin_configs,
3903 .chained = true,
3904 .chain_id = STAC_927X_DELL_DMIC,
3905 },
3906 [STAC_DELL_BIOS] = {
3907 .type = HDA_FIXUP_PINS,
3908 .v.pins = (const struct hda_pintbl[]) {
3909 /* correct the front output jack as a hp out */
3910 { 0x0f, 0x0221101f },
3911 /* correct the front input jack as a mic */
3912 { 0x0e, 0x02a79130 },
3913 {}
3914 },
3915 .chained = true,
3916 .chain_id = STAC_927X_DELL_DMIC,
3917 },
3918 [STAC_DELL_BIOS_AMIC] = {
3919 .type = HDA_FIXUP_PINS,
3920 .v.pins = (const struct hda_pintbl[]) {
3921 /* configure the analog microphone on some laptops */
3922 { 0x0c, 0x90a79130 },
3923 {}
3924 },
3925 .chained = true,
3926 .chain_id = STAC_DELL_BIOS,
3927 },
3928 [STAC_DELL_BIOS_SPDIF] = {
3929 .type = HDA_FIXUP_PINS,
3930 .v.pins = (const struct hda_pintbl[]) {
3931 /* correct the device field to SPDIF out */
3932 { 0x21, 0x01442070 },
3933 {}
3934 },
3935 .chained = true,
3936 .chain_id = STAC_DELL_BIOS,
3937 },
3938 [STAC_927X_DELL_DMIC] = {
3939 .type = HDA_FIXUP_FUNC,
3940 .v.func = stac927x_fixup_dell_dmic,
3941 },
3942 [STAC_927X_VOLKNOB] = {
3943 .type = HDA_FIXUP_FUNC,
3944 .v.func = stac927x_fixup_volknob,
3945 },
3946};
3947
3948static const struct hda_model_fixup stac927x_models[] = {
3949 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3950 { .id = STAC_D965_REF, .name = "ref" },
3951 { .id = STAC_D965_3ST, .name = "3stack" },
3952 { .id = STAC_D965_5ST, .name = "5stack" },
3953 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3954 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3955 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3956 { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
3957 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3958 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3959 {}
3960};
3961
3962static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3963 /* SigmaTel reference board */
3964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3965 "DFI LanParty", STAC_D965_REF),
3966 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3967 "DFI LanParty", STAC_D965_REF),
3968 /* Intel 946 based systems */
3969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3971 /* 965 based 3 stack systems */
3972 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3973 "Intel D965", STAC_D965_3ST),
3974 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3975 "Intel D965", STAC_D965_3ST),
3976 /* Dell 3 stack systems */
3977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3980 /* Dell 3 stack systems with verb table in BIOS */
3981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3990 /* 965 based 5 stack systems */
3991 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3992 "Intel D965", STAC_D965_5ST),
3993 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3994 "Intel D965", STAC_D965_5ST),
3995 /* Nemo */
3996 SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
3997 /* volume-knob fixes */
3998 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3999 {} /* terminator */
4000};
4001
4002static const struct hda_pintbl ref9205_pin_configs[] = {
4003 { 0x0a, 0x40000100 },
4004 { 0x0b, 0x40000100 },
4005 { 0x0c, 0x01016011 },
4006 { 0x0d, 0x01014010 },
4007 { 0x0e, 0x01813122 },
4008 { 0x0f, 0x01a19021 },
4009 { 0x14, 0x01019020 },
4010 { 0x16, 0x40000100 },
4011 { 0x17, 0x90a000f0 },
4012 { 0x18, 0x90a000f0 },
4013 { 0x21, 0x01441030 },
4014 { 0x22, 0x01c41030 },
4015 {}
4016};
4017
4018/*
4019 STAC 9205 pin configs for
4020 102801F1
4021 102801F2
4022 102801FC
4023 102801FD
4024 10280204
4025 1028021F
4026 10280228 (Dell Vostro 1500)
4027 10280229 (Dell Vostro 1700)
4028*/
4029static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4030 { 0x0a, 0x0321101F },
4031 { 0x0b, 0x03A11020 },
4032 { 0x0c, 0x400003FA },
4033 { 0x0d, 0x90170310 },
4034 { 0x0e, 0x400003FB },
4035 { 0x0f, 0x400003FC },
4036 { 0x14, 0x400003FD },
4037 { 0x16, 0x40F000F9 },
4038 { 0x17, 0x90A60330 },
4039 { 0x18, 0x400003FF },
4040 { 0x21, 0x0144131F },
4041 { 0x22, 0x40C003FE },
4042 {}
4043};
4044
4045/*
4046 STAC 9205 pin configs for
4047 102801F9
4048 102801FA
4049 102801FE
4050 102801FF (Dell Precision M4300)
4051 10280206
4052 10280200
4053 10280201
4054*/
4055static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4056 { 0x0a, 0x0321101f },
4057 { 0x0b, 0x03a11020 },
4058 { 0x0c, 0x90a70330 },
4059 { 0x0d, 0x90170310 },
4060 { 0x0e, 0x400000fe },
4061 { 0x0f, 0x400000ff },
4062 { 0x14, 0x400000fd },
4063 { 0x16, 0x40f000f9 },
4064 { 0x17, 0x400000fa },
4065 { 0x18, 0x400000fc },
4066 { 0x21, 0x0144131f },
4067 { 0x22, 0x40c003f8 },
4068 /* Enable SPDIF in/out */
4069 { 0x1f, 0x01441030 },
4070 { 0x20, 0x1c410030 },
4071 {}
4072};
4073
4074static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4075 { 0x0a, 0x0421101f },
4076 { 0x0b, 0x04a11020 },
4077 { 0x0c, 0x400003fa },
4078 { 0x0d, 0x90170310 },
4079 { 0x0e, 0x400003fb },
4080 { 0x0f, 0x400003fc },
4081 { 0x14, 0x400003fd },
4082 { 0x16, 0x400003f9 },
4083 { 0x17, 0x90a60330 },
4084 { 0x18, 0x400003ff },
4085 { 0x21, 0x01441340 },
4086 { 0x22, 0x40c003fe },
4087 {}
4088};
4089
4090static void stac9205_fixup_ref(struct hda_codec *codec,
4091 const struct hda_fixup *fix, int action)
4092{
4093 struct sigmatel_spec *spec = codec->spec;
4094
4095 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4096 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4097 /* SPDIF-In enabled */
4098 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4099 }
4100}
4101
4102static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4103 const struct hda_fixup *fix, int action)
4104{
4105 struct sigmatel_spec *spec = codec->spec;
4106 struct hda_jack_callback *jack;
4107
4108 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4109 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4110
4111 /* Enable unsol response for GPIO4/Dock HP connection */
4112 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
4113 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4114 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
4115 stac_vref_event);
4116 if (!IS_ERR(jack))
4117 jack->private_data = 0x01;
4118
4119 spec->gpio_dir = 0x0b;
4120 spec->eapd_mask = 0x01;
4121 spec->gpio_mask = 0x1b;
4122 spec->gpio_mute = 0x10;
4123 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4124 * GPIO3 Low = DRM
4125 */
4126 spec->gpio_data = 0x01;
4127 }
4128}
4129
4130static void stac9205_fixup_eapd(struct hda_codec *codec,
4131 const struct hda_fixup *fix, int action)
4132{
4133 struct sigmatel_spec *spec = codec->spec;
4134
4135 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4136 spec->eapd_switch = 0;
4137}
4138
4139static const struct hda_fixup stac9205_fixups[] = {
4140 [STAC_9205_REF] = {
4141 .type = HDA_FIXUP_FUNC,
4142 .v.func = stac9205_fixup_ref,
4143 },
4144 [STAC_9205_DELL_M42] = {
4145 .type = HDA_FIXUP_PINS,
4146 .v.pins = dell_9205_m42_pin_configs,
4147 },
4148 [STAC_9205_DELL_M43] = {
4149 .type = HDA_FIXUP_FUNC,
4150 .v.func = stac9205_fixup_dell_m43,
4151 },
4152 [STAC_9205_DELL_M44] = {
4153 .type = HDA_FIXUP_PINS,
4154 .v.pins = dell_9205_m44_pin_configs,
4155 },
4156 [STAC_9205_EAPD] = {
4157 .type = HDA_FIXUP_FUNC,
4158 .v.func = stac9205_fixup_eapd,
4159 },
4160 {}
4161};
4162
4163static const struct hda_model_fixup stac9205_models[] = {
4164 { .id = STAC_9205_REF, .name = "ref" },
4165 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4166 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4167 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4168 { .id = STAC_9205_EAPD, .name = "eapd" },
4169 {}
4170};
4171
4172static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4173 /* SigmaTel reference board */
4174 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4175 "DFI LanParty", STAC_9205_REF),
4176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4177 "SigmaTel", STAC_9205_REF),
4178 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4179 "DFI LanParty", STAC_9205_REF),
4180 /* Dell */
4181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4182 "unknown Dell", STAC_9205_DELL_M42),
4183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4184 "unknown Dell", STAC_9205_DELL_M42),
4185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4186 "Dell Precision", STAC_9205_DELL_M43),
4187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4188 "Dell Precision", STAC_9205_DELL_M43),
4189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4190 "Dell Precision", STAC_9205_DELL_M43),
4191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4192 "unknown Dell", STAC_9205_DELL_M42),
4193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4194 "unknown Dell", STAC_9205_DELL_M42),
4195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4196 "Dell Precision", STAC_9205_DELL_M43),
4197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4198 "Dell Precision M4300", STAC_9205_DELL_M43),
4199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4200 "unknown Dell", STAC_9205_DELL_M42),
4201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4202 "Dell Precision", STAC_9205_DELL_M43),
4203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4204 "Dell Precision", STAC_9205_DELL_M43),
4205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4206 "Dell Precision", STAC_9205_DELL_M43),
4207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4208 "Dell Inspiron", STAC_9205_DELL_M44),
4209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4210 "Dell Vostro 1500", STAC_9205_DELL_M42),
4211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4212 "Dell Vostro 1700", STAC_9205_DELL_M42),
4213 /* Gateway */
4214 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4215 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4216 {} /* terminator */
4217};
4218
4219static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4220 const struct hda_fixup *fix, int action)
4221{
4222 struct sigmatel_spec *spec = codec->spec;
4223
4224 if (action != HDA_FIXUP_ACT_PRE_PROBE)
4225 return;
4226
4227 if (find_mute_led_cfg(codec, spec->default_polarity))
4228 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4229 spec->gpio_led,
4230 spec->gpio_led_polarity);
4231}
4232
4233static const struct hda_fixup stac92hd95_fixups[] = {
4234 [STAC_92HD95_HP_LED] = {
4235 .type = HDA_FIXUP_FUNC,
4236 .v.func = stac92hd95_fixup_hp_led,
4237 },
4238 [STAC_92HD95_HP_BASS] = {
4239 .type = HDA_FIXUP_VERBS,
4240 .v.verbs = (const struct hda_verb[]) {
4241 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4242 {}
4243 },
4244 .chained = true,
4245 .chain_id = STAC_92HD95_HP_LED,
4246 },
4247};
4248
4249static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4250 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4251 {} /* terminator */
4252};
4253
4254static const struct hda_model_fixup stac92hd95_models[] = {
4255 { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4256 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4257 {}
4258};
4259
4260
4261static int stac_parse_auto_config(struct hda_codec *codec)
4262{
4263 struct sigmatel_spec *spec = codec->spec;
4264 int err;
4265 int flags = 0;
4266
4267 if (spec->headset_jack)
4268 flags |= HDA_PINCFG_HEADSET_MIC;
4269
4270 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4271 if (err < 0)
4272 return err;
4273
4274 /* add hooks */
4275 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4276 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4277
4278 spec->gen.automute_hook = stac_update_outputs;
4279
4280 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4281 if (err < 0)
4282 return err;
4283
4284 if (spec->vref_mute_led_nid) {
4285 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4286 if (err < 0)
4287 return err;
4288 }
4289
4290 /* setup analog beep controls */
4291 if (spec->anabeep_nid > 0) {
4292 err = stac_auto_create_beep_ctls(codec,
4293 spec->anabeep_nid);
4294 if (err < 0)
4295 return err;
4296 }
4297
4298 /* setup digital beep controls and input device */
4299#ifdef CONFIG_SND_HDA_INPUT_BEEP
4300 if (spec->gen.beep_nid) {
4301 hda_nid_t nid = spec->gen.beep_nid;
4302 unsigned int caps;
4303
4304 err = stac_auto_create_beep_ctls(codec, nid);
4305 if (err < 0)
4306 return err;
4307 if (codec->beep) {
4308 /* IDT/STAC codecs have linear beep tone parameter */
4309 codec->beep->linear_tone = spec->linear_tone_beep;
4310 /* if no beep switch is available, make its own one */
4311 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4312 if (!(caps & AC_AMPCAP_MUTE)) {
4313 err = stac_beep_switch_ctl(codec);
4314 if (err < 0)
4315 return err;
4316 }
4317 }
4318 }
4319#endif
4320
4321 if (spec->gpio_led)
4322 snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook);
4323
4324 if (spec->aloopback_ctl &&
4325 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4326 unsigned int wr_verb =
4327 spec->aloopback_ctl->private_value >> 16;
4328 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4329 return -ENOMEM;
4330 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4331 return -ENOMEM;
4332 }
4333
4334 if (spec->have_spdif_mux) {
4335 err = stac_create_spdif_mux_ctls(codec);
4336 if (err < 0)
4337 return err;
4338 }
4339
4340 stac_init_power_map(codec);
4341
4342 return 0;
4343}
4344
4345static int stac_init(struct hda_codec *codec)
4346{
4347 struct sigmatel_spec *spec = codec->spec;
4348 int i;
4349
4350 /* override some hints */
4351 stac_store_hints(codec);
4352
4353 /* set up GPIO */
4354 /* turn on EAPD statically when spec->eapd_switch isn't set.
4355 * otherwise, unsol event will turn it on/off dynamically
4356 */
4357 if (!spec->eapd_switch)
4358 spec->gpio_data |= spec->eapd_mask;
4359 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4360
4361 snd_hda_gen_init(codec);
4362
4363 /* sync the power-map */
4364 if (spec->num_pwrs)
4365 snd_hda_codec_write(codec, codec->core.afg, 0,
4366 AC_VERB_IDT_SET_POWER_MAP,
4367 spec->power_map_bits);
4368
4369 /* power down inactive ADCs */
4370 if (spec->powerdown_adcs) {
4371 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4372 if (spec->active_adcs & (1 << i))
4373 continue;
4374 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4375 AC_VERB_SET_POWER_STATE,
4376 AC_PWRST_D3);
4377 }
4378 }
4379
4380 return 0;
4381}
4382
4383static void stac_shutup(struct hda_codec *codec)
4384{
4385 struct sigmatel_spec *spec = codec->spec;
4386
4387 snd_hda_shutup_pins(codec);
4388
4389 if (spec->eapd_mask)
4390 stac_gpio_set(codec, spec->gpio_mask,
4391 spec->gpio_dir, spec->gpio_data &
4392 ~spec->eapd_mask);
4393}
4394
4395#define stac_free snd_hda_gen_free
4396
4397#ifdef CONFIG_SND_PROC_FS
4398static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4399 struct hda_codec *codec, hda_nid_t nid)
4400{
4401 if (nid == codec->core.afg)
4402 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4403 snd_hda_codec_read(codec, nid, 0,
4404 AC_VERB_IDT_GET_POWER_MAP, 0));
4405}
4406
4407static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4408 struct hda_codec *codec,
4409 unsigned int verb)
4410{
4411 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4412 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
4413}
4414
4415/* stac92hd71bxx, stac92hd73xx */
4416static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4417 struct hda_codec *codec, hda_nid_t nid)
4418{
4419 stac92hd_proc_hook(buffer, codec, nid);
4420 if (nid == codec->core.afg)
4421 analog_loop_proc_hook(buffer, codec, 0xfa0);
4422}
4423
4424static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4425 struct hda_codec *codec, hda_nid_t nid)
4426{
4427 if (nid == codec->core.afg)
4428 analog_loop_proc_hook(buffer, codec, 0xfe0);
4429}
4430
4431static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4432 struct hda_codec *codec, hda_nid_t nid)
4433{
4434 if (nid == codec->core.afg)
4435 analog_loop_proc_hook(buffer, codec, 0xfeb);
4436}
4437#else
4438#define stac92hd_proc_hook NULL
4439#define stac92hd7x_proc_hook NULL
4440#define stac9205_proc_hook NULL
4441#define stac927x_proc_hook NULL
4442#endif
4443
4444#ifdef CONFIG_PM
4445static int stac_suspend(struct hda_codec *codec)
4446{
4447 stac_shutup(codec);
4448 return 0;
4449}
4450#else
4451#define stac_suspend NULL
4452#endif /* CONFIG_PM */
4453
4454static const struct hda_codec_ops stac_patch_ops = {
4455 .build_controls = snd_hda_gen_build_controls,
4456 .build_pcms = snd_hda_gen_build_pcms,
4457 .init = stac_init,
4458 .free = stac_free,
4459 .unsol_event = snd_hda_jack_unsol_event,
4460#ifdef CONFIG_PM
4461 .suspend = stac_suspend,
4462#endif
4463 .reboot_notify = stac_shutup,
4464};
4465
4466static int alloc_stac_spec(struct hda_codec *codec)
4467{
4468 struct sigmatel_spec *spec;
4469
4470 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4471 if (!spec)
4472 return -ENOMEM;
4473 snd_hda_gen_spec_init(&spec->gen);
4474 codec->spec = spec;
4475 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4476 spec->gen.dac_min_mute = true;
4477 codec->patch_ops = stac_patch_ops;
4478 return 0;
4479}
4480
4481static int patch_stac9200(struct hda_codec *codec)
4482{
4483 struct sigmatel_spec *spec;
4484 int err;
4485
4486 err = alloc_stac_spec(codec);
4487 if (err < 0)
4488 return err;
4489
4490 spec = codec->spec;
4491 spec->linear_tone_beep = 1;
4492 spec->gen.own_eapd_ctl = 1;
4493
4494 codec->power_filter = snd_hda_codec_eapd_power_filter;
4495
4496 snd_hda_add_verbs(codec, stac9200_eapd_init);
4497
4498 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4499 stac9200_fixups);
4500 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4501
4502 err = stac_parse_auto_config(codec);
4503 if (err < 0) {
4504 stac_free(codec);
4505 return err;
4506 }
4507
4508 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4509
4510 return 0;
4511}
4512
4513static int patch_stac925x(struct hda_codec *codec)
4514{
4515 struct sigmatel_spec *spec;
4516 int err;
4517
4518 err = alloc_stac_spec(codec);
4519 if (err < 0)
4520 return err;
4521
4522 spec = codec->spec;
4523 spec->linear_tone_beep = 1;
4524 spec->gen.own_eapd_ctl = 1;
4525
4526 snd_hda_add_verbs(codec, stac925x_core_init);
4527
4528 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4529 stac925x_fixups);
4530 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4531
4532 err = stac_parse_auto_config(codec);
4533 if (err < 0) {
4534 stac_free(codec);
4535 return err;
4536 }
4537
4538 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4539
4540 return 0;
4541}
4542
4543static int patch_stac92hd73xx(struct hda_codec *codec)
4544{
4545 struct sigmatel_spec *spec;
4546 int err;
4547 int num_dacs;
4548
4549 err = alloc_stac_spec(codec);
4550 if (err < 0)
4551 return err;
4552
4553 spec = codec->spec;
4554 /* enable power_save_node only for new 92HD89xx chips, as it causes
4555 * click noises on old 92HD73xx chips.
4556 */
4557 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4558 codec->power_save_node = 1;
4559 spec->linear_tone_beep = 0;
4560 spec->gen.mixer_nid = 0x1d;
4561 spec->have_spdif_mux = 1;
4562
4563 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4564 if (num_dacs < 3 || num_dacs > 5) {
4565 codec_warn(codec,
4566 "Could not determine number of channels defaulting to DAC count\n");
4567 num_dacs = 5;
4568 }
4569
4570 switch (num_dacs) {
4571 case 0x3: /* 6 Channel */
4572 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4573 break;
4574 case 0x4: /* 8 Channel */
4575 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4576 break;
4577 case 0x5: /* 10 Channel */
4578 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4579 break;
4580 }
4581
4582 spec->aloopback_mask = 0x01;
4583 spec->aloopback_shift = 8;
4584
4585 spec->gen.beep_nid = 0x1c; /* digital beep */
4586
4587 /* GPIO0 High = Enable EAPD */
4588 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4589 spec->gpio_data = 0x01;
4590
4591 spec->eapd_switch = 1;
4592
4593 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4594 spec->pwr_nids = stac92hd73xx_pwr_nids;
4595
4596 spec->gen.own_eapd_ctl = 1;
4597 spec->gen.power_down_unused = 1;
4598
4599 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4600 stac92hd73xx_fixups);
4601 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4602
4603 if (!spec->volknob_init)
4604 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4605
4606 err = stac_parse_auto_config(codec);
4607 if (err < 0) {
4608 stac_free(codec);
4609 return err;
4610 }
4611
4612 /* Don't GPIO-mute speakers if there are no internal speakers, because
4613 * the GPIO might be necessary for Headphone
4614 */
4615 if (spec->eapd_switch && !has_builtin_speaker(codec))
4616 spec->eapd_switch = 0;
4617
4618 codec->proc_widget_hook = stac92hd7x_proc_hook;
4619
4620 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4621
4622 return 0;
4623}
4624
4625static void stac_setup_gpio(struct hda_codec *codec)
4626{
4627 struct sigmatel_spec *spec = codec->spec;
4628
4629 spec->gpio_mask |= spec->eapd_mask;
4630 if (spec->gpio_led) {
4631 if (!spec->vref_mute_led_nid) {
4632 spec->gpio_mask |= spec->gpio_led;
4633 spec->gpio_dir |= spec->gpio_led;
4634 spec->gpio_data |= spec->gpio_led;
4635 } else {
4636 codec->power_filter = stac_vref_led_power_filter;
4637 }
4638 }
4639
4640 if (spec->mic_mute_led_gpio) {
4641 spec->gpio_mask |= spec->mic_mute_led_gpio;
4642 spec->gpio_dir |= spec->mic_mute_led_gpio;
4643 spec->mic_enabled = 0;
4644 spec->gpio_data |= spec->mic_mute_led_gpio;
4645 snd_hda_gen_add_micmute_led_cdev(codec, stac_capture_led_update);
4646 }
4647}
4648
4649static int patch_stac92hd83xxx(struct hda_codec *codec)
4650{
4651 struct sigmatel_spec *spec;
4652 int err;
4653
4654 err = alloc_stac_spec(codec);
4655 if (err < 0)
4656 return err;
4657
4658 /* longer delay needed for D3 */
4659 codec->core.power_caps &= ~AC_PWRST_EPSS;
4660
4661 spec = codec->spec;
4662 codec->power_save_node = 1;
4663 spec->linear_tone_beep = 0;
4664 spec->gen.own_eapd_ctl = 1;
4665 spec->gen.power_down_unused = 1;
4666 spec->gen.mixer_nid = 0x1b;
4667
4668 spec->gen.beep_nid = 0x21; /* digital beep */
4669 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4670 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4671 spec->default_polarity = -1; /* no default cfg */
4672
4673 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4674
4675 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4676 stac92hd83xxx_fixups);
4677 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4678
4679 stac_setup_gpio(codec);
4680
4681 err = stac_parse_auto_config(codec);
4682 if (err < 0) {
4683 stac_free(codec);
4684 return err;
4685 }
4686
4687 codec->proc_widget_hook = stac92hd_proc_hook;
4688
4689 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4690
4691 return 0;
4692}
4693
4694static const hda_nid_t stac92hd95_pwr_nids[] = {
4695 0x0a, 0x0b, 0x0c, 0x0d
4696};
4697
4698static int patch_stac92hd95(struct hda_codec *codec)
4699{
4700 struct sigmatel_spec *spec;
4701 int err;
4702
4703 err = alloc_stac_spec(codec);
4704 if (err < 0)
4705 return err;
4706
4707 /* longer delay needed for D3 */
4708 codec->core.power_caps &= ~AC_PWRST_EPSS;
4709
4710 spec = codec->spec;
4711 codec->power_save_node = 1;
4712 spec->linear_tone_beep = 0;
4713 spec->gen.own_eapd_ctl = 1;
4714 spec->gen.power_down_unused = 1;
4715
4716 spec->gen.beep_nid = 0x19; /* digital beep */
4717 spec->pwr_nids = stac92hd95_pwr_nids;
4718 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4719 spec->default_polarity = 0;
4720
4721 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4722 stac92hd95_fixups);
4723 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4724
4725 stac_setup_gpio(codec);
4726
4727 err = stac_parse_auto_config(codec);
4728 if (err < 0) {
4729 stac_free(codec);
4730 return err;
4731 }
4732
4733 codec->proc_widget_hook = stac92hd_proc_hook;
4734
4735 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4736
4737 return 0;
4738}
4739
4740static int patch_stac92hd71bxx(struct hda_codec *codec)
4741{
4742 struct sigmatel_spec *spec;
4743 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
4744 int err;
4745
4746 err = alloc_stac_spec(codec);
4747 if (err < 0)
4748 return err;
4749
4750 spec = codec->spec;
4751 /* disabled power_save_node since it causes noises on a Dell machine */
4752 /* codec->power_save_node = 1; */
4753 spec->linear_tone_beep = 0;
4754 spec->gen.own_eapd_ctl = 1;
4755 spec->gen.power_down_unused = 1;
4756 spec->gen.mixer_nid = 0x17;
4757 spec->have_spdif_mux = 1;
4758
4759 /* GPIO0 = EAPD */
4760 spec->gpio_mask = 0x01;
4761 spec->gpio_dir = 0x01;
4762 spec->gpio_data = 0x01;
4763
4764 switch (codec->core.vendor_id) {
4765 case 0x111d76b6: /* 4 Port without Analog Mixer */
4766 case 0x111d76b7:
4767 unmute_nids++;
4768 break;
4769 case 0x111d7608: /* 5 Port with Analog Mixer */
4770 if ((codec->core.revision_id & 0xf) == 0 ||
4771 (codec->core.revision_id & 0xf) == 1)
4772 spec->stream_delay = 40; /* 40 milliseconds */
4773
4774 /* disable VSW */
4775 unmute_nids++;
4776 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4777 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4778 break;
4779 case 0x111d7603: /* 6 Port with Analog Mixer */
4780 if ((codec->core.revision_id & 0xf) == 1)
4781 spec->stream_delay = 40; /* 40 milliseconds */
4782
4783 break;
4784 }
4785
4786 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4787 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4788
4789 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4790 const hda_nid_t *p;
4791 for (p = unmute_nids; *p; p++)
4792 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4793 0xff, 0x00);
4794 }
4795
4796 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4797 spec->aloopback_mask = 0x50;
4798 spec->aloopback_shift = 0;
4799
4800 spec->powerdown_adcs = 1;
4801 spec->gen.beep_nid = 0x26; /* digital beep */
4802 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4803 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4804
4805 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4806 stac92hd71bxx_fixups);
4807 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4808
4809 stac_setup_gpio(codec);
4810
4811 err = stac_parse_auto_config(codec);
4812 if (err < 0) {
4813 stac_free(codec);
4814 return err;
4815 }
4816
4817 codec->proc_widget_hook = stac92hd7x_proc_hook;
4818
4819 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4820
4821 return 0;
4822}
4823
4824static int patch_stac922x(struct hda_codec *codec)
4825{
4826 struct sigmatel_spec *spec;
4827 int err;
4828
4829 err = alloc_stac_spec(codec);
4830 if (err < 0)
4831 return err;
4832
4833 spec = codec->spec;
4834 spec->linear_tone_beep = 1;
4835 spec->gen.own_eapd_ctl = 1;
4836
4837 snd_hda_add_verbs(codec, stac922x_core_init);
4838
4839 /* Fix Mux capture level; max to 2 */
4840 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4841 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4842 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4843 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4844 (0 << AC_AMPCAP_MUTE_SHIFT));
4845
4846 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4847 stac922x_fixups);
4848 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4849
4850 err = stac_parse_auto_config(codec);
4851 if (err < 0) {
4852 stac_free(codec);
4853 return err;
4854 }
4855
4856 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4857
4858 return 0;
4859}
4860
4861static const char * const stac927x_spdif_labels[] = {
4862 "Digital Playback", "ADAT", "Analog Mux 1",
4863 "Analog Mux 2", "Analog Mux 3", NULL
4864};
4865
4866static int patch_stac927x(struct hda_codec *codec)
4867{
4868 struct sigmatel_spec *spec;
4869 int err;
4870
4871 err = alloc_stac_spec(codec);
4872 if (err < 0)
4873 return err;
4874
4875 spec = codec->spec;
4876 spec->linear_tone_beep = 1;
4877 spec->gen.own_eapd_ctl = 1;
4878 spec->have_spdif_mux = 1;
4879 spec->spdif_labels = stac927x_spdif_labels;
4880
4881 spec->gen.beep_nid = 0x23; /* digital beep */
4882
4883 /* GPIO0 High = Enable EAPD */
4884 spec->eapd_mask = spec->gpio_mask = 0x01;
4885 spec->gpio_dir = spec->gpio_data = 0x01;
4886
4887 spec->aloopback_ctl = &stac927x_loopback;
4888 spec->aloopback_mask = 0x40;
4889 spec->aloopback_shift = 0;
4890 spec->eapd_switch = 1;
4891
4892 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4893 stac927x_fixups);
4894 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4895
4896 if (!spec->volknob_init)
4897 snd_hda_add_verbs(codec, stac927x_core_init);
4898
4899 err = stac_parse_auto_config(codec);
4900 if (err < 0) {
4901 stac_free(codec);
4902 return err;
4903 }
4904
4905 codec->proc_widget_hook = stac927x_proc_hook;
4906
4907 /*
4908 * !!FIXME!!
4909 * The STAC927x seem to require fairly long delays for certain
4910 * command sequences. With too short delays (even if the answer
4911 * is set to RIRB properly), it results in the silence output
4912 * on some hardwares like Dell.
4913 *
4914 * The below flag enables the longer delay (see get_response
4915 * in hda_intel.c).
4916 */
4917 codec->bus->core.needs_damn_long_delay = 1;
4918
4919 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4920
4921 return 0;
4922}
4923
4924static int patch_stac9205(struct hda_codec *codec)
4925{
4926 struct sigmatel_spec *spec;
4927 int err;
4928
4929 err = alloc_stac_spec(codec);
4930 if (err < 0)
4931 return err;
4932
4933 spec = codec->spec;
4934 spec->linear_tone_beep = 1;
4935 spec->gen.own_eapd_ctl = 1;
4936 spec->have_spdif_mux = 1;
4937
4938 spec->gen.beep_nid = 0x23; /* digital beep */
4939
4940 snd_hda_add_verbs(codec, stac9205_core_init);
4941 spec->aloopback_ctl = &stac9205_loopback;
4942
4943 spec->aloopback_mask = 0x40;
4944 spec->aloopback_shift = 0;
4945
4946 /* GPIO0 High = EAPD */
4947 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4948 spec->gpio_data = 0x01;
4949
4950 /* Turn on/off EAPD per HP plugging */
4951 spec->eapd_switch = 1;
4952
4953 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4954 stac9205_fixups);
4955 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4956
4957 err = stac_parse_auto_config(codec);
4958 if (err < 0) {
4959 stac_free(codec);
4960 return err;
4961 }
4962
4963 codec->proc_widget_hook = stac9205_proc_hook;
4964
4965 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4966
4967 return 0;
4968}
4969
4970/*
4971 * STAC9872 hack
4972 */
4973
4974static const struct hda_verb stac9872_core_init[] = {
4975 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4976 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4977 {}
4978};
4979
4980static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4981 { 0x0a, 0x03211020 },
4982 { 0x0b, 0x411111f0 },
4983 { 0x0c, 0x411111f0 },
4984 { 0x0d, 0x03a15030 },
4985 { 0x0e, 0x411111f0 },
4986 { 0x0f, 0x90170110 },
4987 { 0x11, 0x411111f0 },
4988 { 0x13, 0x411111f0 },
4989 { 0x14, 0x90a7013e },
4990 {}
4991};
4992
4993static const struct hda_model_fixup stac9872_models[] = {
4994 { .id = STAC_9872_VAIO, .name = "vaio" },
4995 {}
4996};
4997
4998static const struct hda_fixup stac9872_fixups[] = {
4999 [STAC_9872_VAIO] = {
5000 .type = HDA_FIXUP_PINS,
5001 .v.pins = stac9872_vaio_pin_configs,
5002 },
5003};
5004
5005static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
5006 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5007 "Sony VAIO F/S", STAC_9872_VAIO),
5008 {} /* terminator */
5009};
5010
5011static int patch_stac9872(struct hda_codec *codec)
5012{
5013 struct sigmatel_spec *spec;
5014 int err;
5015
5016 err = alloc_stac_spec(codec);
5017 if (err < 0)
5018 return err;
5019
5020 spec = codec->spec;
5021 spec->linear_tone_beep = 1;
5022 spec->gen.own_eapd_ctl = 1;
5023
5024 snd_hda_add_verbs(codec, stac9872_core_init);
5025
5026 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5027 stac9872_fixups);
5028 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5029
5030 err = stac_parse_auto_config(codec);
5031 if (err < 0) {
5032 stac_free(codec);
5033 return -EINVAL;
5034 }
5035
5036 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5037
5038 return 0;
5039}
5040
5041
5042/*
5043 * patch entries
5044 */
5045static const struct hda_device_id snd_hda_id_sigmatel[] = {
5046 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5047 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5048 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5049 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5050 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5051 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5052 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5053 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5054 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
5055 HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
5056 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5057 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5058 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5059 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5060 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5061 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5062 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5063 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5064 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5065 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5066 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5067 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5068 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5069 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5070 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
5071 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5072 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5073 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5074 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5075 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5076 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5077 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5078 /* The following does not take into account .id=0x83847661 when subsys =
5079 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5080 * currently not fully supported.
5081 */
5082 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5083 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5084 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5085 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5086 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5087 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5088 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5089 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5090 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5091 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5092 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5093 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5094 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5095 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5096 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5097 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5098 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5099 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5100 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5101 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5102 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5103 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5104 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5105 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5106 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5107 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5108 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5109 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5110 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5111 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5112 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5113 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5114 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5115 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5116 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5117 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5118 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5119 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5120 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5121 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5122 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5123 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5124 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5125 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5126 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5127 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5128 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5129 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5130 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5131 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5132 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5133 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5134 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5135 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5136 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5137 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5138 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5139 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5140 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5141 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5142 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5143 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5144 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5145 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5146 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5147 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5148 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5149 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
5150 {} /* terminator */
5151};
5152MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
5153
5154MODULE_LICENSE("GPL");
5155MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5156
5157static struct hda_codec_driver sigmatel_driver = {
5158 .id = snd_hda_id_sigmatel,
5159};
5160
5161module_hda_codec_driver(sigmatel_driver);