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v6.8
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Broadcom Northstar USB 3.0 PHY Driver
  4 *
  5 * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
  6 * Copyright (C) 2016 Broadcom
  7 *
  8 * All magic values used for initialization (and related comments) were obtained
  9 * from Broadcom's SDK:
 10 * Copyright (c) Broadcom Corp, 2012
 11 */
 12
 13#include <linux/bcma/bcma.h>
 14#include <linux/delay.h>
 15#include <linux/err.h>
 16#include <linux/iopoll.h>
 17#include <linux/mdio.h>
 18#include <linux/module.h>
 19#include <linux/of.h>
 20#include <linux/of_address.h>
 
 21#include <linux/platform_device.h>
 22#include <linux/phy/phy.h>
 23#include <linux/property.h>
 24#include <linux/slab.h>
 25
 
 
 26#define BCM_NS_USB3_PHY_BASE_ADDR_REG	0x1f
 27#define BCM_NS_USB3_PHY_PLL30_BLOCK	0x8000
 28#define BCM_NS_USB3_PHY_TX_PMD_BLOCK	0x8040
 29#define BCM_NS_USB3_PHY_PIPE_BLOCK	0x8060
 30
 31/* Registers of PLL30 block */
 32#define BCM_NS_USB3_PLL_CONTROL		0x01
 33#define BCM_NS_USB3_PLLA_CONTROL0	0x0a
 34#define BCM_NS_USB3_PLLA_CONTROL1	0x0b
 35
 36/* Registers of TX PMD block */
 37#define BCM_NS_USB3_TX_PMD_CONTROL1	0x01
 38
 39/* Registers of PIPE block */
 40#define BCM_NS_USB3_LFPS_CMP		0x02
 41#define BCM_NS_USB3_LFPS_DEGLITCH	0x03
 42
 43enum bcm_ns_family {
 44	BCM_NS_UNKNOWN,
 45	BCM_NS_AX,
 46	BCM_NS_BX,
 47};
 48
 49struct bcm_ns_usb3 {
 50	struct device *dev;
 51	enum bcm_ns_family family;
 52	void __iomem *dmp;
 
 53	struct mdio_device *mdiodev;
 54	struct phy *phy;
 
 
 55};
 56
 57static const struct of_device_id bcm_ns_usb3_id_table[] = {
 58	{
 59		.compatible = "brcm,ns-ax-usb3-phy",
 60		.data = (int *)BCM_NS_AX,
 61	},
 62	{
 63		.compatible = "brcm,ns-bx-usb3-phy",
 64		.data = (int *)BCM_NS_BX,
 65	},
 66	{},
 67};
 
 68
 69static int bcm_ns_usb3_mdio_phy_write(struct bcm_ns_usb3 *usb3, u16 reg,
 70				      u16 value);
 
 
 
 71
 72static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3)
 73{
 74	int err;
 75
 76	/* USB3 PLL Block */
 77	err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
 78					 BCM_NS_USB3_PHY_PLL30_BLOCK);
 79	if (err < 0)
 80		return err;
 81
 82	/* Assert Ana_Pllseq start */
 83	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x1000);
 84
 85	/* Assert CML Divider ratio to 26 */
 86	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400);
 87
 88	/* Asserting PLL Reset */
 89	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0xc000);
 90
 91	/* Deaaserting PLL Reset */
 92	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0x8000);
 93
 94	/* Deasserting USB3 system reset */
 95	writel(0, usb3->dmp + BCMA_RESET_CTL);
 96
 97	/* PLL frequency monitor enable */
 98	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x9000);
 99
100	/* PIPE Block */
101	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
102				   BCM_NS_USB3_PHY_PIPE_BLOCK);
103
104	/* CMPMAX & CMPMINTH setting */
105	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_CMP, 0xf30d);
106
107	/* DEGLITCH MIN & MAX setting */
108	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_DEGLITCH, 0x6302);
109
110	/* TXPMD block */
111	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
112				   BCM_NS_USB3_PHY_TX_PMD_BLOCK);
113
114	/* Enabling SSC */
115	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003);
116
117	return 0;
118}
119
120static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3)
121{
122	int err;
123
124	/* PLL30 block */
125	err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
126					 BCM_NS_USB3_PHY_PLL30_BLOCK);
127	if (err < 0)
128		return err;
129
130	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400);
131
132	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, 0x80e0);
133
134	bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x009c);
135
136	/* Enable SSC */
137	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
138				   BCM_NS_USB3_PHY_TX_PMD_BLOCK);
139
140	bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x21d3);
141
142	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003);
143
144	/* Deasserting USB3 system reset */
145	writel(0, usb3->dmp + BCMA_RESET_CTL);
146
147	return 0;
148}
149
150static int bcm_ns_usb3_phy_init(struct phy *phy)
151{
152	struct bcm_ns_usb3 *usb3 = phy_get_drvdata(phy);
153	int err;
154
155	/* Perform USB3 system soft reset */
156	writel(BCMA_RESET_CTL_RESET, usb3->dmp + BCMA_RESET_CTL);
157
158	switch (usb3->family) {
159	case BCM_NS_AX:
160		err = bcm_ns_usb3_phy_init_ns_ax(usb3);
161		break;
162	case BCM_NS_BX:
163		err = bcm_ns_usb3_phy_init_ns_bx(usb3);
164		break;
165	default:
166		WARN_ON(1);
167		err = -ENOTSUPP;
168	}
169
170	return err;
171}
172
173static const struct phy_ops ops = {
174	.init		= bcm_ns_usb3_phy_init,
175	.owner		= THIS_MODULE,
176};
177
178/**************************************************
179 * MDIO driver code
180 **************************************************/
181
182static int bcm_ns_usb3_mdio_phy_write(struct bcm_ns_usb3 *usb3, u16 reg,
183				      u16 value)
184{
185	struct mdio_device *mdiodev = usb3->mdiodev;
186
187	return mdiodev_write(mdiodev, reg, value);
188}
189
190static int bcm_ns_usb3_mdio_probe(struct mdio_device *mdiodev)
191{
192	struct device *dev = &mdiodev->dev;
 
193	struct phy_provider *phy_provider;
194	struct device_node *syscon_np;
195	struct bcm_ns_usb3 *usb3;
196	struct resource res;
197	int err;
198
199	usb3 = devm_kzalloc(dev, sizeof(*usb3), GFP_KERNEL);
200	if (!usb3)
201		return -ENOMEM;
202
203	usb3->dev = dev;
204	usb3->mdiodev = mdiodev;
205
206	usb3->family = (enum bcm_ns_family)device_get_match_data(dev);
 
 
 
207
208	syscon_np = of_parse_phandle(dev->of_node, "usb3-dmp-syscon", 0);
209	err = of_address_to_resource(syscon_np, 0, &res);
210	of_node_put(syscon_np);
211	if (err)
212		return err;
213
214	usb3->dmp = devm_ioremap_resource(dev, &res);
215	if (IS_ERR(usb3->dmp))
 
216		return PTR_ERR(usb3->dmp);
 
 
 
217
218	usb3->phy = devm_phy_create(dev, NULL, &ops);
219	if (IS_ERR(usb3->phy)) {
220		dev_err(dev, "Failed to create PHY\n");
221		return PTR_ERR(usb3->phy);
222	}
223
224	phy_set_drvdata(usb3->phy, usb3);
225
226	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
227
228	return PTR_ERR_OR_ZERO(phy_provider);
229}
230
231static struct mdio_driver bcm_ns_usb3_mdio_driver = {
232	.mdiodrv = {
233		.driver = {
234			.name = "bcm_ns_mdio_usb3",
235			.of_match_table = bcm_ns_usb3_id_table,
236		},
237	},
238	.probe = bcm_ns_usb3_mdio_probe,
239};
240
241mdio_module_driver(bcm_ns_usb3_mdio_driver);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
242
243MODULE_LICENSE("GPL v2");
244MODULE_DEVICE_TABLE(of, bcm_ns_usb3_id_table);
v5.9
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Broadcom Northstar USB 3.0 PHY Driver
  4 *
  5 * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
  6 * Copyright (C) 2016 Broadcom
  7 *
  8 * All magic values used for initialization (and related comments) were obtained
  9 * from Broadcom's SDK:
 10 * Copyright (c) Broadcom Corp, 2012
 11 */
 12
 13#include <linux/bcma/bcma.h>
 14#include <linux/delay.h>
 15#include <linux/err.h>
 
 16#include <linux/mdio.h>
 17#include <linux/module.h>
 
 18#include <linux/of_address.h>
 19#include <linux/of_platform.h>
 20#include <linux/platform_device.h>
 21#include <linux/phy/phy.h>
 
 22#include <linux/slab.h>
 23
 24#define BCM_NS_USB3_MII_MNG_TIMEOUT_US	1000	/* usecs */
 25
 26#define BCM_NS_USB3_PHY_BASE_ADDR_REG	0x1f
 27#define BCM_NS_USB3_PHY_PLL30_BLOCK	0x8000
 28#define BCM_NS_USB3_PHY_TX_PMD_BLOCK	0x8040
 29#define BCM_NS_USB3_PHY_PIPE_BLOCK	0x8060
 30
 31/* Registers of PLL30 block */
 32#define BCM_NS_USB3_PLL_CONTROL		0x01
 33#define BCM_NS_USB3_PLLA_CONTROL0	0x0a
 34#define BCM_NS_USB3_PLLA_CONTROL1	0x0b
 35
 36/* Registers of TX PMD block */
 37#define BCM_NS_USB3_TX_PMD_CONTROL1	0x01
 38
 39/* Registers of PIPE block */
 40#define BCM_NS_USB3_LFPS_CMP		0x02
 41#define BCM_NS_USB3_LFPS_DEGLITCH	0x03
 42
 43enum bcm_ns_family {
 44	BCM_NS_UNKNOWN,
 45	BCM_NS_AX,
 46	BCM_NS_BX,
 47};
 48
 49struct bcm_ns_usb3 {
 50	struct device *dev;
 51	enum bcm_ns_family family;
 52	void __iomem *dmp;
 53	void __iomem *ccb_mii;
 54	struct mdio_device *mdiodev;
 55	struct phy *phy;
 56
 57	int (*phy_write)(struct bcm_ns_usb3 *usb3, u16 reg, u16 value);
 58};
 59
 60static const struct of_device_id bcm_ns_usb3_id_table[] = {
 61	{
 62		.compatible = "brcm,ns-ax-usb3-phy",
 63		.data = (int *)BCM_NS_AX,
 64	},
 65	{
 66		.compatible = "brcm,ns-bx-usb3-phy",
 67		.data = (int *)BCM_NS_BX,
 68	},
 69	{},
 70};
 71MODULE_DEVICE_TABLE(of, bcm_ns_usb3_id_table);
 72
 73static int bcm_ns_usb3_mdio_phy_write(struct bcm_ns_usb3 *usb3, u16 reg,
 74				      u16 value)
 75{
 76	return usb3->phy_write(usb3, reg, value);
 77}
 78
 79static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3)
 80{
 81	int err;
 82
 83	/* USB3 PLL Block */
 84	err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
 85					 BCM_NS_USB3_PHY_PLL30_BLOCK);
 86	if (err < 0)
 87		return err;
 88
 89	/* Assert Ana_Pllseq start */
 90	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x1000);
 91
 92	/* Assert CML Divider ratio to 26 */
 93	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400);
 94
 95	/* Asserting PLL Reset */
 96	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0xc000);
 97
 98	/* Deaaserting PLL Reset */
 99	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0x8000);
100
101	/* Deasserting USB3 system reset */
102	writel(0, usb3->dmp + BCMA_RESET_CTL);
103
104	/* PLL frequency monitor enable */
105	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x9000);
106
107	/* PIPE Block */
108	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
109				   BCM_NS_USB3_PHY_PIPE_BLOCK);
110
111	/* CMPMAX & CMPMINTH setting */
112	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_CMP, 0xf30d);
113
114	/* DEGLITCH MIN & MAX setting */
115	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_DEGLITCH, 0x6302);
116
117	/* TXPMD block */
118	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
119				   BCM_NS_USB3_PHY_TX_PMD_BLOCK);
120
121	/* Enabling SSC */
122	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003);
123
124	return 0;
125}
126
127static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3)
128{
129	int err;
130
131	/* PLL30 block */
132	err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
133					 BCM_NS_USB3_PHY_PLL30_BLOCK);
134	if (err < 0)
135		return err;
136
137	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400);
138
139	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, 0x80e0);
140
141	bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x009c);
142
143	/* Enable SSC */
144	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
145				   BCM_NS_USB3_PHY_TX_PMD_BLOCK);
146
147	bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x21d3);
148
149	bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003);
150
151	/* Deasserting USB3 system reset */
152	writel(0, usb3->dmp + BCMA_RESET_CTL);
153
154	return 0;
155}
156
157static int bcm_ns_usb3_phy_init(struct phy *phy)
158{
159	struct bcm_ns_usb3 *usb3 = phy_get_drvdata(phy);
160	int err;
161
162	/* Perform USB3 system soft reset */
163	writel(BCMA_RESET_CTL_RESET, usb3->dmp + BCMA_RESET_CTL);
164
165	switch (usb3->family) {
166	case BCM_NS_AX:
167		err = bcm_ns_usb3_phy_init_ns_ax(usb3);
168		break;
169	case BCM_NS_BX:
170		err = bcm_ns_usb3_phy_init_ns_bx(usb3);
171		break;
172	default:
173		WARN_ON(1);
174		err = -ENOTSUPP;
175	}
176
177	return err;
178}
179
180static const struct phy_ops ops = {
181	.init		= bcm_ns_usb3_phy_init,
182	.owner		= THIS_MODULE,
183};
184
185/**************************************************
186 * MDIO driver code
187 **************************************************/
188
189static int bcm_ns_usb3_mdiodev_phy_write(struct bcm_ns_usb3 *usb3, u16 reg,
190					 u16 value)
191{
192	struct mdio_device *mdiodev = usb3->mdiodev;
193
194	return mdiobus_write(mdiodev->bus, mdiodev->addr, reg, value);
195}
196
197static int bcm_ns_usb3_mdio_probe(struct mdio_device *mdiodev)
198{
199	struct device *dev = &mdiodev->dev;
200	const struct of_device_id *of_id;
201	struct phy_provider *phy_provider;
202	struct device_node *syscon_np;
203	struct bcm_ns_usb3 *usb3;
204	struct resource res;
205	int err;
206
207	usb3 = devm_kzalloc(dev, sizeof(*usb3), GFP_KERNEL);
208	if (!usb3)
209		return -ENOMEM;
210
211	usb3->dev = dev;
212	usb3->mdiodev = mdiodev;
213
214	of_id = of_match_device(bcm_ns_usb3_id_table, dev);
215	if (!of_id)
216		return -EINVAL;
217	usb3->family = (enum bcm_ns_family)of_id->data;
218
219	syscon_np = of_parse_phandle(dev->of_node, "usb3-dmp-syscon", 0);
220	err = of_address_to_resource(syscon_np, 0, &res);
221	of_node_put(syscon_np);
222	if (err)
223		return err;
224
225	usb3->dmp = devm_ioremap_resource(dev, &res);
226	if (IS_ERR(usb3->dmp)) {
227		dev_err(dev, "Failed to map DMP regs\n");
228		return PTR_ERR(usb3->dmp);
229	}
230
231	usb3->phy_write = bcm_ns_usb3_mdiodev_phy_write;
232
233	usb3->phy = devm_phy_create(dev, NULL, &ops);
234	if (IS_ERR(usb3->phy)) {
235		dev_err(dev, "Failed to create PHY\n");
236		return PTR_ERR(usb3->phy);
237	}
238
239	phy_set_drvdata(usb3->phy, usb3);
240
241	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
242
243	return PTR_ERR_OR_ZERO(phy_provider);
244}
245
246static struct mdio_driver bcm_ns_usb3_mdio_driver = {
247	.mdiodrv = {
248		.driver = {
249			.name = "bcm_ns_mdio_usb3",
250			.of_match_table = bcm_ns_usb3_id_table,
251		},
252	},
253	.probe = bcm_ns_usb3_mdio_probe,
254};
255
256/**************************************************
257 * Platform driver code
258 **************************************************/
259
260static int bcm_ns_usb3_wait_reg(struct bcm_ns_usb3 *usb3, void __iomem *addr,
261				u32 mask, u32 value, unsigned long timeout)
262{
263	unsigned long deadline = jiffies + timeout;
264	u32 val;
265
266	do {
267		val = readl(addr);
268		if ((val & mask) == value)
269			return 0;
270		cpu_relax();
271		udelay(10);
272	} while (!time_after_eq(jiffies, deadline));
273
274	dev_err(usb3->dev, "Timeout waiting for register %p\n", addr);
275
276	return -EBUSY;
277}
278
279static inline int bcm_ns_usb3_mii_mng_wait_idle(struct bcm_ns_usb3 *usb3)
280{
281	return bcm_ns_usb3_wait_reg(usb3, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL,
282				    0x0100, 0x0000,
283				    usecs_to_jiffies(BCM_NS_USB3_MII_MNG_TIMEOUT_US));
284}
285
286static int bcm_ns_usb3_platform_phy_write(struct bcm_ns_usb3 *usb3, u16 reg,
287					  u16 value)
288{
289	u32 tmp = 0;
290	int err;
291
292	err = bcm_ns_usb3_mii_mng_wait_idle(usb3);
293	if (err < 0) {
294		dev_err(usb3->dev, "Couldn't write 0x%08x value\n", value);
295		return err;
296	}
297
298	/* TODO: Use a proper MDIO bus layer */
299	tmp |= 0x58020000; /* Magic value for MDIO PHY write */
300	tmp |= reg << 18;
301	tmp |= value;
302	writel(tmp, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA);
303
304	return bcm_ns_usb3_mii_mng_wait_idle(usb3);
305}
306
307static int bcm_ns_usb3_probe(struct platform_device *pdev)
308{
309	struct device *dev = &pdev->dev;
310	const struct of_device_id *of_id;
311	struct bcm_ns_usb3 *usb3;
312	struct resource *res;
313	struct phy_provider *phy_provider;
314
315	usb3 = devm_kzalloc(dev, sizeof(*usb3), GFP_KERNEL);
316	if (!usb3)
317		return -ENOMEM;
318
319	usb3->dev = dev;
320
321	of_id = of_match_device(bcm_ns_usb3_id_table, dev);
322	if (!of_id)
323		return -EINVAL;
324	usb3->family = (enum bcm_ns_family)of_id->data;
325
326	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmp");
327	usb3->dmp = devm_ioremap_resource(dev, res);
328	if (IS_ERR(usb3->dmp)) {
329		dev_err(dev, "Failed to map DMP regs\n");
330		return PTR_ERR(usb3->dmp);
331	}
332
333	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ccb-mii");
334	usb3->ccb_mii = devm_ioremap_resource(dev, res);
335	if (IS_ERR(usb3->ccb_mii)) {
336		dev_err(dev, "Failed to map ChipCommon B MII regs\n");
337		return PTR_ERR(usb3->ccb_mii);
338	}
339
340	/* Enable MDIO. Setting MDCDIV as 26  */
341	writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
342
343	/* Wait for MDIO? */
344	udelay(2);
345
346	usb3->phy_write = bcm_ns_usb3_platform_phy_write;
347
348	usb3->phy = devm_phy_create(dev, NULL, &ops);
349	if (IS_ERR(usb3->phy)) {
350		dev_err(dev, "Failed to create PHY\n");
351		return PTR_ERR(usb3->phy);
352	}
353
354	phy_set_drvdata(usb3->phy, usb3);
355	platform_set_drvdata(pdev, usb3);
356
357	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
358	if (!IS_ERR(phy_provider))
359		dev_info(dev, "Registered Broadcom Northstar USB 3.0 PHY driver\n");
360
361	return PTR_ERR_OR_ZERO(phy_provider);
362}
363
364static struct platform_driver bcm_ns_usb3_driver = {
365	.probe		= bcm_ns_usb3_probe,
366	.driver = {
367		.name = "bcm_ns_usb3",
368		.of_match_table = bcm_ns_usb3_id_table,
369	},
370};
371
372static int __init bcm_ns_usb3_module_init(void)
373{
374	int err;
375
376	/*
377	 * For backward compatibility we register as MDIO and platform driver.
378	 * After getting MDIO binding commonly used (e.g. switching all DT files
379	 * to use it) we should deprecate the old binding and eventually drop
380	 * support for it.
381	 */
382
383	err = mdio_driver_register(&bcm_ns_usb3_mdio_driver);
384	if (err)
385		return err;
386
387	err = platform_driver_register(&bcm_ns_usb3_driver);
388	if (err)
389		mdio_driver_unregister(&bcm_ns_usb3_mdio_driver);
390
391	return err;
392}
393module_init(bcm_ns_usb3_module_init);
394
395static void __exit bcm_ns_usb3_module_exit(void)
396{
397	platform_driver_unregister(&bcm_ns_usb3_driver);
398	mdio_driver_unregister(&bcm_ns_usb3_mdio_driver);
399}
400module_exit(bcm_ns_usb3_module_exit)
401
402MODULE_LICENSE("GPL v2");