1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Copyright 2013-2016 Freescale Semiconductor Inc.
 4 * Copyright 2016-2018 NXP
 5 */
 6
 7#ifndef __FSL_DPRTC_H
 8#define __FSL_DPRTC_H
 9
10/* Data Path Real Time Counter API
11 * Contains initialization APIs and runtime control APIs for RTC
12 */
13
14struct fsl_mc_io;
15
 
 
 
16#define DPRTC_MAX_IRQ_NUM	1
17#define DPRTC_IRQ_INDEX		0
18
19#define DPRTC_EVENT_PPS		0x08000000
20#define DPRTC_EVENT_ETS1	0x00800000
21#define DPRTC_EVENT_ETS2	0x00400000
22
23int dprtc_open(struct fsl_mc_io *mc_io,
24	       u32 cmd_flags,
25	       int dprtc_id,
26	       u16 *token);
27
28int dprtc_close(struct fsl_mc_io *mc_io,
29		u32 cmd_flags,
30		u16 token);
31
32int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
33			 u32 cmd_flags,
34			 u16 token,
35			 u8 irq_index,
36			 u8 en);
37
38int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
39			 u32 cmd_flags,
40			 u16 token,
41			 u8 irq_index,
42			 u8 *en);
43
44int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
45		       u32 cmd_flags,
46		       u16 token,
47		       u8 irq_index,
48		       u32 mask);
49
50int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
51		       u32 cmd_flags,
52		       u16 token,
53		       u8 irq_index,
54		       u32 *mask);
55
56int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
57			 u32 cmd_flags,
58			 u16 token,
59			 u8 irq_index,
60			 u32 *status);
61
62int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
63			   u32 cmd_flags,
64			   u16 token,
65			   u8 irq_index,
66			   u32 status);
67
68#endif /* __FSL_DPRTC_H */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Copyright 2013-2016 Freescale Semiconductor Inc.
 4 * Copyright 2016-2018 NXP
 5 */
 6
 7#ifndef __FSL_DPRTC_H
 8#define __FSL_DPRTC_H
 9
10/* Data Path Real Time Counter API
11 * Contains initialization APIs and runtime control APIs for RTC
12 */
13
14struct fsl_mc_io;
15
16/**
17 * Number of irq's
18 */
19#define DPRTC_MAX_IRQ_NUM	1
20#define DPRTC_IRQ_INDEX		0
21
22#define DPRTC_EVENT_PPS		0x08000000
23#define DPRTC_EVENT_ETS1	0x00800000
24#define DPRTC_EVENT_ETS2	0x00400000
25
26int dprtc_open(struct fsl_mc_io *mc_io,
27	       u32 cmd_flags,
28	       int dprtc_id,
29	       u16 *token);
30
31int dprtc_close(struct fsl_mc_io *mc_io,
32		u32 cmd_flags,
33		u16 token);
34
35int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
36			 u32 cmd_flags,
37			 u16 token,
38			 u8 irq_index,
39			 u8 en);
40
41int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
42			 u32 cmd_flags,
43			 u16 token,
44			 u8 irq_index,
45			 u8 *en);
46
47int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
48		       u32 cmd_flags,
49		       u16 token,
50		       u8 irq_index,
51		       u32 mask);
52
53int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
54		       u32 cmd_flags,
55		       u16 token,
56		       u8 irq_index,
57		       u32 *mask);
58
59int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
60			 u32 cmd_flags,
61			 u16 token,
62			 u8 irq_index,
63			 u32 *status);
64
65int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
66			   u32 cmd_flags,
67			   u16 token,
68			   u8 irq_index,
69			   u32 status);
70
71#endif /* __FSL_DPRTC_H */