1# SPDX-License-Identifier: MIT
 2menu "Display Engine Configuration"
 3	depends on DRM && DRM_AMDGPU
 4
 5config DRM_AMD_DC
 6	bool "AMD DC - Enable new display engine"
 7	default y
 8	depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || X86_64
 9	select SND_HDA_COMPONENT if SND_HDA_CORE
10	# !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
11	select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
12	help
13	  Choose this option if you want to use the new display engine
14	  support for AMDGPU. This adds required support for Vega and
15	  Raven ASICs.
16
17	  calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64)
18	  architectures built with Clang (all released versions), whereby the stack
19	  frame gets blown up to well over 5k.  This would cause an immediate kernel
20	  panic on most architectures.  We'll revert this when the following bug report
21	  has been resolved: https://github.com/llvm/llvm-project/issues/41896.
22
23config DRM_AMD_DC_FP
24	def_bool n
25	help
26	  Floating point support, required for DCN-based SoCs
 
 
 
 
 
 
 
 
27
28config DRM_AMD_DC_SI
29	bool "AMD DC support for Southern Islands ASICs"
30	depends on DRM_AMDGPU_SI
31	depends on DRM_AMD_DC
32	help
33	  Choose this option to enable new AMD DC support for SI asics
34	  by default. This includes Tahiti, Pitcairn, Cape Verde, Oland.
35	  Hainan is not supported by AMD DC and it has no physical DCE6.
36
37config DEBUG_KERNEL_DC
38	bool "Enable kgdb break in DC"
39	depends on DRM_AMD_DC
40	depends on KGDB
41	help
42	  Choose this option if you want to hit kdgb_break in assert.
43
44config DRM_AMD_SECURE_DISPLAY
45	bool "Enable secure display support"
46	depends on DEBUG_FS
47	depends on DRM_AMD_DC_FP
48	help
49	  Choose this option if you want to support secure display
50
51	  This option enables the calculation of crc of specific region via
52	  debugfs. Cooperate with specific DMCU FW.
53
54endmenu

 1# SPDX-License-Identifier: MIT
 2menu "Display Engine Configuration"
 3	depends on DRM && DRM_AMDGPU
 4
 5config DRM_AMD_DC
 6	bool "AMD DC - Enable new display engine"
 7	default y
 
 8	select SND_HDA_COMPONENT if SND_HDA_CORE
 9	select DRM_AMD_DC_DCN if (X86 || PPC64) && !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS)
 
10	help
11	  Choose this option if you want to use the new display engine
12	  support for AMDGPU. This adds required support for Vega and
13	  Raven ASICs.
14
15config DRM_AMD_DC_DCN
 
 
 
 
 
 
16	def_bool n
17	help
18	  Raven, Navi and Renoir family support for display engine
19
20config DRM_AMD_DC_DCN3_0
21        bool "DCN 3.0 family"
22        depends on DRM_AMD_DC && X86
23        depends on DRM_AMD_DC_DCN
24        help
25            Choose this option if you want to have
26            sienna_cichlid support for display engine
27
28config DRM_AMD_DC_HDCP
29	bool "Enable HDCP support in DC"
 
30	depends on DRM_AMD_DC
31	help
32	  Choose this option if you want to support HDCP authentication.
 
 
33
34config DEBUG_KERNEL_DC
35	bool "Enable kgdb break in DC"
36	depends on DRM_AMD_DC
 
37	help
38	  Choose this option if you want to hit kdgb_break in assert.
 
 
 
 
 
 
 
 
 
 
39
40endmenu