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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * CPPC (Collaborative Processor Performance Control) driver for
4 * interfacing with the CPUfreq layer and governors. See
5 * cppc_acpi.c for CPPC specific methods.
6 *
7 * (C) Copyright 2014, 2015 Linaro Ltd.
8 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
9 */
10
11#define pr_fmt(fmt) "CPPC Cpufreq:" fmt
12
13#include <linux/arch_topology.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/delay.h>
17#include <linux/cpu.h>
18#include <linux/cpufreq.h>
19#include <linux/irq_work.h>
20#include <linux/kthread.h>
21#include <linux/time.h>
22#include <linux/vmalloc.h>
23#include <uapi/linux/sched/types.h>
24
25#include <asm/unaligned.h>
26
27#include <acpi/cppc_acpi.h>
28
29/*
30 * This list contains information parsed from per CPU ACPI _CPC and _PSD
31 * structures: e.g. the highest and lowest supported performance, capabilities,
32 * desired performance, level requested etc. Depending on the share_type, not
33 * all CPUs will have an entry in the list.
34 */
35static LIST_HEAD(cpu_data_list);
36
37static bool boost_supported;
38
39struct cppc_workaround_oem_info {
40 char oem_id[ACPI_OEM_ID_SIZE + 1];
41 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
42 u32 oem_revision;
43};
44
45static struct cppc_workaround_oem_info wa_info[] = {
46 {
47 .oem_id = "HISI ",
48 .oem_table_id = "HIP07 ",
49 .oem_revision = 0,
50 }, {
51 .oem_id = "HISI ",
52 .oem_table_id = "HIP08 ",
53 .oem_revision = 0,
54 }
55};
56
57static struct cpufreq_driver cppc_cpufreq_driver;
58
59static enum {
60 FIE_UNSET = -1,
61 FIE_ENABLED,
62 FIE_DISABLED
63} fie_disabled = FIE_UNSET;
64
65#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
66module_param(fie_disabled, int, 0444);
67MODULE_PARM_DESC(fie_disabled, "Disable Frequency Invariance Engine (FIE)");
68
69/* Frequency invariance support */
70struct cppc_freq_invariance {
71 int cpu;
72 struct irq_work irq_work;
73 struct kthread_work work;
74 struct cppc_perf_fb_ctrs prev_perf_fb_ctrs;
75 struct cppc_cpudata *cpu_data;
76};
77
78static DEFINE_PER_CPU(struct cppc_freq_invariance, cppc_freq_inv);
79static struct kthread_worker *kworker_fie;
80
81static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu);
82static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data,
83 struct cppc_perf_fb_ctrs *fb_ctrs_t0,
84 struct cppc_perf_fb_ctrs *fb_ctrs_t1);
85
86/**
87 * cppc_scale_freq_workfn - CPPC arch_freq_scale updater for frequency invariance
88 * @work: The work item.
89 *
90 * The CPPC driver register itself with the topology core to provide its own
91 * implementation (cppc_scale_freq_tick()) of topology_scale_freq_tick() which
92 * gets called by the scheduler on every tick.
93 *
94 * Note that the arch specific counters have higher priority than CPPC counters,
95 * if available, though the CPPC driver doesn't need to have any special
96 * handling for that.
97 *
98 * On an invocation of cppc_scale_freq_tick(), we schedule an irq work (since we
99 * reach here from hard-irq context), which then schedules a normal work item
100 * and cppc_scale_freq_workfn() updates the per_cpu arch_freq_scale variable
101 * based on the counter updates since the last tick.
102 */
103static void cppc_scale_freq_workfn(struct kthread_work *work)
104{
105 struct cppc_freq_invariance *cppc_fi;
106 struct cppc_perf_fb_ctrs fb_ctrs = {0};
107 struct cppc_cpudata *cpu_data;
108 unsigned long local_freq_scale;
109 u64 perf;
110
111 cppc_fi = container_of(work, struct cppc_freq_invariance, work);
112 cpu_data = cppc_fi->cpu_data;
113
114 if (cppc_get_perf_ctrs(cppc_fi->cpu, &fb_ctrs)) {
115 pr_warn("%s: failed to read perf counters\n", __func__);
116 return;
117 }
118
119 perf = cppc_perf_from_fbctrs(cpu_data, &cppc_fi->prev_perf_fb_ctrs,
120 &fb_ctrs);
121 cppc_fi->prev_perf_fb_ctrs = fb_ctrs;
122
123 perf <<= SCHED_CAPACITY_SHIFT;
124 local_freq_scale = div64_u64(perf, cpu_data->perf_caps.highest_perf);
125
126 /* This can happen due to counter's overflow */
127 if (unlikely(local_freq_scale > 1024))
128 local_freq_scale = 1024;
129
130 per_cpu(arch_freq_scale, cppc_fi->cpu) = local_freq_scale;
131}
132
133static void cppc_irq_work(struct irq_work *irq_work)
134{
135 struct cppc_freq_invariance *cppc_fi;
136
137 cppc_fi = container_of(irq_work, struct cppc_freq_invariance, irq_work);
138 kthread_queue_work(kworker_fie, &cppc_fi->work);
139}
140
141static void cppc_scale_freq_tick(void)
142{
143 struct cppc_freq_invariance *cppc_fi = &per_cpu(cppc_freq_inv, smp_processor_id());
144
145 /*
146 * cppc_get_perf_ctrs() can potentially sleep, call that from the right
147 * context.
148 */
149 irq_work_queue(&cppc_fi->irq_work);
150}
151
152static struct scale_freq_data cppc_sftd = {
153 .source = SCALE_FREQ_SOURCE_CPPC,
154 .set_freq_scale = cppc_scale_freq_tick,
155};
156
157static void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy)
158{
159 struct cppc_freq_invariance *cppc_fi;
160 int cpu, ret;
161
162 if (fie_disabled)
163 return;
164
165 for_each_cpu(cpu, policy->cpus) {
166 cppc_fi = &per_cpu(cppc_freq_inv, cpu);
167 cppc_fi->cpu = cpu;
168 cppc_fi->cpu_data = policy->driver_data;
169 kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn);
170 init_irq_work(&cppc_fi->irq_work, cppc_irq_work);
171
172 ret = cppc_get_perf_ctrs(cpu, &cppc_fi->prev_perf_fb_ctrs);
173 if (ret) {
174 pr_warn("%s: failed to read perf counters for cpu:%d: %d\n",
175 __func__, cpu, ret);
176
177 /*
178 * Don't abort if the CPU was offline while the driver
179 * was getting registered.
180 */
181 if (cpu_online(cpu))
182 return;
183 }
184 }
185
186 /* Register for freq-invariance */
187 topology_set_scale_freq_source(&cppc_sftd, policy->cpus);
188}
189
190/*
191 * We free all the resources on policy's removal and not on CPU removal as the
192 * irq-work are per-cpu and the hotplug core takes care of flushing the pending
193 * irq-works (hint: smpcfd_dying_cpu()) on CPU hotplug. Even if the kthread-work
194 * fires on another CPU after the concerned CPU is removed, it won't harm.
195 *
196 * We just need to make sure to remove them all on policy->exit().
197 */
198static void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy)
199{
200 struct cppc_freq_invariance *cppc_fi;
201 int cpu;
202
203 if (fie_disabled)
204 return;
205
206 /* policy->cpus will be empty here, use related_cpus instead */
207 topology_clear_scale_freq_source(SCALE_FREQ_SOURCE_CPPC, policy->related_cpus);
208
209 for_each_cpu(cpu, policy->related_cpus) {
210 cppc_fi = &per_cpu(cppc_freq_inv, cpu);
211 irq_work_sync(&cppc_fi->irq_work);
212 kthread_cancel_work_sync(&cppc_fi->work);
213 }
214}
215
216static void __init cppc_freq_invariance_init(void)
217{
218 struct sched_attr attr = {
219 .size = sizeof(struct sched_attr),
220 .sched_policy = SCHED_DEADLINE,
221 .sched_nice = 0,
222 .sched_priority = 0,
223 /*
224 * Fake (unused) bandwidth; workaround to "fix"
225 * priority inheritance.
226 */
227 .sched_runtime = 1000000,
228 .sched_deadline = 10000000,
229 .sched_period = 10000000,
230 };
231 int ret;
232
233 if (fie_disabled != FIE_ENABLED && fie_disabled != FIE_DISABLED) {
234 fie_disabled = FIE_ENABLED;
235 if (cppc_perf_ctrs_in_pcc()) {
236 pr_info("FIE not enabled on systems with registers in PCC\n");
237 fie_disabled = FIE_DISABLED;
238 }
239 }
240
241 if (fie_disabled)
242 return;
243
244 kworker_fie = kthread_create_worker(0, "cppc_fie");
245 if (IS_ERR(kworker_fie)) {
246 pr_warn("%s: failed to create kworker_fie: %ld\n", __func__,
247 PTR_ERR(kworker_fie));
248 fie_disabled = FIE_DISABLED;
249 return;
250 }
251
252 ret = sched_setattr_nocheck(kworker_fie->task, &attr);
253 if (ret) {
254 pr_warn("%s: failed to set SCHED_DEADLINE: %d\n", __func__,
255 ret);
256 kthread_destroy_worker(kworker_fie);
257 fie_disabled = FIE_DISABLED;
258 }
259}
260
261static void cppc_freq_invariance_exit(void)
262{
263 if (fie_disabled)
264 return;
265
266 kthread_destroy_worker(kworker_fie);
267}
268
269#else
270static inline void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy)
271{
272}
273
274static inline void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy)
275{
276}
277
278static inline void cppc_freq_invariance_init(void)
279{
280}
281
282static inline void cppc_freq_invariance_exit(void)
283{
284}
285#endif /* CONFIG_ACPI_CPPC_CPUFREQ_FIE */
286
287static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
288 unsigned int target_freq,
289 unsigned int relation)
290{
291 struct cppc_cpudata *cpu_data = policy->driver_data;
292 unsigned int cpu = policy->cpu;
293 struct cpufreq_freqs freqs;
294 u32 desired_perf;
295 int ret = 0;
296
297 desired_perf = cppc_khz_to_perf(&cpu_data->perf_caps, target_freq);
298 /* Return if it is exactly the same perf */
299 if (desired_perf == cpu_data->perf_ctrls.desired_perf)
300 return ret;
301
302 cpu_data->perf_ctrls.desired_perf = desired_perf;
303 freqs.old = policy->cur;
304 freqs.new = target_freq;
305
306 cpufreq_freq_transition_begin(policy, &freqs);
307 ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
308 cpufreq_freq_transition_end(policy, &freqs, ret != 0);
309
310 if (ret)
311 pr_debug("Failed to set target on CPU:%d. ret:%d\n",
312 cpu, ret);
313
314 return ret;
315}
316
317static unsigned int cppc_cpufreq_fast_switch(struct cpufreq_policy *policy,
318 unsigned int target_freq)
319{
320 struct cppc_cpudata *cpu_data = policy->driver_data;
321 unsigned int cpu = policy->cpu;
322 u32 desired_perf;
323 int ret;
324
325 desired_perf = cppc_khz_to_perf(&cpu_data->perf_caps, target_freq);
326 cpu_data->perf_ctrls.desired_perf = desired_perf;
327 ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
328
329 if (ret) {
330 pr_debug("Failed to set target on CPU:%d. ret:%d\n",
331 cpu, ret);
332 return 0;
333 }
334
335 return target_freq;
336}
337
338static int cppc_verify_policy(struct cpufreq_policy_data *policy)
339{
340 cpufreq_verify_within_cpu_limits(policy);
341 return 0;
342}
343
344/*
345 * The PCC subspace describes the rate at which platform can accept commands
346 * on the shared PCC channel (including READs which do not count towards freq
347 * transition requests), so ideally we need to use the PCC values as a fallback
348 * if we don't have a platform specific transition_delay_us
349 */
350#ifdef CONFIG_ARM64
351#include <asm/cputype.h>
352
353static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
354{
355 unsigned long implementor = read_cpuid_implementor();
356 unsigned long part_num = read_cpuid_part_number();
357
358 switch (implementor) {
359 case ARM_CPU_IMP_QCOM:
360 switch (part_num) {
361 case QCOM_CPU_PART_FALKOR_V1:
362 case QCOM_CPU_PART_FALKOR:
363 return 10000;
364 }
365 }
366 return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
367}
368#else
369static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
370{
371 return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
372}
373#endif
374
375#if defined(CONFIG_ARM64) && defined(CONFIG_ENERGY_MODEL)
376
377static DEFINE_PER_CPU(unsigned int, efficiency_class);
378static void cppc_cpufreq_register_em(struct cpufreq_policy *policy);
379
380/* Create an artificial performance state every CPPC_EM_CAP_STEP capacity unit. */
381#define CPPC_EM_CAP_STEP (20)
382/* Increase the cost value by CPPC_EM_COST_STEP every performance state. */
383#define CPPC_EM_COST_STEP (1)
384/* Add a cost gap correspnding to the energy of 4 CPUs. */
385#define CPPC_EM_COST_GAP (4 * SCHED_CAPACITY_SCALE * CPPC_EM_COST_STEP \
386 / CPPC_EM_CAP_STEP)
387
388static unsigned int get_perf_level_count(struct cpufreq_policy *policy)
389{
390 struct cppc_perf_caps *perf_caps;
391 unsigned int min_cap, max_cap;
392 struct cppc_cpudata *cpu_data;
393 int cpu = policy->cpu;
394
395 cpu_data = policy->driver_data;
396 perf_caps = &cpu_data->perf_caps;
397 max_cap = arch_scale_cpu_capacity(cpu);
398 min_cap = div_u64((u64)max_cap * perf_caps->lowest_perf,
399 perf_caps->highest_perf);
400 if ((min_cap == 0) || (max_cap < min_cap))
401 return 0;
402 return 1 + max_cap / CPPC_EM_CAP_STEP - min_cap / CPPC_EM_CAP_STEP;
403}
404
405/*
406 * The cost is defined as:
407 * cost = power * max_frequency / frequency
408 */
409static inline unsigned long compute_cost(int cpu, int step)
410{
411 return CPPC_EM_COST_GAP * per_cpu(efficiency_class, cpu) +
412 step * CPPC_EM_COST_STEP;
413}
414
415static int cppc_get_cpu_power(struct device *cpu_dev,
416 unsigned long *power, unsigned long *KHz)
417{
418 unsigned long perf_step, perf_prev, perf, perf_check;
419 unsigned int min_step, max_step, step, step_check;
420 unsigned long prev_freq = *KHz;
421 unsigned int min_cap, max_cap;
422 struct cpufreq_policy *policy;
423
424 struct cppc_perf_caps *perf_caps;
425 struct cppc_cpudata *cpu_data;
426
427 policy = cpufreq_cpu_get_raw(cpu_dev->id);
428 cpu_data = policy->driver_data;
429 perf_caps = &cpu_data->perf_caps;
430 max_cap = arch_scale_cpu_capacity(cpu_dev->id);
431 min_cap = div_u64((u64)max_cap * perf_caps->lowest_perf,
432 perf_caps->highest_perf);
433 perf_step = div_u64((u64)CPPC_EM_CAP_STEP * perf_caps->highest_perf,
434 max_cap);
435 min_step = min_cap / CPPC_EM_CAP_STEP;
436 max_step = max_cap / CPPC_EM_CAP_STEP;
437
438 perf_prev = cppc_khz_to_perf(perf_caps, *KHz);
439 step = perf_prev / perf_step;
440
441 if (step > max_step)
442 return -EINVAL;
443
444 if (min_step == max_step) {
445 step = max_step;
446 perf = perf_caps->highest_perf;
447 } else if (step < min_step) {
448 step = min_step;
449 perf = perf_caps->lowest_perf;
450 } else {
451 step++;
452 if (step == max_step)
453 perf = perf_caps->highest_perf;
454 else
455 perf = step * perf_step;
456 }
457
458 *KHz = cppc_perf_to_khz(perf_caps, perf);
459 perf_check = cppc_khz_to_perf(perf_caps, *KHz);
460 step_check = perf_check / perf_step;
461
462 /*
463 * To avoid bad integer approximation, check that new frequency value
464 * increased and that the new frequency will be converted to the
465 * desired step value.
466 */
467 while ((*KHz == prev_freq) || (step_check != step)) {
468 perf++;
469 *KHz = cppc_perf_to_khz(perf_caps, perf);
470 perf_check = cppc_khz_to_perf(perf_caps, *KHz);
471 step_check = perf_check / perf_step;
472 }
473
474 /*
475 * With an artificial EM, only the cost value is used. Still the power
476 * is populated such as 0 < power < EM_MAX_POWER. This allows to add
477 * more sense to the artificial performance states.
478 */
479 *power = compute_cost(cpu_dev->id, step);
480
481 return 0;
482}
483
484static int cppc_get_cpu_cost(struct device *cpu_dev, unsigned long KHz,
485 unsigned long *cost)
486{
487 unsigned long perf_step, perf_prev;
488 struct cppc_perf_caps *perf_caps;
489 struct cpufreq_policy *policy;
490 struct cppc_cpudata *cpu_data;
491 unsigned int max_cap;
492 int step;
493
494 policy = cpufreq_cpu_get_raw(cpu_dev->id);
495 cpu_data = policy->driver_data;
496 perf_caps = &cpu_data->perf_caps;
497 max_cap = arch_scale_cpu_capacity(cpu_dev->id);
498
499 perf_prev = cppc_khz_to_perf(perf_caps, KHz);
500 perf_step = CPPC_EM_CAP_STEP * perf_caps->highest_perf / max_cap;
501 step = perf_prev / perf_step;
502
503 *cost = compute_cost(cpu_dev->id, step);
504
505 return 0;
506}
507
508static int populate_efficiency_class(void)
509{
510 struct acpi_madt_generic_interrupt *gicc;
511 DECLARE_BITMAP(used_classes, 256) = {};
512 int class, cpu, index;
513
514 for_each_possible_cpu(cpu) {
515 gicc = acpi_cpu_get_madt_gicc(cpu);
516 class = gicc->efficiency_class;
517 bitmap_set(used_classes, class, 1);
518 }
519
520 if (bitmap_weight(used_classes, 256) <= 1) {
521 pr_debug("Efficiency classes are all equal (=%d). "
522 "No EM registered", class);
523 return -EINVAL;
524 }
525
526 /*
527 * Squeeze efficiency class values on [0:#efficiency_class-1].
528 * Values are per spec in [0:255].
529 */
530 index = 0;
531 for_each_set_bit(class, used_classes, 256) {
532 for_each_possible_cpu(cpu) {
533 gicc = acpi_cpu_get_madt_gicc(cpu);
534 if (gicc->efficiency_class == class)
535 per_cpu(efficiency_class, cpu) = index;
536 }
537 index++;
538 }
539 cppc_cpufreq_driver.register_em = cppc_cpufreq_register_em;
540
541 return 0;
542}
543
544static void cppc_cpufreq_register_em(struct cpufreq_policy *policy)
545{
546 struct cppc_cpudata *cpu_data;
547 struct em_data_callback em_cb =
548 EM_ADV_DATA_CB(cppc_get_cpu_power, cppc_get_cpu_cost);
549
550 cpu_data = policy->driver_data;
551 em_dev_register_perf_domain(get_cpu_device(policy->cpu),
552 get_perf_level_count(policy), &em_cb,
553 cpu_data->shared_cpu_map, 0);
554}
555
556#else
557static int populate_efficiency_class(void)
558{
559 return 0;
560}
561#endif
562
563static struct cppc_cpudata *cppc_cpufreq_get_cpu_data(unsigned int cpu)
564{
565 struct cppc_cpudata *cpu_data;
566 int ret;
567
568 cpu_data = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
569 if (!cpu_data)
570 goto out;
571
572 if (!zalloc_cpumask_var(&cpu_data->shared_cpu_map, GFP_KERNEL))
573 goto free_cpu;
574
575 ret = acpi_get_psd_map(cpu, cpu_data);
576 if (ret) {
577 pr_debug("Err parsing CPU%d PSD data: ret:%d\n", cpu, ret);
578 goto free_mask;
579 }
580
581 ret = cppc_get_perf_caps(cpu, &cpu_data->perf_caps);
582 if (ret) {
583 pr_debug("Err reading CPU%d perf caps: ret:%d\n", cpu, ret);
584 goto free_mask;
585 }
586
587 list_add(&cpu_data->node, &cpu_data_list);
588
589 return cpu_data;
590
591free_mask:
592 free_cpumask_var(cpu_data->shared_cpu_map);
593free_cpu:
594 kfree(cpu_data);
595out:
596 return NULL;
597}
598
599static void cppc_cpufreq_put_cpu_data(struct cpufreq_policy *policy)
600{
601 struct cppc_cpudata *cpu_data = policy->driver_data;
602
603 list_del(&cpu_data->node);
604 free_cpumask_var(cpu_data->shared_cpu_map);
605 kfree(cpu_data);
606 policy->driver_data = NULL;
607}
608
609static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
610{
611 unsigned int cpu = policy->cpu;
612 struct cppc_cpudata *cpu_data;
613 struct cppc_perf_caps *caps;
614 int ret;
615
616 cpu_data = cppc_cpufreq_get_cpu_data(cpu);
617 if (!cpu_data) {
618 pr_err("Error in acquiring _CPC/_PSD data for CPU%d.\n", cpu);
619 return -ENODEV;
620 }
621 caps = &cpu_data->perf_caps;
622 policy->driver_data = cpu_data;
623
624 /*
625 * Set min to lowest nonlinear perf to avoid any efficiency penalty (see
626 * Section 8.4.7.1.1.5 of ACPI 6.1 spec)
627 */
628 policy->min = cppc_perf_to_khz(caps, caps->lowest_nonlinear_perf);
629 policy->max = cppc_perf_to_khz(caps, caps->nominal_perf);
630
631 /*
632 * Set cpuinfo.min_freq to Lowest to make the full range of performance
633 * available if userspace wants to use any perf between lowest & lowest
634 * nonlinear perf
635 */
636 policy->cpuinfo.min_freq = cppc_perf_to_khz(caps, caps->lowest_perf);
637 policy->cpuinfo.max_freq = cppc_perf_to_khz(caps, caps->nominal_perf);
638
639 policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu);
640 policy->shared_type = cpu_data->shared_type;
641
642 switch (policy->shared_type) {
643 case CPUFREQ_SHARED_TYPE_HW:
644 case CPUFREQ_SHARED_TYPE_NONE:
645 /* Nothing to be done - we'll have a policy for each CPU */
646 break;
647 case CPUFREQ_SHARED_TYPE_ANY:
648 /*
649 * All CPUs in the domain will share a policy and all cpufreq
650 * operations will use a single cppc_cpudata structure stored
651 * in policy->driver_data.
652 */
653 cpumask_copy(policy->cpus, cpu_data->shared_cpu_map);
654 break;
655 default:
656 pr_debug("Unsupported CPU co-ord type: %d\n",
657 policy->shared_type);
658 ret = -EFAULT;
659 goto out;
660 }
661
662 policy->fast_switch_possible = cppc_allow_fast_switch();
663 policy->dvfs_possible_from_any_cpu = true;
664
665 /*
666 * If 'highest_perf' is greater than 'nominal_perf', we assume CPU Boost
667 * is supported.
668 */
669 if (caps->highest_perf > caps->nominal_perf)
670 boost_supported = true;
671
672 /* Set policy->cur to max now. The governors will adjust later. */
673 policy->cur = cppc_perf_to_khz(caps, caps->highest_perf);
674 cpu_data->perf_ctrls.desired_perf = caps->highest_perf;
675
676 ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
677 if (ret) {
678 pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
679 caps->highest_perf, cpu, ret);
680 goto out;
681 }
682
683 cppc_cpufreq_cpu_fie_init(policy);
684 return 0;
685
686out:
687 cppc_cpufreq_put_cpu_data(policy);
688 return ret;
689}
690
691static int cppc_cpufreq_cpu_exit(struct cpufreq_policy *policy)
692{
693 struct cppc_cpudata *cpu_data = policy->driver_data;
694 struct cppc_perf_caps *caps = &cpu_data->perf_caps;
695 unsigned int cpu = policy->cpu;
696 int ret;
697
698 cppc_cpufreq_cpu_fie_exit(policy);
699
700 cpu_data->perf_ctrls.desired_perf = caps->lowest_perf;
701
702 ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
703 if (ret)
704 pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
705 caps->lowest_perf, cpu, ret);
706
707 cppc_cpufreq_put_cpu_data(policy);
708 return 0;
709}
710
711static inline u64 get_delta(u64 t1, u64 t0)
712{
713 if (t1 > t0 || t0 > ~(u32)0)
714 return t1 - t0;
715
716 return (u32)t1 - (u32)t0;
717}
718
719static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data,
720 struct cppc_perf_fb_ctrs *fb_ctrs_t0,
721 struct cppc_perf_fb_ctrs *fb_ctrs_t1)
722{
723 u64 delta_reference, delta_delivered;
724 u64 reference_perf;
725
726 reference_perf = fb_ctrs_t0->reference_perf;
727
728 delta_reference = get_delta(fb_ctrs_t1->reference,
729 fb_ctrs_t0->reference);
730 delta_delivered = get_delta(fb_ctrs_t1->delivered,
731 fb_ctrs_t0->delivered);
732
733 /* Check to avoid divide-by zero and invalid delivered_perf */
734 if (!delta_reference || !delta_delivered)
735 return cpu_data->perf_ctrls.desired_perf;
736
737 return (reference_perf * delta_delivered) / delta_reference;
738}
739
740static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)
741{
742 struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};
743 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
744 struct cppc_cpudata *cpu_data = policy->driver_data;
745 u64 delivered_perf;
746 int ret;
747
748 cpufreq_cpu_put(policy);
749
750 ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t0);
751 if (ret)
752 return 0;
753
754 udelay(2); /* 2usec delay between sampling */
755
756 ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t1);
757 if (ret)
758 return 0;
759
760 delivered_perf = cppc_perf_from_fbctrs(cpu_data, &fb_ctrs_t0,
761 &fb_ctrs_t1);
762
763 return cppc_perf_to_khz(&cpu_data->perf_caps, delivered_perf);
764}
765
766static int cppc_cpufreq_set_boost(struct cpufreq_policy *policy, int state)
767{
768 struct cppc_cpudata *cpu_data = policy->driver_data;
769 struct cppc_perf_caps *caps = &cpu_data->perf_caps;
770 int ret;
771
772 if (!boost_supported) {
773 pr_err("BOOST not supported by CPU or firmware\n");
774 return -EINVAL;
775 }
776
777 if (state)
778 policy->max = cppc_perf_to_khz(caps, caps->highest_perf);
779 else
780 policy->max = cppc_perf_to_khz(caps, caps->nominal_perf);
781 policy->cpuinfo.max_freq = policy->max;
782
783 ret = freq_qos_update_request(policy->max_freq_req, policy->max);
784 if (ret < 0)
785 return ret;
786
787 return 0;
788}
789
790static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
791{
792 struct cppc_cpudata *cpu_data = policy->driver_data;
793
794 return cpufreq_show_cpus(cpu_data->shared_cpu_map, buf);
795}
796cpufreq_freq_attr_ro(freqdomain_cpus);
797
798static struct freq_attr *cppc_cpufreq_attr[] = {
799 &freqdomain_cpus,
800 NULL,
801};
802
803static struct cpufreq_driver cppc_cpufreq_driver = {
804 .flags = CPUFREQ_CONST_LOOPS,
805 .verify = cppc_verify_policy,
806 .target = cppc_cpufreq_set_target,
807 .get = cppc_cpufreq_get_rate,
808 .fast_switch = cppc_cpufreq_fast_switch,
809 .init = cppc_cpufreq_cpu_init,
810 .exit = cppc_cpufreq_cpu_exit,
811 .set_boost = cppc_cpufreq_set_boost,
812 .attr = cppc_cpufreq_attr,
813 .name = "cppc_cpufreq",
814};
815
816/*
817 * HISI platform does not support delivered performance counter and
818 * reference performance counter. It can calculate the performance using the
819 * platform specific mechanism. We reuse the desired performance register to
820 * store the real performance calculated by the platform.
821 */
822static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu)
823{
824 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
825 struct cppc_cpudata *cpu_data = policy->driver_data;
826 u64 desired_perf;
827 int ret;
828
829 cpufreq_cpu_put(policy);
830
831 ret = cppc_get_desired_perf(cpu, &desired_perf);
832 if (ret < 0)
833 return -EIO;
834
835 return cppc_perf_to_khz(&cpu_data->perf_caps, desired_perf);
836}
837
838static void cppc_check_hisi_workaround(void)
839{
840 struct acpi_table_header *tbl;
841 acpi_status status = AE_OK;
842 int i;
843
844 status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);
845 if (ACPI_FAILURE(status) || !tbl)
846 return;
847
848 for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
849 if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
850 !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
851 wa_info[i].oem_revision == tbl->oem_revision) {
852 /* Overwrite the get() callback */
853 cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
854 fie_disabled = FIE_DISABLED;
855 break;
856 }
857 }
858
859 acpi_put_table(tbl);
860}
861
862static int __init cppc_cpufreq_init(void)
863{
864 int ret;
865
866 if (!acpi_cpc_valid())
867 return -ENODEV;
868
869 cppc_check_hisi_workaround();
870 cppc_freq_invariance_init();
871 populate_efficiency_class();
872
873 ret = cpufreq_register_driver(&cppc_cpufreq_driver);
874 if (ret)
875 cppc_freq_invariance_exit();
876
877 return ret;
878}
879
880static inline void free_cpu_data(void)
881{
882 struct cppc_cpudata *iter, *tmp;
883
884 list_for_each_entry_safe(iter, tmp, &cpu_data_list, node) {
885 free_cpumask_var(iter->shared_cpu_map);
886 list_del(&iter->node);
887 kfree(iter);
888 }
889
890}
891
892static void __exit cppc_cpufreq_exit(void)
893{
894 cpufreq_unregister_driver(&cppc_cpufreq_driver);
895 cppc_freq_invariance_exit();
896
897 free_cpu_data();
898}
899
900module_exit(cppc_cpufreq_exit);
901MODULE_AUTHOR("Ashwin Chaugule");
902MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
903MODULE_LICENSE("GPL");
904
905late_initcall(cppc_cpufreq_init);
906
907static const struct acpi_device_id cppc_acpi_ids[] __used = {
908 {ACPI_PROCESSOR_DEVICE_HID, },
909 {}
910};
911
912MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * CPPC (Collaborative Processor Performance Control) driver for
4 * interfacing with the CPUfreq layer and governors. See
5 * cppc_acpi.c for CPPC specific methods.
6 *
7 * (C) Copyright 2014, 2015 Linaro Ltd.
8 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
9 */
10
11#define pr_fmt(fmt) "CPPC Cpufreq:" fmt
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/delay.h>
16#include <linux/cpu.h>
17#include <linux/cpufreq.h>
18#include <linux/dmi.h>
19#include <linux/time.h>
20#include <linux/vmalloc.h>
21
22#include <asm/unaligned.h>
23
24#include <acpi/cppc_acpi.h>
25
26/* Minimum struct length needed for the DMI processor entry we want */
27#define DMI_ENTRY_PROCESSOR_MIN_LENGTH 48
28
29/* Offest in the DMI processor structure for the max frequency */
30#define DMI_PROCESSOR_MAX_SPEED 0x14
31
32/*
33 * These structs contain information parsed from per CPU
34 * ACPI _CPC structures.
35 * e.g. For each CPU the highest, lowest supported
36 * performance capabilities, desired performance level
37 * requested etc.
38 */
39static struct cppc_cpudata **all_cpu_data;
40static bool boost_supported;
41
42struct cppc_workaround_oem_info {
43 char oem_id[ACPI_OEM_ID_SIZE + 1];
44 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
45 u32 oem_revision;
46};
47
48static struct cppc_workaround_oem_info wa_info[] = {
49 {
50 .oem_id = "HISI ",
51 .oem_table_id = "HIP07 ",
52 .oem_revision = 0,
53 }, {
54 .oem_id = "HISI ",
55 .oem_table_id = "HIP08 ",
56 .oem_revision = 0,
57 }
58};
59
60/* Callback function used to retrieve the max frequency from DMI */
61static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private)
62{
63 const u8 *dmi_data = (const u8 *)dm;
64 u16 *mhz = (u16 *)private;
65
66 if (dm->type == DMI_ENTRY_PROCESSOR &&
67 dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) {
68 u16 val = (u16)get_unaligned((const u16 *)
69 (dmi_data + DMI_PROCESSOR_MAX_SPEED));
70 *mhz = val > *mhz ? val : *mhz;
71 }
72}
73
74/* Look up the max frequency in DMI */
75static u64 cppc_get_dmi_max_khz(void)
76{
77 u16 mhz = 0;
78
79 dmi_walk(cppc_find_dmi_mhz, &mhz);
80
81 /*
82 * Real stupid fallback value, just in case there is no
83 * actual value set.
84 */
85 mhz = mhz ? mhz : 1;
86
87 return (1000 * mhz);
88}
89
90/*
91 * If CPPC lowest_freq and nominal_freq registers are exposed then we can
92 * use them to convert perf to freq and vice versa
93 *
94 * If the perf/freq point lies between Nominal and Lowest, we can treat
95 * (Low perf, Low freq) and (Nom Perf, Nom freq) as 2D co-ordinates of a line
96 * and extrapolate the rest
97 * For perf/freq > Nominal, we use the ratio perf:freq at Nominal for conversion
98 */
99static unsigned int cppc_cpufreq_perf_to_khz(struct cppc_cpudata *cpu,
100 unsigned int perf)
101{
102 static u64 max_khz;
103 struct cppc_perf_caps *caps = &cpu->perf_caps;
104 u64 mul, div;
105
106 if (caps->lowest_freq && caps->nominal_freq) {
107 if (perf >= caps->nominal_perf) {
108 mul = caps->nominal_freq;
109 div = caps->nominal_perf;
110 } else {
111 mul = caps->nominal_freq - caps->lowest_freq;
112 div = caps->nominal_perf - caps->lowest_perf;
113 }
114 } else {
115 if (!max_khz)
116 max_khz = cppc_get_dmi_max_khz();
117 mul = max_khz;
118 div = caps->highest_perf;
119 }
120 return (u64)perf * mul / div;
121}
122
123static unsigned int cppc_cpufreq_khz_to_perf(struct cppc_cpudata *cpu,
124 unsigned int freq)
125{
126 static u64 max_khz;
127 struct cppc_perf_caps *caps = &cpu->perf_caps;
128 u64 mul, div;
129
130 if (caps->lowest_freq && caps->nominal_freq) {
131 if (freq >= caps->nominal_freq) {
132 mul = caps->nominal_perf;
133 div = caps->nominal_freq;
134 } else {
135 mul = caps->lowest_perf;
136 div = caps->lowest_freq;
137 }
138 } else {
139 if (!max_khz)
140 max_khz = cppc_get_dmi_max_khz();
141 mul = caps->highest_perf;
142 div = max_khz;
143 }
144
145 return (u64)freq * mul / div;
146}
147
148static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
149 unsigned int target_freq,
150 unsigned int relation)
151{
152 struct cppc_cpudata *cpu;
153 struct cpufreq_freqs freqs;
154 u32 desired_perf;
155 int ret = 0;
156
157 cpu = all_cpu_data[policy->cpu];
158
159 desired_perf = cppc_cpufreq_khz_to_perf(cpu, target_freq);
160 /* Return if it is exactly the same perf */
161 if (desired_perf == cpu->perf_ctrls.desired_perf)
162 return ret;
163
164 cpu->perf_ctrls.desired_perf = desired_perf;
165 freqs.old = policy->cur;
166 freqs.new = target_freq;
167
168 cpufreq_freq_transition_begin(policy, &freqs);
169 ret = cppc_set_perf(cpu->cpu, &cpu->perf_ctrls);
170 cpufreq_freq_transition_end(policy, &freqs, ret != 0);
171
172 if (ret)
173 pr_debug("Failed to set target on CPU:%d. ret:%d\n",
174 cpu->cpu, ret);
175
176 return ret;
177}
178
179static int cppc_verify_policy(struct cpufreq_policy_data *policy)
180{
181 cpufreq_verify_within_cpu_limits(policy);
182 return 0;
183}
184
185static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy)
186{
187 int cpu_num = policy->cpu;
188 struct cppc_cpudata *cpu = all_cpu_data[cpu_num];
189 int ret;
190
191 cpu->perf_ctrls.desired_perf = cpu->perf_caps.lowest_perf;
192
193 ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
194 if (ret)
195 pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
196 cpu->perf_caps.lowest_perf, cpu_num, ret);
197}
198
199/*
200 * The PCC subspace describes the rate at which platform can accept commands
201 * on the shared PCC channel (including READs which do not count towards freq
202 * trasition requests), so ideally we need to use the PCC values as a fallback
203 * if we don't have a platform specific transition_delay_us
204 */
205#ifdef CONFIG_ARM64
206#include <asm/cputype.h>
207
208static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
209{
210 unsigned long implementor = read_cpuid_implementor();
211 unsigned long part_num = read_cpuid_part_number();
212 unsigned int delay_us = 0;
213
214 switch (implementor) {
215 case ARM_CPU_IMP_QCOM:
216 switch (part_num) {
217 case QCOM_CPU_PART_FALKOR_V1:
218 case QCOM_CPU_PART_FALKOR:
219 delay_us = 10000;
220 break;
221 default:
222 delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
223 break;
224 }
225 break;
226 default:
227 delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
228 break;
229 }
230
231 return delay_us;
232}
233
234#else
235
236static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
237{
238 return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
239}
240#endif
241
242static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
243{
244 struct cppc_cpudata *cpu;
245 unsigned int cpu_num = policy->cpu;
246 int ret = 0;
247
248 cpu = all_cpu_data[policy->cpu];
249
250 cpu->cpu = cpu_num;
251 ret = cppc_get_perf_caps(policy->cpu, &cpu->perf_caps);
252
253 if (ret) {
254 pr_debug("Err reading CPU%d perf capabilities. ret:%d\n",
255 cpu_num, ret);
256 return ret;
257 }
258
259 /* Convert the lowest and nominal freq from MHz to KHz */
260 cpu->perf_caps.lowest_freq *= 1000;
261 cpu->perf_caps.nominal_freq *= 1000;
262
263 /*
264 * Set min to lowest nonlinear perf to avoid any efficiency penalty (see
265 * Section 8.4.7.1.1.5 of ACPI 6.1 spec)
266 */
267 policy->min = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.lowest_nonlinear_perf);
268 policy->max = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.nominal_perf);
269
270 /*
271 * Set cpuinfo.min_freq to Lowest to make the full range of performance
272 * available if userspace wants to use any perf between lowest & lowest
273 * nonlinear perf
274 */
275 policy->cpuinfo.min_freq = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.lowest_perf);
276 policy->cpuinfo.max_freq = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.nominal_perf);
277
278 policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu_num);
279 policy->shared_type = cpu->shared_type;
280
281 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
282 int i;
283
284 cpumask_copy(policy->cpus, cpu->shared_cpu_map);
285
286 for_each_cpu(i, policy->cpus) {
287 if (unlikely(i == policy->cpu))
288 continue;
289
290 memcpy(&all_cpu_data[i]->perf_caps, &cpu->perf_caps,
291 sizeof(cpu->perf_caps));
292 }
293 } else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) {
294 /* Support only SW_ANY for now. */
295 pr_debug("Unsupported CPU co-ord type\n");
296 return -EFAULT;
297 }
298
299 cpu->cur_policy = policy;
300
301 /*
302 * If 'highest_perf' is greater than 'nominal_perf', we assume CPU Boost
303 * is supported.
304 */
305 if (cpu->perf_caps.highest_perf > cpu->perf_caps.nominal_perf)
306 boost_supported = true;
307
308 /* Set policy->cur to max now. The governors will adjust later. */
309 policy->cur = cppc_cpufreq_perf_to_khz(cpu,
310 cpu->perf_caps.highest_perf);
311 cpu->perf_ctrls.desired_perf = cpu->perf_caps.highest_perf;
312
313 ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
314 if (ret)
315 pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
316 cpu->perf_caps.highest_perf, cpu_num, ret);
317
318 return ret;
319}
320
321static inline u64 get_delta(u64 t1, u64 t0)
322{
323 if (t1 > t0 || t0 > ~(u32)0)
324 return t1 - t0;
325
326 return (u32)t1 - (u32)t0;
327}
328
329static int cppc_get_rate_from_fbctrs(struct cppc_cpudata *cpu,
330 struct cppc_perf_fb_ctrs fb_ctrs_t0,
331 struct cppc_perf_fb_ctrs fb_ctrs_t1)
332{
333 u64 delta_reference, delta_delivered;
334 u64 reference_perf, delivered_perf;
335
336 reference_perf = fb_ctrs_t0.reference_perf;
337
338 delta_reference = get_delta(fb_ctrs_t1.reference,
339 fb_ctrs_t0.reference);
340 delta_delivered = get_delta(fb_ctrs_t1.delivered,
341 fb_ctrs_t0.delivered);
342
343 /* Check to avoid divide-by zero */
344 if (delta_reference || delta_delivered)
345 delivered_perf = (reference_perf * delta_delivered) /
346 delta_reference;
347 else
348 delivered_perf = cpu->perf_ctrls.desired_perf;
349
350 return cppc_cpufreq_perf_to_khz(cpu, delivered_perf);
351}
352
353static unsigned int cppc_cpufreq_get_rate(unsigned int cpunum)
354{
355 struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};
356 struct cppc_cpudata *cpu = all_cpu_data[cpunum];
357 int ret;
358
359 ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t0);
360 if (ret)
361 return ret;
362
363 udelay(2); /* 2usec delay between sampling */
364
365 ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t1);
366 if (ret)
367 return ret;
368
369 return cppc_get_rate_from_fbctrs(cpu, fb_ctrs_t0, fb_ctrs_t1);
370}
371
372static int cppc_cpufreq_set_boost(struct cpufreq_policy *policy, int state)
373{
374 struct cppc_cpudata *cpudata;
375 int ret;
376
377 if (!boost_supported) {
378 pr_err("BOOST not supported by CPU or firmware\n");
379 return -EINVAL;
380 }
381
382 cpudata = all_cpu_data[policy->cpu];
383 if (state)
384 policy->max = cppc_cpufreq_perf_to_khz(cpudata,
385 cpudata->perf_caps.highest_perf);
386 else
387 policy->max = cppc_cpufreq_perf_to_khz(cpudata,
388 cpudata->perf_caps.nominal_perf);
389 policy->cpuinfo.max_freq = policy->max;
390
391 ret = freq_qos_update_request(policy->max_freq_req, policy->max);
392 if (ret < 0)
393 return ret;
394
395 return 0;
396}
397
398static struct cpufreq_driver cppc_cpufreq_driver = {
399 .flags = CPUFREQ_CONST_LOOPS,
400 .verify = cppc_verify_policy,
401 .target = cppc_cpufreq_set_target,
402 .get = cppc_cpufreq_get_rate,
403 .init = cppc_cpufreq_cpu_init,
404 .stop_cpu = cppc_cpufreq_stop_cpu,
405 .set_boost = cppc_cpufreq_set_boost,
406 .name = "cppc_cpufreq",
407};
408
409/*
410 * HISI platform does not support delivered performance counter and
411 * reference performance counter. It can calculate the performance using the
412 * platform specific mechanism. We reuse the desired performance register to
413 * store the real performance calculated by the platform.
414 */
415static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpunum)
416{
417 struct cppc_cpudata *cpudata = all_cpu_data[cpunum];
418 u64 desired_perf;
419 int ret;
420
421 ret = cppc_get_desired_perf(cpunum, &desired_perf);
422 if (ret < 0)
423 return -EIO;
424
425 return cppc_cpufreq_perf_to_khz(cpudata, desired_perf);
426}
427
428static void cppc_check_hisi_workaround(void)
429{
430 struct acpi_table_header *tbl;
431 acpi_status status = AE_OK;
432 int i;
433
434 status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);
435 if (ACPI_FAILURE(status) || !tbl)
436 return;
437
438 for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
439 if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
440 !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
441 wa_info[i].oem_revision == tbl->oem_revision) {
442 /* Overwrite the get() callback */
443 cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
444 break;
445 }
446 }
447
448 acpi_put_table(tbl);
449}
450
451static int __init cppc_cpufreq_init(void)
452{
453 int i, ret = 0;
454 struct cppc_cpudata *cpu;
455
456 if (acpi_disabled)
457 return -ENODEV;
458
459 all_cpu_data = kcalloc(num_possible_cpus(), sizeof(void *),
460 GFP_KERNEL);
461 if (!all_cpu_data)
462 return -ENOMEM;
463
464 for_each_possible_cpu(i) {
465 all_cpu_data[i] = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
466 if (!all_cpu_data[i])
467 goto out;
468
469 cpu = all_cpu_data[i];
470 if (!zalloc_cpumask_var(&cpu->shared_cpu_map, GFP_KERNEL))
471 goto out;
472 }
473
474 ret = acpi_get_psd_map(all_cpu_data);
475 if (ret) {
476 pr_debug("Error parsing PSD data. Aborting cpufreq registration.\n");
477 goto out;
478 }
479
480 cppc_check_hisi_workaround();
481
482 ret = cpufreq_register_driver(&cppc_cpufreq_driver);
483 if (ret)
484 goto out;
485
486 return ret;
487
488out:
489 for_each_possible_cpu(i) {
490 cpu = all_cpu_data[i];
491 if (!cpu)
492 break;
493 free_cpumask_var(cpu->shared_cpu_map);
494 kfree(cpu);
495 }
496
497 kfree(all_cpu_data);
498 return -ENODEV;
499}
500
501static void __exit cppc_cpufreq_exit(void)
502{
503 struct cppc_cpudata *cpu;
504 int i;
505
506 cpufreq_unregister_driver(&cppc_cpufreq_driver);
507
508 for_each_possible_cpu(i) {
509 cpu = all_cpu_data[i];
510 free_cpumask_var(cpu->shared_cpu_map);
511 kfree(cpu);
512 }
513
514 kfree(all_cpu_data);
515}
516
517module_exit(cppc_cpufreq_exit);
518MODULE_AUTHOR("Ashwin Chaugule");
519MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
520MODULE_LICENSE("GPL");
521
522late_initcall(cppc_cpufreq_init);
523
524static const struct acpi_device_id cppc_acpi_ids[] __used = {
525 {ACPI_PROCESSOR_DEVICE_HID, },
526 {}
527};
528
529MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);