Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4 *
5 * Authors:
6 * Alexander Graf <agraf@suse.de>
7 * Kevin Wolf <mail@kevin-wolf.de>
8 *
9 * Description:
10 * This file is derived from arch/powerpc/kvm/44x.c,
11 * by Hollis Blanchard <hollisb@us.ibm.com>.
12 */
13
14#include <linux/kvm_host.h>
15#include <linux/err.h>
16#include <linux/export.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19#include <linux/miscdevice.h>
20#include <linux/gfp.h>
21#include <linux/sched.h>
22#include <linux/vmalloc.h>
23#include <linux/highmem.h>
24
25#include <asm/reg.h>
26#include <asm/cputable.h>
27#include <asm/cacheflush.h>
28#include <linux/uaccess.h>
29#include <asm/io.h>
30#include <asm/kvm_ppc.h>
31#include <asm/kvm_book3s.h>
32#include <asm/mmu_context.h>
33#include <asm/page.h>
34#include <asm/xive.h>
35
36#include "book3s.h"
37#include "trace.h"
38
39/* #define EXIT_DEBUG */
40
41const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
42 KVM_GENERIC_VM_STATS(),
43 STATS_DESC_ICOUNTER(VM, num_2M_pages),
44 STATS_DESC_ICOUNTER(VM, num_1G_pages)
45};
46
47const struct kvm_stats_header kvm_vm_stats_header = {
48 .name_size = KVM_STATS_NAME_SIZE,
49 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
50 .id_offset = sizeof(struct kvm_stats_header),
51 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
52 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
53 sizeof(kvm_vm_stats_desc),
54};
55
56const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
57 KVM_GENERIC_VCPU_STATS(),
58 STATS_DESC_COUNTER(VCPU, sum_exits),
59 STATS_DESC_COUNTER(VCPU, mmio_exits),
60 STATS_DESC_COUNTER(VCPU, signal_exits),
61 STATS_DESC_COUNTER(VCPU, light_exits),
62 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
63 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
64 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
65 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
66 STATS_DESC_COUNTER(VCPU, syscall_exits),
67 STATS_DESC_COUNTER(VCPU, isi_exits),
68 STATS_DESC_COUNTER(VCPU, dsi_exits),
69 STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
70 STATS_DESC_COUNTER(VCPU, dec_exits),
71 STATS_DESC_COUNTER(VCPU, ext_intr_exits),
72 STATS_DESC_COUNTER(VCPU, halt_successful_wait),
73 STATS_DESC_COUNTER(VCPU, dbell_exits),
74 STATS_DESC_COUNTER(VCPU, gdbell_exits),
75 STATS_DESC_COUNTER(VCPU, ld),
76 STATS_DESC_COUNTER(VCPU, st),
77 STATS_DESC_COUNTER(VCPU, pf_storage),
78 STATS_DESC_COUNTER(VCPU, pf_instruc),
79 STATS_DESC_COUNTER(VCPU, sp_storage),
80 STATS_DESC_COUNTER(VCPU, sp_instruc),
81 STATS_DESC_COUNTER(VCPU, queue_intr),
82 STATS_DESC_COUNTER(VCPU, ld_slow),
83 STATS_DESC_COUNTER(VCPU, st_slow),
84 STATS_DESC_COUNTER(VCPU, pthru_all),
85 STATS_DESC_COUNTER(VCPU, pthru_host),
86 STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
87};
88
89const struct kvm_stats_header kvm_vcpu_stats_header = {
90 .name_size = KVM_STATS_NAME_SIZE,
91 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
92 .id_offset = sizeof(struct kvm_stats_header),
93 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
94 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
95 sizeof(kvm_vcpu_stats_desc),
96};
97
98static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
99 unsigned long pending_now, unsigned long old_pending)
100{
101 if (is_kvmppc_hv_enabled(vcpu->kvm))
102 return;
103 if (pending_now)
104 kvmppc_set_int_pending(vcpu, 1);
105 else if (old_pending)
106 kvmppc_set_int_pending(vcpu, 0);
107}
108
109static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
110{
111 ulong crit_raw;
112 ulong crit_r1;
113 bool crit;
114
115 if (is_kvmppc_hv_enabled(vcpu->kvm))
116 return false;
117
118 crit_raw = kvmppc_get_critical(vcpu);
119 crit_r1 = kvmppc_get_gpr(vcpu, 1);
120
121 /* Truncate crit indicators in 32 bit mode */
122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
123 crit_raw &= 0xffffffff;
124 crit_r1 &= 0xffffffff;
125 }
126
127 /* Critical section when crit == r1 */
128 crit = (crit_raw == crit_r1);
129 /* ... and we're in supervisor mode */
130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
131
132 return crit;
133}
134
135void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
136{
137 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags);
138}
139
140static int kvmppc_book3s_vec2irqprio(unsigned int vec)
141{
142 unsigned int prio;
143
144 switch (vec) {
145 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
146 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
147 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
148 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
149 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
150 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
151 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
152 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
153 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
154 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
155 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
156 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
157 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
158 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
159 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
160 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
161 default: prio = BOOK3S_IRQPRIO_MAX; break;
162 }
163
164 return prio;
165}
166
167void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
168 unsigned int vec)
169{
170 unsigned long old_pending = vcpu->arch.pending_exceptions;
171
172 clear_bit(kvmppc_book3s_vec2irqprio(vec),
173 &vcpu->arch.pending_exceptions);
174
175 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
176 old_pending);
177}
178
179void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
180{
181 vcpu->stat.queue_intr++;
182
183 set_bit(kvmppc_book3s_vec2irqprio(vec),
184 &vcpu->arch.pending_exceptions);
185#ifdef EXIT_DEBUG
186 printk(KERN_INFO "Queueing interrupt %x\n", vec);
187#endif
188}
189EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
190
191void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong srr1_flags)
192{
193 /* might as well deliver this straight away */
194 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, srr1_flags);
195}
196EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
197
198void kvmppc_core_queue_syscall(struct kvm_vcpu *vcpu)
199{
200 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_SYSCALL, 0);
201}
202EXPORT_SYMBOL(kvmppc_core_queue_syscall);
203
204void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong srr1_flags)
205{
206 /* might as well deliver this straight away */
207 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, srr1_flags);
208}
209EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
210
211void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu, ulong srr1_flags)
212{
213 /* might as well deliver this straight away */
214 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, srr1_flags);
215}
216
217void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu, ulong srr1_flags)
218{
219 /* might as well deliver this straight away */
220 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, srr1_flags);
221}
222
223void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu, ulong srr1_flags)
224{
225 /* might as well deliver this straight away */
226 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, srr1_flags);
227}
228
229void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
230{
231 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
232}
233EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
234
235int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
236{
237 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
238}
239EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
240
241void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
242{
243 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
244}
245EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
246
247void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
248 struct kvm_interrupt *irq)
249{
250 /*
251 * This case (KVM_INTERRUPT_SET) should never actually arise for
252 * a pseries guest (because pseries guests expect their interrupt
253 * controllers to continue asserting an external interrupt request
254 * until it is acknowledged at the interrupt controller), but is
255 * included to avoid ABI breakage and potentially for other
256 * sorts of guest.
257 *
258 * There is a subtlety here: HV KVM does not test the
259 * external_oneshot flag in the code that synthesizes
260 * external interrupts for the guest just before entering
261 * the guest. That is OK even if userspace did do a
262 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
263 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
264 * which ends up doing a smp_send_reschedule(), which will
265 * pull the guest all the way out to the host, meaning that
266 * we will call kvmppc_core_prepare_to_enter() before entering
267 * the guest again, and that will handle the external_oneshot
268 * flag correctly.
269 */
270 if (irq->irq == KVM_INTERRUPT_SET)
271 vcpu->arch.external_oneshot = 1;
272
273 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
274}
275
276void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
277{
278 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
279}
280
281void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong srr1_flags,
282 ulong dar, ulong dsisr)
283{
284 kvmppc_set_dar(vcpu, dar);
285 kvmppc_set_dsisr(vcpu, dsisr);
286 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, srr1_flags);
287}
288EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
289
290void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong srr1_flags)
291{
292 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, srr1_flags);
293}
294EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
295
296static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
297 unsigned int priority)
298{
299 int deliver = 1;
300 int vec = 0;
301 bool crit = kvmppc_critical_section(vcpu);
302
303 switch (priority) {
304 case BOOK3S_IRQPRIO_DECREMENTER:
305 deliver = !kvmhv_is_nestedv2() && (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
306 vec = BOOK3S_INTERRUPT_DECREMENTER;
307 break;
308 case BOOK3S_IRQPRIO_EXTERNAL:
309 deliver = !kvmhv_is_nestedv2() && (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
310 vec = BOOK3S_INTERRUPT_EXTERNAL;
311 break;
312 case BOOK3S_IRQPRIO_SYSTEM_RESET:
313 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
314 break;
315 case BOOK3S_IRQPRIO_MACHINE_CHECK:
316 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
317 break;
318 case BOOK3S_IRQPRIO_DATA_STORAGE:
319 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
320 break;
321 case BOOK3S_IRQPRIO_INST_STORAGE:
322 vec = BOOK3S_INTERRUPT_INST_STORAGE;
323 break;
324 case BOOK3S_IRQPRIO_DATA_SEGMENT:
325 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
326 break;
327 case BOOK3S_IRQPRIO_INST_SEGMENT:
328 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
329 break;
330 case BOOK3S_IRQPRIO_ALIGNMENT:
331 vec = BOOK3S_INTERRUPT_ALIGNMENT;
332 break;
333 case BOOK3S_IRQPRIO_PROGRAM:
334 vec = BOOK3S_INTERRUPT_PROGRAM;
335 break;
336 case BOOK3S_IRQPRIO_VSX:
337 vec = BOOK3S_INTERRUPT_VSX;
338 break;
339 case BOOK3S_IRQPRIO_ALTIVEC:
340 vec = BOOK3S_INTERRUPT_ALTIVEC;
341 break;
342 case BOOK3S_IRQPRIO_FP_UNAVAIL:
343 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
344 break;
345 case BOOK3S_IRQPRIO_SYSCALL:
346 vec = BOOK3S_INTERRUPT_SYSCALL;
347 break;
348 case BOOK3S_IRQPRIO_DEBUG:
349 vec = BOOK3S_INTERRUPT_TRACE;
350 break;
351 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
352 vec = BOOK3S_INTERRUPT_PERFMON;
353 break;
354 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
355 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
356 break;
357 default:
358 deliver = 0;
359 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
360 break;
361 }
362
363#if 0
364 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
365#endif
366
367 if (deliver)
368 kvmppc_inject_interrupt(vcpu, vec, 0);
369
370 return deliver;
371}
372
373/*
374 * This function determines if an irqprio should be cleared once issued.
375 */
376static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
377{
378 switch (priority) {
379 case BOOK3S_IRQPRIO_DECREMENTER:
380 /* DEC interrupts get cleared by mtdec */
381 return false;
382 case BOOK3S_IRQPRIO_EXTERNAL:
383 /*
384 * External interrupts get cleared by userspace
385 * except when set by the KVM_INTERRUPT ioctl with
386 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
387 */
388 if (vcpu->arch.external_oneshot) {
389 vcpu->arch.external_oneshot = 0;
390 return true;
391 }
392 return false;
393 }
394
395 return true;
396}
397
398int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
399{
400 unsigned long *pending = &vcpu->arch.pending_exceptions;
401 unsigned long old_pending = vcpu->arch.pending_exceptions;
402 unsigned int priority;
403
404#ifdef EXIT_DEBUG
405 if (vcpu->arch.pending_exceptions)
406 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
407#endif
408 priority = __ffs(*pending);
409 while (priority < BOOK3S_IRQPRIO_MAX) {
410 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
411 clear_irqprio(vcpu, priority)) {
412 clear_bit(priority, &vcpu->arch.pending_exceptions);
413 break;
414 }
415
416 priority = find_next_bit(pending,
417 BITS_PER_BYTE * sizeof(*pending),
418 priority + 1);
419 }
420
421 /* Tell the guest about our interrupt status */
422 kvmppc_update_int_pending(vcpu, *pending, old_pending);
423
424 return 0;
425}
426EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
427
428kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
429 bool *writable)
430{
431 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
432 gfn_t gfn = gpa >> PAGE_SHIFT;
433
434 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
435 mp_pa = (uint32_t)mp_pa;
436
437 /* Magic page override */
438 gpa &= ~0xFFFULL;
439 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
440 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
441 kvm_pfn_t pfn;
442
443 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
444 get_page(pfn_to_page(pfn));
445 if (writable)
446 *writable = true;
447 return pfn;
448 }
449
450 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
451}
452EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
453
454int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
455 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
456{
457 bool data = (xlid == XLATE_DATA);
458 bool iswrite = (xlrw == XLATE_WRITE);
459 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
460 int r;
461
462 if (relocated) {
463 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
464 } else {
465 pte->eaddr = eaddr;
466 pte->raddr = eaddr & KVM_PAM;
467 pte->vpage = VSID_REAL | eaddr >> 12;
468 pte->may_read = true;
469 pte->may_write = true;
470 pte->may_execute = true;
471 r = 0;
472
473 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
474 !data) {
475 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
476 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
477 pte->raddr &= ~SPLIT_HACK_MASK;
478 }
479 }
480
481 return r;
482}
483
484/*
485 * Returns prefixed instructions with the prefix in the high 32 bits
486 * of *inst and suffix in the low 32 bits. This is the same convention
487 * as used in HEIR, vcpu->arch.last_inst and vcpu->arch.emul_inst.
488 * Like vcpu->arch.last_inst but unlike vcpu->arch.emul_inst, each
489 * half of the value needs byte-swapping if the guest endianness is
490 * different from the host endianness.
491 */
492int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
493 enum instruction_fetch_type type, unsigned long *inst)
494{
495 ulong pc = kvmppc_get_pc(vcpu);
496 int r;
497 u32 iw;
498
499 if (type == INST_SC)
500 pc -= 4;
501
502 r = kvmppc_ld(vcpu, &pc, sizeof(u32), &iw, false);
503 if (r != EMULATE_DONE)
504 return EMULATE_AGAIN;
505 /*
506 * If [H]SRR1 indicates that the instruction that caused the
507 * current interrupt is a prefixed instruction, get the suffix.
508 */
509 if (kvmppc_get_msr(vcpu) & SRR1_PREFIXED) {
510 u32 suffix;
511 pc += 4;
512 r = kvmppc_ld(vcpu, &pc, sizeof(u32), &suffix, false);
513 if (r != EMULATE_DONE)
514 return EMULATE_AGAIN;
515 *inst = ((u64)iw << 32) | suffix;
516 } else {
517 *inst = iw;
518 }
519 return r;
520}
521EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
522
523int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
524{
525 return 0;
526}
527
528void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
529{
530}
531
532int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
533 struct kvm_sregs *sregs)
534{
535 int ret;
536
537 vcpu_load(vcpu);
538 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
539 vcpu_put(vcpu);
540
541 return ret;
542}
543
544int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
545 struct kvm_sregs *sregs)
546{
547 int ret;
548
549 vcpu_load(vcpu);
550 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
551 vcpu_put(vcpu);
552
553 return ret;
554}
555
556int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
557{
558 int i;
559
560 regs->pc = kvmppc_get_pc(vcpu);
561 regs->cr = kvmppc_get_cr(vcpu);
562 regs->ctr = kvmppc_get_ctr(vcpu);
563 regs->lr = kvmppc_get_lr(vcpu);
564 regs->xer = kvmppc_get_xer(vcpu);
565 regs->msr = kvmppc_get_msr(vcpu);
566 regs->srr0 = kvmppc_get_srr0(vcpu);
567 regs->srr1 = kvmppc_get_srr1(vcpu);
568 regs->pid = kvmppc_get_pid(vcpu);
569 regs->sprg0 = kvmppc_get_sprg0(vcpu);
570 regs->sprg1 = kvmppc_get_sprg1(vcpu);
571 regs->sprg2 = kvmppc_get_sprg2(vcpu);
572 regs->sprg3 = kvmppc_get_sprg3(vcpu);
573 regs->sprg4 = kvmppc_get_sprg4(vcpu);
574 regs->sprg5 = kvmppc_get_sprg5(vcpu);
575 regs->sprg6 = kvmppc_get_sprg6(vcpu);
576 regs->sprg7 = kvmppc_get_sprg7(vcpu);
577
578 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
579 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
580
581 return 0;
582}
583
584int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
585{
586 int i;
587
588 kvmppc_set_pc(vcpu, regs->pc);
589 kvmppc_set_cr(vcpu, regs->cr);
590 kvmppc_set_ctr(vcpu, regs->ctr);
591 kvmppc_set_lr(vcpu, regs->lr);
592 kvmppc_set_xer(vcpu, regs->xer);
593 kvmppc_set_msr(vcpu, regs->msr);
594 kvmppc_set_srr0(vcpu, regs->srr0);
595 kvmppc_set_srr1(vcpu, regs->srr1);
596 kvmppc_set_sprg0(vcpu, regs->sprg0);
597 kvmppc_set_sprg1(vcpu, regs->sprg1);
598 kvmppc_set_sprg2(vcpu, regs->sprg2);
599 kvmppc_set_sprg3(vcpu, regs->sprg3);
600 kvmppc_set_sprg4(vcpu, regs->sprg4);
601 kvmppc_set_sprg5(vcpu, regs->sprg5);
602 kvmppc_set_sprg6(vcpu, regs->sprg6);
603 kvmppc_set_sprg7(vcpu, regs->sprg7);
604
605 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
606 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
607
608 return 0;
609}
610
611int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
612{
613 return -EOPNOTSUPP;
614}
615
616int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
617{
618 return -EOPNOTSUPP;
619}
620
621int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
622 union kvmppc_one_reg *val)
623{
624 int r = 0;
625 long int i;
626
627 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
628 if (r == -EINVAL) {
629 r = 0;
630 switch (id) {
631 case KVM_REG_PPC_DAR:
632 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
633 break;
634 case KVM_REG_PPC_DSISR:
635 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
636 break;
637 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
638 i = id - KVM_REG_PPC_FPR0;
639 *val = get_reg_val(id, kvmppc_get_fpr(vcpu, i));
640 break;
641 case KVM_REG_PPC_FPSCR:
642 *val = get_reg_val(id, kvmppc_get_fpscr(vcpu));
643 break;
644#ifdef CONFIG_VSX
645 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
646 if (cpu_has_feature(CPU_FTR_VSX)) {
647 i = id - KVM_REG_PPC_VSR0;
648 val->vsxval[0] = kvmppc_get_vsx_fpr(vcpu, i, 0);
649 val->vsxval[1] = kvmppc_get_vsx_fpr(vcpu, i, 1);
650 } else {
651 r = -ENXIO;
652 }
653 break;
654#endif /* CONFIG_VSX */
655 case KVM_REG_PPC_DEBUG_INST:
656 *val = get_reg_val(id, INS_TW);
657 break;
658#ifdef CONFIG_KVM_XICS
659 case KVM_REG_PPC_ICP_STATE:
660 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
661 r = -ENXIO;
662 break;
663 }
664 if (xics_on_xive())
665 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
666 else
667 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
668 break;
669#endif /* CONFIG_KVM_XICS */
670#ifdef CONFIG_KVM_XIVE
671 case KVM_REG_PPC_VP_STATE:
672 if (!vcpu->arch.xive_vcpu) {
673 r = -ENXIO;
674 break;
675 }
676 if (xive_enabled())
677 r = kvmppc_xive_native_get_vp(vcpu, val);
678 else
679 r = -ENXIO;
680 break;
681#endif /* CONFIG_KVM_XIVE */
682 case KVM_REG_PPC_FSCR:
683 *val = get_reg_val(id, vcpu->arch.fscr);
684 break;
685 case KVM_REG_PPC_TAR:
686 *val = get_reg_val(id, kvmppc_get_tar(vcpu));
687 break;
688 case KVM_REG_PPC_EBBHR:
689 *val = get_reg_val(id, kvmppc_get_ebbhr(vcpu));
690 break;
691 case KVM_REG_PPC_EBBRR:
692 *val = get_reg_val(id, kvmppc_get_ebbrr(vcpu));
693 break;
694 case KVM_REG_PPC_BESCR:
695 *val = get_reg_val(id, kvmppc_get_bescr(vcpu));
696 break;
697 case KVM_REG_PPC_IC:
698 *val = get_reg_val(id, kvmppc_get_ic(vcpu));
699 break;
700 default:
701 r = -EINVAL;
702 break;
703 }
704 }
705
706 return r;
707}
708
709int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
710 union kvmppc_one_reg *val)
711{
712 int r = 0;
713 long int i;
714
715 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
716 if (r == -EINVAL) {
717 r = 0;
718 switch (id) {
719 case KVM_REG_PPC_DAR:
720 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
721 break;
722 case KVM_REG_PPC_DSISR:
723 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
724 break;
725 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
726 i = id - KVM_REG_PPC_FPR0;
727 kvmppc_set_fpr(vcpu, i, set_reg_val(id, *val));
728 break;
729 case KVM_REG_PPC_FPSCR:
730 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
731 break;
732#ifdef CONFIG_VSX
733 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
734 if (cpu_has_feature(CPU_FTR_VSX)) {
735 i = id - KVM_REG_PPC_VSR0;
736 kvmppc_set_vsx_fpr(vcpu, i, 0, val->vsxval[0]);
737 kvmppc_set_vsx_fpr(vcpu, i, 1, val->vsxval[1]);
738 } else {
739 r = -ENXIO;
740 }
741 break;
742#endif /* CONFIG_VSX */
743#ifdef CONFIG_KVM_XICS
744 case KVM_REG_PPC_ICP_STATE:
745 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
746 r = -ENXIO;
747 break;
748 }
749 if (xics_on_xive())
750 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
751 else
752 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
753 break;
754#endif /* CONFIG_KVM_XICS */
755#ifdef CONFIG_KVM_XIVE
756 case KVM_REG_PPC_VP_STATE:
757 if (!vcpu->arch.xive_vcpu) {
758 r = -ENXIO;
759 break;
760 }
761 if (xive_enabled())
762 r = kvmppc_xive_native_set_vp(vcpu, val);
763 else
764 r = -ENXIO;
765 break;
766#endif /* CONFIG_KVM_XIVE */
767 case KVM_REG_PPC_FSCR:
768 kvmppc_set_fpscr(vcpu, set_reg_val(id, *val));
769 break;
770 case KVM_REG_PPC_TAR:
771 kvmppc_set_tar(vcpu, set_reg_val(id, *val));
772 break;
773 case KVM_REG_PPC_EBBHR:
774 kvmppc_set_ebbhr(vcpu, set_reg_val(id, *val));
775 break;
776 case KVM_REG_PPC_EBBRR:
777 kvmppc_set_ebbrr(vcpu, set_reg_val(id, *val));
778 break;
779 case KVM_REG_PPC_BESCR:
780 kvmppc_set_bescr(vcpu, set_reg_val(id, *val));
781 break;
782 case KVM_REG_PPC_IC:
783 kvmppc_set_ic(vcpu, set_reg_val(id, *val));
784 break;
785 default:
786 r = -EINVAL;
787 break;
788 }
789 }
790
791 return r;
792}
793
794void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
795{
796 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
797}
798
799void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
800{
801 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
802}
803
804void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
805{
806 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
807}
808EXPORT_SYMBOL_GPL(kvmppc_set_msr);
809
810int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
811{
812 return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu);
813}
814
815int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
816 struct kvm_translation *tr)
817{
818 return 0;
819}
820
821int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
822 struct kvm_guest_debug *dbg)
823{
824 vcpu_load(vcpu);
825 vcpu->guest_debug = dbg->control;
826 vcpu_put(vcpu);
827 return 0;
828}
829
830void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
831{
832 kvmppc_core_queue_dec(vcpu);
833 kvm_vcpu_kick(vcpu);
834}
835
836int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
837{
838 return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
839}
840
841void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
842{
843 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
844}
845
846int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
847{
848 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
849}
850
851void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
852{
853
854}
855
856int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
857{
858 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
859}
860
861void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
862{
863 kvm->arch.kvm_ops->free_memslot(slot);
864}
865
866void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
867{
868 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
869}
870
871int kvmppc_core_prepare_memory_region(struct kvm *kvm,
872 const struct kvm_memory_slot *old,
873 struct kvm_memory_slot *new,
874 enum kvm_mr_change change)
875{
876 return kvm->arch.kvm_ops->prepare_memory_region(kvm, old, new, change);
877}
878
879void kvmppc_core_commit_memory_region(struct kvm *kvm,
880 struct kvm_memory_slot *old,
881 const struct kvm_memory_slot *new,
882 enum kvm_mr_change change)
883{
884 kvm->arch.kvm_ops->commit_memory_region(kvm, old, new, change);
885}
886
887bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
888{
889 return kvm->arch.kvm_ops->unmap_gfn_range(kvm, range);
890}
891
892bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
893{
894 return kvm->arch.kvm_ops->age_gfn(kvm, range);
895}
896
897bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
898{
899 return kvm->arch.kvm_ops->test_age_gfn(kvm, range);
900}
901
902bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
903{
904 return kvm->arch.kvm_ops->set_spte_gfn(kvm, range);
905}
906
907int kvmppc_core_init_vm(struct kvm *kvm)
908{
909
910#ifdef CONFIG_PPC64
911 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
912 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
913 mutex_init(&kvm->arch.rtas_token_lock);
914#endif
915
916 return kvm->arch.kvm_ops->init_vm(kvm);
917}
918
919void kvmppc_core_destroy_vm(struct kvm *kvm)
920{
921 kvm->arch.kvm_ops->destroy_vm(kvm);
922
923#ifdef CONFIG_PPC64
924 kvmppc_rtas_tokens_free(kvm);
925 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
926#endif
927
928#ifdef CONFIG_KVM_XICS
929 /*
930 * Free the XIVE and XICS devices which are not directly freed by the
931 * device 'release' method
932 */
933 kfree(kvm->arch.xive_devices.native);
934 kvm->arch.xive_devices.native = NULL;
935 kfree(kvm->arch.xive_devices.xics_on_xive);
936 kvm->arch.xive_devices.xics_on_xive = NULL;
937 kfree(kvm->arch.xics_device);
938 kvm->arch.xics_device = NULL;
939#endif /* CONFIG_KVM_XICS */
940}
941
942int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
943{
944 unsigned long size = kvmppc_get_gpr(vcpu, 4);
945 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
946 u64 buf;
947 int srcu_idx;
948 int ret;
949
950 if (!is_power_of_2(size) || (size > sizeof(buf)))
951 return H_TOO_HARD;
952
953 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
954 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
955 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
956 if (ret != 0)
957 return H_TOO_HARD;
958
959 switch (size) {
960 case 1:
961 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
962 break;
963
964 case 2:
965 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
966 break;
967
968 case 4:
969 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
970 break;
971
972 case 8:
973 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
974 break;
975
976 default:
977 BUG();
978 }
979
980 return H_SUCCESS;
981}
982EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
983
984int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
985{
986 unsigned long size = kvmppc_get_gpr(vcpu, 4);
987 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
988 unsigned long val = kvmppc_get_gpr(vcpu, 6);
989 u64 buf;
990 int srcu_idx;
991 int ret;
992
993 switch (size) {
994 case 1:
995 *(u8 *)&buf = val;
996 break;
997
998 case 2:
999 *(__be16 *)&buf = cpu_to_be16(val);
1000 break;
1001
1002 case 4:
1003 *(__be32 *)&buf = cpu_to_be32(val);
1004 break;
1005
1006 case 8:
1007 *(__be64 *)&buf = cpu_to_be64(val);
1008 break;
1009
1010 default:
1011 return H_TOO_HARD;
1012 }
1013
1014 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1015 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
1016 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1017 if (ret != 0)
1018 return H_TOO_HARD;
1019
1020 return H_SUCCESS;
1021}
1022EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
1023
1024int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
1025{
1026 return kvm->arch.kvm_ops->hcall_implemented(hcall);
1027}
1028
1029#ifdef CONFIG_KVM_XICS
1030int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
1031 bool line_status)
1032{
1033 if (xics_on_xive())
1034 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
1035 line_status);
1036 else
1037 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
1038 line_status);
1039}
1040
1041int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1042 struct kvm *kvm, int irq_source_id,
1043 int level, bool line_status)
1044{
1045 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1046 level, line_status);
1047}
1048static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1049 struct kvm *kvm, int irq_source_id, int level,
1050 bool line_status)
1051{
1052 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1053}
1054
1055int kvm_irq_map_gsi(struct kvm *kvm,
1056 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1057{
1058 entries->gsi = gsi;
1059 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1060 entries->set = kvmppc_book3s_set_irq;
1061 entries->irqchip.irqchip = 0;
1062 entries->irqchip.pin = gsi;
1063 return 1;
1064}
1065
1066int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1067{
1068 return pin;
1069}
1070
1071#endif /* CONFIG_KVM_XICS */
1072
1073static int kvmppc_book3s_init(void)
1074{
1075 int r;
1076
1077 r = kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1078 if (r)
1079 return r;
1080#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1081 r = kvmppc_book3s_init_pr();
1082#endif
1083
1084#ifdef CONFIG_KVM_XICS
1085#ifdef CONFIG_KVM_XIVE
1086 if (xics_on_xive()) {
1087 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1088 if (kvmppc_xive_native_supported())
1089 kvm_register_device_ops(&kvm_xive_native_ops,
1090 KVM_DEV_TYPE_XIVE);
1091 } else
1092#endif
1093 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1094#endif
1095 return r;
1096}
1097
1098static void kvmppc_book3s_exit(void)
1099{
1100#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1101 kvmppc_book3s_exit_pr();
1102#endif
1103 kvm_exit();
1104}
1105
1106module_init(kvmppc_book3s_init);
1107module_exit(kvmppc_book3s_exit);
1108
1109/* On 32bit this is our one and only kernel module */
1110#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1111MODULE_ALIAS_MISCDEV(KVM_MINOR);
1112MODULE_ALIAS("devname:kvm");
1113#endif
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4 *
5 * Authors:
6 * Alexander Graf <agraf@suse.de>
7 * Kevin Wolf <mail@kevin-wolf.de>
8 *
9 * Description:
10 * This file is derived from arch/powerpc/kvm/44x.c,
11 * by Hollis Blanchard <hollisb@us.ibm.com>.
12 */
13
14#include <linux/kvm_host.h>
15#include <linux/err.h>
16#include <linux/export.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19#include <linux/miscdevice.h>
20#include <linux/gfp.h>
21#include <linux/sched.h>
22#include <linux/vmalloc.h>
23#include <linux/highmem.h>
24
25#include <asm/reg.h>
26#include <asm/cputable.h>
27#include <asm/cacheflush.h>
28#include <linux/uaccess.h>
29#include <asm/io.h>
30#include <asm/kvm_ppc.h>
31#include <asm/kvm_book3s.h>
32#include <asm/mmu_context.h>
33#include <asm/page.h>
34#include <asm/xive.h>
35
36#include "book3s.h"
37#include "trace.h"
38
39/* #define EXIT_DEBUG */
40
41struct kvm_stats_debugfs_item debugfs_entries[] = {
42 VCPU_STAT("exits", sum_exits),
43 VCPU_STAT("mmio", mmio_exits),
44 VCPU_STAT("sig", signal_exits),
45 VCPU_STAT("sysc", syscall_exits),
46 VCPU_STAT("inst_emu", emulated_inst_exits),
47 VCPU_STAT("dec", dec_exits),
48 VCPU_STAT("ext_intr", ext_intr_exits),
49 VCPU_STAT("queue_intr", queue_intr),
50 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
51 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
52 VCPU_STAT("halt_wait_ns", halt_wait_ns),
53 VCPU_STAT("halt_successful_poll", halt_successful_poll),
54 VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
55 VCPU_STAT("halt_successful_wait", halt_successful_wait),
56 VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
57 VCPU_STAT("halt_wakeup", halt_wakeup),
58 VCPU_STAT("pf_storage", pf_storage),
59 VCPU_STAT("sp_storage", sp_storage),
60 VCPU_STAT("pf_instruc", pf_instruc),
61 VCPU_STAT("sp_instruc", sp_instruc),
62 VCPU_STAT("ld", ld),
63 VCPU_STAT("ld_slow", ld_slow),
64 VCPU_STAT("st", st),
65 VCPU_STAT("st_slow", st_slow),
66 VCPU_STAT("pthru_all", pthru_all),
67 VCPU_STAT("pthru_host", pthru_host),
68 VCPU_STAT("pthru_bad_aff", pthru_bad_aff),
69 VM_STAT("largepages_2M", num_2M_pages, .mode = 0444),
70 VM_STAT("largepages_1G", num_1G_pages, .mode = 0444),
71 { NULL }
72};
73
74static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
75 unsigned long pending_now, unsigned long old_pending)
76{
77 if (is_kvmppc_hv_enabled(vcpu->kvm))
78 return;
79 if (pending_now)
80 kvmppc_set_int_pending(vcpu, 1);
81 else if (old_pending)
82 kvmppc_set_int_pending(vcpu, 0);
83}
84
85static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
86{
87 ulong crit_raw;
88 ulong crit_r1;
89 bool crit;
90
91 if (is_kvmppc_hv_enabled(vcpu->kvm))
92 return false;
93
94 crit_raw = kvmppc_get_critical(vcpu);
95 crit_r1 = kvmppc_get_gpr(vcpu, 1);
96
97 /* Truncate crit indicators in 32 bit mode */
98 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
99 crit_raw &= 0xffffffff;
100 crit_r1 &= 0xffffffff;
101 }
102
103 /* Critical section when crit == r1 */
104 crit = (crit_raw == crit_r1);
105 /* ... and we're in supervisor mode */
106 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
107
108 return crit;
109}
110
111void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
112{
113 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags);
114}
115
116static int kvmppc_book3s_vec2irqprio(unsigned int vec)
117{
118 unsigned int prio;
119
120 switch (vec) {
121 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
122 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
123 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
124 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
125 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
126 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
127 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
128 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
129 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
130 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
131 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
132 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
133 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
134 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
135 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
136 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
137 default: prio = BOOK3S_IRQPRIO_MAX; break;
138 }
139
140 return prio;
141}
142
143void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
144 unsigned int vec)
145{
146 unsigned long old_pending = vcpu->arch.pending_exceptions;
147
148 clear_bit(kvmppc_book3s_vec2irqprio(vec),
149 &vcpu->arch.pending_exceptions);
150
151 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
152 old_pending);
153}
154
155void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
156{
157 vcpu->stat.queue_intr++;
158
159 set_bit(kvmppc_book3s_vec2irqprio(vec),
160 &vcpu->arch.pending_exceptions);
161#ifdef EXIT_DEBUG
162 printk(KERN_INFO "Queueing interrupt %x\n", vec);
163#endif
164}
165EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
166
167void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
168{
169 /* might as well deliver this straight away */
170 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
171}
172EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
173
174void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
175{
176 /* might as well deliver this straight away */
177 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
178}
179EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
180
181void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
182{
183 /* might as well deliver this straight away */
184 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
185}
186
187void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
188{
189 /* might as well deliver this straight away */
190 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
191}
192
193void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
194{
195 /* might as well deliver this straight away */
196 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
197}
198
199void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
200{
201 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
202}
203EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
204
205int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
206{
207 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
208}
209EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
210
211void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
212{
213 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
214}
215EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
216
217void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
218 struct kvm_interrupt *irq)
219{
220 /*
221 * This case (KVM_INTERRUPT_SET) should never actually arise for
222 * a pseries guest (because pseries guests expect their interrupt
223 * controllers to continue asserting an external interrupt request
224 * until it is acknowledged at the interrupt controller), but is
225 * included to avoid ABI breakage and potentially for other
226 * sorts of guest.
227 *
228 * There is a subtlety here: HV KVM does not test the
229 * external_oneshot flag in the code that synthesizes
230 * external interrupts for the guest just before entering
231 * the guest. That is OK even if userspace did do a
232 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
233 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
234 * which ends up doing a smp_send_reschedule(), which will
235 * pull the guest all the way out to the host, meaning that
236 * we will call kvmppc_core_prepare_to_enter() before entering
237 * the guest again, and that will handle the external_oneshot
238 * flag correctly.
239 */
240 if (irq->irq == KVM_INTERRUPT_SET)
241 vcpu->arch.external_oneshot = 1;
242
243 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
244}
245
246void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
247{
248 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
249}
250
251void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
252 ulong flags)
253{
254 kvmppc_set_dar(vcpu, dar);
255 kvmppc_set_dsisr(vcpu, flags);
256 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
257}
258EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
259
260void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
261{
262 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
263}
264EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
265
266static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
267 unsigned int priority)
268{
269 int deliver = 1;
270 int vec = 0;
271 bool crit = kvmppc_critical_section(vcpu);
272
273 switch (priority) {
274 case BOOK3S_IRQPRIO_DECREMENTER:
275 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
276 vec = BOOK3S_INTERRUPT_DECREMENTER;
277 break;
278 case BOOK3S_IRQPRIO_EXTERNAL:
279 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
280 vec = BOOK3S_INTERRUPT_EXTERNAL;
281 break;
282 case BOOK3S_IRQPRIO_SYSTEM_RESET:
283 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
284 break;
285 case BOOK3S_IRQPRIO_MACHINE_CHECK:
286 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
287 break;
288 case BOOK3S_IRQPRIO_DATA_STORAGE:
289 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
290 break;
291 case BOOK3S_IRQPRIO_INST_STORAGE:
292 vec = BOOK3S_INTERRUPT_INST_STORAGE;
293 break;
294 case BOOK3S_IRQPRIO_DATA_SEGMENT:
295 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
296 break;
297 case BOOK3S_IRQPRIO_INST_SEGMENT:
298 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
299 break;
300 case BOOK3S_IRQPRIO_ALIGNMENT:
301 vec = BOOK3S_INTERRUPT_ALIGNMENT;
302 break;
303 case BOOK3S_IRQPRIO_PROGRAM:
304 vec = BOOK3S_INTERRUPT_PROGRAM;
305 break;
306 case BOOK3S_IRQPRIO_VSX:
307 vec = BOOK3S_INTERRUPT_VSX;
308 break;
309 case BOOK3S_IRQPRIO_ALTIVEC:
310 vec = BOOK3S_INTERRUPT_ALTIVEC;
311 break;
312 case BOOK3S_IRQPRIO_FP_UNAVAIL:
313 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
314 break;
315 case BOOK3S_IRQPRIO_SYSCALL:
316 vec = BOOK3S_INTERRUPT_SYSCALL;
317 break;
318 case BOOK3S_IRQPRIO_DEBUG:
319 vec = BOOK3S_INTERRUPT_TRACE;
320 break;
321 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
322 vec = BOOK3S_INTERRUPT_PERFMON;
323 break;
324 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
325 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
326 break;
327 default:
328 deliver = 0;
329 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
330 break;
331 }
332
333#if 0
334 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
335#endif
336
337 if (deliver)
338 kvmppc_inject_interrupt(vcpu, vec, 0);
339
340 return deliver;
341}
342
343/*
344 * This function determines if an irqprio should be cleared once issued.
345 */
346static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
347{
348 switch (priority) {
349 case BOOK3S_IRQPRIO_DECREMENTER:
350 /* DEC interrupts get cleared by mtdec */
351 return false;
352 case BOOK3S_IRQPRIO_EXTERNAL:
353 /*
354 * External interrupts get cleared by userspace
355 * except when set by the KVM_INTERRUPT ioctl with
356 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
357 */
358 if (vcpu->arch.external_oneshot) {
359 vcpu->arch.external_oneshot = 0;
360 return true;
361 }
362 return false;
363 }
364
365 return true;
366}
367
368int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
369{
370 unsigned long *pending = &vcpu->arch.pending_exceptions;
371 unsigned long old_pending = vcpu->arch.pending_exceptions;
372 unsigned int priority;
373
374#ifdef EXIT_DEBUG
375 if (vcpu->arch.pending_exceptions)
376 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
377#endif
378 priority = __ffs(*pending);
379 while (priority < BOOK3S_IRQPRIO_MAX) {
380 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
381 clear_irqprio(vcpu, priority)) {
382 clear_bit(priority, &vcpu->arch.pending_exceptions);
383 break;
384 }
385
386 priority = find_next_bit(pending,
387 BITS_PER_BYTE * sizeof(*pending),
388 priority + 1);
389 }
390
391 /* Tell the guest about our interrupt status */
392 kvmppc_update_int_pending(vcpu, *pending, old_pending);
393
394 return 0;
395}
396EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
397
398kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
399 bool *writable)
400{
401 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
402 gfn_t gfn = gpa >> PAGE_SHIFT;
403
404 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
405 mp_pa = (uint32_t)mp_pa;
406
407 /* Magic page override */
408 gpa &= ~0xFFFULL;
409 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
410 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
411 kvm_pfn_t pfn;
412
413 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
414 get_page(pfn_to_page(pfn));
415 if (writable)
416 *writable = true;
417 return pfn;
418 }
419
420 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
421}
422EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
423
424int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
425 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
426{
427 bool data = (xlid == XLATE_DATA);
428 bool iswrite = (xlrw == XLATE_WRITE);
429 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
430 int r;
431
432 if (relocated) {
433 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
434 } else {
435 pte->eaddr = eaddr;
436 pte->raddr = eaddr & KVM_PAM;
437 pte->vpage = VSID_REAL | eaddr >> 12;
438 pte->may_read = true;
439 pte->may_write = true;
440 pte->may_execute = true;
441 r = 0;
442
443 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
444 !data) {
445 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
446 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
447 pte->raddr &= ~SPLIT_HACK_MASK;
448 }
449 }
450
451 return r;
452}
453
454int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
455 enum instruction_fetch_type type, u32 *inst)
456{
457 ulong pc = kvmppc_get_pc(vcpu);
458 int r;
459
460 if (type == INST_SC)
461 pc -= 4;
462
463 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
464 if (r == EMULATE_DONE)
465 return r;
466 else
467 return EMULATE_AGAIN;
468}
469EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
470
471int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
472{
473 return 0;
474}
475
476void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
477{
478}
479
480int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
481 struct kvm_sregs *sregs)
482{
483 int ret;
484
485 vcpu_load(vcpu);
486 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
487 vcpu_put(vcpu);
488
489 return ret;
490}
491
492int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
493 struct kvm_sregs *sregs)
494{
495 int ret;
496
497 vcpu_load(vcpu);
498 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
499 vcpu_put(vcpu);
500
501 return ret;
502}
503
504int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
505{
506 int i;
507
508 regs->pc = kvmppc_get_pc(vcpu);
509 regs->cr = kvmppc_get_cr(vcpu);
510 regs->ctr = kvmppc_get_ctr(vcpu);
511 regs->lr = kvmppc_get_lr(vcpu);
512 regs->xer = kvmppc_get_xer(vcpu);
513 regs->msr = kvmppc_get_msr(vcpu);
514 regs->srr0 = kvmppc_get_srr0(vcpu);
515 regs->srr1 = kvmppc_get_srr1(vcpu);
516 regs->pid = vcpu->arch.pid;
517 regs->sprg0 = kvmppc_get_sprg0(vcpu);
518 regs->sprg1 = kvmppc_get_sprg1(vcpu);
519 regs->sprg2 = kvmppc_get_sprg2(vcpu);
520 regs->sprg3 = kvmppc_get_sprg3(vcpu);
521 regs->sprg4 = kvmppc_get_sprg4(vcpu);
522 regs->sprg5 = kvmppc_get_sprg5(vcpu);
523 regs->sprg6 = kvmppc_get_sprg6(vcpu);
524 regs->sprg7 = kvmppc_get_sprg7(vcpu);
525
526 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
527 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
528
529 return 0;
530}
531
532int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
533{
534 int i;
535
536 kvmppc_set_pc(vcpu, regs->pc);
537 kvmppc_set_cr(vcpu, regs->cr);
538 kvmppc_set_ctr(vcpu, regs->ctr);
539 kvmppc_set_lr(vcpu, regs->lr);
540 kvmppc_set_xer(vcpu, regs->xer);
541 kvmppc_set_msr(vcpu, regs->msr);
542 kvmppc_set_srr0(vcpu, regs->srr0);
543 kvmppc_set_srr1(vcpu, regs->srr1);
544 kvmppc_set_sprg0(vcpu, regs->sprg0);
545 kvmppc_set_sprg1(vcpu, regs->sprg1);
546 kvmppc_set_sprg2(vcpu, regs->sprg2);
547 kvmppc_set_sprg3(vcpu, regs->sprg3);
548 kvmppc_set_sprg4(vcpu, regs->sprg4);
549 kvmppc_set_sprg5(vcpu, regs->sprg5);
550 kvmppc_set_sprg6(vcpu, regs->sprg6);
551 kvmppc_set_sprg7(vcpu, regs->sprg7);
552
553 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
554 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
555
556 return 0;
557}
558
559int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
560{
561 return -ENOTSUPP;
562}
563
564int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
565{
566 return -ENOTSUPP;
567}
568
569int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
570 union kvmppc_one_reg *val)
571{
572 int r = 0;
573 long int i;
574
575 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
576 if (r == -EINVAL) {
577 r = 0;
578 switch (id) {
579 case KVM_REG_PPC_DAR:
580 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
581 break;
582 case KVM_REG_PPC_DSISR:
583 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
584 break;
585 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
586 i = id - KVM_REG_PPC_FPR0;
587 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
588 break;
589 case KVM_REG_PPC_FPSCR:
590 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
591 break;
592#ifdef CONFIG_VSX
593 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
594 if (cpu_has_feature(CPU_FTR_VSX)) {
595 i = id - KVM_REG_PPC_VSR0;
596 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
597 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
598 } else {
599 r = -ENXIO;
600 }
601 break;
602#endif /* CONFIG_VSX */
603 case KVM_REG_PPC_DEBUG_INST:
604 *val = get_reg_val(id, INS_TW);
605 break;
606#ifdef CONFIG_KVM_XICS
607 case KVM_REG_PPC_ICP_STATE:
608 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
609 r = -ENXIO;
610 break;
611 }
612 if (xics_on_xive())
613 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
614 else
615 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
616 break;
617#endif /* CONFIG_KVM_XICS */
618#ifdef CONFIG_KVM_XIVE
619 case KVM_REG_PPC_VP_STATE:
620 if (!vcpu->arch.xive_vcpu) {
621 r = -ENXIO;
622 break;
623 }
624 if (xive_enabled())
625 r = kvmppc_xive_native_get_vp(vcpu, val);
626 else
627 r = -ENXIO;
628 break;
629#endif /* CONFIG_KVM_XIVE */
630 case KVM_REG_PPC_FSCR:
631 *val = get_reg_val(id, vcpu->arch.fscr);
632 break;
633 case KVM_REG_PPC_TAR:
634 *val = get_reg_val(id, vcpu->arch.tar);
635 break;
636 case KVM_REG_PPC_EBBHR:
637 *val = get_reg_val(id, vcpu->arch.ebbhr);
638 break;
639 case KVM_REG_PPC_EBBRR:
640 *val = get_reg_val(id, vcpu->arch.ebbrr);
641 break;
642 case KVM_REG_PPC_BESCR:
643 *val = get_reg_val(id, vcpu->arch.bescr);
644 break;
645 case KVM_REG_PPC_IC:
646 *val = get_reg_val(id, vcpu->arch.ic);
647 break;
648 default:
649 r = -EINVAL;
650 break;
651 }
652 }
653
654 return r;
655}
656
657int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
658 union kvmppc_one_reg *val)
659{
660 int r = 0;
661 long int i;
662
663 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
664 if (r == -EINVAL) {
665 r = 0;
666 switch (id) {
667 case KVM_REG_PPC_DAR:
668 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
669 break;
670 case KVM_REG_PPC_DSISR:
671 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
672 break;
673 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
674 i = id - KVM_REG_PPC_FPR0;
675 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
676 break;
677 case KVM_REG_PPC_FPSCR:
678 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
679 break;
680#ifdef CONFIG_VSX
681 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
682 if (cpu_has_feature(CPU_FTR_VSX)) {
683 i = id - KVM_REG_PPC_VSR0;
684 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
685 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
686 } else {
687 r = -ENXIO;
688 }
689 break;
690#endif /* CONFIG_VSX */
691#ifdef CONFIG_KVM_XICS
692 case KVM_REG_PPC_ICP_STATE:
693 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
694 r = -ENXIO;
695 break;
696 }
697 if (xics_on_xive())
698 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
699 else
700 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
701 break;
702#endif /* CONFIG_KVM_XICS */
703#ifdef CONFIG_KVM_XIVE
704 case KVM_REG_PPC_VP_STATE:
705 if (!vcpu->arch.xive_vcpu) {
706 r = -ENXIO;
707 break;
708 }
709 if (xive_enabled())
710 r = kvmppc_xive_native_set_vp(vcpu, val);
711 else
712 r = -ENXIO;
713 break;
714#endif /* CONFIG_KVM_XIVE */
715 case KVM_REG_PPC_FSCR:
716 vcpu->arch.fscr = set_reg_val(id, *val);
717 break;
718 case KVM_REG_PPC_TAR:
719 vcpu->arch.tar = set_reg_val(id, *val);
720 break;
721 case KVM_REG_PPC_EBBHR:
722 vcpu->arch.ebbhr = set_reg_val(id, *val);
723 break;
724 case KVM_REG_PPC_EBBRR:
725 vcpu->arch.ebbrr = set_reg_val(id, *val);
726 break;
727 case KVM_REG_PPC_BESCR:
728 vcpu->arch.bescr = set_reg_val(id, *val);
729 break;
730 case KVM_REG_PPC_IC:
731 vcpu->arch.ic = set_reg_val(id, *val);
732 break;
733 default:
734 r = -EINVAL;
735 break;
736 }
737 }
738
739 return r;
740}
741
742void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
743{
744 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
745}
746
747void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
748{
749 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
750}
751
752void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
753{
754 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
755}
756EXPORT_SYMBOL_GPL(kvmppc_set_msr);
757
758int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
759{
760 return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu);
761}
762
763int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
764 struct kvm_translation *tr)
765{
766 return 0;
767}
768
769int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
770 struct kvm_guest_debug *dbg)
771{
772 vcpu_load(vcpu);
773 vcpu->guest_debug = dbg->control;
774 vcpu_put(vcpu);
775 return 0;
776}
777
778void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
779{
780 kvmppc_core_queue_dec(vcpu);
781 kvm_vcpu_kick(vcpu);
782}
783
784int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
785{
786 return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
787}
788
789void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
790{
791 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
792}
793
794int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
795{
796 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
797}
798
799void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
800{
801
802}
803
804int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
805{
806 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
807}
808
809void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
810{
811 kvm->arch.kvm_ops->free_memslot(slot);
812}
813
814void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
815{
816 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
817}
818
819int kvmppc_core_prepare_memory_region(struct kvm *kvm,
820 struct kvm_memory_slot *memslot,
821 const struct kvm_userspace_memory_region *mem,
822 enum kvm_mr_change change)
823{
824 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem,
825 change);
826}
827
828void kvmppc_core_commit_memory_region(struct kvm *kvm,
829 const struct kvm_userspace_memory_region *mem,
830 const struct kvm_memory_slot *old,
831 const struct kvm_memory_slot *new,
832 enum kvm_mr_change change)
833{
834 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
835}
836
837int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
838 unsigned flags)
839{
840 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
841}
842
843int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
844{
845 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
846}
847
848int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
849{
850 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
851}
852
853int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
854{
855 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
856 return 0;
857}
858
859int kvmppc_core_init_vm(struct kvm *kvm)
860{
861
862#ifdef CONFIG_PPC64
863 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
864 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
865 mutex_init(&kvm->arch.rtas_token_lock);
866#endif
867
868 return kvm->arch.kvm_ops->init_vm(kvm);
869}
870
871void kvmppc_core_destroy_vm(struct kvm *kvm)
872{
873 kvm->arch.kvm_ops->destroy_vm(kvm);
874
875#ifdef CONFIG_PPC64
876 kvmppc_rtas_tokens_free(kvm);
877 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
878#endif
879
880#ifdef CONFIG_KVM_XICS
881 /*
882 * Free the XIVE devices which are not directly freed by the
883 * device 'release' method
884 */
885 kfree(kvm->arch.xive_devices.native);
886 kvm->arch.xive_devices.native = NULL;
887 kfree(kvm->arch.xive_devices.xics_on_xive);
888 kvm->arch.xive_devices.xics_on_xive = NULL;
889#endif /* CONFIG_KVM_XICS */
890}
891
892int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
893{
894 unsigned long size = kvmppc_get_gpr(vcpu, 4);
895 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
896 u64 buf;
897 int srcu_idx;
898 int ret;
899
900 if (!is_power_of_2(size) || (size > sizeof(buf)))
901 return H_TOO_HARD;
902
903 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
904 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
905 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
906 if (ret != 0)
907 return H_TOO_HARD;
908
909 switch (size) {
910 case 1:
911 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
912 break;
913
914 case 2:
915 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
916 break;
917
918 case 4:
919 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
920 break;
921
922 case 8:
923 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
924 break;
925
926 default:
927 BUG();
928 }
929
930 return H_SUCCESS;
931}
932EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
933
934int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
935{
936 unsigned long size = kvmppc_get_gpr(vcpu, 4);
937 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
938 unsigned long val = kvmppc_get_gpr(vcpu, 6);
939 u64 buf;
940 int srcu_idx;
941 int ret;
942
943 switch (size) {
944 case 1:
945 *(u8 *)&buf = val;
946 break;
947
948 case 2:
949 *(__be16 *)&buf = cpu_to_be16(val);
950 break;
951
952 case 4:
953 *(__be32 *)&buf = cpu_to_be32(val);
954 break;
955
956 case 8:
957 *(__be64 *)&buf = cpu_to_be64(val);
958 break;
959
960 default:
961 return H_TOO_HARD;
962 }
963
964 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
965 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
966 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
967 if (ret != 0)
968 return H_TOO_HARD;
969
970 return H_SUCCESS;
971}
972EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
973
974int kvmppc_core_check_processor_compat(void)
975{
976 /*
977 * We always return 0 for book3s. We check
978 * for compatibility while loading the HV
979 * or PR module
980 */
981 return 0;
982}
983
984int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
985{
986 return kvm->arch.kvm_ops->hcall_implemented(hcall);
987}
988
989#ifdef CONFIG_KVM_XICS
990int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
991 bool line_status)
992{
993 if (xics_on_xive())
994 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
995 line_status);
996 else
997 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
998 line_status);
999}
1000
1001int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1002 struct kvm *kvm, int irq_source_id,
1003 int level, bool line_status)
1004{
1005 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1006 level, line_status);
1007}
1008static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1009 struct kvm *kvm, int irq_source_id, int level,
1010 bool line_status)
1011{
1012 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1013}
1014
1015int kvm_irq_map_gsi(struct kvm *kvm,
1016 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1017{
1018 entries->gsi = gsi;
1019 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1020 entries->set = kvmppc_book3s_set_irq;
1021 entries->irqchip.irqchip = 0;
1022 entries->irqchip.pin = gsi;
1023 return 1;
1024}
1025
1026int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1027{
1028 return pin;
1029}
1030
1031#endif /* CONFIG_KVM_XICS */
1032
1033static int kvmppc_book3s_init(void)
1034{
1035 int r;
1036
1037 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1038 if (r)
1039 return r;
1040#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1041 r = kvmppc_book3s_init_pr();
1042#endif
1043
1044#ifdef CONFIG_KVM_XICS
1045#ifdef CONFIG_KVM_XIVE
1046 if (xics_on_xive()) {
1047 kvmppc_xive_init_module();
1048 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1049 if (kvmppc_xive_native_supported()) {
1050 kvmppc_xive_native_init_module();
1051 kvm_register_device_ops(&kvm_xive_native_ops,
1052 KVM_DEV_TYPE_XIVE);
1053 }
1054 } else
1055#endif
1056 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1057#endif
1058 return r;
1059}
1060
1061static void kvmppc_book3s_exit(void)
1062{
1063#ifdef CONFIG_KVM_XICS
1064 if (xics_on_xive()) {
1065 kvmppc_xive_exit_module();
1066 kvmppc_xive_native_exit_module();
1067 }
1068#endif
1069#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1070 kvmppc_book3s_exit_pr();
1071#endif
1072 kvm_exit();
1073}
1074
1075module_init(kvmppc_book3s_init);
1076module_exit(kvmppc_book3s_exit);
1077
1078/* On 32bit this is our one and only kernel module */
1079#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1080MODULE_ALIAS_MISCDEV(KVM_MINOR);
1081MODULE_ALIAS("devname:kvm");
1082#endif