1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Driver for the NXP ISP1760 chip
 4 *
 5 * Copyright 2021 Linaro, Rui Miguel Silva
 6 * Copyright 2014 Laurent Pinchart
 7 * Copyright 2007 Sebastian Siewior
 8 *
 9 * Contacts:
10 *	Sebastian Siewior <bigeasy@linutronix.de>
11 *	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
12 *	Rui Miguel Silva <rui.silva@linaro.org>
13 */
14
15#ifndef _ISP1760_CORE_H_
16#define _ISP1760_CORE_H_
17
18#include <linux/ioport.h>
19#include <linux/regmap.h>
20
21#include "isp1760-hcd.h"
22#include "isp1760-udc.h"
23
24struct device;
25struct gpio_desc;
26
27/*
28 * Device flags that can vary from board to board.  All of these
29 * indicate the most "atypical" case, so that a devflags of 0 is
30 * a sane default configuration.
31 */
32#define ISP1760_FLAG_BUS_WIDTH_16	0x00000002 /* 16-bit data bus width */
33#define ISP1760_FLAG_PERIPHERAL_EN	0x00000004 /* Port 1 supports Peripheral mode*/
34#define ISP1760_FLAG_ANALOG_OC		0x00000008 /* Analog overcurrent */
35#define ISP1760_FLAG_DACK_POL_HIGH	0x00000010 /* DACK active high */
36#define ISP1760_FLAG_DREQ_POL_HIGH	0x00000020 /* DREQ active high */
37#define ISP1760_FLAG_ISP1761		0x00000040 /* Chip is ISP1761 */
38#define ISP1760_FLAG_INTR_POL_HIGH	0x00000080 /* Interrupt polarity active high */
39#define ISP1760_FLAG_INTR_EDGE_TRIG	0x00000100 /* Interrupt edge triggered */
40#define ISP1760_FLAG_ISP1763		0x00000200 /* Chip is ISP1763 */
41#define ISP1760_FLAG_BUS_WIDTH_8	0x00000400 /* 8-bit data bus width */
42
43struct isp1760_device {
44	struct device *dev;
45
 
46	unsigned int devflags;
47	struct gpio_desc *rst_gpio;
48
49	struct isp1760_hcd hcd;
50	struct isp1760_udc udc;
51};
52
53int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
54		     struct device *dev, unsigned int devflags);
55void isp1760_unregister(struct device *dev);
56
57void isp1760_set_pullup(struct isp1760_device *isp, bool enable);
58
59static inline u32 isp1760_field_read(struct regmap_field **fields, u32 field)
60{
61	unsigned int val;
62
63	regmap_field_read(fields[field], &val);
64
65	return val;
66}
67
68static inline void isp1760_field_write(struct regmap_field **fields, u32 field,
69				       u32 val)
70{
71	regmap_field_write(fields[field], val);
72}
73
74static inline void isp1760_field_set(struct regmap_field **fields, u32 field)
75{
76	isp1760_field_write(fields, field, 0xFFFFFFFF);
77}
78
79static inline void isp1760_field_clear(struct regmap_field **fields, u32 field)
80{
81	isp1760_field_write(fields, field, 0);
82}
83
84static inline u32 isp1760_reg_read(struct regmap *regs, u32 reg)
85{
86	unsigned int val;
87
88	regmap_read(regs, reg, &val);
89
90	return val;
91}
92
93static inline void isp1760_reg_write(struct regmap *regs, u32 reg, u32 val)
94{
95	regmap_write(regs, reg, val);
96}
97#endif

 1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Driver for the NXP ISP1760 chip
 4 *
 
 5 * Copyright 2014 Laurent Pinchart
 6 * Copyright 2007 Sebastian Siewior
 7 *
 8 * Contacts:
 9 *	Sebastian Siewior <bigeasy@linutronix.de>
10 *	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 
11 */
12
13#ifndef _ISP1760_CORE_H_
14#define _ISP1760_CORE_H_
15
16#include <linux/ioport.h>
 
17
18#include "isp1760-hcd.h"
19#include "isp1760-udc.h"
20
21struct device;
22struct gpio_desc;
23
24/*
25 * Device flags that can vary from board to board.  All of these
26 * indicate the most "atypical" case, so that a devflags of 0 is
27 * a sane default configuration.
28 */
29#define ISP1760_FLAG_BUS_WIDTH_16	0x00000002 /* 16-bit data bus width */
30#define ISP1760_FLAG_OTG_EN		0x00000004 /* Port 1 supports OTG */
31#define ISP1760_FLAG_ANALOG_OC		0x00000008 /* Analog overcurrent */
32#define ISP1760_FLAG_DACK_POL_HIGH	0x00000010 /* DACK active high */
33#define ISP1760_FLAG_DREQ_POL_HIGH	0x00000020 /* DREQ active high */
34#define ISP1760_FLAG_ISP1761		0x00000040 /* Chip is ISP1761 */
35#define ISP1760_FLAG_INTR_POL_HIGH	0x00000080 /* Interrupt polarity active high */
36#define ISP1760_FLAG_INTR_EDGE_TRIG	0x00000100 /* Interrupt edge triggered */
 
 
37
38struct isp1760_device {
39	struct device *dev;
40
41	void __iomem *regs;
42	unsigned int devflags;
43	struct gpio_desc *rst_gpio;
44
45	struct isp1760_hcd hcd;
46	struct isp1760_udc udc;
47};
48
49int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
50		     struct device *dev, unsigned int devflags);
51void isp1760_unregister(struct device *dev);
52
53void isp1760_set_pullup(struct isp1760_device *isp, bool enable);
54
55static inline u32 isp1760_read32(void __iomem *base, u32 reg)
56{
57	return readl(base + reg);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
58}
59
60static inline void isp1760_write32(void __iomem *base, u32 reg, u32 val)
61{
62	writel(val, base + reg);
63}
64
 
 
 
 
 
 
 
 
 
 
 
 
 
65#endif