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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for Regulator part of Palmas PMIC Chips
4 *
5 * Copyright 2011-2013 Texas Instruments Inc.
6 *
7 * Author: Graeme Gregory <gg@slimlogic.co.uk>
8 * Author: Ian Lartey <ian@slimlogic.co.uk>
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
16#include <linux/regulator/driver.h>
17#include <linux/regulator/machine.h>
18#include <linux/slab.h>
19#include <linux/regmap.h>
20#include <linux/mfd/palmas.h>
21#include <linux/of.h>
22#include <linux/regulator/of_regulator.h>
23
24static const struct linear_range smps_low_ranges[] = {
25 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
26 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
27 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
28 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
29};
30
31static const struct linear_range smps_high_ranges[] = {
32 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
33 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
34 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
35 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
36};
37
38static struct palmas_regs_info palmas_generic_regs_info[] = {
39 {
40 .name = "SMPS12",
41 .sname = "smps1-in",
42 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
43 .ctrl_addr = PALMAS_SMPS12_CTRL,
44 .tstep_addr = PALMAS_SMPS12_TSTEP,
45 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
46 },
47 {
48 .name = "SMPS123",
49 .sname = "smps1-in",
50 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
51 .ctrl_addr = PALMAS_SMPS12_CTRL,
52 .tstep_addr = PALMAS_SMPS12_TSTEP,
53 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
54 },
55 {
56 .name = "SMPS3",
57 .sname = "smps3-in",
58 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
59 .ctrl_addr = PALMAS_SMPS3_CTRL,
60 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
61 },
62 {
63 .name = "SMPS45",
64 .sname = "smps4-in",
65 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
66 .ctrl_addr = PALMAS_SMPS45_CTRL,
67 .tstep_addr = PALMAS_SMPS45_TSTEP,
68 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
69 },
70 {
71 .name = "SMPS457",
72 .sname = "smps4-in",
73 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
74 .ctrl_addr = PALMAS_SMPS45_CTRL,
75 .tstep_addr = PALMAS_SMPS45_TSTEP,
76 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
77 },
78 {
79 .name = "SMPS6",
80 .sname = "smps6-in",
81 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
82 .ctrl_addr = PALMAS_SMPS6_CTRL,
83 .tstep_addr = PALMAS_SMPS6_TSTEP,
84 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
85 },
86 {
87 .name = "SMPS7",
88 .sname = "smps7-in",
89 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
90 .ctrl_addr = PALMAS_SMPS7_CTRL,
91 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
92 },
93 {
94 .name = "SMPS8",
95 .sname = "smps8-in",
96 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
97 .ctrl_addr = PALMAS_SMPS8_CTRL,
98 .tstep_addr = PALMAS_SMPS8_TSTEP,
99 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
100 },
101 {
102 .name = "SMPS9",
103 .sname = "smps9-in",
104 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
105 .ctrl_addr = PALMAS_SMPS9_CTRL,
106 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
107 },
108 {
109 .name = "SMPS10_OUT2",
110 .sname = "smps10-in",
111 .ctrl_addr = PALMAS_SMPS10_CTRL,
112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
113 },
114 {
115 .name = "SMPS10_OUT1",
116 .sname = "smps10-out2",
117 .ctrl_addr = PALMAS_SMPS10_CTRL,
118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
119 },
120 {
121 .name = "LDO1",
122 .sname = "ldo1-in",
123 .vsel_addr = PALMAS_LDO1_VOLTAGE,
124 .ctrl_addr = PALMAS_LDO1_CTRL,
125 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
126 },
127 {
128 .name = "LDO2",
129 .sname = "ldo2-in",
130 .vsel_addr = PALMAS_LDO2_VOLTAGE,
131 .ctrl_addr = PALMAS_LDO2_CTRL,
132 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
133 },
134 {
135 .name = "LDO3",
136 .sname = "ldo3-in",
137 .vsel_addr = PALMAS_LDO3_VOLTAGE,
138 .ctrl_addr = PALMAS_LDO3_CTRL,
139 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
140 },
141 {
142 .name = "LDO4",
143 .sname = "ldo4-in",
144 .vsel_addr = PALMAS_LDO4_VOLTAGE,
145 .ctrl_addr = PALMAS_LDO4_CTRL,
146 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
147 },
148 {
149 .name = "LDO5",
150 .sname = "ldo5-in",
151 .vsel_addr = PALMAS_LDO5_VOLTAGE,
152 .ctrl_addr = PALMAS_LDO5_CTRL,
153 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
154 },
155 {
156 .name = "LDO6",
157 .sname = "ldo6-in",
158 .vsel_addr = PALMAS_LDO6_VOLTAGE,
159 .ctrl_addr = PALMAS_LDO6_CTRL,
160 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
161 },
162 {
163 .name = "LDO7",
164 .sname = "ldo7-in",
165 .vsel_addr = PALMAS_LDO7_VOLTAGE,
166 .ctrl_addr = PALMAS_LDO7_CTRL,
167 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
168 },
169 {
170 .name = "LDO8",
171 .sname = "ldo8-in",
172 .vsel_addr = PALMAS_LDO8_VOLTAGE,
173 .ctrl_addr = PALMAS_LDO8_CTRL,
174 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
175 },
176 {
177 .name = "LDO9",
178 .sname = "ldo9-in",
179 .vsel_addr = PALMAS_LDO9_VOLTAGE,
180 .ctrl_addr = PALMAS_LDO9_CTRL,
181 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
182 },
183 {
184 .name = "LDOLN",
185 .sname = "ldoln-in",
186 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
187 .ctrl_addr = PALMAS_LDOLN_CTRL,
188 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
189 },
190 {
191 .name = "LDOUSB",
192 .sname = "ldousb-in",
193 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
194 .ctrl_addr = PALMAS_LDOUSB_CTRL,
195 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
196 },
197 {
198 .name = "REGEN1",
199 .ctrl_addr = PALMAS_REGEN1_CTRL,
200 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
201 },
202 {
203 .name = "REGEN2",
204 .ctrl_addr = PALMAS_REGEN2_CTRL,
205 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
206 },
207 {
208 .name = "REGEN3",
209 .ctrl_addr = PALMAS_REGEN3_CTRL,
210 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
211 },
212 {
213 .name = "SYSEN1",
214 .ctrl_addr = PALMAS_SYSEN1_CTRL,
215 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
216 },
217 {
218 .name = "SYSEN2",
219 .ctrl_addr = PALMAS_SYSEN2_CTRL,
220 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
221 },
222};
223
224static struct palmas_regs_info tps65917_regs_info[] = {
225 {
226 .name = "SMPS1",
227 .sname = "smps1-in",
228 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
229 .ctrl_addr = TPS65917_SMPS1_CTRL,
230 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
231 },
232 {
233 .name = "SMPS2",
234 .sname = "smps2-in",
235 .vsel_addr = TPS65917_SMPS2_VOLTAGE,
236 .ctrl_addr = TPS65917_SMPS2_CTRL,
237 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
238 },
239 {
240 .name = "SMPS3",
241 .sname = "smps3-in",
242 .vsel_addr = TPS65917_SMPS3_VOLTAGE,
243 .ctrl_addr = TPS65917_SMPS3_CTRL,
244 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
245 },
246 {
247 .name = "SMPS4",
248 .sname = "smps4-in",
249 .vsel_addr = TPS65917_SMPS4_VOLTAGE,
250 .ctrl_addr = TPS65917_SMPS4_CTRL,
251 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
252 },
253 {
254 .name = "SMPS5",
255 .sname = "smps5-in",
256 .vsel_addr = TPS65917_SMPS5_VOLTAGE,
257 .ctrl_addr = TPS65917_SMPS5_CTRL,
258 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
259 },
260 {
261 .name = "SMPS12",
262 .sname = "smps1-in",
263 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
264 .ctrl_addr = TPS65917_SMPS1_CTRL,
265 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS12,
266 },
267 {
268 .name = "LDO1",
269 .sname = "ldo1-in",
270 .vsel_addr = TPS65917_LDO1_VOLTAGE,
271 .ctrl_addr = TPS65917_LDO1_CTRL,
272 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
273 },
274 {
275 .name = "LDO2",
276 .sname = "ldo2-in",
277 .vsel_addr = TPS65917_LDO2_VOLTAGE,
278 .ctrl_addr = TPS65917_LDO2_CTRL,
279 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
280 },
281 {
282 .name = "LDO3",
283 .sname = "ldo3-in",
284 .vsel_addr = TPS65917_LDO3_VOLTAGE,
285 .ctrl_addr = TPS65917_LDO3_CTRL,
286 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
287 },
288 {
289 .name = "LDO4",
290 .sname = "ldo4-in",
291 .vsel_addr = TPS65917_LDO4_VOLTAGE,
292 .ctrl_addr = TPS65917_LDO4_CTRL,
293 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
294 },
295 {
296 .name = "LDO5",
297 .sname = "ldo5-in",
298 .vsel_addr = TPS65917_LDO5_VOLTAGE,
299 .ctrl_addr = TPS65917_LDO5_CTRL,
300 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
301 },
302 {
303 .name = "REGEN1",
304 .ctrl_addr = TPS65917_REGEN1_CTRL,
305 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
306 },
307 {
308 .name = "REGEN2",
309 .ctrl_addr = TPS65917_REGEN2_CTRL,
310 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
311 },
312 {
313 .name = "REGEN3",
314 .ctrl_addr = TPS65917_REGEN3_CTRL,
315 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
316 },
317};
318
319#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
320 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
321 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
322 .reg_offset = _offset, \
323 .bit_pos = _pos, \
324 }
325
326static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
327 EXTERNAL_REQUESTOR(REGEN1, 0, 0),
328 EXTERNAL_REQUESTOR(REGEN2, 0, 1),
329 EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
330 EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
331 EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
332 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
333 EXTERNAL_REQUESTOR(REGEN3, 0, 6),
334 EXTERNAL_REQUESTOR(SMPS12, 1, 0),
335 EXTERNAL_REQUESTOR(SMPS3, 1, 1),
336 EXTERNAL_REQUESTOR(SMPS45, 1, 2),
337 EXTERNAL_REQUESTOR(SMPS6, 1, 3),
338 EXTERNAL_REQUESTOR(SMPS7, 1, 4),
339 EXTERNAL_REQUESTOR(SMPS8, 1, 5),
340 EXTERNAL_REQUESTOR(SMPS9, 1, 6),
341 EXTERNAL_REQUESTOR(SMPS10, 1, 7),
342 EXTERNAL_REQUESTOR(LDO1, 2, 0),
343 EXTERNAL_REQUESTOR(LDO2, 2, 1),
344 EXTERNAL_REQUESTOR(LDO3, 2, 2),
345 EXTERNAL_REQUESTOR(LDO4, 2, 3),
346 EXTERNAL_REQUESTOR(LDO5, 2, 4),
347 EXTERNAL_REQUESTOR(LDO6, 2, 5),
348 EXTERNAL_REQUESTOR(LDO7, 2, 6),
349 EXTERNAL_REQUESTOR(LDO8, 2, 7),
350 EXTERNAL_REQUESTOR(LDO9, 3, 0),
351 EXTERNAL_REQUESTOR(LDOLN, 3, 1),
352 EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
353};
354
355#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
356 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
357 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
358 .reg_offset = _offset, \
359 .bit_pos = _pos, \
360 }
361
362static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
363 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
364 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
365 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
366 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
367 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
368 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
369 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
370 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
371 EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5),
372 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
373 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
374 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
375 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
376 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
377};
378
379static const unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
380
381#define SMPS_CTRL_MODE_OFF 0x00
382#define SMPS_CTRL_MODE_ON 0x01
383#define SMPS_CTRL_MODE_ECO 0x02
384#define SMPS_CTRL_MODE_PWM 0x03
385
386#define PALMAS_SMPS_NUM_VOLTAGES 122
387#define PALMAS_SMPS10_NUM_VOLTAGES 2
388#define PALMAS_LDO_NUM_VOLTAGES 50
389
390#define SMPS10_VSEL (1<<3)
391#define SMPS10_BOOST_EN (1<<2)
392#define SMPS10_BYPASS_EN (1<<1)
393#define SMPS10_SWITCH_EN (1<<0)
394
395#define REGULATOR_SLAVE 0
396
397static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
398 unsigned int *dest)
399{
400 unsigned int addr;
401
402 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
403
404 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
405}
406
407static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
408 unsigned int value)
409{
410 unsigned int addr;
411
412 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
413
414 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
415}
416
417static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
418 unsigned int *dest)
419{
420 unsigned int addr;
421
422 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
423
424 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
425}
426
427static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
428 unsigned int value)
429{
430 unsigned int addr;
431
432 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
433
434 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
435}
436
437static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
438{
439 int id = rdev_get_id(dev);
440 int ret;
441 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
442 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
443 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
444 unsigned int reg;
445 bool rail_enable = true;
446
447 ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®);
448 if (ret)
449 return ret;
450
451 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
452
453 if (reg == SMPS_CTRL_MODE_OFF)
454 rail_enable = false;
455
456 switch (mode) {
457 case REGULATOR_MODE_NORMAL:
458 reg |= SMPS_CTRL_MODE_ON;
459 break;
460 case REGULATOR_MODE_IDLE:
461 reg |= SMPS_CTRL_MODE_ECO;
462 break;
463 case REGULATOR_MODE_FAST:
464 reg |= SMPS_CTRL_MODE_PWM;
465 break;
466 default:
467 return -EINVAL;
468 }
469
470 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
471 if (rail_enable)
472 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
473
474 /* Switch the enable value to ensure this is used for enable */
475 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
476
477 return 0;
478}
479
480static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
481{
482 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
483 int id = rdev_get_id(dev);
484 unsigned int reg;
485
486 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
487
488 switch (reg) {
489 case SMPS_CTRL_MODE_ON:
490 return REGULATOR_MODE_NORMAL;
491 case SMPS_CTRL_MODE_ECO:
492 return REGULATOR_MODE_IDLE;
493 case SMPS_CTRL_MODE_PWM:
494 return REGULATOR_MODE_FAST;
495 }
496
497 return 0;
498}
499
500static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
501 int ramp_delay)
502{
503 int id = rdev_get_id(rdev);
504 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
505 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
506 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
507 unsigned int reg = 0;
508 int ret;
509
510 /* SMPS3 and SMPS7 do not have tstep_addr setting */
511 switch (id) {
512 case PALMAS_REG_SMPS3:
513 case PALMAS_REG_SMPS7:
514 return 0;
515 }
516
517 if (ramp_delay <= 0)
518 reg = 0;
519 else if (ramp_delay <= 2500)
520 reg = 3;
521 else if (ramp_delay <= 5000)
522 reg = 2;
523 else
524 reg = 1;
525
526 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
527 if (ret < 0) {
528 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
529 return ret;
530 }
531
532 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
533 return ret;
534}
535
536static const struct regulator_ops palmas_ops_smps = {
537 .is_enabled = regulator_is_enabled_regmap,
538 .enable = regulator_enable_regmap,
539 .disable = regulator_disable_regmap,
540 .set_mode = palmas_set_mode_smps,
541 .get_mode = palmas_get_mode_smps,
542 .get_voltage_sel = regulator_get_voltage_sel_regmap,
543 .set_voltage_sel = regulator_set_voltage_sel_regmap,
544 .list_voltage = regulator_list_voltage_linear_range,
545 .map_voltage = regulator_map_voltage_linear_range,
546 .set_voltage_time_sel = regulator_set_voltage_time_sel,
547 .set_ramp_delay = palmas_smps_set_ramp_delay,
548};
549
550static const struct regulator_ops palmas_ops_ext_control_smps = {
551 .set_mode = palmas_set_mode_smps,
552 .get_mode = palmas_get_mode_smps,
553 .get_voltage_sel = regulator_get_voltage_sel_regmap,
554 .set_voltage_sel = regulator_set_voltage_sel_regmap,
555 .list_voltage = regulator_list_voltage_linear_range,
556 .map_voltage = regulator_map_voltage_linear_range,
557 .set_voltage_time_sel = regulator_set_voltage_time_sel,
558 .set_ramp_delay = palmas_smps_set_ramp_delay,
559};
560
561static const struct regulator_ops palmas_ops_smps10 = {
562 .is_enabled = regulator_is_enabled_regmap,
563 .enable = regulator_enable_regmap,
564 .disable = regulator_disable_regmap,
565 .get_voltage_sel = regulator_get_voltage_sel_regmap,
566 .set_voltage_sel = regulator_set_voltage_sel_regmap,
567 .list_voltage = regulator_list_voltage_linear,
568 .map_voltage = regulator_map_voltage_linear,
569 .set_bypass = regulator_set_bypass_regmap,
570 .get_bypass = regulator_get_bypass_regmap,
571};
572
573static const struct regulator_ops tps65917_ops_smps = {
574 .is_enabled = regulator_is_enabled_regmap,
575 .enable = regulator_enable_regmap,
576 .disable = regulator_disable_regmap,
577 .set_mode = palmas_set_mode_smps,
578 .get_mode = palmas_get_mode_smps,
579 .get_voltage_sel = regulator_get_voltage_sel_regmap,
580 .set_voltage_sel = regulator_set_voltage_sel_regmap,
581 .list_voltage = regulator_list_voltage_linear_range,
582 .map_voltage = regulator_map_voltage_linear_range,
583 .set_voltage_time_sel = regulator_set_voltage_time_sel,
584};
585
586static const struct regulator_ops tps65917_ops_ext_control_smps = {
587 .set_mode = palmas_set_mode_smps,
588 .get_mode = palmas_get_mode_smps,
589 .get_voltage_sel = regulator_get_voltage_sel_regmap,
590 .set_voltage_sel = regulator_set_voltage_sel_regmap,
591 .list_voltage = regulator_list_voltage_linear_range,
592 .map_voltage = regulator_map_voltage_linear_range,
593};
594
595static int palmas_is_enabled_ldo(struct regulator_dev *dev)
596{
597 int id = rdev_get_id(dev);
598 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
599 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
600 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
601 unsigned int reg;
602
603 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®);
604
605 reg &= PALMAS_LDO1_CTRL_STATUS;
606
607 return !!(reg);
608}
609
610static const struct regulator_ops palmas_ops_ldo = {
611 .is_enabled = palmas_is_enabled_ldo,
612 .enable = regulator_enable_regmap,
613 .disable = regulator_disable_regmap,
614 .get_voltage_sel = regulator_get_voltage_sel_regmap,
615 .set_voltage_sel = regulator_set_voltage_sel_regmap,
616 .list_voltage = regulator_list_voltage_linear,
617 .map_voltage = regulator_map_voltage_linear,
618};
619
620static const struct regulator_ops palmas_ops_ldo9 = {
621 .is_enabled = palmas_is_enabled_ldo,
622 .enable = regulator_enable_regmap,
623 .disable = regulator_disable_regmap,
624 .get_voltage_sel = regulator_get_voltage_sel_regmap,
625 .set_voltage_sel = regulator_set_voltage_sel_regmap,
626 .list_voltage = regulator_list_voltage_linear,
627 .map_voltage = regulator_map_voltage_linear,
628 .set_bypass = regulator_set_bypass_regmap,
629 .get_bypass = regulator_get_bypass_regmap,
630};
631
632static const struct regulator_ops palmas_ops_ext_control_ldo = {
633 .get_voltage_sel = regulator_get_voltage_sel_regmap,
634 .set_voltage_sel = regulator_set_voltage_sel_regmap,
635 .list_voltage = regulator_list_voltage_linear,
636 .map_voltage = regulator_map_voltage_linear,
637};
638
639static const struct regulator_ops palmas_ops_extreg = {
640 .is_enabled = regulator_is_enabled_regmap,
641 .enable = regulator_enable_regmap,
642 .disable = regulator_disable_regmap,
643};
644
645static const struct regulator_ops palmas_ops_ext_control_extreg = {
646};
647
648static const struct regulator_ops tps65917_ops_ldo = {
649 .is_enabled = palmas_is_enabled_ldo,
650 .enable = regulator_enable_regmap,
651 .disable = regulator_disable_regmap,
652 .get_voltage_sel = regulator_get_voltage_sel_regmap,
653 .set_voltage_sel = regulator_set_voltage_sel_regmap,
654 .list_voltage = regulator_list_voltage_linear,
655 .map_voltage = regulator_map_voltage_linear,
656 .set_voltage_time_sel = regulator_set_voltage_time_sel,
657};
658
659static const struct regulator_ops tps65917_ops_ldo_1_2 = {
660 .is_enabled = palmas_is_enabled_ldo,
661 .enable = regulator_enable_regmap,
662 .disable = regulator_disable_regmap,
663 .get_voltage_sel = regulator_get_voltage_sel_regmap,
664 .set_voltage_sel = regulator_set_voltage_sel_regmap,
665 .list_voltage = regulator_list_voltage_linear,
666 .map_voltage = regulator_map_voltage_linear,
667 .set_voltage_time_sel = regulator_set_voltage_time_sel,
668 .set_bypass = regulator_set_bypass_regmap,
669 .get_bypass = regulator_get_bypass_regmap,
670};
671
672static int palmas_regulator_config_external(struct palmas *palmas, int id,
673 struct palmas_reg_init *reg_init)
674{
675 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
676 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
677 int ret;
678
679 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
680 reg_init->roof_floor, true);
681 if (ret < 0)
682 dev_err(palmas->dev,
683 "Ext control config for regulator %d failed %d\n",
684 id, ret);
685 return ret;
686}
687
688/*
689 * setup the hardware based sleep configuration of the SMPS/LDO regulators
690 * from the platform data. This is different to the software based control
691 * supported by the regulator framework as it is controlled by toggling
692 * pins on the PMIC such as PREQ, SYSEN, ...
693 */
694static int palmas_smps_init(struct palmas *palmas, int id,
695 struct palmas_reg_init *reg_init)
696{
697 unsigned int reg;
698 int ret;
699 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
700 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
701 unsigned int addr = rinfo->ctrl_addr;
702
703 ret = palmas_smps_read(palmas, addr, ®);
704 if (ret)
705 return ret;
706
707 switch (id) {
708 case PALMAS_REG_SMPS10_OUT1:
709 case PALMAS_REG_SMPS10_OUT2:
710 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
711 if (reg_init->mode_sleep)
712 reg |= reg_init->mode_sleep <<
713 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
714 break;
715 default:
716 if (reg_init->warm_reset)
717 reg |= PALMAS_SMPS12_CTRL_WR_S;
718 else
719 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
720
721 if (reg_init->roof_floor)
722 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
723 else
724 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
725
726 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
727 if (reg_init->mode_sleep)
728 reg |= reg_init->mode_sleep <<
729 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
730 }
731
732 ret = palmas_smps_write(palmas, addr, reg);
733 if (ret)
734 return ret;
735
736 if (rinfo->vsel_addr && reg_init->vsel) {
737
738 reg = reg_init->vsel;
739
740 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
741 if (ret)
742 return ret;
743 }
744
745 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
746 (id != PALMAS_REG_SMPS10_OUT2)) {
747 /* Enable externally controlled regulator */
748 ret = palmas_smps_read(palmas, addr, ®);
749 if (ret < 0)
750 return ret;
751
752 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
753 reg |= SMPS_CTRL_MODE_ON;
754 ret = palmas_smps_write(palmas, addr, reg);
755 if (ret < 0)
756 return ret;
757 }
758 return palmas_regulator_config_external(palmas, id, reg_init);
759 }
760 return 0;
761}
762
763static int palmas_ldo_init(struct palmas *palmas, int id,
764 struct palmas_reg_init *reg_init)
765{
766 unsigned int reg;
767 unsigned int addr;
768 int ret;
769 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
770 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
771
772 addr = rinfo->ctrl_addr;
773
774 ret = palmas_ldo_read(palmas, addr, ®);
775 if (ret)
776 return ret;
777
778 if (reg_init->warm_reset)
779 reg |= PALMAS_LDO1_CTRL_WR_S;
780 else
781 reg &= ~PALMAS_LDO1_CTRL_WR_S;
782
783 if (reg_init->mode_sleep)
784 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
785 else
786 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
787
788 ret = palmas_ldo_write(palmas, addr, reg);
789 if (ret)
790 return ret;
791
792 if (reg_init->roof_floor) {
793 /* Enable externally controlled regulator */
794 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
795 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
796 PALMAS_LDO1_CTRL_MODE_ACTIVE);
797 if (ret < 0) {
798 dev_err(palmas->dev,
799 "LDO Register 0x%02x update failed %d\n",
800 addr, ret);
801 return ret;
802 }
803 return palmas_regulator_config_external(palmas, id, reg_init);
804 }
805 return 0;
806}
807
808static int palmas_extreg_init(struct palmas *palmas, int id,
809 struct palmas_reg_init *reg_init)
810{
811 unsigned int addr;
812 int ret;
813 unsigned int val = 0;
814 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
815 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
816
817 addr = rinfo->ctrl_addr;
818
819 if (reg_init->mode_sleep)
820 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
821
822 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
823 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
824 if (ret < 0) {
825 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
826 addr, ret);
827 return ret;
828 }
829
830 if (reg_init->roof_floor) {
831 /* Enable externally controlled regulator */
832 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
833 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
834 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
835 if (ret < 0) {
836 dev_err(palmas->dev,
837 "Resource Register 0x%02x update failed %d\n",
838 addr, ret);
839 return ret;
840 }
841 return palmas_regulator_config_external(palmas, id, reg_init);
842 }
843 return 0;
844}
845
846static void palmas_enable_ldo8_track(struct palmas *palmas)
847{
848 unsigned int reg;
849 unsigned int addr;
850 int ret;
851 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
852 struct palmas_regs_info *rinfo;
853
854 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
855 addr = rinfo->ctrl_addr;
856
857 ret = palmas_ldo_read(palmas, addr, ®);
858 if (ret) {
859 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
860 return;
861 }
862
863 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
864 ret = palmas_ldo_write(palmas, addr, reg);
865 if (ret < 0) {
866 dev_err(palmas->dev, "Error in enabling tracking mode\n");
867 return;
868 }
869 /*
870 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
871 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
872 * and can be set from 0.45 to 1.65 V.
873 */
874 addr = rinfo->vsel_addr;
875 ret = palmas_ldo_read(palmas, addr, ®);
876 if (ret) {
877 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
878 return;
879 }
880
881 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
882 ret = palmas_ldo_write(palmas, addr, reg);
883 if (ret < 0)
884 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
885
886 return;
887}
888
889static int palmas_ldo_registration(struct palmas_pmic *pmic,
890 struct palmas_pmic_driver_data *ddata,
891 struct palmas_pmic_platform_data *pdata,
892 const char *pdev_name,
893 struct regulator_config config)
894{
895 int id, ret;
896 struct regulator_dev *rdev;
897 struct palmas_reg_init *reg_init;
898 struct palmas_regs_info *rinfo;
899 struct regulator_desc *desc;
900
901 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
902 if (pdata && pdata->reg_init[id])
903 reg_init = pdata->reg_init[id];
904 else
905 reg_init = NULL;
906
907 rinfo = &ddata->palmas_regs_info[id];
908 /* Miss out regulators which are not available due
909 * to alternate functions.
910 */
911
912 /* Register the regulators */
913 desc = &pmic->desc[id];
914 desc->name = rinfo->name;
915 desc->id = id;
916 desc->type = REGULATOR_VOLTAGE;
917 desc->owner = THIS_MODULE;
918
919 if (id < PALMAS_REG_REGEN1) {
920 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
921 if (reg_init && reg_init->roof_floor)
922 desc->ops = &palmas_ops_ext_control_ldo;
923 else
924 desc->ops = &palmas_ops_ldo;
925 desc->min_uV = 900000;
926 desc->uV_step = 50000;
927 desc->linear_min_sel = 1;
928 desc->enable_time = 500;
929 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
930 rinfo->vsel_addr);
931 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
932 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
933 rinfo->ctrl_addr);
934 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
935
936 /* Check if LDO8 is in tracking mode or not */
937 if (pdata && (id == PALMAS_REG_LDO8) &&
938 pdata->enable_ldo8_tracking) {
939 palmas_enable_ldo8_track(pmic->palmas);
940 desc->min_uV = 450000;
941 desc->uV_step = 25000;
942 }
943
944 /* LOD6 in vibrator mode will have enable time 2000us */
945 if (pdata && pdata->ldo6_vibrator &&
946 (id == PALMAS_REG_LDO6))
947 desc->enable_time = 2000;
948
949 if (id == PALMAS_REG_LDO9) {
950 desc->ops = &palmas_ops_ldo9;
951 desc->bypass_reg = desc->enable_reg;
952 desc->bypass_val_on =
953 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
954 desc->bypass_mask =
955 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
956 }
957 } else {
958 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
959 continue;
960
961 desc->n_voltages = 1;
962 if (reg_init && reg_init->roof_floor)
963 desc->ops = &palmas_ops_ext_control_extreg;
964 else
965 desc->ops = &palmas_ops_extreg;
966 desc->enable_reg =
967 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
968 rinfo->ctrl_addr);
969 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
970 }
971
972 if (pdata)
973 config.init_data = pdata->reg_data[id];
974 else
975 config.init_data = NULL;
976
977 desc->supply_name = rinfo->sname;
978 config.of_node = ddata->palmas_matches[id].of_node;
979
980 rdev = devm_regulator_register(pmic->dev, desc, &config);
981 if (IS_ERR(rdev)) {
982 dev_err(pmic->dev,
983 "failed to register %s regulator\n",
984 pdev_name);
985 return PTR_ERR(rdev);
986 }
987
988 /* Initialise sleep/init values from platform data */
989 if (pdata) {
990 reg_init = pdata->reg_init[id];
991 if (reg_init) {
992 if (id <= ddata->ldo_end)
993 ret = palmas_ldo_init(pmic->palmas, id,
994 reg_init);
995 else
996 ret = palmas_extreg_init(pmic->palmas,
997 id, reg_init);
998 if (ret)
999 return ret;
1000 }
1001 }
1002 }
1003
1004 return 0;
1005}
1006
1007static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1008 struct palmas_pmic_driver_data *ddata,
1009 struct palmas_pmic_platform_data *pdata,
1010 const char *pdev_name,
1011 struct regulator_config config)
1012{
1013 int id, ret;
1014 struct regulator_dev *rdev;
1015 struct palmas_reg_init *reg_init;
1016 struct palmas_regs_info *rinfo;
1017 struct regulator_desc *desc;
1018
1019 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1020 if (pdata && pdata->reg_init[id])
1021 reg_init = pdata->reg_init[id];
1022 else
1023 reg_init = NULL;
1024
1025 /* Miss out regulators which are not available due
1026 * to alternate functions.
1027 */
1028 rinfo = &ddata->palmas_regs_info[id];
1029
1030 /* Register the regulators */
1031 desc = &pmic->desc[id];
1032 desc->name = rinfo->name;
1033 desc->id = id;
1034 desc->type = REGULATOR_VOLTAGE;
1035 desc->owner = THIS_MODULE;
1036
1037 if (id < TPS65917_REG_REGEN1) {
1038 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
1039 if (reg_init && reg_init->roof_floor)
1040 desc->ops = &palmas_ops_ext_control_ldo;
1041 else
1042 desc->ops = &tps65917_ops_ldo;
1043 desc->min_uV = 900000;
1044 desc->uV_step = 50000;
1045 desc->linear_min_sel = 1;
1046 desc->enable_time = 500;
1047 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1048 rinfo->vsel_addr);
1049 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1050 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1051 rinfo->ctrl_addr);
1052 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
1053 /*
1054 * To be confirmed. Discussion on going with PMIC Team.
1055 * It is of the order of ~60mV/uS.
1056 */
1057 desc->ramp_delay = 2500;
1058 if (id == TPS65917_REG_LDO1 ||
1059 id == TPS65917_REG_LDO2) {
1060 desc->ops = &tps65917_ops_ldo_1_2;
1061 desc->bypass_reg = desc->enable_reg;
1062 desc->bypass_val_on =
1063 TPS65917_LDO1_CTRL_BYPASS_EN;
1064 desc->bypass_mask =
1065 TPS65917_LDO1_CTRL_BYPASS_EN;
1066 }
1067 } else {
1068 desc->n_voltages = 1;
1069 if (reg_init && reg_init->roof_floor)
1070 desc->ops = &palmas_ops_ext_control_extreg;
1071 else
1072 desc->ops = &palmas_ops_extreg;
1073 desc->enable_reg =
1074 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1075 rinfo->ctrl_addr);
1076 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1077 }
1078
1079 if (pdata)
1080 config.init_data = pdata->reg_data[id];
1081 else
1082 config.init_data = NULL;
1083
1084 desc->supply_name = rinfo->sname;
1085 config.of_node = ddata->palmas_matches[id].of_node;
1086
1087 rdev = devm_regulator_register(pmic->dev, desc, &config);
1088 if (IS_ERR(rdev)) {
1089 dev_err(pmic->dev,
1090 "failed to register %s regulator\n",
1091 pdev_name);
1092 return PTR_ERR(rdev);
1093 }
1094
1095 /* Initialise sleep/init values from platform data */
1096 if (pdata) {
1097 reg_init = pdata->reg_init[id];
1098 if (reg_init) {
1099 if (id < TPS65917_REG_REGEN1)
1100 ret = palmas_ldo_init(pmic->palmas,
1101 id, reg_init);
1102 else
1103 ret = palmas_extreg_init(pmic->palmas,
1104 id, reg_init);
1105 if (ret)
1106 return ret;
1107 }
1108 }
1109 }
1110
1111 return 0;
1112}
1113
1114static int palmas_smps_registration(struct palmas_pmic *pmic,
1115 struct palmas_pmic_driver_data *ddata,
1116 struct palmas_pmic_platform_data *pdata,
1117 const char *pdev_name,
1118 struct regulator_config config)
1119{
1120 int id, ret;
1121 unsigned int addr, reg;
1122 struct regulator_dev *rdev;
1123 struct palmas_reg_init *reg_init;
1124 struct palmas_regs_info *rinfo;
1125 struct regulator_desc *desc;
1126
1127 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1128 bool ramp_delay_support = false;
1129
1130 /*
1131 * Miss out regulators which are not available due
1132 * to slaving configurations.
1133 */
1134 switch (id) {
1135 case PALMAS_REG_SMPS12:
1136 case PALMAS_REG_SMPS3:
1137 if (pmic->smps123)
1138 continue;
1139 if (id == PALMAS_REG_SMPS12)
1140 ramp_delay_support = true;
1141 break;
1142 case PALMAS_REG_SMPS123:
1143 if (!pmic->smps123)
1144 continue;
1145 ramp_delay_support = true;
1146 break;
1147 case PALMAS_REG_SMPS45:
1148 case PALMAS_REG_SMPS7:
1149 if (pmic->smps457)
1150 continue;
1151 if (id == PALMAS_REG_SMPS45)
1152 ramp_delay_support = true;
1153 break;
1154 case PALMAS_REG_SMPS457:
1155 if (!pmic->smps457)
1156 continue;
1157 ramp_delay_support = true;
1158 break;
1159 case PALMAS_REG_SMPS10_OUT1:
1160 case PALMAS_REG_SMPS10_OUT2:
1161 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
1162 continue;
1163 }
1164 rinfo = &ddata->palmas_regs_info[id];
1165 desc = &pmic->desc[id];
1166
1167 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
1168 ramp_delay_support = true;
1169
1170 if (ramp_delay_support) {
1171 addr = rinfo->tstep_addr;
1172 ret = palmas_smps_read(pmic->palmas, addr, ®);
1173 if (ret < 0) {
1174 dev_err(pmic->dev,
1175 "reading TSTEP reg failed: %d\n", ret);
1176 return ret;
1177 }
1178 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1179 pmic->ramp_delay[id] = desc->ramp_delay;
1180 }
1181
1182 /* Initialise sleep/init values from platform data */
1183 if (pdata && pdata->reg_init[id]) {
1184 reg_init = pdata->reg_init[id];
1185 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1186 if (ret)
1187 return ret;
1188 } else {
1189 reg_init = NULL;
1190 }
1191
1192 /* Register the regulators */
1193 desc->name = rinfo->name;
1194 desc->id = id;
1195
1196 switch (id) {
1197 case PALMAS_REG_SMPS10_OUT1:
1198 case PALMAS_REG_SMPS10_OUT2:
1199 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1200 desc->ops = &palmas_ops_smps10;
1201 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1202 PALMAS_SMPS10_CTRL);
1203 desc->vsel_mask = SMPS10_VSEL;
1204 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1205 PALMAS_SMPS10_CTRL);
1206 if (id == PALMAS_REG_SMPS10_OUT1)
1207 desc->enable_mask = SMPS10_SWITCH_EN;
1208 else
1209 desc->enable_mask = SMPS10_BOOST_EN;
1210 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1211 PALMAS_SMPS10_CTRL);
1212 desc->bypass_val_on = SMPS10_BYPASS_EN;
1213 desc->bypass_mask = SMPS10_BYPASS_EN;
1214 desc->min_uV = 3750000;
1215 desc->uV_step = 1250000;
1216 break;
1217 default:
1218 /*
1219 * Read and store the RANGE bit for later use
1220 * This must be done before regulator is probed,
1221 * otherwise we error in probe with unsupportable
1222 * ranges. Read the current smps mode for later use.
1223 */
1224 addr = rinfo->vsel_addr;
1225 desc->n_linear_ranges = 3;
1226
1227 ret = palmas_smps_read(pmic->palmas, addr, ®);
1228 if (ret)
1229 return ret;
1230 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1231 pmic->range[id] = 1;
1232 if (pmic->range[id])
1233 desc->linear_ranges = smps_high_ranges;
1234 else
1235 desc->linear_ranges = smps_low_ranges;
1236
1237 if (reg_init && reg_init->roof_floor)
1238 desc->ops = &palmas_ops_ext_control_smps;
1239 else
1240 desc->ops = &palmas_ops_smps;
1241 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1242 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1243 rinfo->vsel_addr);
1244 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1245
1246 /* Read the smps mode for later use. */
1247 addr = rinfo->ctrl_addr;
1248 ret = palmas_smps_read(pmic->palmas, addr, ®);
1249 if (ret)
1250 return ret;
1251 pmic->current_reg_mode[id] = reg &
1252 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1253
1254 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1255 rinfo->ctrl_addr);
1256 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1257 /* set_mode overrides this value */
1258 desc->enable_val = SMPS_CTRL_MODE_ON;
1259 }
1260
1261 desc->type = REGULATOR_VOLTAGE;
1262 desc->owner = THIS_MODULE;
1263
1264 if (pdata)
1265 config.init_data = pdata->reg_data[id];
1266 else
1267 config.init_data = NULL;
1268
1269 desc->supply_name = rinfo->sname;
1270 config.of_node = ddata->palmas_matches[id].of_node;
1271
1272 rdev = devm_regulator_register(pmic->dev, desc, &config);
1273 if (IS_ERR(rdev)) {
1274 dev_err(pmic->dev,
1275 "failed to register %s regulator\n",
1276 pdev_name);
1277 return PTR_ERR(rdev);
1278 }
1279 }
1280
1281 return 0;
1282}
1283
1284static int tps65917_smps_registration(struct palmas_pmic *pmic,
1285 struct palmas_pmic_driver_data *ddata,
1286 struct palmas_pmic_platform_data *pdata,
1287 const char *pdev_name,
1288 struct regulator_config config)
1289{
1290 int id, ret;
1291 unsigned int addr, reg;
1292 struct regulator_dev *rdev;
1293 struct palmas_reg_init *reg_init;
1294 struct palmas_regs_info *rinfo;
1295 struct regulator_desc *desc;
1296
1297 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1298 /*
1299 * Miss out regulators which are not available due
1300 * to slaving configurations.
1301 */
1302 desc = &pmic->desc[id];
1303 desc->n_linear_ranges = 3;
1304 if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) &&
1305 pmic->smps12)
1306 continue;
1307
1308 /* Initialise sleep/init values from platform data */
1309 if (pdata && pdata->reg_init[id]) {
1310 reg_init = pdata->reg_init[id];
1311 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1312 if (ret)
1313 return ret;
1314 } else {
1315 reg_init = NULL;
1316 }
1317 rinfo = &ddata->palmas_regs_info[id];
1318
1319 /* Register the regulators */
1320 desc->name = rinfo->name;
1321 desc->id = id;
1322
1323 /*
1324 * Read and store the RANGE bit for later use
1325 * This must be done before regulator is probed,
1326 * otherwise we error in probe with unsupportable
1327 * ranges. Read the current smps mode for later use.
1328 */
1329 addr = rinfo->vsel_addr;
1330
1331 ret = palmas_smps_read(pmic->palmas, addr, ®);
1332 if (ret)
1333 return ret;
1334 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1335 pmic->range[id] = 1;
1336
1337 if (pmic->range[id])
1338 desc->linear_ranges = smps_high_ranges;
1339 else
1340 desc->linear_ranges = smps_low_ranges;
1341
1342 if (reg_init && reg_init->roof_floor)
1343 desc->ops = &tps65917_ops_ext_control_smps;
1344 else
1345 desc->ops = &tps65917_ops_smps;
1346 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1347 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1348 rinfo->vsel_addr);
1349 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1350 desc->ramp_delay = 2500;
1351
1352 /* Read the smps mode for later use. */
1353 addr = rinfo->ctrl_addr;
1354 ret = palmas_smps_read(pmic->palmas, addr, ®);
1355 if (ret)
1356 return ret;
1357 pmic->current_reg_mode[id] = reg &
1358 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1359 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1360 rinfo->ctrl_addr);
1361 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1362 /* set_mode overrides this value */
1363 desc->enable_val = SMPS_CTRL_MODE_ON;
1364
1365 desc->type = REGULATOR_VOLTAGE;
1366 desc->owner = THIS_MODULE;
1367
1368 if (pdata)
1369 config.init_data = pdata->reg_data[id];
1370 else
1371 config.init_data = NULL;
1372
1373 desc->supply_name = rinfo->sname;
1374 config.of_node = ddata->palmas_matches[id].of_node;
1375
1376 rdev = devm_regulator_register(pmic->dev, desc, &config);
1377 if (IS_ERR(rdev)) {
1378 dev_err(pmic->dev,
1379 "failed to register %s regulator\n",
1380 pdev_name);
1381 return PTR_ERR(rdev);
1382 }
1383 }
1384
1385 return 0;
1386}
1387
1388static struct of_regulator_match palmas_matches[] = {
1389 { .name = "smps12", },
1390 { .name = "smps123", },
1391 { .name = "smps3", },
1392 { .name = "smps45", },
1393 { .name = "smps457", },
1394 { .name = "smps6", },
1395 { .name = "smps7", },
1396 { .name = "smps8", },
1397 { .name = "smps9", },
1398 { .name = "smps10_out2", },
1399 { .name = "smps10_out1", },
1400 { .name = "ldo1", },
1401 { .name = "ldo2", },
1402 { .name = "ldo3", },
1403 { .name = "ldo4", },
1404 { .name = "ldo5", },
1405 { .name = "ldo6", },
1406 { .name = "ldo7", },
1407 { .name = "ldo8", },
1408 { .name = "ldo9", },
1409 { .name = "ldoln", },
1410 { .name = "ldousb", },
1411 { .name = "regen1", },
1412 { .name = "regen2", },
1413 { .name = "regen3", },
1414 { .name = "sysen1", },
1415 { .name = "sysen2", },
1416};
1417
1418static struct of_regulator_match tps65917_matches[] = {
1419 { .name = "smps1", },
1420 { .name = "smps2", },
1421 { .name = "smps3", },
1422 { .name = "smps4", },
1423 { .name = "smps5", },
1424 { .name = "smps12",},
1425 { .name = "ldo1", },
1426 { .name = "ldo2", },
1427 { .name = "ldo3", },
1428 { .name = "ldo4", },
1429 { .name = "ldo5", },
1430 { .name = "regen1", },
1431 { .name = "regen2", },
1432 { .name = "regen3", },
1433 { .name = "sysen1", },
1434 { .name = "sysen2", },
1435};
1436
1437static struct palmas_pmic_driver_data palmas_ddata = {
1438 .smps_start = PALMAS_REG_SMPS12,
1439 .smps_end = PALMAS_REG_SMPS10_OUT1,
1440 .ldo_begin = PALMAS_REG_LDO1,
1441 .ldo_end = PALMAS_REG_LDOUSB,
1442 .max_reg = PALMAS_NUM_REGS,
1443 .has_regen3 = true,
1444 .palmas_regs_info = palmas_generic_regs_info,
1445 .palmas_matches = palmas_matches,
1446 .sleep_req_info = palma_sleep_req_info,
1447 .smps_register = palmas_smps_registration,
1448 .ldo_register = palmas_ldo_registration,
1449};
1450
1451static struct palmas_pmic_driver_data tps65917_ddata = {
1452 .smps_start = TPS65917_REG_SMPS1,
1453 .smps_end = TPS65917_REG_SMPS12,
1454 .ldo_begin = TPS65917_REG_LDO1,
1455 .ldo_end = TPS65917_REG_LDO5,
1456 .max_reg = TPS65917_NUM_REGS,
1457 .has_regen3 = true,
1458 .palmas_regs_info = tps65917_regs_info,
1459 .palmas_matches = tps65917_matches,
1460 .sleep_req_info = tps65917_sleep_req_info,
1461 .smps_register = tps65917_smps_registration,
1462 .ldo_register = tps65917_ldo_registration,
1463};
1464
1465static int palmas_dt_to_pdata(struct device *dev,
1466 struct device_node *node,
1467 struct palmas_pmic_platform_data *pdata,
1468 struct palmas_pmic_driver_data *ddata)
1469{
1470 struct device_node *regulators;
1471 u32 prop;
1472 int idx, ret;
1473
1474 regulators = of_get_child_by_name(node, "regulators");
1475 if (!regulators) {
1476 dev_info(dev, "regulator node not found\n");
1477 return 0;
1478 }
1479
1480 ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1481 ddata->max_reg);
1482 of_node_put(regulators);
1483 if (ret < 0) {
1484 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
1485 return 0;
1486 }
1487
1488 for (idx = 0; idx < ddata->max_reg; idx++) {
1489 struct of_regulator_match *match;
1490 struct palmas_reg_init *rinit;
1491 struct device_node *np;
1492
1493 match = &ddata->palmas_matches[idx];
1494 np = match->of_node;
1495
1496 if (!match->init_data || !np)
1497 continue;
1498
1499 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
1500 if (!rinit)
1501 return -ENOMEM;
1502
1503 pdata->reg_data[idx] = match->init_data;
1504 pdata->reg_init[idx] = rinit;
1505
1506 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
1507 ret = of_property_read_u32(np, "ti,roof-floor", &prop);
1508 /* EINVAL: Property not found */
1509 if (ret != -EINVAL) {
1510 int econtrol;
1511
1512 /* use default value, when no value is specified */
1513 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1514 if (!ret) {
1515 switch (prop) {
1516 case 1:
1517 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1518 break;
1519 case 2:
1520 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1521 break;
1522 case 3:
1523 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1524 break;
1525 default:
1526 WARN_ON(1);
1527 dev_warn(dev,
1528 "%s: Invalid roof-floor option: %u\n",
1529 match->name, prop);
1530 break;
1531 }
1532 }
1533 rinit->roof_floor = econtrol;
1534 }
1535
1536 ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
1537 if (!ret)
1538 rinit->mode_sleep = prop;
1539
1540 ret = of_property_read_bool(np, "ti,smps-range");
1541 if (ret)
1542 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
1543
1544 if (idx == PALMAS_REG_LDO8)
1545 pdata->enable_ldo8_tracking = of_property_read_bool(
1546 np, "ti,enable-ldo8-tracking");
1547 }
1548
1549 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
1550
1551 return 0;
1552}
1553
1554static const struct of_device_id of_palmas_match_tbl[] = {
1555 {
1556 .compatible = "ti,palmas-pmic",
1557 .data = &palmas_ddata,
1558 },
1559 {
1560 .compatible = "ti,twl6035-pmic",
1561 .data = &palmas_ddata,
1562 },
1563 {
1564 .compatible = "ti,twl6036-pmic",
1565 .data = &palmas_ddata,
1566 },
1567 {
1568 .compatible = "ti,twl6037-pmic",
1569 .data = &palmas_ddata,
1570 },
1571 {
1572 .compatible = "ti,tps65913-pmic",
1573 .data = &palmas_ddata,
1574 },
1575 {
1576 .compatible = "ti,tps65914-pmic",
1577 .data = &palmas_ddata,
1578 },
1579 {
1580 .compatible = "ti,tps80036-pmic",
1581 .data = &palmas_ddata,
1582 },
1583 {
1584 .compatible = "ti,tps659038-pmic",
1585 .data = &palmas_ddata,
1586 },
1587 {
1588 .compatible = "ti,tps65917-pmic",
1589 .data = &tps65917_ddata,
1590 },
1591 { /* end */ }
1592};
1593
1594static int palmas_regulators_probe(struct platform_device *pdev)
1595{
1596 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1597 struct palmas_pmic_platform_data *pdata;
1598 struct device_node *node = pdev->dev.of_node;
1599 struct palmas_pmic_driver_data *driver_data;
1600 struct regulator_config config = { };
1601 struct palmas_pmic *pmic;
1602 const char *pdev_name;
1603 int ret = 0;
1604 unsigned int reg;
1605
1606 driver_data = (struct palmas_pmic_driver_data *)device_get_match_data(&pdev->dev);
1607 if (!driver_data)
1608 return -ENODATA;
1609
1610 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1611 if (!pdata)
1612 return -ENOMEM;
1613
1614 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1615 if (!pmic)
1616 return -ENOMEM;
1617
1618 if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
1619 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1620 TPS659038_REGEN2_CTRL;
1621 palmas_ddata.has_regen3 = false;
1622 }
1623
1624 pmic->dev = &pdev->dev;
1625 pmic->palmas = palmas;
1626 palmas->pmic = pmic;
1627 platform_set_drvdata(pdev, pmic);
1628 pmic->palmas->pmic_ddata = driver_data;
1629
1630 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1631 if (ret)
1632 return ret;
1633
1634 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®);
1635 if (ret)
1636 return ret;
1637
1638 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) {
1639 pmic->smps123 = 1;
1640 pmic->smps12 = 1;
1641 }
1642
1643 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1644 pmic->smps457 = 1;
1645
1646 config.regmap = palmas->regmap[REGULATOR_SLAVE];
1647 config.dev = &pdev->dev;
1648 config.driver_data = pmic;
1649 pdev_name = pdev->name;
1650
1651 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1652 config);
1653 if (ret)
1654 return ret;
1655
1656 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1657 config);
1658
1659 return ret;
1660}
1661
1662static struct platform_driver palmas_driver = {
1663 .driver = {
1664 .name = "palmas-pmic",
1665 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1666 .of_match_table = of_palmas_match_tbl,
1667 },
1668 .probe = palmas_regulators_probe,
1669};
1670
1671static int __init palmas_init(void)
1672{
1673 return platform_driver_register(&palmas_driver);
1674}
1675subsys_initcall(palmas_init);
1676
1677static void __exit palmas_exit(void)
1678{
1679 platform_driver_unregister(&palmas_driver);
1680}
1681module_exit(palmas_exit);
1682
1683MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1684MODULE_DESCRIPTION("Palmas voltage regulator driver");
1685MODULE_LICENSE("GPL");
1686MODULE_ALIAS("platform:palmas-pmic");
1687MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for Regulator part of Palmas PMIC Chips
4 *
5 * Copyright 2011-2013 Texas Instruments Inc.
6 *
7 * Author: Graeme Gregory <gg@slimlogic.co.uk>
8 * Author: Ian Lartey <ian@slimlogic.co.uk>
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
16#include <linux/regulator/driver.h>
17#include <linux/regulator/machine.h>
18#include <linux/slab.h>
19#include <linux/regmap.h>
20#include <linux/mfd/palmas.h>
21#include <linux/of.h>
22#include <linux/of_platform.h>
23#include <linux/regulator/of_regulator.h>
24
25static const struct regulator_linear_range smps_low_ranges[] = {
26 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
27 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
28 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
29 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
30};
31
32static const struct regulator_linear_range smps_high_ranges[] = {
33 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
34 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
35 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
36 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
37};
38
39static struct palmas_regs_info palmas_generic_regs_info[] = {
40 {
41 .name = "SMPS12",
42 .sname = "smps1-in",
43 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
44 .ctrl_addr = PALMAS_SMPS12_CTRL,
45 .tstep_addr = PALMAS_SMPS12_TSTEP,
46 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
47 },
48 {
49 .name = "SMPS123",
50 .sname = "smps1-in",
51 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
52 .ctrl_addr = PALMAS_SMPS12_CTRL,
53 .tstep_addr = PALMAS_SMPS12_TSTEP,
54 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
55 },
56 {
57 .name = "SMPS3",
58 .sname = "smps3-in",
59 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
60 .ctrl_addr = PALMAS_SMPS3_CTRL,
61 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
62 },
63 {
64 .name = "SMPS45",
65 .sname = "smps4-in",
66 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
67 .ctrl_addr = PALMAS_SMPS45_CTRL,
68 .tstep_addr = PALMAS_SMPS45_TSTEP,
69 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
70 },
71 {
72 .name = "SMPS457",
73 .sname = "smps4-in",
74 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
75 .ctrl_addr = PALMAS_SMPS45_CTRL,
76 .tstep_addr = PALMAS_SMPS45_TSTEP,
77 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
78 },
79 {
80 .name = "SMPS6",
81 .sname = "smps6-in",
82 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
83 .ctrl_addr = PALMAS_SMPS6_CTRL,
84 .tstep_addr = PALMAS_SMPS6_TSTEP,
85 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
86 },
87 {
88 .name = "SMPS7",
89 .sname = "smps7-in",
90 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
91 .ctrl_addr = PALMAS_SMPS7_CTRL,
92 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
93 },
94 {
95 .name = "SMPS8",
96 .sname = "smps8-in",
97 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
98 .ctrl_addr = PALMAS_SMPS8_CTRL,
99 .tstep_addr = PALMAS_SMPS8_TSTEP,
100 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
101 },
102 {
103 .name = "SMPS9",
104 .sname = "smps9-in",
105 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
106 .ctrl_addr = PALMAS_SMPS9_CTRL,
107 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
108 },
109 {
110 .name = "SMPS10_OUT2",
111 .sname = "smps10-in",
112 .ctrl_addr = PALMAS_SMPS10_CTRL,
113 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
114 },
115 {
116 .name = "SMPS10_OUT1",
117 .sname = "smps10-out2",
118 .ctrl_addr = PALMAS_SMPS10_CTRL,
119 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
120 },
121 {
122 .name = "LDO1",
123 .sname = "ldo1-in",
124 .vsel_addr = PALMAS_LDO1_VOLTAGE,
125 .ctrl_addr = PALMAS_LDO1_CTRL,
126 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
127 },
128 {
129 .name = "LDO2",
130 .sname = "ldo2-in",
131 .vsel_addr = PALMAS_LDO2_VOLTAGE,
132 .ctrl_addr = PALMAS_LDO2_CTRL,
133 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
134 },
135 {
136 .name = "LDO3",
137 .sname = "ldo3-in",
138 .vsel_addr = PALMAS_LDO3_VOLTAGE,
139 .ctrl_addr = PALMAS_LDO3_CTRL,
140 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
141 },
142 {
143 .name = "LDO4",
144 .sname = "ldo4-in",
145 .vsel_addr = PALMAS_LDO4_VOLTAGE,
146 .ctrl_addr = PALMAS_LDO4_CTRL,
147 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
148 },
149 {
150 .name = "LDO5",
151 .sname = "ldo5-in",
152 .vsel_addr = PALMAS_LDO5_VOLTAGE,
153 .ctrl_addr = PALMAS_LDO5_CTRL,
154 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
155 },
156 {
157 .name = "LDO6",
158 .sname = "ldo6-in",
159 .vsel_addr = PALMAS_LDO6_VOLTAGE,
160 .ctrl_addr = PALMAS_LDO6_CTRL,
161 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
162 },
163 {
164 .name = "LDO7",
165 .sname = "ldo7-in",
166 .vsel_addr = PALMAS_LDO7_VOLTAGE,
167 .ctrl_addr = PALMAS_LDO7_CTRL,
168 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
169 },
170 {
171 .name = "LDO8",
172 .sname = "ldo8-in",
173 .vsel_addr = PALMAS_LDO8_VOLTAGE,
174 .ctrl_addr = PALMAS_LDO8_CTRL,
175 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
176 },
177 {
178 .name = "LDO9",
179 .sname = "ldo9-in",
180 .vsel_addr = PALMAS_LDO9_VOLTAGE,
181 .ctrl_addr = PALMAS_LDO9_CTRL,
182 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
183 },
184 {
185 .name = "LDOLN",
186 .sname = "ldoln-in",
187 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
188 .ctrl_addr = PALMAS_LDOLN_CTRL,
189 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
190 },
191 {
192 .name = "LDOUSB",
193 .sname = "ldousb-in",
194 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
195 .ctrl_addr = PALMAS_LDOUSB_CTRL,
196 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
197 },
198 {
199 .name = "REGEN1",
200 .ctrl_addr = PALMAS_REGEN1_CTRL,
201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
202 },
203 {
204 .name = "REGEN2",
205 .ctrl_addr = PALMAS_REGEN2_CTRL,
206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
207 },
208 {
209 .name = "REGEN3",
210 .ctrl_addr = PALMAS_REGEN3_CTRL,
211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
212 },
213 {
214 .name = "SYSEN1",
215 .ctrl_addr = PALMAS_SYSEN1_CTRL,
216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
217 },
218 {
219 .name = "SYSEN2",
220 .ctrl_addr = PALMAS_SYSEN2_CTRL,
221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
222 },
223};
224
225static struct palmas_regs_info tps65917_regs_info[] = {
226 {
227 .name = "SMPS1",
228 .sname = "smps1-in",
229 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
230 .ctrl_addr = TPS65917_SMPS1_CTRL,
231 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
232 },
233 {
234 .name = "SMPS2",
235 .sname = "smps2-in",
236 .vsel_addr = TPS65917_SMPS2_VOLTAGE,
237 .ctrl_addr = TPS65917_SMPS2_CTRL,
238 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
239 },
240 {
241 .name = "SMPS3",
242 .sname = "smps3-in",
243 .vsel_addr = TPS65917_SMPS3_VOLTAGE,
244 .ctrl_addr = TPS65917_SMPS3_CTRL,
245 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
246 },
247 {
248 .name = "SMPS4",
249 .sname = "smps4-in",
250 .vsel_addr = TPS65917_SMPS4_VOLTAGE,
251 .ctrl_addr = TPS65917_SMPS4_CTRL,
252 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
253 },
254 {
255 .name = "SMPS5",
256 .sname = "smps5-in",
257 .vsel_addr = TPS65917_SMPS5_VOLTAGE,
258 .ctrl_addr = TPS65917_SMPS5_CTRL,
259 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
260 },
261 {
262 .name = "SMPS12",
263 .sname = "smps1-in",
264 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
265 .ctrl_addr = TPS65917_SMPS1_CTRL,
266 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS12,
267 },
268 {
269 .name = "LDO1",
270 .sname = "ldo1-in",
271 .vsel_addr = TPS65917_LDO1_VOLTAGE,
272 .ctrl_addr = TPS65917_LDO1_CTRL,
273 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
274 },
275 {
276 .name = "LDO2",
277 .sname = "ldo2-in",
278 .vsel_addr = TPS65917_LDO2_VOLTAGE,
279 .ctrl_addr = TPS65917_LDO2_CTRL,
280 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
281 },
282 {
283 .name = "LDO3",
284 .sname = "ldo3-in",
285 .vsel_addr = TPS65917_LDO3_VOLTAGE,
286 .ctrl_addr = TPS65917_LDO3_CTRL,
287 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
288 },
289 {
290 .name = "LDO4",
291 .sname = "ldo4-in",
292 .vsel_addr = TPS65917_LDO4_VOLTAGE,
293 .ctrl_addr = TPS65917_LDO4_CTRL,
294 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
295 },
296 {
297 .name = "LDO5",
298 .sname = "ldo5-in",
299 .vsel_addr = TPS65917_LDO5_VOLTAGE,
300 .ctrl_addr = TPS65917_LDO5_CTRL,
301 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
302 },
303 {
304 .name = "REGEN1",
305 .ctrl_addr = TPS65917_REGEN1_CTRL,
306 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
307 },
308 {
309 .name = "REGEN2",
310 .ctrl_addr = TPS65917_REGEN2_CTRL,
311 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
312 },
313 {
314 .name = "REGEN3",
315 .ctrl_addr = TPS65917_REGEN3_CTRL,
316 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
317 },
318};
319
320#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
321 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
322 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
323 .reg_offset = _offset, \
324 .bit_pos = _pos, \
325 }
326
327static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
328 EXTERNAL_REQUESTOR(REGEN1, 0, 0),
329 EXTERNAL_REQUESTOR(REGEN2, 0, 1),
330 EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
331 EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
332 EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
333 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
334 EXTERNAL_REQUESTOR(REGEN3, 0, 6),
335 EXTERNAL_REQUESTOR(SMPS12, 1, 0),
336 EXTERNAL_REQUESTOR(SMPS3, 1, 1),
337 EXTERNAL_REQUESTOR(SMPS45, 1, 2),
338 EXTERNAL_REQUESTOR(SMPS6, 1, 3),
339 EXTERNAL_REQUESTOR(SMPS7, 1, 4),
340 EXTERNAL_REQUESTOR(SMPS8, 1, 5),
341 EXTERNAL_REQUESTOR(SMPS9, 1, 6),
342 EXTERNAL_REQUESTOR(SMPS10, 1, 7),
343 EXTERNAL_REQUESTOR(LDO1, 2, 0),
344 EXTERNAL_REQUESTOR(LDO2, 2, 1),
345 EXTERNAL_REQUESTOR(LDO3, 2, 2),
346 EXTERNAL_REQUESTOR(LDO4, 2, 3),
347 EXTERNAL_REQUESTOR(LDO5, 2, 4),
348 EXTERNAL_REQUESTOR(LDO6, 2, 5),
349 EXTERNAL_REQUESTOR(LDO7, 2, 6),
350 EXTERNAL_REQUESTOR(LDO8, 2, 7),
351 EXTERNAL_REQUESTOR(LDO9, 3, 0),
352 EXTERNAL_REQUESTOR(LDOLN, 3, 1),
353 EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
354};
355
356#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
357 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
358 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
359 .reg_offset = _offset, \
360 .bit_pos = _pos, \
361 }
362
363static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
364 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
365 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
366 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
367 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
368 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
369 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
370 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
371 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
372 EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5),
373 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
374 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
375 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
376 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
377 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
378};
379
380static const unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
381
382#define SMPS_CTRL_MODE_OFF 0x00
383#define SMPS_CTRL_MODE_ON 0x01
384#define SMPS_CTRL_MODE_ECO 0x02
385#define SMPS_CTRL_MODE_PWM 0x03
386
387#define PALMAS_SMPS_NUM_VOLTAGES 122
388#define PALMAS_SMPS10_NUM_VOLTAGES 2
389#define PALMAS_LDO_NUM_VOLTAGES 50
390
391#define SMPS10_VSEL (1<<3)
392#define SMPS10_BOOST_EN (1<<2)
393#define SMPS10_BYPASS_EN (1<<1)
394#define SMPS10_SWITCH_EN (1<<0)
395
396#define REGULATOR_SLAVE 0
397
398static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
399 unsigned int *dest)
400{
401 unsigned int addr;
402
403 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
404
405 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
406}
407
408static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
409 unsigned int value)
410{
411 unsigned int addr;
412
413 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
414
415 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
416}
417
418static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
419 unsigned int *dest)
420{
421 unsigned int addr;
422
423 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
424
425 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
426}
427
428static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
429 unsigned int value)
430{
431 unsigned int addr;
432
433 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
434
435 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
436}
437
438static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
439{
440 int id = rdev_get_id(dev);
441 int ret;
442 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
443 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
444 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
445 unsigned int reg;
446 bool rail_enable = true;
447
448 ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®);
449 if (ret)
450 return ret;
451
452 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
453
454 if (reg == SMPS_CTRL_MODE_OFF)
455 rail_enable = false;
456
457 switch (mode) {
458 case REGULATOR_MODE_NORMAL:
459 reg |= SMPS_CTRL_MODE_ON;
460 break;
461 case REGULATOR_MODE_IDLE:
462 reg |= SMPS_CTRL_MODE_ECO;
463 break;
464 case REGULATOR_MODE_FAST:
465 reg |= SMPS_CTRL_MODE_PWM;
466 break;
467 default:
468 return -EINVAL;
469 }
470
471 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
472 if (rail_enable)
473 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
474
475 /* Switch the enable value to ensure this is used for enable */
476 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
477
478 return 0;
479}
480
481static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
482{
483 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
484 int id = rdev_get_id(dev);
485 unsigned int reg;
486
487 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
488
489 switch (reg) {
490 case SMPS_CTRL_MODE_ON:
491 return REGULATOR_MODE_NORMAL;
492 case SMPS_CTRL_MODE_ECO:
493 return REGULATOR_MODE_IDLE;
494 case SMPS_CTRL_MODE_PWM:
495 return REGULATOR_MODE_FAST;
496 }
497
498 return 0;
499}
500
501static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
502 int ramp_delay)
503{
504 int id = rdev_get_id(rdev);
505 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
506 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
507 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
508 unsigned int reg = 0;
509 int ret;
510
511 /* SMPS3 and SMPS7 do not have tstep_addr setting */
512 switch (id) {
513 case PALMAS_REG_SMPS3:
514 case PALMAS_REG_SMPS7:
515 return 0;
516 }
517
518 if (ramp_delay <= 0)
519 reg = 0;
520 else if (ramp_delay <= 2500)
521 reg = 3;
522 else if (ramp_delay <= 5000)
523 reg = 2;
524 else
525 reg = 1;
526
527 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
528 if (ret < 0) {
529 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
530 return ret;
531 }
532
533 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
534 return ret;
535}
536
537static const struct regulator_ops palmas_ops_smps = {
538 .is_enabled = regulator_is_enabled_regmap,
539 .enable = regulator_enable_regmap,
540 .disable = regulator_disable_regmap,
541 .set_mode = palmas_set_mode_smps,
542 .get_mode = palmas_get_mode_smps,
543 .get_voltage_sel = regulator_get_voltage_sel_regmap,
544 .set_voltage_sel = regulator_set_voltage_sel_regmap,
545 .list_voltage = regulator_list_voltage_linear_range,
546 .map_voltage = regulator_map_voltage_linear_range,
547 .set_voltage_time_sel = regulator_set_voltage_time_sel,
548 .set_ramp_delay = palmas_smps_set_ramp_delay,
549};
550
551static const struct regulator_ops palmas_ops_ext_control_smps = {
552 .set_mode = palmas_set_mode_smps,
553 .get_mode = palmas_get_mode_smps,
554 .get_voltage_sel = regulator_get_voltage_sel_regmap,
555 .set_voltage_sel = regulator_set_voltage_sel_regmap,
556 .list_voltage = regulator_list_voltage_linear_range,
557 .map_voltage = regulator_map_voltage_linear_range,
558 .set_voltage_time_sel = regulator_set_voltage_time_sel,
559 .set_ramp_delay = palmas_smps_set_ramp_delay,
560};
561
562static const struct regulator_ops palmas_ops_smps10 = {
563 .is_enabled = regulator_is_enabled_regmap,
564 .enable = regulator_enable_regmap,
565 .disable = regulator_disable_regmap,
566 .get_voltage_sel = regulator_get_voltage_sel_regmap,
567 .set_voltage_sel = regulator_set_voltage_sel_regmap,
568 .list_voltage = regulator_list_voltage_linear,
569 .map_voltage = regulator_map_voltage_linear,
570 .set_bypass = regulator_set_bypass_regmap,
571 .get_bypass = regulator_get_bypass_regmap,
572};
573
574static const struct regulator_ops tps65917_ops_smps = {
575 .is_enabled = regulator_is_enabled_regmap,
576 .enable = regulator_enable_regmap,
577 .disable = regulator_disable_regmap,
578 .set_mode = palmas_set_mode_smps,
579 .get_mode = palmas_get_mode_smps,
580 .get_voltage_sel = regulator_get_voltage_sel_regmap,
581 .set_voltage_sel = regulator_set_voltage_sel_regmap,
582 .list_voltage = regulator_list_voltage_linear_range,
583 .map_voltage = regulator_map_voltage_linear_range,
584 .set_voltage_time_sel = regulator_set_voltage_time_sel,
585};
586
587static const struct regulator_ops tps65917_ops_ext_control_smps = {
588 .set_mode = palmas_set_mode_smps,
589 .get_mode = palmas_get_mode_smps,
590 .get_voltage_sel = regulator_get_voltage_sel_regmap,
591 .set_voltage_sel = regulator_set_voltage_sel_regmap,
592 .list_voltage = regulator_list_voltage_linear_range,
593 .map_voltage = regulator_map_voltage_linear_range,
594};
595
596static int palmas_is_enabled_ldo(struct regulator_dev *dev)
597{
598 int id = rdev_get_id(dev);
599 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
600 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
601 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
602 unsigned int reg;
603
604 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®);
605
606 reg &= PALMAS_LDO1_CTRL_STATUS;
607
608 return !!(reg);
609}
610
611static const struct regulator_ops palmas_ops_ldo = {
612 .is_enabled = palmas_is_enabled_ldo,
613 .enable = regulator_enable_regmap,
614 .disable = regulator_disable_regmap,
615 .get_voltage_sel = regulator_get_voltage_sel_regmap,
616 .set_voltage_sel = regulator_set_voltage_sel_regmap,
617 .list_voltage = regulator_list_voltage_linear,
618 .map_voltage = regulator_map_voltage_linear,
619};
620
621static const struct regulator_ops palmas_ops_ldo9 = {
622 .is_enabled = palmas_is_enabled_ldo,
623 .enable = regulator_enable_regmap,
624 .disable = regulator_disable_regmap,
625 .get_voltage_sel = regulator_get_voltage_sel_regmap,
626 .set_voltage_sel = regulator_set_voltage_sel_regmap,
627 .list_voltage = regulator_list_voltage_linear,
628 .map_voltage = regulator_map_voltage_linear,
629 .set_bypass = regulator_set_bypass_regmap,
630 .get_bypass = regulator_get_bypass_regmap,
631};
632
633static const struct regulator_ops palmas_ops_ext_control_ldo = {
634 .get_voltage_sel = regulator_get_voltage_sel_regmap,
635 .set_voltage_sel = regulator_set_voltage_sel_regmap,
636 .list_voltage = regulator_list_voltage_linear,
637 .map_voltage = regulator_map_voltage_linear,
638};
639
640static const struct regulator_ops palmas_ops_extreg = {
641 .is_enabled = regulator_is_enabled_regmap,
642 .enable = regulator_enable_regmap,
643 .disable = regulator_disable_regmap,
644};
645
646static const struct regulator_ops palmas_ops_ext_control_extreg = {
647};
648
649static const struct regulator_ops tps65917_ops_ldo = {
650 .is_enabled = palmas_is_enabled_ldo,
651 .enable = regulator_enable_regmap,
652 .disable = regulator_disable_regmap,
653 .get_voltage_sel = regulator_get_voltage_sel_regmap,
654 .set_voltage_sel = regulator_set_voltage_sel_regmap,
655 .list_voltage = regulator_list_voltage_linear,
656 .map_voltage = regulator_map_voltage_linear,
657 .set_voltage_time_sel = regulator_set_voltage_time_sel,
658};
659
660static const struct regulator_ops tps65917_ops_ldo_1_2 = {
661 .is_enabled = palmas_is_enabled_ldo,
662 .enable = regulator_enable_regmap,
663 .disable = regulator_disable_regmap,
664 .get_voltage_sel = regulator_get_voltage_sel_regmap,
665 .set_voltage_sel = regulator_set_voltage_sel_regmap,
666 .list_voltage = regulator_list_voltage_linear,
667 .map_voltage = regulator_map_voltage_linear,
668 .set_voltage_time_sel = regulator_set_voltage_time_sel,
669 .set_bypass = regulator_set_bypass_regmap,
670 .get_bypass = regulator_get_bypass_regmap,
671};
672
673static int palmas_regulator_config_external(struct palmas *palmas, int id,
674 struct palmas_reg_init *reg_init)
675{
676 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
677 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
678 int ret;
679
680 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
681 reg_init->roof_floor, true);
682 if (ret < 0)
683 dev_err(palmas->dev,
684 "Ext control config for regulator %d failed %d\n",
685 id, ret);
686 return ret;
687}
688
689/*
690 * setup the hardware based sleep configuration of the SMPS/LDO regulators
691 * from the platform data. This is different to the software based control
692 * supported by the regulator framework as it is controlled by toggling
693 * pins on the PMIC such as PREQ, SYSEN, ...
694 */
695static int palmas_smps_init(struct palmas *palmas, int id,
696 struct palmas_reg_init *reg_init)
697{
698 unsigned int reg;
699 int ret;
700 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
701 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
702 unsigned int addr = rinfo->ctrl_addr;
703
704 ret = palmas_smps_read(palmas, addr, ®);
705 if (ret)
706 return ret;
707
708 switch (id) {
709 case PALMAS_REG_SMPS10_OUT1:
710 case PALMAS_REG_SMPS10_OUT2:
711 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
712 if (reg_init->mode_sleep)
713 reg |= reg_init->mode_sleep <<
714 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
715 break;
716 default:
717 if (reg_init->warm_reset)
718 reg |= PALMAS_SMPS12_CTRL_WR_S;
719 else
720 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
721
722 if (reg_init->roof_floor)
723 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
724 else
725 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
726
727 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
728 if (reg_init->mode_sleep)
729 reg |= reg_init->mode_sleep <<
730 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
731 }
732
733 ret = palmas_smps_write(palmas, addr, reg);
734 if (ret)
735 return ret;
736
737 if (rinfo->vsel_addr && reg_init->vsel) {
738
739 reg = reg_init->vsel;
740
741 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
742 if (ret)
743 return ret;
744 }
745
746 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
747 (id != PALMAS_REG_SMPS10_OUT2)) {
748 /* Enable externally controlled regulator */
749 ret = palmas_smps_read(palmas, addr, ®);
750 if (ret < 0)
751 return ret;
752
753 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
754 reg |= SMPS_CTRL_MODE_ON;
755 ret = palmas_smps_write(palmas, addr, reg);
756 if (ret < 0)
757 return ret;
758 }
759 return palmas_regulator_config_external(palmas, id, reg_init);
760 }
761 return 0;
762}
763
764static int palmas_ldo_init(struct palmas *palmas, int id,
765 struct palmas_reg_init *reg_init)
766{
767 unsigned int reg;
768 unsigned int addr;
769 int ret;
770 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
771 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
772
773 addr = rinfo->ctrl_addr;
774
775 ret = palmas_ldo_read(palmas, addr, ®);
776 if (ret)
777 return ret;
778
779 if (reg_init->warm_reset)
780 reg |= PALMAS_LDO1_CTRL_WR_S;
781 else
782 reg &= ~PALMAS_LDO1_CTRL_WR_S;
783
784 if (reg_init->mode_sleep)
785 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
786 else
787 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
788
789 ret = palmas_ldo_write(palmas, addr, reg);
790 if (ret)
791 return ret;
792
793 if (reg_init->roof_floor) {
794 /* Enable externally controlled regulator */
795 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
796 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
797 PALMAS_LDO1_CTRL_MODE_ACTIVE);
798 if (ret < 0) {
799 dev_err(palmas->dev,
800 "LDO Register 0x%02x update failed %d\n",
801 addr, ret);
802 return ret;
803 }
804 return palmas_regulator_config_external(palmas, id, reg_init);
805 }
806 return 0;
807}
808
809static int palmas_extreg_init(struct palmas *palmas, int id,
810 struct palmas_reg_init *reg_init)
811{
812 unsigned int addr;
813 int ret;
814 unsigned int val = 0;
815 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
816 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
817
818 addr = rinfo->ctrl_addr;
819
820 if (reg_init->mode_sleep)
821 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
822
823 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
824 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
825 if (ret < 0) {
826 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
827 addr, ret);
828 return ret;
829 }
830
831 if (reg_init->roof_floor) {
832 /* Enable externally controlled regulator */
833 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
834 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
835 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
836 if (ret < 0) {
837 dev_err(palmas->dev,
838 "Resource Register 0x%02x update failed %d\n",
839 addr, ret);
840 return ret;
841 }
842 return palmas_regulator_config_external(palmas, id, reg_init);
843 }
844 return 0;
845}
846
847static void palmas_enable_ldo8_track(struct palmas *palmas)
848{
849 unsigned int reg;
850 unsigned int addr;
851 int ret;
852 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
853 struct palmas_regs_info *rinfo;
854
855 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
856 addr = rinfo->ctrl_addr;
857
858 ret = palmas_ldo_read(palmas, addr, ®);
859 if (ret) {
860 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
861 return;
862 }
863
864 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
865 ret = palmas_ldo_write(palmas, addr, reg);
866 if (ret < 0) {
867 dev_err(palmas->dev, "Error in enabling tracking mode\n");
868 return;
869 }
870 /*
871 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
872 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
873 * and can be set from 0.45 to 1.65 V.
874 */
875 addr = rinfo->vsel_addr;
876 ret = palmas_ldo_read(palmas, addr, ®);
877 if (ret) {
878 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
879 return;
880 }
881
882 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
883 ret = palmas_ldo_write(palmas, addr, reg);
884 if (ret < 0)
885 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
886
887 return;
888}
889
890static int palmas_ldo_registration(struct palmas_pmic *pmic,
891 struct palmas_pmic_driver_data *ddata,
892 struct palmas_pmic_platform_data *pdata,
893 const char *pdev_name,
894 struct regulator_config config)
895{
896 int id, ret;
897 struct regulator_dev *rdev;
898 struct palmas_reg_init *reg_init;
899 struct palmas_regs_info *rinfo;
900 struct regulator_desc *desc;
901
902 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
903 if (pdata && pdata->reg_init[id])
904 reg_init = pdata->reg_init[id];
905 else
906 reg_init = NULL;
907
908 rinfo = &ddata->palmas_regs_info[id];
909 /* Miss out regulators which are not available due
910 * to alternate functions.
911 */
912
913 /* Register the regulators */
914 desc = &pmic->desc[id];
915 desc->name = rinfo->name;
916 desc->id = id;
917 desc->type = REGULATOR_VOLTAGE;
918 desc->owner = THIS_MODULE;
919
920 if (id < PALMAS_REG_REGEN1) {
921 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
922 if (reg_init && reg_init->roof_floor)
923 desc->ops = &palmas_ops_ext_control_ldo;
924 else
925 desc->ops = &palmas_ops_ldo;
926 desc->min_uV = 900000;
927 desc->uV_step = 50000;
928 desc->linear_min_sel = 1;
929 desc->enable_time = 500;
930 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
931 rinfo->vsel_addr);
932 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
933 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
934 rinfo->ctrl_addr);
935 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
936
937 /* Check if LDO8 is in tracking mode or not */
938 if (pdata && (id == PALMAS_REG_LDO8) &&
939 pdata->enable_ldo8_tracking) {
940 palmas_enable_ldo8_track(pmic->palmas);
941 desc->min_uV = 450000;
942 desc->uV_step = 25000;
943 }
944
945 /* LOD6 in vibrator mode will have enable time 2000us */
946 if (pdata && pdata->ldo6_vibrator &&
947 (id == PALMAS_REG_LDO6))
948 desc->enable_time = 2000;
949
950 if (id == PALMAS_REG_LDO9) {
951 desc->ops = &palmas_ops_ldo9;
952 desc->bypass_reg = desc->enable_reg;
953 desc->bypass_val_on =
954 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
955 desc->bypass_mask =
956 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
957 }
958 } else {
959 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
960 continue;
961
962 desc->n_voltages = 1;
963 if (reg_init && reg_init->roof_floor)
964 desc->ops = &palmas_ops_ext_control_extreg;
965 else
966 desc->ops = &palmas_ops_extreg;
967 desc->enable_reg =
968 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
969 rinfo->ctrl_addr);
970 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
971 }
972
973 if (pdata)
974 config.init_data = pdata->reg_data[id];
975 else
976 config.init_data = NULL;
977
978 desc->supply_name = rinfo->sname;
979 config.of_node = ddata->palmas_matches[id].of_node;
980
981 rdev = devm_regulator_register(pmic->dev, desc, &config);
982 if (IS_ERR(rdev)) {
983 dev_err(pmic->dev,
984 "failed to register %s regulator\n",
985 pdev_name);
986 return PTR_ERR(rdev);
987 }
988
989 /* Initialise sleep/init values from platform data */
990 if (pdata) {
991 reg_init = pdata->reg_init[id];
992 if (reg_init) {
993 if (id <= ddata->ldo_end)
994 ret = palmas_ldo_init(pmic->palmas, id,
995 reg_init);
996 else
997 ret = palmas_extreg_init(pmic->palmas,
998 id, reg_init);
999 if (ret)
1000 return ret;
1001 }
1002 }
1003 }
1004
1005 return 0;
1006}
1007
1008static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1009 struct palmas_pmic_driver_data *ddata,
1010 struct palmas_pmic_platform_data *pdata,
1011 const char *pdev_name,
1012 struct regulator_config config)
1013{
1014 int id, ret;
1015 struct regulator_dev *rdev;
1016 struct palmas_reg_init *reg_init;
1017 struct palmas_regs_info *rinfo;
1018 struct regulator_desc *desc;
1019
1020 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1021 if (pdata && pdata->reg_init[id])
1022 reg_init = pdata->reg_init[id];
1023 else
1024 reg_init = NULL;
1025
1026 /* Miss out regulators which are not available due
1027 * to alternate functions.
1028 */
1029 rinfo = &ddata->palmas_regs_info[id];
1030
1031 /* Register the regulators */
1032 desc = &pmic->desc[id];
1033 desc->name = rinfo->name;
1034 desc->id = id;
1035 desc->type = REGULATOR_VOLTAGE;
1036 desc->owner = THIS_MODULE;
1037
1038 if (id < TPS65917_REG_REGEN1) {
1039 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
1040 if (reg_init && reg_init->roof_floor)
1041 desc->ops = &palmas_ops_ext_control_ldo;
1042 else
1043 desc->ops = &tps65917_ops_ldo;
1044 desc->min_uV = 900000;
1045 desc->uV_step = 50000;
1046 desc->linear_min_sel = 1;
1047 desc->enable_time = 500;
1048 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1049 rinfo->vsel_addr);
1050 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1051 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1052 rinfo->ctrl_addr);
1053 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
1054 /*
1055 * To be confirmed. Discussion on going with PMIC Team.
1056 * It is of the order of ~60mV/uS.
1057 */
1058 desc->ramp_delay = 2500;
1059 if (id == TPS65917_REG_LDO1 ||
1060 id == TPS65917_REG_LDO2) {
1061 desc->ops = &tps65917_ops_ldo_1_2;
1062 desc->bypass_reg = desc->enable_reg;
1063 desc->bypass_val_on =
1064 TPS65917_LDO1_CTRL_BYPASS_EN;
1065 desc->bypass_mask =
1066 TPS65917_LDO1_CTRL_BYPASS_EN;
1067 }
1068 } else {
1069 desc->n_voltages = 1;
1070 if (reg_init && reg_init->roof_floor)
1071 desc->ops = &palmas_ops_ext_control_extreg;
1072 else
1073 desc->ops = &palmas_ops_extreg;
1074 desc->enable_reg =
1075 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1076 rinfo->ctrl_addr);
1077 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1078 }
1079
1080 if (pdata)
1081 config.init_data = pdata->reg_data[id];
1082 else
1083 config.init_data = NULL;
1084
1085 desc->supply_name = rinfo->sname;
1086 config.of_node = ddata->palmas_matches[id].of_node;
1087
1088 rdev = devm_regulator_register(pmic->dev, desc, &config);
1089 if (IS_ERR(rdev)) {
1090 dev_err(pmic->dev,
1091 "failed to register %s regulator\n",
1092 pdev_name);
1093 return PTR_ERR(rdev);
1094 }
1095
1096 /* Initialise sleep/init values from platform data */
1097 if (pdata) {
1098 reg_init = pdata->reg_init[id];
1099 if (reg_init) {
1100 if (id < TPS65917_REG_REGEN1)
1101 ret = palmas_ldo_init(pmic->palmas,
1102 id, reg_init);
1103 else
1104 ret = palmas_extreg_init(pmic->palmas,
1105 id, reg_init);
1106 if (ret)
1107 return ret;
1108 }
1109 }
1110 }
1111
1112 return 0;
1113}
1114
1115static int palmas_smps_registration(struct palmas_pmic *pmic,
1116 struct palmas_pmic_driver_data *ddata,
1117 struct palmas_pmic_platform_data *pdata,
1118 const char *pdev_name,
1119 struct regulator_config config)
1120{
1121 int id, ret;
1122 unsigned int addr, reg;
1123 struct regulator_dev *rdev;
1124 struct palmas_reg_init *reg_init;
1125 struct palmas_regs_info *rinfo;
1126 struct regulator_desc *desc;
1127
1128 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1129 bool ramp_delay_support = false;
1130
1131 /*
1132 * Miss out regulators which are not available due
1133 * to slaving configurations.
1134 */
1135 switch (id) {
1136 case PALMAS_REG_SMPS12:
1137 case PALMAS_REG_SMPS3:
1138 if (pmic->smps123)
1139 continue;
1140 if (id == PALMAS_REG_SMPS12)
1141 ramp_delay_support = true;
1142 break;
1143 case PALMAS_REG_SMPS123:
1144 if (!pmic->smps123)
1145 continue;
1146 ramp_delay_support = true;
1147 break;
1148 case PALMAS_REG_SMPS45:
1149 case PALMAS_REG_SMPS7:
1150 if (pmic->smps457)
1151 continue;
1152 if (id == PALMAS_REG_SMPS45)
1153 ramp_delay_support = true;
1154 break;
1155 case PALMAS_REG_SMPS457:
1156 if (!pmic->smps457)
1157 continue;
1158 ramp_delay_support = true;
1159 break;
1160 case PALMAS_REG_SMPS10_OUT1:
1161 case PALMAS_REG_SMPS10_OUT2:
1162 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
1163 continue;
1164 }
1165 rinfo = &ddata->palmas_regs_info[id];
1166 desc = &pmic->desc[id];
1167
1168 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
1169 ramp_delay_support = true;
1170
1171 if (ramp_delay_support) {
1172 addr = rinfo->tstep_addr;
1173 ret = palmas_smps_read(pmic->palmas, addr, ®);
1174 if (ret < 0) {
1175 dev_err(pmic->dev,
1176 "reading TSTEP reg failed: %d\n", ret);
1177 return ret;
1178 }
1179 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1180 pmic->ramp_delay[id] = desc->ramp_delay;
1181 }
1182
1183 /* Initialise sleep/init values from platform data */
1184 if (pdata && pdata->reg_init[id]) {
1185 reg_init = pdata->reg_init[id];
1186 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1187 if (ret)
1188 return ret;
1189 } else {
1190 reg_init = NULL;
1191 }
1192
1193 /* Register the regulators */
1194 desc->name = rinfo->name;
1195 desc->id = id;
1196
1197 switch (id) {
1198 case PALMAS_REG_SMPS10_OUT1:
1199 case PALMAS_REG_SMPS10_OUT2:
1200 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1201 desc->ops = &palmas_ops_smps10;
1202 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1203 PALMAS_SMPS10_CTRL);
1204 desc->vsel_mask = SMPS10_VSEL;
1205 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1206 PALMAS_SMPS10_CTRL);
1207 if (id == PALMAS_REG_SMPS10_OUT1)
1208 desc->enable_mask = SMPS10_SWITCH_EN;
1209 else
1210 desc->enable_mask = SMPS10_BOOST_EN;
1211 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1212 PALMAS_SMPS10_CTRL);
1213 desc->bypass_val_on = SMPS10_BYPASS_EN;
1214 desc->bypass_mask = SMPS10_BYPASS_EN;
1215 desc->min_uV = 3750000;
1216 desc->uV_step = 1250000;
1217 break;
1218 default:
1219 /*
1220 * Read and store the RANGE bit for later use
1221 * This must be done before regulator is probed,
1222 * otherwise we error in probe with unsupportable
1223 * ranges. Read the current smps mode for later use.
1224 */
1225 addr = rinfo->vsel_addr;
1226 desc->n_linear_ranges = 3;
1227
1228 ret = palmas_smps_read(pmic->palmas, addr, ®);
1229 if (ret)
1230 return ret;
1231 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1232 pmic->range[id] = 1;
1233 if (pmic->range[id])
1234 desc->linear_ranges = smps_high_ranges;
1235 else
1236 desc->linear_ranges = smps_low_ranges;
1237
1238 if (reg_init && reg_init->roof_floor)
1239 desc->ops = &palmas_ops_ext_control_smps;
1240 else
1241 desc->ops = &palmas_ops_smps;
1242 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1243 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1244 rinfo->vsel_addr);
1245 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1246
1247 /* Read the smps mode for later use. */
1248 addr = rinfo->ctrl_addr;
1249 ret = palmas_smps_read(pmic->palmas, addr, ®);
1250 if (ret)
1251 return ret;
1252 pmic->current_reg_mode[id] = reg &
1253 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1254
1255 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1256 rinfo->ctrl_addr);
1257 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1258 /* set_mode overrides this value */
1259 desc->enable_val = SMPS_CTRL_MODE_ON;
1260 }
1261
1262 desc->type = REGULATOR_VOLTAGE;
1263 desc->owner = THIS_MODULE;
1264
1265 if (pdata)
1266 config.init_data = pdata->reg_data[id];
1267 else
1268 config.init_data = NULL;
1269
1270 desc->supply_name = rinfo->sname;
1271 config.of_node = ddata->palmas_matches[id].of_node;
1272
1273 rdev = devm_regulator_register(pmic->dev, desc, &config);
1274 if (IS_ERR(rdev)) {
1275 dev_err(pmic->dev,
1276 "failed to register %s regulator\n",
1277 pdev_name);
1278 return PTR_ERR(rdev);
1279 }
1280 }
1281
1282 return 0;
1283}
1284
1285static int tps65917_smps_registration(struct palmas_pmic *pmic,
1286 struct palmas_pmic_driver_data *ddata,
1287 struct palmas_pmic_platform_data *pdata,
1288 const char *pdev_name,
1289 struct regulator_config config)
1290{
1291 int id, ret;
1292 unsigned int addr, reg;
1293 struct regulator_dev *rdev;
1294 struct palmas_reg_init *reg_init;
1295 struct palmas_regs_info *rinfo;
1296 struct regulator_desc *desc;
1297
1298 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1299 /*
1300 * Miss out regulators which are not available due
1301 * to slaving configurations.
1302 */
1303 desc = &pmic->desc[id];
1304 desc->n_linear_ranges = 3;
1305 if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) &&
1306 pmic->smps12)
1307 continue;
1308
1309 /* Initialise sleep/init values from platform data */
1310 if (pdata && pdata->reg_init[id]) {
1311 reg_init = pdata->reg_init[id];
1312 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1313 if (ret)
1314 return ret;
1315 } else {
1316 reg_init = NULL;
1317 }
1318 rinfo = &ddata->palmas_regs_info[id];
1319
1320 /* Register the regulators */
1321 desc->name = rinfo->name;
1322 desc->id = id;
1323
1324 /*
1325 * Read and store the RANGE bit for later use
1326 * This must be done before regulator is probed,
1327 * otherwise we error in probe with unsupportable
1328 * ranges. Read the current smps mode for later use.
1329 */
1330 addr = rinfo->vsel_addr;
1331
1332 ret = palmas_smps_read(pmic->palmas, addr, ®);
1333 if (ret)
1334 return ret;
1335 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1336 pmic->range[id] = 1;
1337
1338 if (pmic->range[id])
1339 desc->linear_ranges = smps_high_ranges;
1340 else
1341 desc->linear_ranges = smps_low_ranges;
1342
1343 if (reg_init && reg_init->roof_floor)
1344 desc->ops = &tps65917_ops_ext_control_smps;
1345 else
1346 desc->ops = &tps65917_ops_smps;
1347 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1348 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1349 rinfo->vsel_addr);
1350 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1351 desc->ramp_delay = 2500;
1352
1353 /* Read the smps mode for later use. */
1354 addr = rinfo->ctrl_addr;
1355 ret = palmas_smps_read(pmic->palmas, addr, ®);
1356 if (ret)
1357 return ret;
1358 pmic->current_reg_mode[id] = reg &
1359 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1360 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1361 rinfo->ctrl_addr);
1362 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1363 /* set_mode overrides this value */
1364 desc->enable_val = SMPS_CTRL_MODE_ON;
1365
1366 desc->type = REGULATOR_VOLTAGE;
1367 desc->owner = THIS_MODULE;
1368
1369 if (pdata)
1370 config.init_data = pdata->reg_data[id];
1371 else
1372 config.init_data = NULL;
1373
1374 desc->supply_name = rinfo->sname;
1375 config.of_node = ddata->palmas_matches[id].of_node;
1376
1377 rdev = devm_regulator_register(pmic->dev, desc, &config);
1378 if (IS_ERR(rdev)) {
1379 dev_err(pmic->dev,
1380 "failed to register %s regulator\n",
1381 pdev_name);
1382 return PTR_ERR(rdev);
1383 }
1384 }
1385
1386 return 0;
1387}
1388
1389static struct of_regulator_match palmas_matches[] = {
1390 { .name = "smps12", },
1391 { .name = "smps123", },
1392 { .name = "smps3", },
1393 { .name = "smps45", },
1394 { .name = "smps457", },
1395 { .name = "smps6", },
1396 { .name = "smps7", },
1397 { .name = "smps8", },
1398 { .name = "smps9", },
1399 { .name = "smps10_out2", },
1400 { .name = "smps10_out1", },
1401 { .name = "ldo1", },
1402 { .name = "ldo2", },
1403 { .name = "ldo3", },
1404 { .name = "ldo4", },
1405 { .name = "ldo5", },
1406 { .name = "ldo6", },
1407 { .name = "ldo7", },
1408 { .name = "ldo8", },
1409 { .name = "ldo9", },
1410 { .name = "ldoln", },
1411 { .name = "ldousb", },
1412 { .name = "regen1", },
1413 { .name = "regen2", },
1414 { .name = "regen3", },
1415 { .name = "sysen1", },
1416 { .name = "sysen2", },
1417};
1418
1419static struct of_regulator_match tps65917_matches[] = {
1420 { .name = "smps1", },
1421 { .name = "smps2", },
1422 { .name = "smps3", },
1423 { .name = "smps4", },
1424 { .name = "smps5", },
1425 { .name = "smps12",},
1426 { .name = "ldo1", },
1427 { .name = "ldo2", },
1428 { .name = "ldo3", },
1429 { .name = "ldo4", },
1430 { .name = "ldo5", },
1431 { .name = "regen1", },
1432 { .name = "regen2", },
1433 { .name = "regen3", },
1434 { .name = "sysen1", },
1435 { .name = "sysen2", },
1436};
1437
1438static struct palmas_pmic_driver_data palmas_ddata = {
1439 .smps_start = PALMAS_REG_SMPS12,
1440 .smps_end = PALMAS_REG_SMPS10_OUT1,
1441 .ldo_begin = PALMAS_REG_LDO1,
1442 .ldo_end = PALMAS_REG_LDOUSB,
1443 .max_reg = PALMAS_NUM_REGS,
1444 .has_regen3 = true,
1445 .palmas_regs_info = palmas_generic_regs_info,
1446 .palmas_matches = palmas_matches,
1447 .sleep_req_info = palma_sleep_req_info,
1448 .smps_register = palmas_smps_registration,
1449 .ldo_register = palmas_ldo_registration,
1450};
1451
1452static struct palmas_pmic_driver_data tps65917_ddata = {
1453 .smps_start = TPS65917_REG_SMPS1,
1454 .smps_end = TPS65917_REG_SMPS12,
1455 .ldo_begin = TPS65917_REG_LDO1,
1456 .ldo_end = TPS65917_REG_LDO5,
1457 .max_reg = TPS65917_NUM_REGS,
1458 .has_regen3 = true,
1459 .palmas_regs_info = tps65917_regs_info,
1460 .palmas_matches = tps65917_matches,
1461 .sleep_req_info = tps65917_sleep_req_info,
1462 .smps_register = tps65917_smps_registration,
1463 .ldo_register = tps65917_ldo_registration,
1464};
1465
1466static int palmas_dt_to_pdata(struct device *dev,
1467 struct device_node *node,
1468 struct palmas_pmic_platform_data *pdata,
1469 struct palmas_pmic_driver_data *ddata)
1470{
1471 struct device_node *regulators;
1472 u32 prop;
1473 int idx, ret;
1474
1475 regulators = of_get_child_by_name(node, "regulators");
1476 if (!regulators) {
1477 dev_info(dev, "regulator node not found\n");
1478 return 0;
1479 }
1480
1481 ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1482 ddata->max_reg);
1483 of_node_put(regulators);
1484 if (ret < 0) {
1485 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
1486 return 0;
1487 }
1488
1489 for (idx = 0; idx < ddata->max_reg; idx++) {
1490 struct of_regulator_match *match;
1491 struct palmas_reg_init *rinit;
1492 struct device_node *np;
1493
1494 match = &ddata->palmas_matches[idx];
1495 np = match->of_node;
1496
1497 if (!match->init_data || !np)
1498 continue;
1499
1500 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
1501 if (!rinit)
1502 return -ENOMEM;
1503
1504 pdata->reg_data[idx] = match->init_data;
1505 pdata->reg_init[idx] = rinit;
1506
1507 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
1508 ret = of_property_read_u32(np, "ti,roof-floor", &prop);
1509 /* EINVAL: Property not found */
1510 if (ret != -EINVAL) {
1511 int econtrol;
1512
1513 /* use default value, when no value is specified */
1514 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1515 if (!ret) {
1516 switch (prop) {
1517 case 1:
1518 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1519 break;
1520 case 2:
1521 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1522 break;
1523 case 3:
1524 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1525 break;
1526 default:
1527 WARN_ON(1);
1528 dev_warn(dev,
1529 "%s: Invalid roof-floor option: %u\n",
1530 match->name, prop);
1531 break;
1532 }
1533 }
1534 rinit->roof_floor = econtrol;
1535 }
1536
1537 ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
1538 if (!ret)
1539 rinit->mode_sleep = prop;
1540
1541 ret = of_property_read_bool(np, "ti,smps-range");
1542 if (ret)
1543 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
1544
1545 if (idx == PALMAS_REG_LDO8)
1546 pdata->enable_ldo8_tracking = of_property_read_bool(
1547 np, "ti,enable-ldo8-tracking");
1548 }
1549
1550 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
1551
1552 return 0;
1553}
1554
1555static const struct of_device_id of_palmas_match_tbl[] = {
1556 {
1557 .compatible = "ti,palmas-pmic",
1558 .data = &palmas_ddata,
1559 },
1560 {
1561 .compatible = "ti,twl6035-pmic",
1562 .data = &palmas_ddata,
1563 },
1564 {
1565 .compatible = "ti,twl6036-pmic",
1566 .data = &palmas_ddata,
1567 },
1568 {
1569 .compatible = "ti,twl6037-pmic",
1570 .data = &palmas_ddata,
1571 },
1572 {
1573 .compatible = "ti,tps65913-pmic",
1574 .data = &palmas_ddata,
1575 },
1576 {
1577 .compatible = "ti,tps65914-pmic",
1578 .data = &palmas_ddata,
1579 },
1580 {
1581 .compatible = "ti,tps80036-pmic",
1582 .data = &palmas_ddata,
1583 },
1584 {
1585 .compatible = "ti,tps659038-pmic",
1586 .data = &palmas_ddata,
1587 },
1588 {
1589 .compatible = "ti,tps65917-pmic",
1590 .data = &tps65917_ddata,
1591 },
1592 { /* end */ }
1593};
1594
1595static int palmas_regulators_probe(struct platform_device *pdev)
1596{
1597 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1598 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
1599 struct device_node *node = pdev->dev.of_node;
1600 struct palmas_pmic_driver_data *driver_data;
1601 struct regulator_config config = { };
1602 struct palmas_pmic *pmic;
1603 const char *pdev_name;
1604 const struct of_device_id *match;
1605 int ret = 0;
1606 unsigned int reg;
1607
1608 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
1609
1610 if (!match)
1611 return -ENODATA;
1612
1613 driver_data = (struct palmas_pmic_driver_data *)match->data;
1614 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1615 if (!pdata)
1616 return -ENOMEM;
1617
1618 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1619 if (!pmic)
1620 return -ENOMEM;
1621
1622 if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
1623 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1624 TPS659038_REGEN2_CTRL;
1625 palmas_ddata.has_regen3 = false;
1626 }
1627
1628 pmic->dev = &pdev->dev;
1629 pmic->palmas = palmas;
1630 palmas->pmic = pmic;
1631 platform_set_drvdata(pdev, pmic);
1632 pmic->palmas->pmic_ddata = driver_data;
1633
1634 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1635 if (ret)
1636 return ret;
1637
1638 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®);
1639 if (ret)
1640 return ret;
1641
1642 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) {
1643 pmic->smps123 = 1;
1644 pmic->smps12 = 1;
1645 }
1646
1647 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1648 pmic->smps457 = 1;
1649
1650 config.regmap = palmas->regmap[REGULATOR_SLAVE];
1651 config.dev = &pdev->dev;
1652 config.driver_data = pmic;
1653 pdev_name = pdev->name;
1654
1655 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1656 config);
1657 if (ret)
1658 return ret;
1659
1660 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1661 config);
1662
1663 return ret;
1664}
1665
1666static struct platform_driver palmas_driver = {
1667 .driver = {
1668 .name = "palmas-pmic",
1669 .of_match_table = of_palmas_match_tbl,
1670 },
1671 .probe = palmas_regulators_probe,
1672};
1673
1674static int __init palmas_init(void)
1675{
1676 return platform_driver_register(&palmas_driver);
1677}
1678subsys_initcall(palmas_init);
1679
1680static void __exit palmas_exit(void)
1681{
1682 platform_driver_unregister(&palmas_driver);
1683}
1684module_exit(palmas_exit);
1685
1686MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1687MODULE_DESCRIPTION("Palmas voltage regulator driver");
1688MODULE_LICENSE("GPL");
1689MODULE_ALIAS("platform:palmas-pmic");
1690MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);