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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * smc911x.c
4 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 *
6 * Copyright (C) 2005 Sensoria Corp
7 * Derived from the unified SMC91x driver by Nicolas Pitre
8 * and the smsc911x.c reference driver by SMSC
9 *
10 * Arguments:
11 * watchdog = TX watchdog timeout
12 * tx_fifo_kb = Size of TX FIFO in KB
13 *
14 * History:
15 * 04/16/05 Dustin McIntire Initial version
16 */
17static const char version[] =
18 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
19
20/* Debugging options */
21#define ENABLE_SMC_DEBUG_RX 0
22#define ENABLE_SMC_DEBUG_TX 0
23#define ENABLE_SMC_DEBUG_DMA 0
24#define ENABLE_SMC_DEBUG_PKTS 0
25#define ENABLE_SMC_DEBUG_MISC 0
26#define ENABLE_SMC_DEBUG_FUNC 0
27
28#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
29#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
30#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
31#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
32#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
33#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
34
35#ifndef SMC_DEBUG
36#define SMC_DEBUG ( SMC_DEBUG_RX | \
37 SMC_DEBUG_TX | \
38 SMC_DEBUG_DMA | \
39 SMC_DEBUG_PKTS | \
40 SMC_DEBUG_MISC | \
41 SMC_DEBUG_FUNC \
42 )
43#endif
44
45#include <linux/module.h>
46#include <linux/kernel.h>
47#include <linux/sched.h>
48#include <linux/delay.h>
49#include <linux/interrupt.h>
50#include <linux/errno.h>
51#include <linux/ioport.h>
52#include <linux/crc32.h>
53#include <linux/device.h>
54#include <linux/platform_device.h>
55#include <linux/spinlock.h>
56#include <linux/ethtool.h>
57#include <linux/mii.h>
58#include <linux/workqueue.h>
59
60#include <linux/netdevice.h>
61#include <linux/etherdevice.h>
62#include <linux/skbuff.h>
63
64#include <linux/dmaengine.h>
65
66#include <asm/io.h>
67
68#include "smc911x.h"
69
70/*
71 * Transmit timeout, default 5 seconds.
72 */
73static int watchdog = 5000;
74module_param(watchdog, int, 0400);
75MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
76
77static int tx_fifo_kb=8;
78module_param(tx_fifo_kb, int, 0400);
79MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
80
81MODULE_LICENSE("GPL");
82MODULE_ALIAS("platform:smc911x");
83
84/*
85 * The internal workings of the driver. If you are changing anything
86 * here with the SMC stuff, you should have the datasheet and know
87 * what you are doing.
88 */
89#define CARDNAME "smc911x"
90
91/*
92 * Use power-down feature of the chip
93 */
94#define POWER_DOWN 1
95
96#if SMC_DEBUG > 0
97#define DBG(n, dev, args...) \
98 do { \
99 if (SMC_DEBUG & (n)) \
100 netdev_dbg(dev, args); \
101 } while (0)
102
103#define PRINTK(dev, args...) netdev_info(dev, args)
104#else
105#define DBG(n, dev, args...) do { } while (0)
106#define PRINTK(dev, args...) netdev_dbg(dev, args)
107#endif
108
109#if SMC_DEBUG_PKTS > 0
110static void PRINT_PKT(u_char *buf, int length)
111{
112 int i;
113 int remainder;
114 int lines;
115
116 lines = length / 16;
117 remainder = length % 16;
118
119 for (i = 0; i < lines ; i ++) {
120 int cur;
121 printk(KERN_DEBUG);
122 for (cur = 0; cur < 8; cur++) {
123 u_char a, b;
124 a = *buf++;
125 b = *buf++;
126 pr_cont("%02x%02x ", a, b);
127 }
128 pr_cont("\n");
129 }
130 printk(KERN_DEBUG);
131 for (i = 0; i < remainder/2 ; i++) {
132 u_char a, b;
133 a = *buf++;
134 b = *buf++;
135 pr_cont("%02x%02x ", a, b);
136 }
137 pr_cont("\n");
138}
139#else
140#define PRINT_PKT(x...) do { } while (0)
141#endif
142
143
144/* this enables an interrupt in the interrupt mask register */
145#define SMC_ENABLE_INT(lp, x) do { \
146 unsigned int __mask; \
147 __mask = SMC_GET_INT_EN((lp)); \
148 __mask |= (x); \
149 SMC_SET_INT_EN((lp), __mask); \
150} while (0)
151
152/* this disables an interrupt from the interrupt mask register */
153#define SMC_DISABLE_INT(lp, x) do { \
154 unsigned int __mask; \
155 __mask = SMC_GET_INT_EN((lp)); \
156 __mask &= ~(x); \
157 SMC_SET_INT_EN((lp), __mask); \
158} while (0)
159
160/*
161 * this does a soft reset on the device
162 */
163static void smc911x_reset(struct net_device *dev)
164{
165 struct smc911x_local *lp = netdev_priv(dev);
166 unsigned int reg, timeout=0, resets=1, irq_cfg;
167 unsigned long flags;
168
169 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
170
171 /* Take out of PM setting first */
172 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
173 /* Write to the bytetest will take out of powerdown */
174 SMC_SET_BYTE_TEST(lp, 0);
175 timeout=10;
176 do {
177 udelay(10);
178 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
179 } while (--timeout && !reg);
180 if (timeout == 0) {
181 PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
182 return;
183 }
184 }
185
186 /* Disable all interrupts */
187 spin_lock_irqsave(&lp->lock, flags);
188 SMC_SET_INT_EN(lp, 0);
189 spin_unlock_irqrestore(&lp->lock, flags);
190
191 while (resets--) {
192 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
193 timeout=10;
194 do {
195 udelay(10);
196 reg = SMC_GET_HW_CFG(lp);
197 /* If chip indicates reset timeout then try again */
198 if (reg & HW_CFG_SRST_TO_) {
199 PRINTK(dev, "chip reset timeout, retrying...\n");
200 resets++;
201 break;
202 }
203 } while (--timeout && (reg & HW_CFG_SRST_));
204 }
205 if (timeout == 0) {
206 PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
207 return;
208 }
209
210 /* make sure EEPROM has finished loading before setting GPIO_CFG */
211 timeout=1000;
212 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
213 udelay(10);
214
215 if (timeout == 0){
216 PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
217 return;
218 }
219
220 /* Initialize interrupts */
221 SMC_SET_INT_EN(lp, 0);
222 SMC_ACK_INT(lp, -1);
223
224 /* Reset the FIFO level and flow control settings */
225 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
226//TODO: Figure out what appropriate pause time is
227 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
228 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
229
230
231 /* Set to LED outputs */
232 SMC_SET_GPIO_CFG(lp, 0x70070000);
233
234 /*
235 * Deassert IRQ for 1*10us for edge type interrupts
236 * and drive IRQ pin push-pull
237 */
238 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
239#ifdef SMC_DYNAMIC_BUS_CONFIG
240 if (lp->cfg.irq_polarity)
241 irq_cfg |= INT_CFG_IRQ_POL_;
242#endif
243 SMC_SET_IRQ_CFG(lp, irq_cfg);
244
245 /* clear anything saved */
246 if (lp->pending_tx_skb != NULL) {
247 dev_kfree_skb (lp->pending_tx_skb);
248 lp->pending_tx_skb = NULL;
249 dev->stats.tx_errors++;
250 dev->stats.tx_aborted_errors++;
251 }
252}
253
254/*
255 * Enable Interrupts, Receive, and Transmit
256 */
257static void smc911x_enable(struct net_device *dev)
258{
259 struct smc911x_local *lp = netdev_priv(dev);
260 unsigned mask, cfg, cr;
261 unsigned long flags;
262
263 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
264
265 spin_lock_irqsave(&lp->lock, flags);
266
267 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
268
269 /* Enable TX */
270 cfg = SMC_GET_HW_CFG(lp);
271 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
272 cfg |= HW_CFG_SF_;
273 SMC_SET_HW_CFG(lp, cfg);
274 SMC_SET_FIFO_TDA(lp, 0xFF);
275 /* Update TX stats on every 64 packets received or every 1 sec */
276 SMC_SET_FIFO_TSL(lp, 64);
277 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
278
279 SMC_GET_MAC_CR(lp, cr);
280 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
281 SMC_SET_MAC_CR(lp, cr);
282 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
283
284 /* Add 2 byte padding to start of packets */
285 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
286
287 /* Turn on receiver and enable RX */
288 if (cr & MAC_CR_RXEN_)
289 DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
290
291 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
292
293 /* Interrupt on every received packet */
294 SMC_SET_FIFO_RSA(lp, 0x01);
295 SMC_SET_FIFO_RSL(lp, 0x00);
296
297 /* now, enable interrupts */
298 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
299 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
300 INT_EN_PHY_INT_EN_;
301 if (IS_REV_A(lp->revision))
302 mask|=INT_EN_RDFL_EN_;
303 else {
304 mask|=INT_EN_RDFO_EN_;
305 }
306 SMC_ENABLE_INT(lp, mask);
307
308 spin_unlock_irqrestore(&lp->lock, flags);
309}
310
311/*
312 * this puts the device in an inactive state
313 */
314static void smc911x_shutdown(struct net_device *dev)
315{
316 struct smc911x_local *lp = netdev_priv(dev);
317 unsigned cr;
318 unsigned long flags;
319
320 DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
321
322 /* Disable IRQ's */
323 SMC_SET_INT_EN(lp, 0);
324
325 /* Turn of Rx and TX */
326 spin_lock_irqsave(&lp->lock, flags);
327 SMC_GET_MAC_CR(lp, cr);
328 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
329 SMC_SET_MAC_CR(lp, cr);
330 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
331 spin_unlock_irqrestore(&lp->lock, flags);
332}
333
334static inline void smc911x_drop_pkt(struct net_device *dev)
335{
336 struct smc911x_local *lp = netdev_priv(dev);
337 unsigned int fifo_count, timeout, reg;
338
339 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
340 CARDNAME, __func__);
341 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
342 if (fifo_count <= 4) {
343 /* Manually dump the packet data */
344 while (fifo_count--)
345 SMC_GET_RX_FIFO(lp);
346 } else {
347 /* Fast forward through the bad packet */
348 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
349 timeout=50;
350 do {
351 udelay(10);
352 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
353 } while (--timeout && reg);
354 if (timeout == 0) {
355 PRINTK(dev, "timeout waiting for RX fast forward\n");
356 }
357 }
358}
359
360/*
361 * This is the procedure to handle the receipt of a packet.
362 * It should be called after checking for packet presence in
363 * the RX status FIFO. It must be called with the spin lock
364 * already held.
365 */
366static inline void smc911x_rcv(struct net_device *dev)
367{
368 struct smc911x_local *lp = netdev_priv(dev);
369 unsigned int pkt_len, status;
370 struct sk_buff *skb;
371 unsigned char *data;
372
373 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
374 __func__);
375 status = SMC_GET_RX_STS_FIFO(lp);
376 DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
377 (status & 0x3fff0000) >> 16, status & 0xc000ffff);
378 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
379 if (status & RX_STS_ES_) {
380 /* Deal with a bad packet */
381 dev->stats.rx_errors++;
382 if (status & RX_STS_CRC_ERR_)
383 dev->stats.rx_crc_errors++;
384 else {
385 if (status & RX_STS_LEN_ERR_)
386 dev->stats.rx_length_errors++;
387 if (status & RX_STS_MCAST_)
388 dev->stats.multicast++;
389 }
390 /* Remove the bad packet data from the RX FIFO */
391 smc911x_drop_pkt(dev);
392 } else {
393 /* Receive a valid packet */
394 /* Alloc a buffer with extra room for DMA alignment */
395 skb = netdev_alloc_skb(dev, pkt_len+32);
396 if (unlikely(skb == NULL)) {
397 PRINTK(dev, "Low memory, rcvd packet dropped.\n");
398 dev->stats.rx_dropped++;
399 smc911x_drop_pkt(dev);
400 return;
401 }
402 /* Align IP header to 32 bits
403 * Note that the device is configured to add a 2
404 * byte padding to the packet start, so we really
405 * want to write to the orignal data pointer */
406 data = skb->data;
407 skb_reserve(skb, 2);
408 skb_put(skb,pkt_len-4);
409#ifdef SMC_USE_DMA
410 {
411 unsigned int fifo;
412 /* Lower the FIFO threshold if possible */
413 fifo = SMC_GET_FIFO_INT(lp);
414 if (fifo & 0xFF) fifo--;
415 DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
416 fifo & 0xff);
417 SMC_SET_FIFO_INT(lp, fifo);
418 /* Setup RX DMA */
419 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
420 lp->rxdma_active = 1;
421 lp->current_rx_skb = skb;
422 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
423 /* Packet processing deferred to DMA RX interrupt */
424 }
425#else
426 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
427 SMC_PULL_DATA(lp, data, pkt_len+2+3);
428
429 DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
430 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
431 skb->protocol = eth_type_trans(skb, dev);
432 netif_rx(skb);
433 dev->stats.rx_packets++;
434 dev->stats.rx_bytes += pkt_len-4;
435#endif
436 }
437}
438
439/*
440 * This is called to actually send a packet to the chip.
441 */
442static void smc911x_hardware_send_pkt(struct net_device *dev)
443{
444 struct smc911x_local *lp = netdev_priv(dev);
445 struct sk_buff *skb;
446 unsigned int cmdA, cmdB, len;
447 unsigned char *buf;
448
449 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
450 BUG_ON(lp->pending_tx_skb == NULL);
451
452 skb = lp->pending_tx_skb;
453 lp->pending_tx_skb = NULL;
454
455 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
456 /* cmdB {31:16] pkt tag [10:0] length */
457#ifdef SMC_USE_DMA
458 /* 16 byte buffer alignment mode */
459 buf = (char*)((u32)(skb->data) & ~0xF);
460 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
461 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
462 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
463 skb->len;
464#else
465 buf = (char*)((u32)skb->data & ~0x3);
466 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
467 cmdA = (((u32)skb->data & 0x3) << 16) |
468 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
469 skb->len;
470#endif
471 /* tag is packet length so we can use this in stats update later */
472 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
473
474 DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
475 len, len, buf, cmdA, cmdB);
476 SMC_SET_TX_FIFO(lp, cmdA);
477 SMC_SET_TX_FIFO(lp, cmdB);
478
479 DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
480 PRINT_PKT(buf, len <= 64 ? len : 64);
481
482 /* Send pkt via PIO or DMA */
483#ifdef SMC_USE_DMA
484 lp->current_tx_skb = skb;
485 SMC_PUSH_DATA(lp, buf, len);
486 /* DMA complete IRQ will free buffer and set jiffies */
487#else
488 SMC_PUSH_DATA(lp, buf, len);
489 netif_trans_update(dev);
490 dev_kfree_skb_irq(skb);
491#endif
492 if (!lp->tx_throttle) {
493 netif_wake_queue(dev);
494 }
495 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
496}
497
498/*
499 * Since I am not sure if I will have enough room in the chip's ram
500 * to store the packet, I call this routine which either sends it
501 * now, or set the card to generates an interrupt when ready
502 * for the packet.
503 */
504static netdev_tx_t
505smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
506{
507 struct smc911x_local *lp = netdev_priv(dev);
508 unsigned int free;
509 unsigned long flags;
510
511 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
512 __func__);
513
514 spin_lock_irqsave(&lp->lock, flags);
515
516 BUG_ON(lp->pending_tx_skb != NULL);
517
518 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
519 DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
520
521 /* Turn off the flow when running out of space in FIFO */
522 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
523 DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
524 free);
525 /* Reenable when at least 1 packet of size MTU present */
526 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
527 lp->tx_throttle = 1;
528 netif_stop_queue(dev);
529 }
530
531 /* Drop packets when we run out of space in TX FIFO
532 * Account for overhead required for:
533 *
534 * Tx command words 8 bytes
535 * Start offset 15 bytes
536 * End padding 15 bytes
537 */
538 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
539 netdev_warn(dev, "No Tx free space %d < %d\n",
540 free, skb->len);
541 lp->pending_tx_skb = NULL;
542 dev->stats.tx_errors++;
543 dev->stats.tx_dropped++;
544 spin_unlock_irqrestore(&lp->lock, flags);
545 dev_kfree_skb_any(skb);
546 return NETDEV_TX_OK;
547 }
548
549#ifdef SMC_USE_DMA
550 {
551 /* If the DMA is already running then defer this packet Tx until
552 * the DMA IRQ starts it
553 */
554 if (lp->txdma_active) {
555 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
556 lp->pending_tx_skb = skb;
557 netif_stop_queue(dev);
558 spin_unlock_irqrestore(&lp->lock, flags);
559 return NETDEV_TX_OK;
560 } else {
561 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
562 lp->txdma_active = 1;
563 }
564 }
565#endif
566 lp->pending_tx_skb = skb;
567 smc911x_hardware_send_pkt(dev);
568 spin_unlock_irqrestore(&lp->lock, flags);
569
570 return NETDEV_TX_OK;
571}
572
573/*
574 * This handles a TX status interrupt, which is only called when:
575 * - a TX error occurred, or
576 * - TX of a packet completed.
577 */
578static void smc911x_tx(struct net_device *dev)
579{
580 struct smc911x_local *lp = netdev_priv(dev);
581 unsigned int tx_status;
582
583 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
584 __func__);
585
586 /* Collect the TX status */
587 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
588 DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
589 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
590 tx_status = SMC_GET_TX_STS_FIFO(lp);
591 dev->stats.tx_packets++;
592 dev->stats.tx_bytes+=tx_status>>16;
593 DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
594 (tx_status & 0xffff0000) >> 16,
595 tx_status & 0x0000ffff);
596 /* count Tx errors, but ignore lost carrier errors when in
597 * full-duplex mode */
598 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
599 !(tx_status & 0x00000306))) {
600 dev->stats.tx_errors++;
601 }
602 if (tx_status & TX_STS_MANY_COLL_) {
603 dev->stats.collisions+=16;
604 dev->stats.tx_aborted_errors++;
605 } else {
606 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
607 }
608 /* carrier error only has meaning for half-duplex communication */
609 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
610 !lp->ctl_rfduplx) {
611 dev->stats.tx_carrier_errors++;
612 }
613 if (tx_status & TX_STS_LATE_COLL_) {
614 dev->stats.collisions++;
615 dev->stats.tx_aborted_errors++;
616 }
617 }
618}
619
620
621/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
622/*
623 * Reads a register from the MII Management serial interface
624 */
625
626static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
627{
628 struct smc911x_local *lp = netdev_priv(dev);
629 unsigned int phydata;
630
631 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
632
633 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
634 __func__, phyaddr, phyreg, phydata);
635 return phydata;
636}
637
638
639/*
640 * Writes a register to the MII Management serial interface
641 */
642static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
643 int phydata)
644{
645 struct smc911x_local *lp = netdev_priv(dev);
646
647 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
648 __func__, phyaddr, phyreg, phydata);
649
650 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
651}
652
653/*
654 * Finds and reports the PHY address (115 and 117 have external
655 * PHY interface 118 has internal only
656 */
657static void smc911x_phy_detect(struct net_device *dev)
658{
659 struct smc911x_local *lp = netdev_priv(dev);
660 int phyaddr;
661 unsigned int cfg, id1, id2;
662
663 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
664
665 lp->phy_type = 0;
666
667 /*
668 * Scan all 32 PHY addresses if necessary, starting at
669 * PHY#1 to PHY#31, and then PHY#0 last.
670 */
671 switch(lp->version) {
672 case CHIP_9115:
673 case CHIP_9117:
674 case CHIP_9215:
675 case CHIP_9217:
676 cfg = SMC_GET_HW_CFG(lp);
677 if (cfg & HW_CFG_EXT_PHY_DET_) {
678 cfg &= ~HW_CFG_PHY_CLK_SEL_;
679 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
680 SMC_SET_HW_CFG(lp, cfg);
681 udelay(10); /* Wait for clocks to stop */
682
683 cfg |= HW_CFG_EXT_PHY_EN_;
684 SMC_SET_HW_CFG(lp, cfg);
685 udelay(10); /* Wait for clocks to stop */
686
687 cfg &= ~HW_CFG_PHY_CLK_SEL_;
688 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
689 SMC_SET_HW_CFG(lp, cfg);
690 udelay(10); /* Wait for clocks to stop */
691
692 cfg |= HW_CFG_SMI_SEL_;
693 SMC_SET_HW_CFG(lp, cfg);
694
695 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
696
697 /* Read the PHY identifiers */
698 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
699 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
700
701 /* Make sure it is a valid identifier */
702 if (id1 != 0x0000 && id1 != 0xffff &&
703 id1 != 0x8000 && id2 != 0x0000 &&
704 id2 != 0xffff && id2 != 0x8000) {
705 /* Save the PHY's address */
706 lp->mii.phy_id = phyaddr & 31;
707 lp->phy_type = id1 << 16 | id2;
708 break;
709 }
710 }
711 if (phyaddr < 32)
712 /* Found an external PHY */
713 break;
714 }
715 /* Else, fall through */
716 default:
717 /* Internal media only */
718 SMC_GET_PHY_ID1(lp, 1, id1);
719 SMC_GET_PHY_ID2(lp, 1, id2);
720 /* Save the PHY's address */
721 lp->mii.phy_id = 1;
722 lp->phy_type = id1 << 16 | id2;
723 }
724
725 DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%x\n",
726 id1, id2, lp->mii.phy_id);
727}
728
729/*
730 * Sets the PHY to a configuration as determined by the user.
731 * Called with spin_lock held.
732 */
733static int smc911x_phy_fixed(struct net_device *dev)
734{
735 struct smc911x_local *lp = netdev_priv(dev);
736 int phyaddr = lp->mii.phy_id;
737 int bmcr;
738
739 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
740
741 /* Enter Link Disable state */
742 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
743 bmcr |= BMCR_PDOWN;
744 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
745
746 /*
747 * Set our fixed capabilities
748 * Disable auto-negotiation
749 */
750 bmcr &= ~BMCR_ANENABLE;
751 if (lp->ctl_rfduplx)
752 bmcr |= BMCR_FULLDPLX;
753
754 if (lp->ctl_rspeed == 100)
755 bmcr |= BMCR_SPEED100;
756
757 /* Write our capabilities to the phy control register */
758 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
759
760 /* Re-Configure the Receive/Phy Control register */
761 bmcr &= ~BMCR_PDOWN;
762 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
763
764 return 1;
765}
766
767/**
768 * smc911x_phy_reset - reset the phy
769 * @dev: net device
770 * @phy: phy address
771 *
772 * Issue a software reset for the specified PHY and
773 * wait up to 100ms for the reset to complete. We should
774 * not access the PHY for 50ms after issuing the reset.
775 *
776 * The time to wait appears to be dependent on the PHY.
777 *
778 */
779static int smc911x_phy_reset(struct net_device *dev, int phy)
780{
781 struct smc911x_local *lp = netdev_priv(dev);
782 int timeout;
783 unsigned long flags;
784 unsigned int reg;
785
786 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
787
788 spin_lock_irqsave(&lp->lock, flags);
789 reg = SMC_GET_PMT_CTRL(lp);
790 reg &= ~0xfffff030;
791 reg |= PMT_CTRL_PHY_RST_;
792 SMC_SET_PMT_CTRL(lp, reg);
793 spin_unlock_irqrestore(&lp->lock, flags);
794 for (timeout = 2; timeout; timeout--) {
795 msleep(50);
796 spin_lock_irqsave(&lp->lock, flags);
797 reg = SMC_GET_PMT_CTRL(lp);
798 spin_unlock_irqrestore(&lp->lock, flags);
799 if (!(reg & PMT_CTRL_PHY_RST_)) {
800 /* extra delay required because the phy may
801 * not be completed with its reset
802 * when PHY_BCR_RESET_ is cleared. 256us
803 * should suffice, but use 500us to be safe
804 */
805 udelay(500);
806 break;
807 }
808 }
809
810 return reg & PMT_CTRL_PHY_RST_;
811}
812
813/**
814 * smc911x_phy_powerdown - powerdown phy
815 * @dev: net device
816 * @phy: phy address
817 *
818 * Power down the specified PHY
819 */
820static void smc911x_phy_powerdown(struct net_device *dev, int phy)
821{
822 struct smc911x_local *lp = netdev_priv(dev);
823 unsigned int bmcr;
824
825 /* Enter Link Disable state */
826 SMC_GET_PHY_BMCR(lp, phy, bmcr);
827 bmcr |= BMCR_PDOWN;
828 SMC_SET_PHY_BMCR(lp, phy, bmcr);
829}
830
831/**
832 * smc911x_phy_check_media - check the media status and adjust BMCR
833 * @dev: net device
834 * @init: set true for initialisation
835 *
836 * Select duplex mode depending on negotiation state. This
837 * also updates our carrier state.
838 */
839static void smc911x_phy_check_media(struct net_device *dev, int init)
840{
841 struct smc911x_local *lp = netdev_priv(dev);
842 int phyaddr = lp->mii.phy_id;
843 unsigned int bmcr, cr;
844
845 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
846
847 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
848 /* duplex state has changed */
849 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
850 SMC_GET_MAC_CR(lp, cr);
851 if (lp->mii.full_duplex) {
852 DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
853 bmcr |= BMCR_FULLDPLX;
854 cr |= MAC_CR_RCVOWN_;
855 } else {
856 DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
857 bmcr &= ~BMCR_FULLDPLX;
858 cr &= ~MAC_CR_RCVOWN_;
859 }
860 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
861 SMC_SET_MAC_CR(lp, cr);
862 }
863}
864
865/*
866 * Configures the specified PHY through the MII management interface
867 * using Autonegotiation.
868 * Calls smc911x_phy_fixed() if the user has requested a certain config.
869 * If RPC ANEG bit is set, the media selection is dependent purely on
870 * the selection by the MII (either in the MII BMCR reg or the result
871 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
872 * is controlled by the RPC SPEED and RPC DPLX bits.
873 */
874static void smc911x_phy_configure(struct work_struct *work)
875{
876 struct smc911x_local *lp = container_of(work, struct smc911x_local,
877 phy_configure);
878 struct net_device *dev = lp->netdev;
879 int phyaddr = lp->mii.phy_id;
880 int my_phy_caps; /* My PHY capabilities */
881 int my_ad_caps; /* My Advertised capabilities */
882 int status;
883 unsigned long flags;
884
885 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
886
887 /*
888 * We should not be called if phy_type is zero.
889 */
890 if (lp->phy_type == 0)
891 return;
892
893 if (smc911x_phy_reset(dev, phyaddr)) {
894 netdev_info(dev, "PHY reset timed out\n");
895 return;
896 }
897 spin_lock_irqsave(&lp->lock, flags);
898
899 /*
900 * Enable PHY Interrupts (for register 18)
901 * Interrupts listed here are enabled
902 */
903 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
904 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
905 PHY_INT_MASK_LINK_DOWN_);
906
907 /* If the user requested no auto neg, then go set his request */
908 if (lp->mii.force_media) {
909 smc911x_phy_fixed(dev);
910 goto smc911x_phy_configure_exit;
911 }
912
913 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
914 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
915 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
916 netdev_info(dev, "Auto negotiation NOT supported\n");
917 smc911x_phy_fixed(dev);
918 goto smc911x_phy_configure_exit;
919 }
920
921 /* CSMA capable w/ both pauses */
922 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
923
924 if (my_phy_caps & BMSR_100BASE4)
925 my_ad_caps |= ADVERTISE_100BASE4;
926 if (my_phy_caps & BMSR_100FULL)
927 my_ad_caps |= ADVERTISE_100FULL;
928 if (my_phy_caps & BMSR_100HALF)
929 my_ad_caps |= ADVERTISE_100HALF;
930 if (my_phy_caps & BMSR_10FULL)
931 my_ad_caps |= ADVERTISE_10FULL;
932 if (my_phy_caps & BMSR_10HALF)
933 my_ad_caps |= ADVERTISE_10HALF;
934
935 /* Disable capabilities not selected by our user */
936 if (lp->ctl_rspeed != 100)
937 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
938
939 if (!lp->ctl_rfduplx)
940 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
941
942 /* Update our Auto-Neg Advertisement Register */
943 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
944 lp->mii.advertising = my_ad_caps;
945
946 /*
947 * Read the register back. Without this, it appears that when
948 * auto-negotiation is restarted, sometimes it isn't ready and
949 * the link does not come up.
950 */
951 udelay(10);
952 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
953
954 DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
955 DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
956
957 /* Restart auto-negotiation process in order to advertise my caps */
958 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
959
960 smc911x_phy_check_media(dev, 1);
961
962smc911x_phy_configure_exit:
963 spin_unlock_irqrestore(&lp->lock, flags);
964}
965
966/*
967 * smc911x_phy_interrupt
968 *
969 * Purpose: Handle interrupts relating to PHY register 18. This is
970 * called from the "hard" interrupt handler under our private spinlock.
971 */
972static void smc911x_phy_interrupt(struct net_device *dev)
973{
974 struct smc911x_local *lp = netdev_priv(dev);
975 int phyaddr = lp->mii.phy_id;
976 int status;
977
978 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
979
980 if (lp->phy_type == 0)
981 return;
982
983 smc911x_phy_check_media(dev, 0);
984 /* read to clear status bits */
985 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
986 DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
987 status & 0xffff);
988 DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
989 SMC_GET_AFC_CFG(lp));
990}
991
992/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
993
994/*
995 * This is the main routine of the driver, to handle the device when
996 * it needs some attention.
997 */
998static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
999{
1000 struct net_device *dev = dev_id;
1001 struct smc911x_local *lp = netdev_priv(dev);
1002 unsigned int status, mask, timeout;
1003 unsigned int rx_overrun=0, cr, pkts;
1004 unsigned long flags;
1005
1006 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1007
1008 spin_lock_irqsave(&lp->lock, flags);
1009
1010 /* Spurious interrupt check */
1011 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1012 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1013 spin_unlock_irqrestore(&lp->lock, flags);
1014 return IRQ_NONE;
1015 }
1016
1017 mask = SMC_GET_INT_EN(lp);
1018 SMC_SET_INT_EN(lp, 0);
1019
1020 /* set a timeout value, so I don't stay here forever */
1021 timeout = 8;
1022
1023
1024 do {
1025 status = SMC_GET_INT(lp);
1026
1027 DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1028 status, mask, status & ~mask);
1029
1030 status &= mask;
1031 if (!status)
1032 break;
1033
1034 /* Handle SW interrupt condition */
1035 if (status & INT_STS_SW_INT_) {
1036 SMC_ACK_INT(lp, INT_STS_SW_INT_);
1037 mask &= ~INT_EN_SW_INT_EN_;
1038 }
1039 /* Handle various error conditions */
1040 if (status & INT_STS_RXE_) {
1041 SMC_ACK_INT(lp, INT_STS_RXE_);
1042 dev->stats.rx_errors++;
1043 }
1044 if (status & INT_STS_RXDFH_INT_) {
1045 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1046 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1047 }
1048 /* Undocumented interrupt-what is the right thing to do here? */
1049 if (status & INT_STS_RXDF_INT_) {
1050 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1051 }
1052
1053 /* Rx Data FIFO exceeds set level */
1054 if (status & INT_STS_RDFL_) {
1055 if (IS_REV_A(lp->revision)) {
1056 rx_overrun=1;
1057 SMC_GET_MAC_CR(lp, cr);
1058 cr &= ~MAC_CR_RXEN_;
1059 SMC_SET_MAC_CR(lp, cr);
1060 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1061 dev->stats.rx_errors++;
1062 dev->stats.rx_fifo_errors++;
1063 }
1064 SMC_ACK_INT(lp, INT_STS_RDFL_);
1065 }
1066 if (status & INT_STS_RDFO_) {
1067 if (!IS_REV_A(lp->revision)) {
1068 SMC_GET_MAC_CR(lp, cr);
1069 cr &= ~MAC_CR_RXEN_;
1070 SMC_SET_MAC_CR(lp, cr);
1071 rx_overrun=1;
1072 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1073 dev->stats.rx_errors++;
1074 dev->stats.rx_fifo_errors++;
1075 }
1076 SMC_ACK_INT(lp, INT_STS_RDFO_);
1077 }
1078 /* Handle receive condition */
1079 if ((status & INT_STS_RSFL_) || rx_overrun) {
1080 unsigned int fifo;
1081 DBG(SMC_DEBUG_RX, dev, "RX irq\n");
1082 fifo = SMC_GET_RX_FIFO_INF(lp);
1083 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1084 DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
1085 pkts, fifo & 0xFFFF);
1086 if (pkts != 0) {
1087#ifdef SMC_USE_DMA
1088 unsigned int fifo;
1089 if (lp->rxdma_active){
1090 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1091 "RX DMA active\n");
1092 /* The DMA is already running so up the IRQ threshold */
1093 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1094 fifo |= pkts & 0xFF;
1095 DBG(SMC_DEBUG_RX, dev,
1096 "Setting RX stat FIFO threshold to %d\n",
1097 fifo & 0xff);
1098 SMC_SET_FIFO_INT(lp, fifo);
1099 } else
1100#endif
1101 smc911x_rcv(dev);
1102 }
1103 SMC_ACK_INT(lp, INT_STS_RSFL_);
1104 }
1105 /* Handle transmit FIFO available */
1106 if (status & INT_STS_TDFA_) {
1107 DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
1108 SMC_SET_FIFO_TDA(lp, 0xFF);
1109 lp->tx_throttle = 0;
1110#ifdef SMC_USE_DMA
1111 if (!lp->txdma_active)
1112#endif
1113 netif_wake_queue(dev);
1114 SMC_ACK_INT(lp, INT_STS_TDFA_);
1115 }
1116 /* Handle transmit done condition */
1117#if 1
1118 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1119 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
1120 "Tx stat FIFO limit (%d) /GPT irq\n",
1121 (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1122 smc911x_tx(dev);
1123 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1124 SMC_ACK_INT(lp, INT_STS_TSFL_);
1125 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1126 }
1127#else
1128 if (status & INT_STS_TSFL_) {
1129 DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
1130 smc911x_tx(dev);
1131 SMC_ACK_INT(lp, INT_STS_TSFL_);
1132 }
1133
1134 if (status & INT_STS_GPT_INT_) {
1135 DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1136 SMC_GET_IRQ_CFG(lp),
1137 SMC_GET_FIFO_INT(lp),
1138 SMC_GET_RX_CFG(lp));
1139 DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1140 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1141 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1142 SMC_GET_RX_STS_FIFO_PEEK(lp));
1143 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1144 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1145 }
1146#endif
1147
1148 /* Handle PHY interrupt condition */
1149 if (status & INT_STS_PHY_INT_) {
1150 DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
1151 smc911x_phy_interrupt(dev);
1152 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1153 }
1154 } while (--timeout);
1155
1156 /* restore mask state */
1157 SMC_SET_INT_EN(lp, mask);
1158
1159 DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
1160 8-timeout);
1161
1162 spin_unlock_irqrestore(&lp->lock, flags);
1163
1164 return IRQ_HANDLED;
1165}
1166
1167#ifdef SMC_USE_DMA
1168static void
1169smc911x_tx_dma_irq(void *data)
1170{
1171 struct smc911x_local *lp = data;
1172 struct net_device *dev = lp->netdev;
1173 struct sk_buff *skb = lp->current_tx_skb;
1174 unsigned long flags;
1175
1176 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1177
1178 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
1179 BUG_ON(skb == NULL);
1180 dma_unmap_single(lp->dev, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1181 netif_trans_update(dev);
1182 dev_kfree_skb_irq(skb);
1183 lp->current_tx_skb = NULL;
1184 if (lp->pending_tx_skb != NULL)
1185 smc911x_hardware_send_pkt(dev);
1186 else {
1187 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1188 "No pending Tx packets. DMA disabled\n");
1189 spin_lock_irqsave(&lp->lock, flags);
1190 lp->txdma_active = 0;
1191 if (!lp->tx_throttle) {
1192 netif_wake_queue(dev);
1193 }
1194 spin_unlock_irqrestore(&lp->lock, flags);
1195 }
1196
1197 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1198 "TX DMA irq completed\n");
1199}
1200static void
1201smc911x_rx_dma_irq(void *data)
1202{
1203 struct smc911x_local *lp = data;
1204 struct net_device *dev = lp->netdev;
1205 struct sk_buff *skb = lp->current_rx_skb;
1206 unsigned long flags;
1207 unsigned int pkts;
1208
1209 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1210 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
1211 dma_unmap_single(lp->dev, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1212 BUG_ON(skb == NULL);
1213 lp->current_rx_skb = NULL;
1214 PRINT_PKT(skb->data, skb->len);
1215 skb->protocol = eth_type_trans(skb, dev);
1216 dev->stats.rx_packets++;
1217 dev->stats.rx_bytes += skb->len;
1218 netif_rx(skb);
1219
1220 spin_lock_irqsave(&lp->lock, flags);
1221 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1222 if (pkts != 0) {
1223 smc911x_rcv(dev);
1224 }else {
1225 lp->rxdma_active = 0;
1226 }
1227 spin_unlock_irqrestore(&lp->lock, flags);
1228 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1229 "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1230 pkts);
1231}
1232#endif /* SMC_USE_DMA */
1233
1234#ifdef CONFIG_NET_POLL_CONTROLLER
1235/*
1236 * Polling receive - used by netconsole and other diagnostic tools
1237 * to allow network i/o with interrupts disabled.
1238 */
1239static void smc911x_poll_controller(struct net_device *dev)
1240{
1241 disable_irq(dev->irq);
1242 smc911x_interrupt(dev->irq, dev);
1243 enable_irq(dev->irq);
1244}
1245#endif
1246
1247/* Our watchdog timed out. Called by the networking layer */
1248static void smc911x_timeout(struct net_device *dev)
1249{
1250 struct smc911x_local *lp = netdev_priv(dev);
1251 int status, mask;
1252 unsigned long flags;
1253
1254 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1255
1256 spin_lock_irqsave(&lp->lock, flags);
1257 status = SMC_GET_INT(lp);
1258 mask = SMC_GET_INT_EN(lp);
1259 spin_unlock_irqrestore(&lp->lock, flags);
1260 DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
1261 status, mask);
1262
1263 /* Dump the current TX FIFO contents and restart */
1264 mask = SMC_GET_TX_CFG(lp);
1265 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1266 /*
1267 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1268 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1269 * which calls schedule(). Hence we use a work queue.
1270 */
1271 if (lp->phy_type != 0)
1272 schedule_work(&lp->phy_configure);
1273
1274 /* We can accept TX packets again */
1275 netif_trans_update(dev); /* prevent tx timeout */
1276 netif_wake_queue(dev);
1277}
1278
1279/*
1280 * This routine will, depending on the values passed to it,
1281 * either make it accept multicast packets, go into
1282 * promiscuous mode (for TCPDUMP and cousins) or accept
1283 * a select set of multicast packets
1284 */
1285static void smc911x_set_multicast_list(struct net_device *dev)
1286{
1287 struct smc911x_local *lp = netdev_priv(dev);
1288 unsigned int multicast_table[2];
1289 unsigned int mcr, update_multicast = 0;
1290 unsigned long flags;
1291
1292 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1293
1294 spin_lock_irqsave(&lp->lock, flags);
1295 SMC_GET_MAC_CR(lp, mcr);
1296 spin_unlock_irqrestore(&lp->lock, flags);
1297
1298 if (dev->flags & IFF_PROMISC) {
1299
1300 DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
1301 mcr |= MAC_CR_PRMS_;
1302 }
1303 /*
1304 * Here, I am setting this to accept all multicast packets.
1305 * I don't need to zero the multicast table, because the flag is
1306 * checked before the table is
1307 */
1308 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1309 DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
1310 mcr |= MAC_CR_MCPAS_;
1311 }
1312
1313 /*
1314 * This sets the internal hardware table to filter out unwanted
1315 * multicast packets before they take up memory.
1316 *
1317 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1318 * address are the offset into the table. If that bit is 1, then the
1319 * multicast packet is accepted. Otherwise, it's dropped silently.
1320 *
1321 * To use the 6 bits as an offset into the table, the high 1 bit is
1322 * the number of the 32 bit register, while the low 5 bits are the bit
1323 * within that register.
1324 */
1325 else if (!netdev_mc_empty(dev)) {
1326 struct netdev_hw_addr *ha;
1327
1328 /* Set the Hash perfec mode */
1329 mcr |= MAC_CR_HPFILT_;
1330
1331 /* start with a table of all zeros: reject all */
1332 memset(multicast_table, 0, sizeof(multicast_table));
1333
1334 netdev_for_each_mc_addr(ha, dev) {
1335 u32 position;
1336
1337 /* upper 6 bits are used as hash index */
1338 position = ether_crc(ETH_ALEN, ha->addr)>>26;
1339
1340 multicast_table[position>>5] |= 1 << (position&0x1f);
1341 }
1342
1343 /* be sure I get rid of flags I might have set */
1344 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1345
1346 /* now, the table can be loaded into the chipset */
1347 update_multicast = 1;
1348 } else {
1349 DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
1350 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1351
1352 /*
1353 * since I'm disabling all multicast entirely, I need to
1354 * clear the multicast list
1355 */
1356 memset(multicast_table, 0, sizeof(multicast_table));
1357 update_multicast = 1;
1358 }
1359
1360 spin_lock_irqsave(&lp->lock, flags);
1361 SMC_SET_MAC_CR(lp, mcr);
1362 if (update_multicast) {
1363 DBG(SMC_DEBUG_MISC, dev,
1364 "update mcast hash table 0x%08x 0x%08x\n",
1365 multicast_table[0], multicast_table[1]);
1366 SMC_SET_HASHL(lp, multicast_table[0]);
1367 SMC_SET_HASHH(lp, multicast_table[1]);
1368 }
1369 spin_unlock_irqrestore(&lp->lock, flags);
1370}
1371
1372
1373/*
1374 * Open and Initialize the board
1375 *
1376 * Set up everything, reset the card, etc..
1377 */
1378static int
1379smc911x_open(struct net_device *dev)
1380{
1381 struct smc911x_local *lp = netdev_priv(dev);
1382
1383 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1384
1385 /* reset the hardware */
1386 smc911x_reset(dev);
1387
1388 /* Configure the PHY, initialize the link state */
1389 smc911x_phy_configure(&lp->phy_configure);
1390
1391 /* Turn on Tx + Rx */
1392 smc911x_enable(dev);
1393
1394 netif_start_queue(dev);
1395
1396 return 0;
1397}
1398
1399/*
1400 * smc911x_close
1401 *
1402 * this makes the board clean up everything that it can
1403 * and not talk to the outside world. Caused by
1404 * an 'ifconfig ethX down'
1405 */
1406static int smc911x_close(struct net_device *dev)
1407{
1408 struct smc911x_local *lp = netdev_priv(dev);
1409
1410 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1411
1412 netif_stop_queue(dev);
1413 netif_carrier_off(dev);
1414
1415 /* clear everything */
1416 smc911x_shutdown(dev);
1417
1418 if (lp->phy_type != 0) {
1419 /* We need to ensure that no calls to
1420 * smc911x_phy_configure are pending.
1421 */
1422 cancel_work_sync(&lp->phy_configure);
1423 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1424 }
1425
1426 if (lp->pending_tx_skb) {
1427 dev_kfree_skb(lp->pending_tx_skb);
1428 lp->pending_tx_skb = NULL;
1429 }
1430
1431 return 0;
1432}
1433
1434/*
1435 * Ethtool support
1436 */
1437static int
1438smc911x_ethtool_get_link_ksettings(struct net_device *dev,
1439 struct ethtool_link_ksettings *cmd)
1440{
1441 struct smc911x_local *lp = netdev_priv(dev);
1442 int status;
1443 unsigned long flags;
1444 u32 supported;
1445
1446 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1447
1448 if (lp->phy_type != 0) {
1449 spin_lock_irqsave(&lp->lock, flags);
1450 mii_ethtool_get_link_ksettings(&lp->mii, cmd);
1451 spin_unlock_irqrestore(&lp->lock, flags);
1452 } else {
1453 supported = SUPPORTED_10baseT_Half |
1454 SUPPORTED_10baseT_Full |
1455 SUPPORTED_TP | SUPPORTED_AUI;
1456
1457 if (lp->ctl_rspeed == 10)
1458 cmd->base.speed = SPEED_10;
1459 else if (lp->ctl_rspeed == 100)
1460 cmd->base.speed = SPEED_100;
1461
1462 cmd->base.autoneg = AUTONEG_DISABLE;
1463 cmd->base.port = 0;
1464 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1465 cmd->base.duplex =
1466 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1467 DUPLEX_FULL : DUPLEX_HALF;
1468
1469 ethtool_convert_legacy_u32_to_link_mode(
1470 cmd->link_modes.supported, supported);
1471
1472 }
1473
1474 return 0;
1475}
1476
1477static int
1478smc911x_ethtool_set_link_ksettings(struct net_device *dev,
1479 const struct ethtool_link_ksettings *cmd)
1480{
1481 struct smc911x_local *lp = netdev_priv(dev);
1482 int ret;
1483 unsigned long flags;
1484
1485 if (lp->phy_type != 0) {
1486 spin_lock_irqsave(&lp->lock, flags);
1487 ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
1488 spin_unlock_irqrestore(&lp->lock, flags);
1489 } else {
1490 if (cmd->base.autoneg != AUTONEG_DISABLE ||
1491 cmd->base.speed != SPEED_10 ||
1492 (cmd->base.duplex != DUPLEX_HALF &&
1493 cmd->base.duplex != DUPLEX_FULL) ||
1494 (cmd->base.port != PORT_TP &&
1495 cmd->base.port != PORT_AUI))
1496 return -EINVAL;
1497
1498 lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
1499
1500 ret = 0;
1501 }
1502
1503 return ret;
1504}
1505
1506static void
1507smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1508{
1509 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1510 strlcpy(info->version, version, sizeof(info->version));
1511 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1512 sizeof(info->bus_info));
1513}
1514
1515static int smc911x_ethtool_nwayreset(struct net_device *dev)
1516{
1517 struct smc911x_local *lp = netdev_priv(dev);
1518 int ret = -EINVAL;
1519 unsigned long flags;
1520
1521 if (lp->phy_type != 0) {
1522 spin_lock_irqsave(&lp->lock, flags);
1523 ret = mii_nway_restart(&lp->mii);
1524 spin_unlock_irqrestore(&lp->lock, flags);
1525 }
1526
1527 return ret;
1528}
1529
1530static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1531{
1532 struct smc911x_local *lp = netdev_priv(dev);
1533 return lp->msg_enable;
1534}
1535
1536static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1537{
1538 struct smc911x_local *lp = netdev_priv(dev);
1539 lp->msg_enable = level;
1540}
1541
1542static int smc911x_ethtool_getregslen(struct net_device *dev)
1543{
1544 /* System regs + MAC regs + PHY regs */
1545 return (((E2P_CMD - ID_REV)/4 + 1) +
1546 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1547}
1548
1549static void smc911x_ethtool_getregs(struct net_device *dev,
1550 struct ethtool_regs* regs, void *buf)
1551{
1552 struct smc911x_local *lp = netdev_priv(dev);
1553 unsigned long flags;
1554 u32 reg,i,j=0;
1555 u32 *data = (u32*)buf;
1556
1557 regs->version = lp->version;
1558 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1559 data[j++] = SMC_inl(lp, i);
1560 }
1561 for(i=MAC_CR;i<=WUCSR;i++) {
1562 spin_lock_irqsave(&lp->lock, flags);
1563 SMC_GET_MAC_CSR(lp, i, reg);
1564 spin_unlock_irqrestore(&lp->lock, flags);
1565 data[j++] = reg;
1566 }
1567 for(i=0;i<=31;i++) {
1568 spin_lock_irqsave(&lp->lock, flags);
1569 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1570 spin_unlock_irqrestore(&lp->lock, flags);
1571 data[j++] = reg & 0xFFFF;
1572 }
1573}
1574
1575static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1576{
1577 struct smc911x_local *lp = netdev_priv(dev);
1578 unsigned int timeout;
1579 int e2p_cmd;
1580
1581 e2p_cmd = SMC_GET_E2P_CMD(lp);
1582 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1583 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1584 PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
1585 __func__);
1586 return -EFAULT;
1587 }
1588 mdelay(1);
1589 e2p_cmd = SMC_GET_E2P_CMD(lp);
1590 }
1591 if (timeout == 0) {
1592 PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
1593 __func__);
1594 return -ETIMEDOUT;
1595 }
1596 return 0;
1597}
1598
1599static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1600 int cmd, int addr)
1601{
1602 struct smc911x_local *lp = netdev_priv(dev);
1603 int ret;
1604
1605 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1606 return ret;
1607 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1608 ((cmd) & (0x7<<28)) |
1609 ((addr) & 0xFF));
1610 return 0;
1611}
1612
1613static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1614 u8 *data)
1615{
1616 struct smc911x_local *lp = netdev_priv(dev);
1617 int ret;
1618
1619 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1620 return ret;
1621 *data = SMC_GET_E2P_DATA(lp);
1622 return 0;
1623}
1624
1625static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1626 u8 data)
1627{
1628 struct smc911x_local *lp = netdev_priv(dev);
1629 int ret;
1630
1631 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1632 return ret;
1633 SMC_SET_E2P_DATA(lp, data);
1634 return 0;
1635}
1636
1637static int smc911x_ethtool_geteeprom(struct net_device *dev,
1638 struct ethtool_eeprom *eeprom, u8 *data)
1639{
1640 u8 eebuf[SMC911X_EEPROM_LEN];
1641 int i, ret;
1642
1643 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1644 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1645 return ret;
1646 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1647 return ret;
1648 }
1649 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1650 return 0;
1651}
1652
1653static int smc911x_ethtool_seteeprom(struct net_device *dev,
1654 struct ethtool_eeprom *eeprom, u8 *data)
1655{
1656 int i, ret;
1657
1658 /* Enable erase */
1659 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1660 return ret;
1661 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1662 /* erase byte */
1663 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1664 return ret;
1665 /* write byte */
1666 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1667 return ret;
1668 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1669 return ret;
1670 }
1671 return 0;
1672}
1673
1674static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1675{
1676 return SMC911X_EEPROM_LEN;
1677}
1678
1679static const struct ethtool_ops smc911x_ethtool_ops = {
1680 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1681 .get_msglevel = smc911x_ethtool_getmsglevel,
1682 .set_msglevel = smc911x_ethtool_setmsglevel,
1683 .nway_reset = smc911x_ethtool_nwayreset,
1684 .get_link = ethtool_op_get_link,
1685 .get_regs_len = smc911x_ethtool_getregslen,
1686 .get_regs = smc911x_ethtool_getregs,
1687 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1688 .get_eeprom = smc911x_ethtool_geteeprom,
1689 .set_eeprom = smc911x_ethtool_seteeprom,
1690 .get_link_ksettings = smc911x_ethtool_get_link_ksettings,
1691 .set_link_ksettings = smc911x_ethtool_set_link_ksettings,
1692};
1693
1694/*
1695 * smc911x_findirq
1696 *
1697 * This routine has a simple purpose -- make the SMC chip generate an
1698 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1699 */
1700static int smc911x_findirq(struct net_device *dev)
1701{
1702 struct smc911x_local *lp = netdev_priv(dev);
1703 int timeout = 20;
1704 unsigned long cookie;
1705
1706 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1707
1708 cookie = probe_irq_on();
1709
1710 /*
1711 * Force a SW interrupt
1712 */
1713
1714 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1715
1716 /*
1717 * Wait until positive that the interrupt has been generated
1718 */
1719 do {
1720 int int_status;
1721 udelay(10);
1722 int_status = SMC_GET_INT_EN(lp);
1723 if (int_status & INT_EN_SW_INT_EN_)
1724 break; /* got the interrupt */
1725 } while (--timeout);
1726
1727 /*
1728 * there is really nothing that I can do here if timeout fails,
1729 * as autoirq_report will return a 0 anyway, which is what I
1730 * want in this case. Plus, the clean up is needed in both
1731 * cases.
1732 */
1733
1734 /* and disable all interrupts again */
1735 SMC_SET_INT_EN(lp, 0);
1736
1737 /* and return what I found */
1738 return probe_irq_off(cookie);
1739}
1740
1741static const struct net_device_ops smc911x_netdev_ops = {
1742 .ndo_open = smc911x_open,
1743 .ndo_stop = smc911x_close,
1744 .ndo_start_xmit = smc911x_hard_start_xmit,
1745 .ndo_tx_timeout = smc911x_timeout,
1746 .ndo_set_rx_mode = smc911x_set_multicast_list,
1747 .ndo_validate_addr = eth_validate_addr,
1748 .ndo_set_mac_address = eth_mac_addr,
1749#ifdef CONFIG_NET_POLL_CONTROLLER
1750 .ndo_poll_controller = smc911x_poll_controller,
1751#endif
1752};
1753
1754/*
1755 * Function: smc911x_probe(unsigned long ioaddr)
1756 *
1757 * Purpose:
1758 * Tests to see if a given ioaddr points to an SMC911x chip.
1759 * Returns a 0 on success
1760 *
1761 * Algorithm:
1762 * (1) see if the endian word is OK
1763 * (1) see if I recognize the chip ID in the appropriate register
1764 *
1765 * Here I do typical initialization tasks.
1766 *
1767 * o Initialize the structure if needed
1768 * o print out my vanity message if not done so already
1769 * o print out what type of hardware is detected
1770 * o print out the ethernet address
1771 * o find the IRQ
1772 * o set up my private data
1773 * o configure the dev structure with my subroutines
1774 * o actually GRAB the irq.
1775 * o GRAB the region
1776 */
1777static int smc911x_probe(struct net_device *dev)
1778{
1779 struct smc911x_local *lp = netdev_priv(dev);
1780 int i, retval;
1781 unsigned int val, chip_id, revision;
1782 const char *version_string;
1783 unsigned long irq_flags;
1784#ifdef SMC_USE_DMA
1785 struct dma_slave_config config;
1786 dma_cap_mask_t mask;
1787#endif
1788
1789 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1790
1791 /* First, see if the endian word is recognized */
1792 val = SMC_GET_BYTE_TEST(lp);
1793 DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
1794 CARDNAME, val);
1795 if (val != 0x87654321) {
1796 netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
1797 retval = -ENODEV;
1798 goto err_out;
1799 }
1800
1801 /*
1802 * check if the revision register is something that I
1803 * recognize. These might need to be added to later,
1804 * as future revisions could be added.
1805 */
1806 chip_id = SMC_GET_PN(lp);
1807 DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
1808 CARDNAME, chip_id);
1809 for(i=0;chip_ids[i].id != 0; i++) {
1810 if (chip_ids[i].id == chip_id) break;
1811 }
1812 if (!chip_ids[i].id) {
1813 netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
1814 retval = -ENODEV;
1815 goto err_out;
1816 }
1817 version_string = chip_ids[i].name;
1818
1819 revision = SMC_GET_REV(lp);
1820 DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
1821
1822 /* At this point I'll assume that the chip is an SMC911x. */
1823 DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
1824 CARDNAME, chip_ids[i].name);
1825
1826 /* Validate the TX FIFO size requested */
1827 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1828 netdev_err(dev, "Invalid TX FIFO size requested %d\n",
1829 tx_fifo_kb);
1830 retval = -EINVAL;
1831 goto err_out;
1832 }
1833
1834 /* fill in some of the fields */
1835 lp->version = chip_ids[i].id;
1836 lp->revision = revision;
1837 lp->tx_fifo_kb = tx_fifo_kb;
1838 /* Reverse calculate the RX FIFO size from the TX */
1839 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1840 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1841
1842 /* Set the automatic flow control values */
1843 switch(lp->tx_fifo_kb) {
1844 /*
1845 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1846 * AFC_LO is AFC_HI/2
1847 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1848 */
1849 case 2:/* 13440 Rx Data Fifo Size */
1850 lp->afc_cfg=0x008C46AF;break;
1851 case 3:/* 12480 Rx Data Fifo Size */
1852 lp->afc_cfg=0x0082419F;break;
1853 case 4:/* 11520 Rx Data Fifo Size */
1854 lp->afc_cfg=0x00783C9F;break;
1855 case 5:/* 10560 Rx Data Fifo Size */
1856 lp->afc_cfg=0x006E374F;break;
1857 case 6:/* 9600 Rx Data Fifo Size */
1858 lp->afc_cfg=0x0064328F;break;
1859 case 7:/* 8640 Rx Data Fifo Size */
1860 lp->afc_cfg=0x005A2D7F;break;
1861 case 8:/* 7680 Rx Data Fifo Size */
1862 lp->afc_cfg=0x0050287F;break;
1863 case 9:/* 6720 Rx Data Fifo Size */
1864 lp->afc_cfg=0x0046236F;break;
1865 case 10:/* 5760 Rx Data Fifo Size */
1866 lp->afc_cfg=0x003C1E6F;break;
1867 case 11:/* 4800 Rx Data Fifo Size */
1868 lp->afc_cfg=0x0032195F;break;
1869 /*
1870 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1871 * AFC_LO is AFC_HI/2
1872 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1873 */
1874 case 12:/* 3840 Rx Data Fifo Size */
1875 lp->afc_cfg=0x0024124F;break;
1876 case 13:/* 2880 Rx Data Fifo Size */
1877 lp->afc_cfg=0x0015073F;break;
1878 case 14:/* 1920 Rx Data Fifo Size */
1879 lp->afc_cfg=0x0006032F;break;
1880 default:
1881 PRINTK(dev, "ERROR -- no AFC_CFG setting found");
1882 break;
1883 }
1884
1885 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
1886 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1887 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1888
1889 spin_lock_init(&lp->lock);
1890
1891 /* Get the MAC address */
1892 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1893
1894 /* now, reset the chip, and put it into a known state */
1895 smc911x_reset(dev);
1896
1897 /*
1898 * If dev->irq is 0, then the device has to be banged on to see
1899 * what the IRQ is.
1900 *
1901 * Specifying an IRQ is done with the assumption that the user knows
1902 * what (s)he is doing. No checking is done!!!!
1903 */
1904 if (dev->irq < 1) {
1905 int trials;
1906
1907 trials = 3;
1908 while (trials--) {
1909 dev->irq = smc911x_findirq(dev);
1910 if (dev->irq)
1911 break;
1912 /* kick the card and try again */
1913 smc911x_reset(dev);
1914 }
1915 }
1916 if (dev->irq == 0) {
1917 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1918 retval = -ENODEV;
1919 goto err_out;
1920 }
1921 dev->irq = irq_canonicalize(dev->irq);
1922
1923 dev->netdev_ops = &smc911x_netdev_ops;
1924 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1925 dev->ethtool_ops = &smc911x_ethtool_ops;
1926
1927 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1928 lp->mii.phy_id_mask = 0x1f;
1929 lp->mii.reg_num_mask = 0x1f;
1930 lp->mii.force_media = 0;
1931 lp->mii.full_duplex = 0;
1932 lp->mii.dev = dev;
1933 lp->mii.mdio_read = smc911x_phy_read;
1934 lp->mii.mdio_write = smc911x_phy_write;
1935
1936 /*
1937 * Locate the phy, if any.
1938 */
1939 smc911x_phy_detect(dev);
1940
1941 /* Set default parameters */
1942 lp->msg_enable = NETIF_MSG_LINK;
1943 lp->ctl_rfduplx = 1;
1944 lp->ctl_rspeed = 100;
1945
1946#ifdef SMC_DYNAMIC_BUS_CONFIG
1947 irq_flags = lp->cfg.irq_flags;
1948#else
1949 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1950#endif
1951
1952 /* Grab the IRQ */
1953 retval = request_irq(dev->irq, smc911x_interrupt,
1954 irq_flags, dev->name, dev);
1955 if (retval)
1956 goto err_out;
1957
1958#ifdef SMC_USE_DMA
1959
1960 dma_cap_zero(mask);
1961 dma_cap_set(DMA_SLAVE, mask);
1962 lp->rxdma = dma_request_channel(mask, NULL, NULL);
1963 lp->txdma = dma_request_channel(mask, NULL, NULL);
1964 lp->rxdma_active = 0;
1965 lp->txdma_active = 0;
1966
1967 memset(&config, 0, sizeof(config));
1968 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1969 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1970 config.src_addr = lp->physaddr + RX_DATA_FIFO;
1971 config.dst_addr = lp->physaddr + TX_DATA_FIFO;
1972 config.src_maxburst = 32;
1973 config.dst_maxburst = 32;
1974 retval = dmaengine_slave_config(lp->rxdma, &config);
1975 if (retval) {
1976 dev_err(lp->dev, "dma rx channel configuration failed: %d\n",
1977 retval);
1978 goto err_out;
1979 }
1980 retval = dmaengine_slave_config(lp->txdma, &config);
1981 if (retval) {
1982 dev_err(lp->dev, "dma tx channel configuration failed: %d\n",
1983 retval);
1984 goto err_out;
1985 }
1986#endif
1987
1988 retval = register_netdev(dev);
1989 if (retval == 0) {
1990 /* now, print out the card info, in a short format.. */
1991 netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
1992 version_string, lp->revision,
1993 dev->base_addr, dev->irq);
1994
1995#ifdef SMC_USE_DMA
1996 if (lp->rxdma)
1997 pr_cont(" RXDMA %p", lp->rxdma);
1998
1999 if (lp->txdma)
2000 pr_cont(" TXDMA %p", lp->txdma);
2001#endif
2002 pr_cont("\n");
2003 if (!is_valid_ether_addr(dev->dev_addr)) {
2004 netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2005 } else {
2006 /* Print the Ethernet address */
2007 netdev_info(dev, "Ethernet addr: %pM\n",
2008 dev->dev_addr);
2009 }
2010
2011 if (lp->phy_type == 0) {
2012 PRINTK(dev, "No PHY found\n");
2013 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2014 PRINTK(dev, "LAN911x Internal PHY\n");
2015 } else {
2016 PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
2017 }
2018 }
2019
2020err_out:
2021#ifdef SMC_USE_DMA
2022 if (retval) {
2023 if (lp->rxdma)
2024 dma_release_channel(lp->rxdma);
2025 if (lp->txdma)
2026 dma_release_channel(lp->txdma);
2027 }
2028#endif
2029 return retval;
2030}
2031
2032/*
2033 * smc911x_drv_probe(void)
2034 *
2035 * Output:
2036 * 0 --> there is a device
2037 * anything else, error
2038 */
2039static int smc911x_drv_probe(struct platform_device *pdev)
2040{
2041 struct net_device *ndev;
2042 struct resource *res;
2043 struct smc911x_local *lp;
2044 void __iomem *addr;
2045 int ret;
2046
2047 /* ndev is not valid yet, so avoid passing it in. */
2048 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2049 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2050 if (!res) {
2051 ret = -ENODEV;
2052 goto out;
2053 }
2054
2055 /*
2056 * Request the regions.
2057 */
2058 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2059 ret = -EBUSY;
2060 goto out;
2061 }
2062
2063 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2064 if (!ndev) {
2065 ret = -ENOMEM;
2066 goto release_1;
2067 }
2068 SET_NETDEV_DEV(ndev, &pdev->dev);
2069
2070 ndev->dma = (unsigned char)-1;
2071 ndev->irq = platform_get_irq(pdev, 0);
2072 lp = netdev_priv(ndev);
2073 lp->netdev = ndev;
2074#ifdef SMC_DYNAMIC_BUS_CONFIG
2075 {
2076 struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
2077 if (!pd) {
2078 ret = -EINVAL;
2079 goto release_both;
2080 }
2081 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2082 }
2083#endif
2084
2085 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2086 if (!addr) {
2087 ret = -ENOMEM;
2088 goto release_both;
2089 }
2090
2091 platform_set_drvdata(pdev, ndev);
2092 lp->base = addr;
2093 ndev->base_addr = res->start;
2094 ret = smc911x_probe(ndev);
2095 if (ret != 0) {
2096 iounmap(addr);
2097release_both:
2098 free_netdev(ndev);
2099release_1:
2100 release_mem_region(res->start, SMC911X_IO_EXTENT);
2101out:
2102 pr_info("%s: not found (%d).\n", CARDNAME, ret);
2103 }
2104#ifdef SMC_USE_DMA
2105 else {
2106 lp->physaddr = res->start;
2107 lp->dev = &pdev->dev;
2108 }
2109#endif
2110
2111 return ret;
2112}
2113
2114static int smc911x_drv_remove(struct platform_device *pdev)
2115{
2116 struct net_device *ndev = platform_get_drvdata(pdev);
2117 struct smc911x_local *lp = netdev_priv(ndev);
2118 struct resource *res;
2119
2120 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2121
2122 unregister_netdev(ndev);
2123
2124 free_irq(ndev->irq, ndev);
2125
2126#ifdef SMC_USE_DMA
2127 {
2128 if (lp->rxdma)
2129 dma_release_channel(lp->rxdma);
2130 if (lp->txdma)
2131 dma_release_channel(lp->txdma);
2132 }
2133#endif
2134 iounmap(lp->base);
2135 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2136 release_mem_region(res->start, SMC911X_IO_EXTENT);
2137
2138 free_netdev(ndev);
2139 return 0;
2140}
2141
2142static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2143{
2144 struct net_device *ndev = platform_get_drvdata(dev);
2145 struct smc911x_local *lp = netdev_priv(ndev);
2146
2147 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2148 if (ndev) {
2149 if (netif_running(ndev)) {
2150 netif_device_detach(ndev);
2151 smc911x_shutdown(ndev);
2152#if POWER_DOWN
2153 /* Set D2 - Energy detect only setting */
2154 SMC_SET_PMT_CTRL(lp, 2<<12);
2155#endif
2156 }
2157 }
2158 return 0;
2159}
2160
2161static int smc911x_drv_resume(struct platform_device *dev)
2162{
2163 struct net_device *ndev = platform_get_drvdata(dev);
2164
2165 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2166 if (ndev) {
2167 struct smc911x_local *lp = netdev_priv(ndev);
2168
2169 if (netif_running(ndev)) {
2170 smc911x_reset(ndev);
2171 if (lp->phy_type != 0)
2172 smc911x_phy_configure(&lp->phy_configure);
2173 smc911x_enable(ndev);
2174 netif_device_attach(ndev);
2175 }
2176 }
2177 return 0;
2178}
2179
2180static struct platform_driver smc911x_driver = {
2181 .probe = smc911x_drv_probe,
2182 .remove = smc911x_drv_remove,
2183 .suspend = smc911x_drv_suspend,
2184 .resume = smc911x_drv_resume,
2185 .driver = {
2186 .name = CARDNAME,
2187 },
2188};
2189
2190module_platform_driver(smc911x_driver);