1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
 4 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 5 */
 6
 7#include <linux/kernel.h>
 8#include <linux/errno.h>
 9#include <linux/types.h>
10#include <linux/pci.h>
11
12#include "vnic_dev.h"
13#include "vnic_cq.h"
14#include "enic.h"
15
16void vnic_cq_free(struct vnic_cq *cq)
17{
18	vnic_dev_free_desc_ring(cq->vdev, &cq->ring);
19
20	cq->ctrl = NULL;
21}
22
23int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
24	unsigned int desc_count, unsigned int desc_size)
25{
 
 
26	cq->index = index;
27	cq->vdev = vdev;
28
29	cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index);
30	if (!cq->ctrl) {
31		vdev_err(vdev, "Failed to hook CQ[%d] resource\n", index);
32		return -EINVAL;
33	}
34
35	return vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size);
 
 
 
 
36}
37
38void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
39	unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
40	unsigned int cq_tail_color, unsigned int interrupt_enable,
41	unsigned int cq_entry_enable, unsigned int cq_message_enable,
42	unsigned int interrupt_offset, u64 cq_message_addr)
43{
44	u64 paddr;
45
46	paddr = (u64)cq->ring.base_addr | VNIC_PADDR_TARGET;
47	writeq(paddr, &cq->ctrl->ring_base);
48	iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
49	iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
50	iowrite32(color_enable, &cq->ctrl->color_enable);
51	iowrite32(cq_head, &cq->ctrl->cq_head);
52	iowrite32(cq_tail, &cq->ctrl->cq_tail);
53	iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
54	iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
55	iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
56	iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
57	iowrite32(interrupt_offset, &cq->ctrl->interrupt_offset);
58	writeq(cq_message_addr, &cq->ctrl->cq_message_addr);
59
60	cq->interrupt_offset = interrupt_offset;
61}
62
63void vnic_cq_clean(struct vnic_cq *cq)
64{
65	cq->to_clean = 0;
66	cq->last_color = 0;
67
68	iowrite32(0, &cq->ctrl->cq_head);
69	iowrite32(0, &cq->ctrl->cq_tail);
70	iowrite32(1, &cq->ctrl->cq_tail_color);
71
72	vnic_dev_clear_desc_ring(&cq->ring);
73}

 
 1/*
 2 * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
 3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
 4 *
 5 * This program is free software; you may redistribute it and/or modify
 6 * it under the terms of the GNU General Public License as published by
 7 * the Free Software Foundation; version 2 of the License.
 8 *
 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/types.h>
23#include <linux/pci.h>
24
25#include "vnic_dev.h"
26#include "vnic_cq.h"
27#include "enic.h"
28
29void vnic_cq_free(struct vnic_cq *cq)
30{
31	vnic_dev_free_desc_ring(cq->vdev, &cq->ring);
32
33	cq->ctrl = NULL;
34}
35
36int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
37	unsigned int desc_count, unsigned int desc_size)
38{
39	int err;
40
41	cq->index = index;
42	cq->vdev = vdev;
43
44	cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index);
45	if (!cq->ctrl) {
46		vdev_err(vdev, "Failed to hook CQ[%d] resource\n", index);
47		return -EINVAL;
48	}
49
50	err = vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size);
51	if (err)
52		return err;
53
54	return 0;
55}
56
57void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
58	unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
59	unsigned int cq_tail_color, unsigned int interrupt_enable,
60	unsigned int cq_entry_enable, unsigned int cq_message_enable,
61	unsigned int interrupt_offset, u64 cq_message_addr)
62{
63	u64 paddr;
64
65	paddr = (u64)cq->ring.base_addr | VNIC_PADDR_TARGET;
66	writeq(paddr, &cq->ctrl->ring_base);
67	iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
68	iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
69	iowrite32(color_enable, &cq->ctrl->color_enable);
70	iowrite32(cq_head, &cq->ctrl->cq_head);
71	iowrite32(cq_tail, &cq->ctrl->cq_tail);
72	iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
73	iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
74	iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
75	iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
76	iowrite32(interrupt_offset, &cq->ctrl->interrupt_offset);
77	writeq(cq_message_addr, &cq->ctrl->cq_message_addr);
78
79	cq->interrupt_offset = interrupt_offset;
80}
81
82void vnic_cq_clean(struct vnic_cq *cq)
83{
84	cq->to_clean = 0;
85	cq->last_color = 0;
86
87	iowrite32(0, &cq->ctrl->cq_head);
88	iowrite32(0, &cq->ctrl->cq_tail);
89	iowrite32(1, &cq->ctrl->cq_tail_color);
90
91	vnic_dev_clear_desc_ring(&cq->ring);
92}