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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/acpi.h>
10#include <linux/bitops.h>
11#include <linux/capability.h>
12#include <linux/delay.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/jiffies.h>
16#include <linux/kernel.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/nvmem-provider.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/property.h>
25#include <linux/regmap.h>
26#include <linux/regulator/consumer.h>
27#include <linux/slab.h>
28
29/* Address pointer is 16 bit. */
30#define AT24_FLAG_ADDR16 BIT(7)
31/* sysfs-entry will be read-only. */
32#define AT24_FLAG_READONLY BIT(6)
33/* sysfs-entry will be world-readable. */
34#define AT24_FLAG_IRUGO BIT(5)
35/* Take always 8 addresses (24c00). */
36#define AT24_FLAG_TAKE8ADDR BIT(4)
37/* Factory-programmed serial number. */
38#define AT24_FLAG_SERIAL BIT(3)
39/* Factory-programmed mac address. */
40#define AT24_FLAG_MAC BIT(2)
41/* Does not auto-rollover reads to the next slave address. */
42#define AT24_FLAG_NO_RDROL BIT(1)
43
44/*
45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
46 * Differences between different vendor product lines (like Atmel AT24C or
47 * MicroChip 24LC, etc) won't much matter for typical read/write access.
48 * There are also I2C RAM chips, likewise interchangeable. One example
49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
50 *
51 * However, misconfiguration can lose data. "Set 16-bit memory address"
52 * to a part with 8-bit addressing will overwrite data. Writing with too
53 * big a page size also loses data. And it's not safe to assume that the
54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
55 * uses 0x51, for just one example.
56 *
57 * Accordingly, explicit board-specific configuration data should be used
58 * in almost all cases. (One partial exception is an SMBus used to access
59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
60 *
61 * So this driver uses "new style" I2C driver binding, expecting to be
62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
63 * similar kernel-resident tables; or, configuration data coming from
64 * a bootloader.
65 *
66 * Other than binding model, current differences from "eeprom" driver are
67 * that this one handles write access and isn't restricted to 24c02 devices.
68 * It also handles larger devices (32 kbit and up) with two-byte addresses,
69 * which won't work on pure SMBus systems.
70 */
71
72struct at24_data {
73 /*
74 * Lock protects against activities from other Linux tasks,
75 * but not from changes by other I2C masters.
76 */
77 struct mutex lock;
78
79 unsigned int write_max;
80 unsigned int num_addresses;
81 unsigned int offset_adj;
82
83 u32 byte_len;
84 u16 page_size;
85 u8 flags;
86
87 struct nvmem_device *nvmem;
88 struct regulator *vcc_reg;
89 void (*read_post)(unsigned int off, char *buf, size_t count);
90
91 /*
92 * Some chips tie up multiple I2C addresses; dummy devices reserve
93 * them for us.
94 */
95 u8 bank_addr_shift;
96 struct regmap *client_regmaps[] __counted_by(num_addresses);
97};
98
99/*
100 * This parameter is to help this driver avoid blocking other drivers out
101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
102 * clock, one 256 byte read takes about 1/43 second which is excessive;
103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
105 *
106 * This value is forced to be a power of two so that writes align on pages.
107 */
108static unsigned int at24_io_limit = 128;
109module_param_named(io_limit, at24_io_limit, uint, 0);
110MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
111
112/*
113 * Specs often allow 5 msec for a page write, sometimes 20 msec;
114 * it's important to recover from write timeouts.
115 */
116static unsigned int at24_write_timeout = 25;
117module_param_named(write_timeout, at24_write_timeout, uint, 0);
118MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
119
120struct at24_chip_data {
121 u32 byte_len;
122 u8 flags;
123 u8 bank_addr_shift;
124 void (*read_post)(unsigned int off, char *buf, size_t count);
125};
126
127#define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
130 }
131
132#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
133 static const struct at24_chip_data _name = { \
134 .byte_len = _len, .flags = _flags, \
135 .read_post = _read_post, \
136 }
137
138#define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
139 static const struct at24_chip_data _name = { \
140 .byte_len = _len, .flags = _flags, \
141 .bank_addr_shift = _bank_addr_shift \
142 }
143
144static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
145{
146 int i;
147
148 if (capable(CAP_SYS_ADMIN))
149 return;
150
151 /*
152 * Hide VAIO private settings to regular users:
153 * - BIOS passwords: bytes 0x00 to 0x0f
154 * - UUID: bytes 0x10 to 0x1f
155 * - Serial number: 0xc0 to 0xdf
156 */
157 for (i = 0; i < count; i++) {
158 if ((off + i <= 0x1f) ||
159 (off + i >= 0xc0 && off + i <= 0xdf))
160 buf[i] = 0;
161 }
162}
163
164/* needs 8 addresses as A0-A2 are ignored */
165AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
166/* old variants can't be handled with this generic entry! */
167AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
168AT24_CHIP_DATA(at24_data_24cs01, 16,
169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
171AT24_CHIP_DATA(at24_data_24cs02, 16,
172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
173AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
174 AT24_FLAG_MAC | AT24_FLAG_READONLY);
175AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
176 AT24_FLAG_MAC | AT24_FLAG_READONLY);
177/* spd is a 24c02 in memory DIMMs */
178AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
179 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
180/* 24c02_vaio is a 24c02 on some Sony laptops */
181AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
182 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
183 at24_read_post_vaio);
184AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
185AT24_CHIP_DATA(at24_data_24cs04, 16,
186 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
187/* 24rf08 quirk is handled at i2c-core */
188AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
189AT24_CHIP_DATA(at24_data_24cs08, 16,
190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
191AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
192AT24_CHIP_DATA(at24_data_24cs16, 16,
193 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
194AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
195/* M24C32-D Additional Write lockable page (M24C32-D order codes) */
196AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
197AT24_CHIP_DATA(at24_data_24cs32, 16,
198 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
199AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
200/* M24C64-D Additional Write lockable page (M24C64-D order codes) */
201AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
202AT24_CHIP_DATA(at24_data_24cs64, 16,
203 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
204AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
205AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
206AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
207AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
208AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
209AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
210/* identical to 24c08 ? */
211AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
212
213static const struct i2c_device_id at24_ids[] = {
214 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
215 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
216 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
217 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
218 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
219 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
220 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
221 { "spd", (kernel_ulong_t)&at24_data_spd },
222 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
223 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
224 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
225 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
226 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
227 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
228 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
229 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
230 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp },
231 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
232 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
233 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp },
234 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
235 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
236 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
237 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
238 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
239 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
240 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
241 { "at24", 0 },
242 { /* END OF LIST */ }
243};
244MODULE_DEVICE_TABLE(i2c, at24_ids);
245
246static const struct of_device_id __maybe_unused at24_of_match[] = {
247 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
248 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
249 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
250 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
251 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
252 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
253 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
254 { .compatible = "atmel,spd", .data = &at24_data_spd },
255 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
256 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
257 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
258 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
259 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
260 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
261 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
262 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp },
263 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
264 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
265 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp },
266 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
267 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
268 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
269 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
270 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
271 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
272 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
273 { /* END OF LIST */ },
274};
275MODULE_DEVICE_TABLE(of, at24_of_match);
276
277static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
278 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
279 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
280 { /* END OF LIST */ }
281};
282MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
283
284/*
285 * This routine supports chips which consume multiple I2C addresses. It
286 * computes the addressing information to be used for a given r/w request.
287 * Assumes that sanity checks for offset happened at sysfs-layer.
288 *
289 * Slave address and byte offset derive from the offset. Always
290 * set the byte address; on a multi-master board, another master
291 * may have changed the chip's "current" address pointer.
292 */
293static struct regmap *at24_translate_offset(struct at24_data *at24,
294 unsigned int *offset)
295{
296 unsigned int i;
297
298 if (at24->flags & AT24_FLAG_ADDR16) {
299 i = *offset >> 16;
300 *offset &= 0xffff;
301 } else {
302 i = *offset >> 8;
303 *offset &= 0xff;
304 }
305
306 return at24->client_regmaps[i];
307}
308
309static struct device *at24_base_client_dev(struct at24_data *at24)
310{
311 return regmap_get_device(at24->client_regmaps[0]);
312}
313
314static size_t at24_adjust_read_count(struct at24_data *at24,
315 unsigned int offset, size_t count)
316{
317 unsigned int bits;
318 size_t remainder;
319
320 /*
321 * In case of multi-address chips that don't rollover reads to
322 * the next slave address: truncate the count to the slave boundary,
323 * so that the read never straddles slaves.
324 */
325 if (at24->flags & AT24_FLAG_NO_RDROL) {
326 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
327 remainder = BIT(bits) - offset;
328 if (count > remainder)
329 count = remainder;
330 }
331
332 if (count > at24_io_limit)
333 count = at24_io_limit;
334
335 return count;
336}
337
338static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
339 unsigned int offset, size_t count)
340{
341 unsigned long timeout, read_time;
342 struct regmap *regmap;
343 int ret;
344
345 regmap = at24_translate_offset(at24, &offset);
346 count = at24_adjust_read_count(at24, offset, count);
347
348 /* adjust offset for mac and serial read ops */
349 offset += at24->offset_adj;
350
351 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
352 do {
353 /*
354 * The timestamp shall be taken before the actual operation
355 * to avoid a premature timeout in case of high CPU load.
356 */
357 read_time = jiffies;
358
359 ret = regmap_bulk_read(regmap, offset, buf, count);
360 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
361 count, offset, ret, jiffies);
362 if (!ret)
363 return count;
364
365 usleep_range(1000, 1500);
366 } while (time_before(read_time, timeout));
367
368 return -ETIMEDOUT;
369}
370
371/*
372 * Note that if the hardware write-protect pin is pulled high, the whole
373 * chip is normally write protected. But there are plenty of product
374 * variants here, including OTP fuses and partial chip protect.
375 *
376 * We only use page mode writes; the alternative is sloooow. These routines
377 * write at most one page.
378 */
379
380static size_t at24_adjust_write_count(struct at24_data *at24,
381 unsigned int offset, size_t count)
382{
383 unsigned int next_page;
384
385 /* write_max is at most a page */
386 if (count > at24->write_max)
387 count = at24->write_max;
388
389 /* Never roll over backwards, to the start of this page */
390 next_page = roundup(offset + 1, at24->page_size);
391 if (offset + count > next_page)
392 count = next_page - offset;
393
394 return count;
395}
396
397static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
398 unsigned int offset, size_t count)
399{
400 unsigned long timeout, write_time;
401 struct regmap *regmap;
402 int ret;
403
404 regmap = at24_translate_offset(at24, &offset);
405 count = at24_adjust_write_count(at24, offset, count);
406 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
407
408 do {
409 /*
410 * The timestamp shall be taken before the actual operation
411 * to avoid a premature timeout in case of high CPU load.
412 */
413 write_time = jiffies;
414
415 ret = regmap_bulk_write(regmap, offset, buf, count);
416 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
417 count, offset, ret, jiffies);
418 if (!ret)
419 return count;
420
421 usleep_range(1000, 1500);
422 } while (time_before(write_time, timeout));
423
424 return -ETIMEDOUT;
425}
426
427static int at24_read(void *priv, unsigned int off, void *val, size_t count)
428{
429 struct at24_data *at24;
430 struct device *dev;
431 char *buf = val;
432 int i, ret;
433
434 at24 = priv;
435 dev = at24_base_client_dev(at24);
436
437 if (unlikely(!count))
438 return count;
439
440 if (off + count > at24->byte_len)
441 return -EINVAL;
442
443 ret = pm_runtime_resume_and_get(dev);
444 if (ret)
445 return ret;
446 /*
447 * Read data from chip, protecting against concurrent updates
448 * from this host, but not from other I2C masters.
449 */
450 mutex_lock(&at24->lock);
451
452 for (i = 0; count; i += ret, count -= ret) {
453 ret = at24_regmap_read(at24, buf + i, off + i, count);
454 if (ret < 0) {
455 mutex_unlock(&at24->lock);
456 pm_runtime_put(dev);
457 return ret;
458 }
459 }
460
461 mutex_unlock(&at24->lock);
462
463 pm_runtime_put(dev);
464
465 if (unlikely(at24->read_post))
466 at24->read_post(off, buf, i);
467
468 return 0;
469}
470
471static int at24_write(void *priv, unsigned int off, void *val, size_t count)
472{
473 struct at24_data *at24;
474 struct device *dev;
475 char *buf = val;
476 int ret;
477
478 at24 = priv;
479 dev = at24_base_client_dev(at24);
480
481 if (unlikely(!count))
482 return -EINVAL;
483
484 if (off + count > at24->byte_len)
485 return -EINVAL;
486
487 ret = pm_runtime_resume_and_get(dev);
488 if (ret)
489 return ret;
490 /*
491 * Write data to chip, protecting against concurrent updates
492 * from this host, but not from other I2C masters.
493 */
494 mutex_lock(&at24->lock);
495
496 while (count) {
497 ret = at24_regmap_write(at24, buf, off, count);
498 if (ret < 0) {
499 mutex_unlock(&at24->lock);
500 pm_runtime_put(dev);
501 return ret;
502 }
503 buf += ret;
504 off += ret;
505 count -= ret;
506 }
507
508 mutex_unlock(&at24->lock);
509
510 pm_runtime_put(dev);
511
512 return 0;
513}
514
515static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
516 struct i2c_client *base_client,
517 struct regmap_config *regmap_config)
518{
519 struct i2c_client *dummy_client;
520 struct regmap *regmap;
521
522 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
523 base_client->adapter,
524 base_client->addr +
525 (index << at24->bank_addr_shift));
526 if (IS_ERR(dummy_client))
527 return PTR_ERR(dummy_client);
528
529 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
530 if (IS_ERR(regmap))
531 return PTR_ERR(regmap);
532
533 at24->client_regmaps[index] = regmap;
534
535 return 0;
536}
537
538static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
539{
540 if (flags & AT24_FLAG_MAC) {
541 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
542 return 0xa0 - byte_len;
543 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
544 /*
545 * For 16 bit address pointers, the word address must contain
546 * a '10' sequence in bits 11 and 10 regardless of the
547 * intended position of the address pointer.
548 */
549 return 0x0800;
550 } else if (flags & AT24_FLAG_SERIAL) {
551 /*
552 * Otherwise the word address must begin with a '10' sequence,
553 * regardless of the intended address.
554 */
555 return 0x0080;
556 } else {
557 return 0;
558 }
559}
560
561static void at24_probe_temp_sensor(struct i2c_client *client)
562{
563 struct at24_data *at24 = i2c_get_clientdata(client);
564 struct i2c_board_info info = { .type = "jc42" };
565 int ret;
566 u8 val;
567
568 /*
569 * Byte 2 has value 11 for DDR3, earlier versions don't
570 * support the thermal sensor present flag
571 */
572 ret = at24_read(at24, 2, &val, 1);
573 if (ret || val != 11)
574 return;
575
576 /* Byte 32, bit 7 is set if temp sensor is present */
577 ret = at24_read(at24, 32, &val, 1);
578 if (ret || !(val & BIT(7)))
579 return;
580
581 info.addr = 0x18 | (client->addr & 7);
582
583 i2c_new_client_device(client->adapter, &info);
584}
585
586static int at24_probe(struct i2c_client *client)
587{
588 struct regmap_config regmap_config = { };
589 struct nvmem_config nvmem_config = { };
590 u32 byte_len, page_size, flags, addrw;
591 const struct at24_chip_data *cdata;
592 struct device *dev = &client->dev;
593 bool i2c_fn_i2c, i2c_fn_block;
594 unsigned int i, num_addresses;
595 struct at24_data *at24;
596 bool full_power;
597 struct regmap *regmap;
598 bool writable;
599 u8 test_byte;
600 int err;
601
602 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
603 i2c_fn_block = i2c_check_functionality(client->adapter,
604 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
605
606 cdata = i2c_get_match_data(client);
607 if (!cdata)
608 return -ENODEV;
609
610 err = device_property_read_u32(dev, "pagesize", &page_size);
611 if (err)
612 /*
613 * This is slow, but we can't know all eeproms, so we better
614 * play safe. Specifying custom eeprom-types via device tree
615 * or properties is recommended anyhow.
616 */
617 page_size = 1;
618
619 flags = cdata->flags;
620 if (device_property_present(dev, "read-only"))
621 flags |= AT24_FLAG_READONLY;
622 if (device_property_present(dev, "no-read-rollover"))
623 flags |= AT24_FLAG_NO_RDROL;
624
625 err = device_property_read_u32(dev, "address-width", &addrw);
626 if (!err) {
627 switch (addrw) {
628 case 8:
629 if (flags & AT24_FLAG_ADDR16)
630 dev_warn(dev,
631 "Override address width to be 8, while default is 16\n");
632 flags &= ~AT24_FLAG_ADDR16;
633 break;
634 case 16:
635 flags |= AT24_FLAG_ADDR16;
636 break;
637 default:
638 dev_warn(dev, "Bad \"address-width\" property: %u\n",
639 addrw);
640 }
641 }
642
643 err = device_property_read_u32(dev, "size", &byte_len);
644 if (err)
645 byte_len = cdata->byte_len;
646
647 if (!i2c_fn_i2c && !i2c_fn_block)
648 page_size = 1;
649
650 if (!page_size) {
651 dev_err(dev, "page_size must not be 0!\n");
652 return -EINVAL;
653 }
654
655 if (!is_power_of_2(page_size))
656 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
657
658 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
659 if (err) {
660 if (flags & AT24_FLAG_TAKE8ADDR)
661 num_addresses = 8;
662 else
663 num_addresses = DIV_ROUND_UP(byte_len,
664 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
665 }
666
667 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
668 dev_err(dev,
669 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
670 return -EINVAL;
671 }
672
673 regmap_config.val_bits = 8;
674 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
675 regmap_config.disable_locking = true;
676
677 regmap = devm_regmap_init_i2c(client, ®map_config);
678 if (IS_ERR(regmap))
679 return PTR_ERR(regmap);
680
681 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
682 GFP_KERNEL);
683 if (!at24)
684 return -ENOMEM;
685
686 mutex_init(&at24->lock);
687 at24->byte_len = byte_len;
688 at24->page_size = page_size;
689 at24->flags = flags;
690 at24->read_post = cdata->read_post;
691 at24->bank_addr_shift = cdata->bank_addr_shift;
692 at24->num_addresses = num_addresses;
693 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
694 at24->client_regmaps[0] = regmap;
695
696 at24->vcc_reg = devm_regulator_get(dev, "vcc");
697 if (IS_ERR(at24->vcc_reg))
698 return PTR_ERR(at24->vcc_reg);
699
700 writable = !(flags & AT24_FLAG_READONLY);
701 if (writable) {
702 at24->write_max = min_t(unsigned int,
703 page_size, at24_io_limit);
704 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
705 at24->write_max = I2C_SMBUS_BLOCK_MAX;
706 }
707
708 /* use dummy devices for multiple-address chips */
709 for (i = 1; i < num_addresses; i++) {
710 err = at24_make_dummy_client(at24, i, client, ®map_config);
711 if (err)
712 return err;
713 }
714
715 /*
716 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
717 * label property is set as some platform can have multiple eeproms
718 * with same label and we can not register each of those with same
719 * label. Failing to register those eeproms trigger cascade failure
720 * on such platform.
721 */
722 nvmem_config.id = NVMEM_DEVID_AUTO;
723
724 if (device_property_present(dev, "label")) {
725 err = device_property_read_string(dev, "label",
726 &nvmem_config.name);
727 if (err)
728 return err;
729 } else {
730 nvmem_config.name = dev_name(dev);
731 }
732
733 nvmem_config.type = NVMEM_TYPE_EEPROM;
734 nvmem_config.dev = dev;
735 nvmem_config.read_only = !writable;
736 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
737 nvmem_config.owner = THIS_MODULE;
738 nvmem_config.compat = true;
739 nvmem_config.base_dev = dev;
740 nvmem_config.reg_read = at24_read;
741 nvmem_config.reg_write = at24_write;
742 nvmem_config.priv = at24;
743 nvmem_config.stride = 1;
744 nvmem_config.word_size = 1;
745 nvmem_config.size = byte_len;
746
747 i2c_set_clientdata(client, at24);
748
749 full_power = acpi_dev_state_d0(&client->dev);
750 if (full_power) {
751 err = regulator_enable(at24->vcc_reg);
752 if (err) {
753 dev_err(dev, "Failed to enable vcc regulator\n");
754 return err;
755 }
756
757 pm_runtime_set_active(dev);
758 }
759 pm_runtime_enable(dev);
760
761 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
762 if (IS_ERR(at24->nvmem)) {
763 pm_runtime_disable(dev);
764 if (!pm_runtime_status_suspended(dev))
765 regulator_disable(at24->vcc_reg);
766 return dev_err_probe(dev, PTR_ERR(at24->nvmem),
767 "failed to register nvmem\n");
768 }
769
770 /*
771 * Perform a one-byte test read to verify that the chip is functional,
772 * unless powering on the device is to be avoided during probe (i.e.
773 * it's powered off right now).
774 */
775 if (full_power) {
776 err = at24_read(at24, 0, &test_byte, 1);
777 if (err) {
778 pm_runtime_disable(dev);
779 if (!pm_runtime_status_suspended(dev))
780 regulator_disable(at24->vcc_reg);
781 return -ENODEV;
782 }
783 }
784
785 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */
786 if (cdata == &at24_data_spd)
787 at24_probe_temp_sensor(client);
788
789 pm_runtime_idle(dev);
790
791 if (writable)
792 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
793 byte_len, client->name, at24->write_max);
794 else
795 dev_info(dev, "%u byte %s EEPROM, read-only\n",
796 byte_len, client->name);
797
798 return 0;
799}
800
801static void at24_remove(struct i2c_client *client)
802{
803 struct at24_data *at24 = i2c_get_clientdata(client);
804
805 pm_runtime_disable(&client->dev);
806 if (acpi_dev_state_d0(&client->dev)) {
807 if (!pm_runtime_status_suspended(&client->dev))
808 regulator_disable(at24->vcc_reg);
809 pm_runtime_set_suspended(&client->dev);
810 }
811}
812
813static int __maybe_unused at24_suspend(struct device *dev)
814{
815 struct i2c_client *client = to_i2c_client(dev);
816 struct at24_data *at24 = i2c_get_clientdata(client);
817
818 return regulator_disable(at24->vcc_reg);
819}
820
821static int __maybe_unused at24_resume(struct device *dev)
822{
823 struct i2c_client *client = to_i2c_client(dev);
824 struct at24_data *at24 = i2c_get_clientdata(client);
825
826 return regulator_enable(at24->vcc_reg);
827}
828
829static const struct dev_pm_ops at24_pm_ops = {
830 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
831 pm_runtime_force_resume)
832 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
833};
834
835static struct i2c_driver at24_driver = {
836 .driver = {
837 .name = "at24",
838 .pm = &at24_pm_ops,
839 .of_match_table = of_match_ptr(at24_of_match),
840 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
841 },
842 .probe = at24_probe,
843 .remove = at24_remove,
844 .id_table = at24_ids,
845 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
846};
847
848static int __init at24_init(void)
849{
850 if (!at24_io_limit) {
851 pr_err("at24: at24_io_limit must not be 0!\n");
852 return -EINVAL;
853 }
854
855 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
856 return i2c_add_driver(&at24_driver);
857}
858module_init(at24_init);
859
860static void __exit at24_exit(void)
861{
862 i2c_del_driver(&at24_driver);
863}
864module_exit(at24_exit);
865
866MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
867MODULE_AUTHOR("David Brownell and Wolfram Sang");
868MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/slab.h>
14#include <linux/delay.h>
15#include <linux/mutex.h>
16#include <linux/mod_devicetable.h>
17#include <linux/bitops.h>
18#include <linux/jiffies.h>
19#include <linux/property.h>
20#include <linux/acpi.h>
21#include <linux/i2c.h>
22#include <linux/nvmem-provider.h>
23#include <linux/regmap.h>
24#include <linux/pm_runtime.h>
25#include <linux/gpio/consumer.h>
26
27/* Address pointer is 16 bit. */
28#define AT24_FLAG_ADDR16 BIT(7)
29/* sysfs-entry will be read-only. */
30#define AT24_FLAG_READONLY BIT(6)
31/* sysfs-entry will be world-readable. */
32#define AT24_FLAG_IRUGO BIT(5)
33/* Take always 8 addresses (24c00). */
34#define AT24_FLAG_TAKE8ADDR BIT(4)
35/* Factory-programmed serial number. */
36#define AT24_FLAG_SERIAL BIT(3)
37/* Factory-programmed mac address. */
38#define AT24_FLAG_MAC BIT(2)
39/* Does not auto-rollover reads to the next slave address. */
40#define AT24_FLAG_NO_RDROL BIT(1)
41
42/*
43 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
44 * Differences between different vendor product lines (like Atmel AT24C or
45 * MicroChip 24LC, etc) won't much matter for typical read/write access.
46 * There are also I2C RAM chips, likewise interchangeable. One example
47 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
48 *
49 * However, misconfiguration can lose data. "Set 16-bit memory address"
50 * to a part with 8-bit addressing will overwrite data. Writing with too
51 * big a page size also loses data. And it's not safe to assume that the
52 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
53 * uses 0x51, for just one example.
54 *
55 * Accordingly, explicit board-specific configuration data should be used
56 * in almost all cases. (One partial exception is an SMBus used to access
57 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
58 *
59 * So this driver uses "new style" I2C driver binding, expecting to be
60 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
61 * similar kernel-resident tables; or, configuration data coming from
62 * a bootloader.
63 *
64 * Other than binding model, current differences from "eeprom" driver are
65 * that this one handles write access and isn't restricted to 24c02 devices.
66 * It also handles larger devices (32 kbit and up) with two-byte addresses,
67 * which won't work on pure SMBus systems.
68 */
69
70struct at24_client {
71 struct i2c_client *client;
72 struct regmap *regmap;
73};
74
75struct at24_data {
76 /*
77 * Lock protects against activities from other Linux tasks,
78 * but not from changes by other I2C masters.
79 */
80 struct mutex lock;
81
82 unsigned int write_max;
83 unsigned int num_addresses;
84 unsigned int offset_adj;
85
86 u32 byte_len;
87 u16 page_size;
88 u8 flags;
89
90 struct nvmem_device *nvmem;
91
92 struct gpio_desc *wp_gpio;
93
94 /*
95 * Some chips tie up multiple I2C addresses; dummy devices reserve
96 * them for us, and we'll use them with SMBus calls.
97 */
98 struct at24_client client[];
99};
100
101/*
102 * This parameter is to help this driver avoid blocking other drivers out
103 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
104 * clock, one 256 byte read takes about 1/43 second which is excessive;
105 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
106 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
107 *
108 * This value is forced to be a power of two so that writes align on pages.
109 */
110static unsigned int at24_io_limit = 128;
111module_param_named(io_limit, at24_io_limit, uint, 0);
112MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
113
114/*
115 * Specs often allow 5 msec for a page write, sometimes 20 msec;
116 * it's important to recover from write timeouts.
117 */
118static unsigned int at24_write_timeout = 25;
119module_param_named(write_timeout, at24_write_timeout, uint, 0);
120MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
121
122struct at24_chip_data {
123 u32 byte_len;
124 u8 flags;
125};
126
127#define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
130 }
131
132/* needs 8 addresses as A0-A2 are ignored */
133AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
134/* old variants can't be handled with this generic entry! */
135AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
136AT24_CHIP_DATA(at24_data_24cs01, 16,
137 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
138AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
139AT24_CHIP_DATA(at24_data_24cs02, 16,
140 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
141AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
142 AT24_FLAG_MAC | AT24_FLAG_READONLY);
143AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
144 AT24_FLAG_MAC | AT24_FLAG_READONLY);
145/* spd is a 24c02 in memory DIMMs */
146AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
147 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
148AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
149AT24_CHIP_DATA(at24_data_24cs04, 16,
150 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
151/* 24rf08 quirk is handled at i2c-core */
152AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
153AT24_CHIP_DATA(at24_data_24cs08, 16,
154 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
155AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
156AT24_CHIP_DATA(at24_data_24cs16, 16,
157 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
158AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
159AT24_CHIP_DATA(at24_data_24cs32, 16,
160 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
161AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
162AT24_CHIP_DATA(at24_data_24cs64, 16,
163 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
164AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
165AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
166AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
167AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
168AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
169/* identical to 24c08 ? */
170AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
171
172static const struct i2c_device_id at24_ids[] = {
173 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
174 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
175 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
176 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
177 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
178 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
179 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
180 { "spd", (kernel_ulong_t)&at24_data_spd },
181 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
182 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
183 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
184 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
185 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
186 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
187 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
188 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
189 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
190 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
191 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
192 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
193 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
194 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
195 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
196 { "at24", 0 },
197 { /* END OF LIST */ }
198};
199MODULE_DEVICE_TABLE(i2c, at24_ids);
200
201static const struct of_device_id at24_of_match[] = {
202 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
203 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
204 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
205 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
206 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
207 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
208 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
209 { .compatible = "atmel,spd", .data = &at24_data_spd },
210 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
211 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
212 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
213 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
214 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
215 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
216 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
217 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
218 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
219 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
220 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
221 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
222 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
223 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
224 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
225 { /* END OF LIST */ },
226};
227MODULE_DEVICE_TABLE(of, at24_of_match);
228
229static const struct acpi_device_id at24_acpi_ids[] = {
230 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
231 { /* END OF LIST */ }
232};
233MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
234
235/*
236 * This routine supports chips which consume multiple I2C addresses. It
237 * computes the addressing information to be used for a given r/w request.
238 * Assumes that sanity checks for offset happened at sysfs-layer.
239 *
240 * Slave address and byte offset derive from the offset. Always
241 * set the byte address; on a multi-master board, another master
242 * may have changed the chip's "current" address pointer.
243 */
244static struct at24_client *at24_translate_offset(struct at24_data *at24,
245 unsigned int *offset)
246{
247 unsigned int i;
248
249 if (at24->flags & AT24_FLAG_ADDR16) {
250 i = *offset >> 16;
251 *offset &= 0xffff;
252 } else {
253 i = *offset >> 8;
254 *offset &= 0xff;
255 }
256
257 return &at24->client[i];
258}
259
260static struct device *at24_base_client_dev(struct at24_data *at24)
261{
262 return &at24->client[0].client->dev;
263}
264
265static size_t at24_adjust_read_count(struct at24_data *at24,
266 unsigned int offset, size_t count)
267{
268 unsigned int bits;
269 size_t remainder;
270
271 /*
272 * In case of multi-address chips that don't rollover reads to
273 * the next slave address: truncate the count to the slave boundary,
274 * so that the read never straddles slaves.
275 */
276 if (at24->flags & AT24_FLAG_NO_RDROL) {
277 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
278 remainder = BIT(bits) - offset;
279 if (count > remainder)
280 count = remainder;
281 }
282
283 if (count > at24_io_limit)
284 count = at24_io_limit;
285
286 return count;
287}
288
289static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
290 unsigned int offset, size_t count)
291{
292 unsigned long timeout, read_time;
293 struct at24_client *at24_client;
294 struct i2c_client *client;
295 struct regmap *regmap;
296 int ret;
297
298 at24_client = at24_translate_offset(at24, &offset);
299 regmap = at24_client->regmap;
300 client = at24_client->client;
301 count = at24_adjust_read_count(at24, offset, count);
302
303 /* adjust offset for mac and serial read ops */
304 offset += at24->offset_adj;
305
306 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
307 do {
308 /*
309 * The timestamp shall be taken before the actual operation
310 * to avoid a premature timeout in case of high CPU load.
311 */
312 read_time = jiffies;
313
314 ret = regmap_bulk_read(regmap, offset, buf, count);
315 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
316 count, offset, ret, jiffies);
317 if (!ret)
318 return count;
319
320 usleep_range(1000, 1500);
321 } while (time_before(read_time, timeout));
322
323 return -ETIMEDOUT;
324}
325
326/*
327 * Note that if the hardware write-protect pin is pulled high, the whole
328 * chip is normally write protected. But there are plenty of product
329 * variants here, including OTP fuses and partial chip protect.
330 *
331 * We only use page mode writes; the alternative is sloooow. These routines
332 * write at most one page.
333 */
334
335static size_t at24_adjust_write_count(struct at24_data *at24,
336 unsigned int offset, size_t count)
337{
338 unsigned int next_page;
339
340 /* write_max is at most a page */
341 if (count > at24->write_max)
342 count = at24->write_max;
343
344 /* Never roll over backwards, to the start of this page */
345 next_page = roundup(offset + 1, at24->page_size);
346 if (offset + count > next_page)
347 count = next_page - offset;
348
349 return count;
350}
351
352static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
353 unsigned int offset, size_t count)
354{
355 unsigned long timeout, write_time;
356 struct at24_client *at24_client;
357 struct i2c_client *client;
358 struct regmap *regmap;
359 int ret;
360
361 at24_client = at24_translate_offset(at24, &offset);
362 regmap = at24_client->regmap;
363 client = at24_client->client;
364 count = at24_adjust_write_count(at24, offset, count);
365 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
366
367 do {
368 /*
369 * The timestamp shall be taken before the actual operation
370 * to avoid a premature timeout in case of high CPU load.
371 */
372 write_time = jiffies;
373
374 ret = regmap_bulk_write(regmap, offset, buf, count);
375 dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
376 count, offset, ret, jiffies);
377 if (!ret)
378 return count;
379
380 usleep_range(1000, 1500);
381 } while (time_before(write_time, timeout));
382
383 return -ETIMEDOUT;
384}
385
386static int at24_read(void *priv, unsigned int off, void *val, size_t count)
387{
388 struct at24_data *at24;
389 struct device *dev;
390 char *buf = val;
391 int ret;
392
393 at24 = priv;
394 dev = at24_base_client_dev(at24);
395
396 if (unlikely(!count))
397 return count;
398
399 if (off + count > at24->byte_len)
400 return -EINVAL;
401
402 ret = pm_runtime_get_sync(dev);
403 if (ret < 0) {
404 pm_runtime_put_noidle(dev);
405 return ret;
406 }
407
408 /*
409 * Read data from chip, protecting against concurrent updates
410 * from this host, but not from other I2C masters.
411 */
412 mutex_lock(&at24->lock);
413
414 while (count) {
415 ret = at24_regmap_read(at24, buf, off, count);
416 if (ret < 0) {
417 mutex_unlock(&at24->lock);
418 pm_runtime_put(dev);
419 return ret;
420 }
421 buf += ret;
422 off += ret;
423 count -= ret;
424 }
425
426 mutex_unlock(&at24->lock);
427
428 pm_runtime_put(dev);
429
430 return 0;
431}
432
433static int at24_write(void *priv, unsigned int off, void *val, size_t count)
434{
435 struct at24_data *at24;
436 struct device *dev;
437 char *buf = val;
438 int ret;
439
440 at24 = priv;
441 dev = at24_base_client_dev(at24);
442
443 if (unlikely(!count))
444 return -EINVAL;
445
446 if (off + count > at24->byte_len)
447 return -EINVAL;
448
449 ret = pm_runtime_get_sync(dev);
450 if (ret < 0) {
451 pm_runtime_put_noidle(dev);
452 return ret;
453 }
454
455 /*
456 * Write data to chip, protecting against concurrent updates
457 * from this host, but not from other I2C masters.
458 */
459 mutex_lock(&at24->lock);
460 gpiod_set_value_cansleep(at24->wp_gpio, 0);
461
462 while (count) {
463 ret = at24_regmap_write(at24, buf, off, count);
464 if (ret < 0) {
465 gpiod_set_value_cansleep(at24->wp_gpio, 1);
466 mutex_unlock(&at24->lock);
467 pm_runtime_put(dev);
468 return ret;
469 }
470 buf += ret;
471 off += ret;
472 count -= ret;
473 }
474
475 gpiod_set_value_cansleep(at24->wp_gpio, 1);
476 mutex_unlock(&at24->lock);
477
478 pm_runtime_put(dev);
479
480 return 0;
481}
482
483static const struct at24_chip_data *at24_get_chip_data(struct device *dev)
484{
485 struct device_node *of_node = dev->of_node;
486 const struct at24_chip_data *cdata;
487 const struct i2c_device_id *id;
488
489 id = i2c_match_id(at24_ids, to_i2c_client(dev));
490
491 /*
492 * The I2C core allows OF nodes compatibles to match against the
493 * I2C device ID table as a fallback, so check not only if an OF
494 * node is present but also if it matches an OF device ID entry.
495 */
496 if (of_node && of_match_device(at24_of_match, dev))
497 cdata = of_device_get_match_data(dev);
498 else if (id)
499 cdata = (void *)id->driver_data;
500 else
501 cdata = acpi_device_get_match_data(dev);
502
503 if (!cdata)
504 return ERR_PTR(-ENODEV);
505
506 return cdata;
507}
508
509static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
510 struct regmap_config *regmap_config)
511{
512 struct i2c_client *base_client, *dummy_client;
513 struct regmap *regmap;
514 struct device *dev;
515
516 base_client = at24->client[0].client;
517 dev = &base_client->dev;
518
519 dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter,
520 base_client->addr + index);
521 if (IS_ERR(dummy_client))
522 return PTR_ERR(dummy_client);
523
524 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
525 if (IS_ERR(regmap))
526 return PTR_ERR(regmap);
527
528 at24->client[index].client = dummy_client;
529 at24->client[index].regmap = regmap;
530
531 return 0;
532}
533
534static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
535{
536 if (flags & AT24_FLAG_MAC) {
537 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
538 return 0xa0 - byte_len;
539 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
540 /*
541 * For 16 bit address pointers, the word address must contain
542 * a '10' sequence in bits 11 and 10 regardless of the
543 * intended position of the address pointer.
544 */
545 return 0x0800;
546 } else if (flags & AT24_FLAG_SERIAL) {
547 /*
548 * Otherwise the word address must begin with a '10' sequence,
549 * regardless of the intended address.
550 */
551 return 0x0080;
552 } else {
553 return 0;
554 }
555}
556
557static int at24_probe(struct i2c_client *client)
558{
559 struct regmap_config regmap_config = { };
560 struct nvmem_config nvmem_config = { };
561 u32 byte_len, page_size, flags, addrw;
562 const struct at24_chip_data *cdata;
563 struct device *dev = &client->dev;
564 bool i2c_fn_i2c, i2c_fn_block;
565 unsigned int i, num_addresses;
566 struct at24_data *at24;
567 struct regmap *regmap;
568 bool writable;
569 u8 test_byte;
570 int err;
571
572 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
573 i2c_fn_block = i2c_check_functionality(client->adapter,
574 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
575
576 cdata = at24_get_chip_data(dev);
577 if (IS_ERR(cdata))
578 return PTR_ERR(cdata);
579
580 err = device_property_read_u32(dev, "pagesize", &page_size);
581 if (err)
582 /*
583 * This is slow, but we can't know all eeproms, so we better
584 * play safe. Specifying custom eeprom-types via device tree
585 * or properties is recommended anyhow.
586 */
587 page_size = 1;
588
589 flags = cdata->flags;
590 if (device_property_present(dev, "read-only"))
591 flags |= AT24_FLAG_READONLY;
592 if (device_property_present(dev, "no-read-rollover"))
593 flags |= AT24_FLAG_NO_RDROL;
594
595 err = device_property_read_u32(dev, "address-width", &addrw);
596 if (!err) {
597 switch (addrw) {
598 case 8:
599 if (flags & AT24_FLAG_ADDR16)
600 dev_warn(dev,
601 "Override address width to be 8, while default is 16\n");
602 flags &= ~AT24_FLAG_ADDR16;
603 break;
604 case 16:
605 flags |= AT24_FLAG_ADDR16;
606 break;
607 default:
608 dev_warn(dev, "Bad \"address-width\" property: %u\n",
609 addrw);
610 }
611 }
612
613 err = device_property_read_u32(dev, "size", &byte_len);
614 if (err)
615 byte_len = cdata->byte_len;
616
617 if (!i2c_fn_i2c && !i2c_fn_block)
618 page_size = 1;
619
620 if (!page_size) {
621 dev_err(dev, "page_size must not be 0!\n");
622 return -EINVAL;
623 }
624
625 if (!is_power_of_2(page_size))
626 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
627
628 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
629 if (err) {
630 if (flags & AT24_FLAG_TAKE8ADDR)
631 num_addresses = 8;
632 else
633 num_addresses = DIV_ROUND_UP(byte_len,
634 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
635 }
636
637 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
638 dev_err(dev,
639 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
640 return -EINVAL;
641 }
642
643 regmap_config.val_bits = 8;
644 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
645 regmap_config.disable_locking = true;
646
647 regmap = devm_regmap_init_i2c(client, ®map_config);
648 if (IS_ERR(regmap))
649 return PTR_ERR(regmap);
650
651 at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses),
652 GFP_KERNEL);
653 if (!at24)
654 return -ENOMEM;
655
656 mutex_init(&at24->lock);
657 at24->byte_len = byte_len;
658 at24->page_size = page_size;
659 at24->flags = flags;
660 at24->num_addresses = num_addresses;
661 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
662 at24->client[0].client = client;
663 at24->client[0].regmap = regmap;
664
665 at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH);
666 if (IS_ERR(at24->wp_gpio))
667 return PTR_ERR(at24->wp_gpio);
668
669 writable = !(flags & AT24_FLAG_READONLY);
670 if (writable) {
671 at24->write_max = min_t(unsigned int,
672 page_size, at24_io_limit);
673 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
674 at24->write_max = I2C_SMBUS_BLOCK_MAX;
675 }
676
677 /* use dummy devices for multiple-address chips */
678 for (i = 1; i < num_addresses; i++) {
679 err = at24_make_dummy_client(at24, i, ®map_config);
680 if (err)
681 return err;
682 }
683
684 nvmem_config.name = dev_name(dev);
685 nvmem_config.dev = dev;
686 nvmem_config.read_only = !writable;
687 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
688 nvmem_config.owner = THIS_MODULE;
689 nvmem_config.compat = true;
690 nvmem_config.base_dev = dev;
691 nvmem_config.reg_read = at24_read;
692 nvmem_config.reg_write = at24_write;
693 nvmem_config.priv = at24;
694 nvmem_config.stride = 1;
695 nvmem_config.word_size = 1;
696 nvmem_config.size = byte_len;
697
698 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
699 if (IS_ERR(at24->nvmem))
700 return PTR_ERR(at24->nvmem);
701
702 i2c_set_clientdata(client, at24);
703
704 /* enable runtime pm */
705 pm_runtime_set_active(dev);
706 pm_runtime_enable(dev);
707
708 /*
709 * Perform a one-byte test read to verify that the
710 * chip is functional.
711 */
712 err = at24_read(at24, 0, &test_byte, 1);
713 pm_runtime_idle(dev);
714 if (err) {
715 pm_runtime_disable(dev);
716 return -ENODEV;
717 }
718
719 dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
720 byte_len, client->name,
721 writable ? "writable" : "read-only", at24->write_max);
722
723 return 0;
724}
725
726static int at24_remove(struct i2c_client *client)
727{
728 pm_runtime_disable(&client->dev);
729 pm_runtime_set_suspended(&client->dev);
730
731 return 0;
732}
733
734static struct i2c_driver at24_driver = {
735 .driver = {
736 .name = "at24",
737 .of_match_table = at24_of_match,
738 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
739 },
740 .probe_new = at24_probe,
741 .remove = at24_remove,
742 .id_table = at24_ids,
743};
744
745static int __init at24_init(void)
746{
747 if (!at24_io_limit) {
748 pr_err("at24: at24_io_limit must not be 0!\n");
749 return -EINVAL;
750 }
751
752 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
753 return i2c_add_driver(&at24_driver);
754}
755module_init(at24_init);
756
757static void __exit at24_exit(void)
758{
759 i2c_del_driver(&at24_driver);
760}
761module_exit(at24_exit);
762
763MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
764MODULE_AUTHOR("David Brownell and Wolfram Sang");
765MODULE_LICENSE("GPL");