1// SPDX-License-Identifier: GPL-2.0+
  2/*
  3 * SPI driver for Renesas Synchronization Management Unit (SMU) devices.
  4 *
  5 * Copyright (C) 2021 Integrated Device Technology, Inc., a Renesas Company.
  6 */
  7
  8#include <linux/init.h>
  9#include <linux/kernel.h>
 10#include <linux/mfd/core.h>
 11#include <linux/mfd/rsmu.h>
 12#include <linux/module.h>
 13#include <linux/of.h>
 14#include <linux/regmap.h>
 15#include <linux/slab.h>
 16#include <linux/spi/spi.h>
 17
 18#include "rsmu.h"
 19
 20#define	RSMU_CM_PAGE_ADDR		0x7C
 21#define	RSMU_SABRE_PAGE_ADDR		0x7F
 22#define	RSMU_PAGE_MASK			0xFFFFFF80
 23#define	RSMU_ADDR_MASK			0x7F
 24
 25static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
 26{
 27	struct spi_device *client = to_spi_device(rsmu->dev);
 28	struct spi_transfer xfer = {0};
 29	struct spi_message msg;
 30	u8 cmd[RSMU_MAX_READ_COUNT + 1] = {0};
 31	u8 rsp[RSMU_MAX_READ_COUNT + 1] = {0};
 32	int ret;
 33
 34	if (bytes > RSMU_MAX_READ_COUNT)
 35		return -EINVAL;
 36
 37	cmd[0] = reg | 0x80;
 38	xfer.rx_buf = rsp;
 39	xfer.len = bytes + 1;
 40	xfer.tx_buf = cmd;
 41	xfer.bits_per_word = client->bits_per_word;
 42	xfer.speed_hz = client->max_speed_hz;
 43
 44	spi_message_init(&msg);
 45	spi_message_add_tail(&xfer, &msg);
 46
 47	/*
 48	 * 4-wire SPI is a shift register, so for every byte you send,
 49	 * you get one back at the same time. Example read from 0xC024,
 50	 * which has value of 0x2D
 51	 *
 52	 * MOSI:
 53	 *       7C 00 C0 #Set page register
 54	 *       A4 00    #MSB is set, so this is read command
 55	 * MISO:
 56	 *       XX 2D    #XX is a dummy byte from sending A4 and we
 57	 *                 need to throw it away
 58	 */
 59	ret = spi_sync(client, &msg);
 60	if (ret >= 0)
 61		memcpy(buf, &rsp[1], xfer.len-1);
 62
 63	return ret;
 64}
 65
 66static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
 67{
 68	struct spi_device *client = to_spi_device(rsmu->dev);
 69	struct spi_transfer xfer = {0};
 70	struct spi_message msg;
 71	u8 cmd[RSMU_MAX_WRITE_COUNT + 1] = {0};
 72
 73	if (bytes > RSMU_MAX_WRITE_COUNT)
 74		return -EINVAL;
 75
 76	cmd[0] = reg;
 77	memcpy(&cmd[1], buf, bytes);
 78
 79	xfer.len = bytes + 1;
 80	xfer.tx_buf = cmd;
 81	xfer.bits_per_word = client->bits_per_word;
 82	xfer.speed_hz = client->max_speed_hz;
 83	spi_message_init(&msg);
 84	spi_message_add_tail(&xfer, &msg);
 85
 86	return  spi_sync(client, &msg);
 87}
 88
 89/*
 90 * 1-byte (1B) offset addressing:
 91 * 16-bit register address: the lower 7 bits of the register address come
 92 * from the offset addr byte and the upper 9 bits come from the page register.
 93 */
 94static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg)
 95{
 96	u8 page_reg;
 97	u8 buf[4];
 98	u16 bytes;
 99	u32 page;
100	int err;
101
102	switch (rsmu->type) {
103	case RSMU_CM:
104		/* Do not modify page register for none-scsr registers */
105		if (reg < RSMU_CM_SCSR_BASE)
106			return 0;
107		page_reg = RSMU_CM_PAGE_ADDR;
108		page = reg & RSMU_PAGE_MASK;
109		buf[0] = (u8)(page & 0xff);
110		buf[1] = (u8)((page >> 8) & 0xff);
111		buf[2] = (u8)((page >> 16) & 0xff);
112		buf[3] = (u8)((page >> 24) & 0xff);
113		bytes = 4;
114		break;
115	case RSMU_SABRE:
116		/* Do not modify page register if reg is page register itself */
117		if ((reg & RSMU_ADDR_MASK) == RSMU_ADDR_MASK)
118			return 0;
119		page_reg = RSMU_SABRE_PAGE_ADDR;
120		page = reg & RSMU_PAGE_MASK;
121		/* The three page bits are located in the single Page Register */
122		buf[0] = (u8)((page >> 7) & 0x7);
123		bytes = 1;
124		break;
125	default:
126		dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type);
127		return -ENODEV;
128	}
129
130	/* Simply return if we are on the same page */
131	if (rsmu->page == page)
132		return 0;
133
134	err = rsmu_write_device(rsmu, page_reg, buf, bytes);
135	if (err)
136		dev_err(rsmu->dev, "Failed to set page offset 0x%x\n", page);
137	else
138		/* Remember the last page */
139		rsmu->page = page;
140
141	return err;
142}
143
144static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val)
145{
146	struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context);
147	u8 addr = (u8)(reg & RSMU_ADDR_MASK);
148	int err;
149
150	err = rsmu_write_page_register(rsmu, reg);
151	if (err)
152		return err;
153
154	err = rsmu_read_device(rsmu, addr, (u8 *)val, 1);
155	if (err)
156		dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr);
157
158	return err;
159}
160
161static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val)
162{
163	struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context);
164	u8 addr = (u8)(reg & RSMU_ADDR_MASK);
165	u8 data = (u8)val;
166	int err;
167
168	err = rsmu_write_page_register(rsmu, reg);
169	if (err)
170		return err;
171
172	err = rsmu_write_device(rsmu, addr, &data, 1);
173	if (err)
174		dev_err(rsmu->dev,
175			"Failed to write offset address 0x%x\n", addr);
176
177	return err;
178}
179
180static const struct regmap_config rsmu_cm_regmap_config = {
181	.reg_bits = 32,
182	.val_bits = 8,
183	.max_register = 0x20120000,
184	.reg_read = rsmu_reg_read,
185	.reg_write = rsmu_reg_write,
186	.cache_type = REGCACHE_NONE,
187};
188
189static const struct regmap_config rsmu_sabre_regmap_config = {
190	.reg_bits = 16,
191	.val_bits = 8,
192	.max_register = 0x400,
193	.reg_read = rsmu_reg_read,
194	.reg_write = rsmu_reg_write,
195	.cache_type = REGCACHE_NONE,
196};
197
198static int rsmu_spi_probe(struct spi_device *client)
199{
200	const struct spi_device_id *id = spi_get_device_id(client);
201	const struct regmap_config *cfg;
202	struct rsmu_ddata *rsmu;
203	int ret;
204
205	rsmu = devm_kzalloc(&client->dev, sizeof(*rsmu), GFP_KERNEL);
206	if (!rsmu)
207		return -ENOMEM;
208
209	spi_set_drvdata(client, rsmu);
210
211	rsmu->dev = &client->dev;
212	rsmu->type = (enum rsmu_type)id->driver_data;
213
214	/* Initialize regmap */
215	switch (rsmu->type) {
216	case RSMU_CM:
217		cfg = &rsmu_cm_regmap_config;
218		break;
219	case RSMU_SABRE:
220		cfg = &rsmu_sabre_regmap_config;
221		break;
222	default:
223		dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type);
224		return -ENODEV;
225	}
226
227	rsmu->regmap = devm_regmap_init(&client->dev, NULL, client, cfg);
228	if (IS_ERR(rsmu->regmap)) {
229		ret = PTR_ERR(rsmu->regmap);
230		dev_err(rsmu->dev, "Failed to allocate register map: %d\n", ret);
231		return ret;
232	}
233
234	return rsmu_core_init(rsmu);
235}
236
237static void rsmu_spi_remove(struct spi_device *client)
238{
239	struct rsmu_ddata *rsmu = spi_get_drvdata(client);
240
241	rsmu_core_exit(rsmu);
242}
243
244static const struct spi_device_id rsmu_spi_id[] = {
245	{ "8a34000",  RSMU_CM },
246	{ "8a34001",  RSMU_CM },
247	{ "82p33810", RSMU_SABRE },
248	{ "82p33811", RSMU_SABRE },
249	{}
250};
251MODULE_DEVICE_TABLE(spi, rsmu_spi_id);
252
253static const struct of_device_id rsmu_spi_of_match[] = {
254	{ .compatible = "idt,8a34000",  .data = (void *)RSMU_CM },
255	{ .compatible = "idt,8a34001",  .data = (void *)RSMU_CM },
256	{ .compatible = "idt,82p33810", .data = (void *)RSMU_SABRE },
257	{ .compatible = "idt,82p33811", .data = (void *)RSMU_SABRE },
258	{}
259};
260MODULE_DEVICE_TABLE(of, rsmu_spi_of_match);
261
262static struct spi_driver rsmu_spi_driver = {
263	.driver = {
264		.name = "rsmu-spi",
265		.of_match_table = rsmu_spi_of_match,
266	},
267	.probe = rsmu_spi_probe,
268	.remove	= rsmu_spi_remove,
269	.id_table = rsmu_spi_id,
270};
271
272static int __init rsmu_spi_init(void)
273{
274	return spi_register_driver(&rsmu_spi_driver);
275}
276subsys_initcall(rsmu_spi_init);
277
278static void __exit rsmu_spi_exit(void)
279{
280	spi_unregister_driver(&rsmu_spi_driver);
281}
282module_exit(rsmu_spi_exit);
283
284MODULE_DESCRIPTION("Renesas SMU SPI driver");
285MODULE_LICENSE("GPL");