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 34
 35#ifndef I40IW_PUDA_H
 36#define I40IW_PUDA_H
 37
 38#define I40IW_IEQ_MPA_FRAMING 6
 39
 40struct i40iw_sc_dev;
 41struct i40iw_sc_qp;
 42struct i40iw_sc_cq;
 43
 44enum puda_resource_type {
 45	I40IW_PUDA_RSRC_TYPE_ILQ = 1,
 46	I40IW_PUDA_RSRC_TYPE_IEQ
 47};
 48
 49enum puda_rsrc_complete {
 50	PUDA_CQ_CREATED = 1,
 51	PUDA_QP_CREATED,
 52	PUDA_TX_COMPLETE,
 53	PUDA_RX_COMPLETE,
 54	PUDA_HASH_CRC_COMPLETE
 55};
 56
 57struct i40iw_puda_completion_info {
 58	struct i40iw_qp_uk *qp;
 59	u8 q_type;
 60	u8 vlan_valid;
 61	u8 l3proto;
 62	u8 l4proto;
 63	u16 payload_len;
 64	u32 compl_error;	/* No_err=0, else major and minor err code */
 65	u32 qp_id;
 66	u32 wqe_idx;
 67};
 68
 69struct i40iw_puda_send_info {
 70	u64 paddr;		/* Physical address */
 71	u32 len;
 72	u8 tcplen;
 73	u8 maclen;
 74	bool ipv4;
 75	bool doloopback;
 76	void *scratch;
 77};
 78
 79struct i40iw_puda_buf {
 80	struct list_head list;	/* MUST be first entry */
 81	struct i40iw_dma_mem mem;	/* DMA memory for the buffer */
 82	struct i40iw_puda_buf *next;	/* for alloclist in rsrc struct */
 83	struct i40iw_virt_mem buf_mem;	/* Buffer memory for this buffer */
 84	void *scratch;
 85	u8 *iph;
 86	u8 *tcph;
 87	u8 *data;
 88	u16 datalen;
 89	u16 vlan_id;
 90	u8 tcphlen;		/* tcp length in bytes */
 91	u8 maclen;		/* mac length in bytes */
 92	u32 totallen;		/* machlen+iphlen+tcphlen+datalen */
 93	atomic_t refcount;
 94	u8 hdrlen;
 95	bool ipv4;
 96	u32 seqnum;
 97};
 98
 99struct i40iw_puda_rsrc_info {
100	enum puda_resource_type type;	/* ILQ or IEQ */
101	u32 count;
102	u16 pd_id;
103	u32 cq_id;
104	u32 qp_id;
105	u32 sq_size;
106	u32 rq_size;
107	u16 buf_size;
108	u16 mss;
109	u32 tx_buf_cnt;		/* total bufs allocated will be rq_size + tx_buf_cnt */
110	void (*receive)(struct i40iw_sc_vsi *, struct i40iw_puda_buf *);
111	void (*xmit_complete)(struct i40iw_sc_vsi *, void *);
112};
113
114struct i40iw_puda_rsrc {
115	struct i40iw_sc_cq cq;
116	struct i40iw_sc_qp qp;
117	struct i40iw_sc_pd sc_pd;
118	struct i40iw_sc_dev *dev;
119	struct i40iw_sc_vsi *vsi;
120	struct i40iw_dma_mem cqmem;
121	struct i40iw_dma_mem qpmem;
122	struct i40iw_virt_mem ilq_mem;
123	enum puda_rsrc_complete completion;
124	enum puda_resource_type type;
125	u16 buf_size;		/*buffer must be max datalen + tcpip hdr + mac */
126	u16 mss;
127	u32 cq_id;
128	u32 qp_id;
129	u32 sq_size;
130	u32 rq_size;
131	u32 cq_size;
132	struct i40iw_sq_uk_wr_trk_info *sq_wrtrk_array;
133	u64 *rq_wrid_array;
134	u32 compl_rxwqe_idx;
135	u32 rx_wqe_idx;
136	u32 rxq_invalid_cnt;
137	u32 tx_wqe_avail_cnt;
138	bool check_crc;
139	struct shash_desc *hash_desc;
140	struct list_head txpend;
141	struct list_head bufpool;	/* free buffers pool list for recv and xmit */
142	u32 alloc_buf_count;
143	u32 avail_buf_count;		/* snapshot of currently available buffers */
144	spinlock_t bufpool_lock;
145	struct i40iw_puda_buf *alloclist;
146	void (*receive)(struct i40iw_sc_vsi *, struct i40iw_puda_buf *);
147	void (*xmit_complete)(struct i40iw_sc_vsi *, void *);
148	/* puda stats */
149	u64 stats_buf_alloc_fail;
150	u64 stats_pkt_rcvd;
151	u64 stats_pkt_sent;
152	u64 stats_rcvd_pkt_err;
153	u64 stats_sent_pkt_q;
154	u64 stats_bad_qp_id;
155};
156
157struct i40iw_puda_buf *i40iw_puda_get_bufpool(struct i40iw_puda_rsrc *rsrc);
158void i40iw_puda_ret_bufpool(struct i40iw_puda_rsrc *rsrc,
159			    struct i40iw_puda_buf *buf);
160void i40iw_puda_send_buf(struct i40iw_puda_rsrc *rsrc,
161			 struct i40iw_puda_buf *buf);
162enum i40iw_status_code i40iw_puda_send(struct i40iw_sc_qp *qp,
163				       struct i40iw_puda_send_info *info);
164enum i40iw_status_code i40iw_puda_create_rsrc(struct i40iw_sc_vsi *vsi,
165					      struct i40iw_puda_rsrc_info *info);
166void i40iw_puda_dele_resources(struct i40iw_sc_vsi *vsi,
167			       enum puda_resource_type type,
168			       bool reset);
169enum i40iw_status_code i40iw_puda_poll_completion(struct i40iw_sc_dev *dev,
170						  struct i40iw_sc_cq *cq, u32 *compl_err);
171
172struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
173				     struct i40iw_puda_buf *buf);
174enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
175						 struct i40iw_puda_buf *buf);
176enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
177					      void *addr, u32 length, u32 value);
178enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc);
179void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp);
180void i40iw_free_hash_desc(struct shash_desc *desc);
181void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length,
182				 u32 seqnum);
183enum i40iw_status_code i40iw_cqp_qp_create_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp);
184enum i40iw_status_code i40iw_cqp_cq_create_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_cq *cq);
185void i40iw_cqp_qp_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp);
186void i40iw_cqp_cq_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_cq *cq);
187void i40iw_ieq_cleanup_qp(struct i40iw_puda_rsrc *ieq, struct i40iw_sc_qp *qp);
188#endif