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1/*
2 * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34
35#include <rdma/ib_verbs.h>
36
37#include "cxgb3_offload.h"
38#include "iwch_provider.h"
39#include <rdma/cxgb3-abi.h>
40#include "iwch.h"
41#include "iwch_cm.h"
42
43#define DRV_VERSION "1.1"
44
45MODULE_AUTHOR("Boyd Faulkner, Steve Wise");
46MODULE_DESCRIPTION("Chelsio T3 RDMA Driver");
47MODULE_LICENSE("Dual BSD/GPL");
48
49static void open_rnic_dev(struct t3cdev *);
50static void close_rnic_dev(struct t3cdev *);
51static void iwch_event_handler(struct t3cdev *, u32, u32);
52
53struct cxgb3_client t3c_client = {
54 .name = "iw_cxgb3",
55 .add = open_rnic_dev,
56 .remove = close_rnic_dev,
57 .handlers = t3c_handlers,
58 .redirect = iwch_ep_redirect,
59 .event_handler = iwch_event_handler
60};
61
62static LIST_HEAD(dev_list);
63static DEFINE_MUTEX(dev_mutex);
64
65static void disable_dbs(struct iwch_dev *rnicp)
66{
67 unsigned long index;
68 struct iwch_qp *qhp;
69
70 xa_lock_irq(&rnicp->qps);
71 xa_for_each(&rnicp->qps, index, qhp)
72 cxio_disable_wq_db(&qhp->wq);
73 xa_unlock_irq(&rnicp->qps);
74}
75
76static void enable_dbs(struct iwch_dev *rnicp, int ring_db)
77{
78 unsigned long index;
79 struct iwch_qp *qhp;
80
81 xa_lock_irq(&rnicp->qps);
82 xa_for_each(&rnicp->qps, index, qhp) {
83 if (ring_db)
84 ring_doorbell(qhp->rhp->rdev.ctrl_qp.doorbell,
85 qhp->wq.qpid);
86 cxio_enable_wq_db(&qhp->wq);
87 }
88 xa_unlock_irq(&rnicp->qps);
89}
90
91static void iwch_db_drop_task(struct work_struct *work)
92{
93 struct iwch_dev *rnicp = container_of(work, struct iwch_dev,
94 db_drop_task.work);
95 enable_dbs(rnicp, 1);
96}
97
98static void rnic_init(struct iwch_dev *rnicp)
99{
100 pr_debug("%s iwch_dev %p\n", __func__, rnicp);
101 xa_init_flags(&rnicp->cqs, XA_FLAGS_LOCK_IRQ);
102 xa_init_flags(&rnicp->qps, XA_FLAGS_LOCK_IRQ);
103 xa_init_flags(&rnicp->mrs, XA_FLAGS_LOCK_IRQ);
104 INIT_DELAYED_WORK(&rnicp->db_drop_task, iwch_db_drop_task);
105
106 rnicp->attr.max_qps = T3_MAX_NUM_QP - 32;
107 rnicp->attr.max_wrs = T3_MAX_QP_DEPTH;
108 rnicp->attr.max_sge_per_wr = T3_MAX_SGE;
109 rnicp->attr.max_sge_per_rdma_write_wr = T3_MAX_SGE;
110 rnicp->attr.max_cqs = T3_MAX_NUM_CQ - 1;
111 rnicp->attr.max_cqes_per_cq = T3_MAX_CQ_DEPTH;
112 rnicp->attr.max_mem_regs = cxio_num_stags(&rnicp->rdev);
113 rnicp->attr.max_phys_buf_entries = T3_MAX_PBL_SIZE;
114 rnicp->attr.max_pds = T3_MAX_NUM_PD - 1;
115 rnicp->attr.mem_pgsizes_bitmask = T3_PAGESIZE_MASK;
116 rnicp->attr.max_mr_size = T3_MAX_MR_SIZE;
117 rnicp->attr.can_resize_wq = 0;
118 rnicp->attr.max_rdma_reads_per_qp = 8;
119 rnicp->attr.max_rdma_read_resources =
120 rnicp->attr.max_rdma_reads_per_qp * rnicp->attr.max_qps;
121 rnicp->attr.max_rdma_read_qp_depth = 8; /* IRD */
122 rnicp->attr.max_rdma_read_depth =
123 rnicp->attr.max_rdma_read_qp_depth * rnicp->attr.max_qps;
124 rnicp->attr.rq_overflow_handled = 0;
125 rnicp->attr.can_modify_ird = 0;
126 rnicp->attr.can_modify_ord = 0;
127 rnicp->attr.max_mem_windows = rnicp->attr.max_mem_regs - 1;
128 rnicp->attr.stag0_value = 1;
129 rnicp->attr.zbva_support = 1;
130 rnicp->attr.local_invalidate_fence = 1;
131 rnicp->attr.cq_overflow_detection = 1;
132 return;
133}
134
135static void open_rnic_dev(struct t3cdev *tdev)
136{
137 struct iwch_dev *rnicp;
138
139 pr_debug("%s t3cdev %p\n", __func__, tdev);
140 pr_info_once("Chelsio T3 RDMA Driver - version %s\n", DRV_VERSION);
141 rnicp = ib_alloc_device(iwch_dev, ibdev);
142 if (!rnicp) {
143 pr_err("Cannot allocate ib device\n");
144 return;
145 }
146 rnicp->rdev.ulp = rnicp;
147 rnicp->rdev.t3cdev_p = tdev;
148
149 mutex_lock(&dev_mutex);
150
151 if (cxio_rdev_open(&rnicp->rdev)) {
152 mutex_unlock(&dev_mutex);
153 pr_err("Unable to open CXIO rdev\n");
154 ib_dealloc_device(&rnicp->ibdev);
155 return;
156 }
157
158 rnic_init(rnicp);
159
160 list_add_tail(&rnicp->entry, &dev_list);
161 mutex_unlock(&dev_mutex);
162
163 if (iwch_register_device(rnicp)) {
164 pr_err("Unable to register device\n");
165 close_rnic_dev(tdev);
166 }
167 pr_info("Initialized device %s\n",
168 pci_name(rnicp->rdev.rnic_info.pdev));
169 return;
170}
171
172static void close_rnic_dev(struct t3cdev *tdev)
173{
174 struct iwch_dev *dev, *tmp;
175 pr_debug("%s t3cdev %p\n", __func__, tdev);
176 mutex_lock(&dev_mutex);
177 list_for_each_entry_safe(dev, tmp, &dev_list, entry) {
178 if (dev->rdev.t3cdev_p == tdev) {
179 dev->rdev.flags = CXIO_ERROR_FATAL;
180 synchronize_net();
181 cancel_delayed_work_sync(&dev->db_drop_task);
182 list_del(&dev->entry);
183 iwch_unregister_device(dev);
184 cxio_rdev_close(&dev->rdev);
185 WARN_ON(!xa_empty(&dev->cqs));
186 WARN_ON(!xa_empty(&dev->qps));
187 WARN_ON(!xa_empty(&dev->mrs));
188 ib_dealloc_device(&dev->ibdev);
189 break;
190 }
191 }
192 mutex_unlock(&dev_mutex);
193}
194
195static void iwch_event_handler(struct t3cdev *tdev, u32 evt, u32 port_id)
196{
197 struct cxio_rdev *rdev = tdev->ulp;
198 struct iwch_dev *rnicp;
199 struct ib_event event;
200 u32 portnum = port_id + 1;
201 int dispatch = 0;
202
203 if (!rdev)
204 return;
205 rnicp = rdev_to_iwch_dev(rdev);
206 switch (evt) {
207 case OFFLOAD_STATUS_DOWN: {
208 rdev->flags = CXIO_ERROR_FATAL;
209 synchronize_net();
210 event.event = IB_EVENT_DEVICE_FATAL;
211 dispatch = 1;
212 break;
213 }
214 case OFFLOAD_PORT_DOWN: {
215 event.event = IB_EVENT_PORT_ERR;
216 dispatch = 1;
217 break;
218 }
219 case OFFLOAD_PORT_UP: {
220 event.event = IB_EVENT_PORT_ACTIVE;
221 dispatch = 1;
222 break;
223 }
224 case OFFLOAD_DB_FULL: {
225 disable_dbs(rnicp);
226 break;
227 }
228 case OFFLOAD_DB_EMPTY: {
229 enable_dbs(rnicp, 1);
230 break;
231 }
232 case OFFLOAD_DB_DROP: {
233 unsigned long delay = 1000;
234 unsigned short r;
235
236 disable_dbs(rnicp);
237 get_random_bytes(&r, 2);
238 delay += r & 1023;
239
240 /*
241 * delay is between 1000-2023 usecs.
242 */
243 schedule_delayed_work(&rnicp->db_drop_task,
244 usecs_to_jiffies(delay));
245 break;
246 }
247 }
248
249 if (dispatch) {
250 event.device = &rnicp->ibdev;
251 event.element.port_num = portnum;
252 ib_dispatch_event(&event);
253 }
254
255 return;
256}
257
258static int __init iwch_init_module(void)
259{
260 int err;
261
262 err = cxio_hal_init();
263 if (err)
264 return err;
265 err = iwch_cm_init();
266 if (err)
267 return err;
268 cxio_register_ev_cb(iwch_ev_dispatch);
269 cxgb3_register_client(&t3c_client);
270 return 0;
271}
272
273static void __exit iwch_exit_module(void)
274{
275 cxgb3_unregister_client(&t3c_client);
276 cxio_unregister_ev_cb(iwch_ev_dispatch);
277 iwch_cm_term();
278 cxio_hal_exit();
279}
280
281module_init(iwch_init_module);
282module_exit(iwch_exit_module);