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1/*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Slow Path Operators (header)
37 *
38 */
39
40#ifndef __BNXT_QPLIB_SP_H__
41#define __BNXT_QPLIB_SP_H__
42
43#define BNXT_QPLIB_RESERVED_QP_WRS 128
44
45struct bnxt_qplib_dev_attr {
46#define FW_VER_ARR_LEN 4
47 u8 fw_ver[FW_VER_ARR_LEN];
48#define BNXT_QPLIB_NUM_GIDS_SUPPORTED 256
49 u16 max_sgid;
50 u16 max_mrw;
51 u32 max_qp;
52#define BNXT_QPLIB_MAX_OUT_RD_ATOM 126
53 u32 max_qp_rd_atom;
54 u32 max_qp_init_rd_atom;
55 u32 max_qp_wqes;
56 u32 max_qp_sges;
57 u32 max_cq;
58 u32 max_cq_wqes;
59 u32 max_cq_sges;
60 u32 max_mr;
61 u64 max_mr_size;
62 u32 max_pd;
63 u32 max_mw;
64 u32 max_raw_ethy_qp;
65 u32 max_ah;
66 u32 max_srq;
67 u32 max_srq_wqes;
68 u32 max_srq_sges;
69 u32 max_pkey;
70 u32 max_inline_data;
71 u32 l2_db_size;
72 u8 tqm_alloc_reqs[MAX_TQM_ALLOC_REQ];
73 bool is_atomic;
74 u16 dev_cap_flags;
75 u32 max_dpi;
76};
77
78struct bnxt_qplib_pd {
79 u32 id;
80};
81
82struct bnxt_qplib_gid {
83 u8 data[16];
84};
85
86struct bnxt_qplib_gid_info {
87 struct bnxt_qplib_gid gid;
88 u16 vlan_id;
89};
90
91struct bnxt_qplib_ah {
92 struct bnxt_qplib_gid dgid;
93 struct bnxt_qplib_pd *pd;
94 u32 id;
95 u8 sgid_index;
96 /* For Query AH if the hw table and SW table are differnt */
97 u8 host_sgid_index;
98 u8 traffic_class;
99 u32 flow_label;
100 u8 hop_limit;
101 u8 sl;
102 u8 dmac[6];
103 u16 vlan_id;
104 u8 nw_type;
105};
106
107struct bnxt_qplib_mrw {
108 struct bnxt_qplib_pd *pd;
109 int type;
110 u32 flags;
111#define BNXT_QPLIB_FR_PMR 0x80000000
112 u32 lkey;
113 u32 rkey;
114#define BNXT_QPLIB_RSVD_LKEY 0xFFFFFFFF
115 u64 va;
116 u64 total_size;
117 u32 npages;
118 u64 mr_handle;
119 struct bnxt_qplib_hwq hwq;
120};
121
122struct bnxt_qplib_frpl {
123 int max_pg_ptrs;
124 struct bnxt_qplib_hwq hwq;
125};
126
127#define BNXT_QPLIB_ACCESS_LOCAL_WRITE BIT(0)
128#define BNXT_QPLIB_ACCESS_REMOTE_READ BIT(1)
129#define BNXT_QPLIB_ACCESS_REMOTE_WRITE BIT(2)
130#define BNXT_QPLIB_ACCESS_REMOTE_ATOMIC BIT(3)
131#define BNXT_QPLIB_ACCESS_MW_BIND BIT(4)
132#define BNXT_QPLIB_ACCESS_ZERO_BASED BIT(5)
133#define BNXT_QPLIB_ACCESS_ON_DEMAND BIT(6)
134
135struct bnxt_qplib_roce_stats {
136 u64 to_retransmits;
137 u64 seq_err_naks_rcvd;
138 /* seq_err_naks_rcvd is 64 b */
139 u64 max_retry_exceeded;
140 /* max_retry_exceeded is 64 b */
141 u64 rnr_naks_rcvd;
142 /* rnr_naks_rcvd is 64 b */
143 u64 missing_resp;
144 u64 unrecoverable_err;
145 /* unrecoverable_err is 64 b */
146 u64 bad_resp_err;
147 /* bad_resp_err is 64 b */
148 u64 local_qp_op_err;
149 /* local_qp_op_err is 64 b */
150 u64 local_protection_err;
151 /* local_protection_err is 64 b */
152 u64 mem_mgmt_op_err;
153 /* mem_mgmt_op_err is 64 b */
154 u64 remote_invalid_req_err;
155 /* remote_invalid_req_err is 64 b */
156 u64 remote_access_err;
157 /* remote_access_err is 64 b */
158 u64 remote_op_err;
159 /* remote_op_err is 64 b */
160 u64 dup_req;
161 /* dup_req is 64 b */
162 u64 res_exceed_max;
163 /* res_exceed_max is 64 b */
164 u64 res_length_mismatch;
165 /* res_length_mismatch is 64 b */
166 u64 res_exceeds_wqe;
167 /* res_exceeds_wqe is 64 b */
168 u64 res_opcode_err;
169 /* res_opcode_err is 64 b */
170 u64 res_rx_invalid_rkey;
171 /* res_rx_invalid_rkey is 64 b */
172 u64 res_rx_domain_err;
173 /* res_rx_domain_err is 64 b */
174 u64 res_rx_no_perm;
175 /* res_rx_no_perm is 64 b */
176 u64 res_rx_range_err;
177 /* res_rx_range_err is 64 b */
178 u64 res_tx_invalid_rkey;
179 /* res_tx_invalid_rkey is 64 b */
180 u64 res_tx_domain_err;
181 /* res_tx_domain_err is 64 b */
182 u64 res_tx_no_perm;
183 /* res_tx_no_perm is 64 b */
184 u64 res_tx_range_err;
185 /* res_tx_range_err is 64 b */
186 u64 res_irrq_oflow;
187 /* res_irrq_oflow is 64 b */
188 u64 res_unsup_opcode;
189 /* res_unsup_opcode is 64 b */
190 u64 res_unaligned_atomic;
191 /* res_unaligned_atomic is 64 b */
192 u64 res_rem_inv_err;
193 /* res_rem_inv_err is 64 b */
194 u64 res_mem_error;
195 /* res_mem_error is 64 b */
196 u64 res_srq_err;
197 /* res_srq_err is 64 b */
198 u64 res_cmp_err;
199 /* res_cmp_err is 64 b */
200 u64 res_invalid_dup_rkey;
201 /* res_invalid_dup_rkey is 64 b */
202 u64 res_wqe_format_err;
203 /* res_wqe_format_err is 64 b */
204 u64 res_cq_load_err;
205 /* res_cq_load_err is 64 b */
206 u64 res_srq_load_err;
207 /* res_srq_load_err is 64 b */
208 u64 res_tx_pci_err;
209 /* res_tx_pci_err is 64 b */
210 u64 res_rx_pci_err;
211 /* res_rx_pci_err is 64 b */
212 u64 res_oos_drop_count;
213 /* res_oos_drop_count */
214 u64 active_qp_count_p0;
215 /* port 0 active qps */
216 u64 active_qp_count_p1;
217 /* port 1 active qps */
218 u64 active_qp_count_p2;
219 /* port 2 active qps */
220 u64 active_qp_count_p3;
221 /* port 3 active qps */
222};
223
224struct bnxt_qplib_ext_stat {
225 u64 tx_atomic_req;
226 u64 tx_read_req;
227 u64 tx_read_res;
228 u64 tx_write_req;
229 u64 tx_send_req;
230 u64 tx_roce_pkts;
231 u64 tx_roce_bytes;
232 u64 rx_atomic_req;
233 u64 rx_read_req;
234 u64 rx_read_res;
235 u64 rx_write_req;
236 u64 rx_send_req;
237 u64 rx_roce_pkts;
238 u64 rx_roce_bytes;
239 u64 rx_roce_good_pkts;
240 u64 rx_roce_good_bytes;
241 u64 rx_out_of_buffer;
242 u64 rx_out_of_sequence;
243 u64 tx_cnp;
244 u64 rx_cnp;
245 u64 rx_ecn_marked;
246};
247
248struct bnxt_qplib_cc_param_ext {
249 u64 ext_mask;
250 u16 inact_th_hi;
251 u16 min_delta_cnp;
252 u16 init_cp;
253 u8 tr_update_mode;
254 u8 tr_update_cyls;
255 u8 fr_rtt;
256 u8 ai_rate_incr;
257 u16 rr_rtt_th;
258 u16 ar_cr_th;
259 u16 cr_min_th;
260 u8 bw_avg_weight;
261 u8 cr_factor;
262 u16 cr_th_max_cp;
263 u8 cp_bias_en;
264 u8 cp_bias;
265 u8 cnp_ecn;
266 u8 rtt_jitter_en;
267 u16 bytes_per_usec;
268 u16 cc_cr_reset_th;
269 u8 cr_width;
270 u8 min_quota;
271 u8 max_quota;
272 u8 abs_max_quota;
273 u16 tr_lb;
274 u8 cr_prob_fac;
275 u8 tr_prob_fac;
276 u16 fair_cr_th;
277 u8 red_div;
278 u8 cnp_ratio_th;
279 u16 ai_ext_rtt;
280 u8 exp_crcp_ratio;
281 u8 low_rate_en;
282 u16 cpcr_update_th;
283 u16 ai_rtt_th1;
284 u16 ai_rtt_th2;
285 u16 cf_rtt_th;
286 u16 sc_cr_th1; /* severe congestion cr threshold 1 */
287 u16 sc_cr_th2; /* severe congestion cr threshold 2 */
288 u32 l64B_per_rtt;
289 u8 cc_ack_bytes;
290 u16 reduce_cf_rtt_th;
291};
292
293struct bnxt_qplib_cc_param {
294 u8 alt_vlan_pcp;
295 u16 alt_tos_dscp;
296 u8 cc_mode;
297 u8 enable;
298 u16 inact_th;
299 u16 init_cr;
300 u16 init_tr;
301 u16 rtt;
302 u8 g;
303 u8 nph_per_state;
304 u8 time_pph;
305 u8 pkts_pph;
306 u8 tos_ecn;
307 u8 tos_dscp;
308 u16 tcp_cp;
309 struct bnxt_qplib_cc_param_ext cc_ext;
310 u32 mask;
311};
312
313int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res,
314 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index,
315 struct bnxt_qplib_gid *gid);
316int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
317 struct bnxt_qplib_gid *gid, u16 vlan_id, bool update);
318int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
319 struct bnxt_qplib_gid *gid, const u8 *mac, u16 vlan_id,
320 bool update, u32 *index);
321int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
322 struct bnxt_qplib_gid *gid, u16 gid_idx,
323 const u8 *smac);
324int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
325 struct bnxt_qplib_dev_attr *attr);
326int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res,
327 struct bnxt_qplib_rcfw *rcfw,
328 struct bnxt_qplib_ctx *ctx);
329int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah,
330 bool block);
331int bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah,
332 bool block);
333int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res,
334 struct bnxt_qplib_mrw *mrw);
335int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw,
336 bool block);
337int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr,
338 struct ib_umem *umem, int num_pbls, u32 buf_pg_size);
339int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr);
340int bnxt_qplib_alloc_fast_reg_mr(struct bnxt_qplib_res *res,
341 struct bnxt_qplib_mrw *mr, int max);
342int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res,
343 struct bnxt_qplib_frpl *frpl, int max);
344int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res,
345 struct bnxt_qplib_frpl *frpl);
346int bnxt_qplib_get_roce_stats(struct bnxt_qplib_rcfw *rcfw,
347 struct bnxt_qplib_roce_stats *stats);
348int bnxt_qplib_qext_stat(struct bnxt_qplib_rcfw *rcfw, u32 fid,
349 struct bnxt_qplib_ext_stat *estat);
350int bnxt_qplib_modify_cc(struct bnxt_qplib_res *res,
351 struct bnxt_qplib_cc_param *cc_param);
352
353#endif /* __BNXT_QPLIB_SP_H__*/
1/*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Slow Path Operators (header)
37 *
38 */
39
40#ifndef __BNXT_QPLIB_SP_H__
41#define __BNXT_QPLIB_SP_H__
42
43#define BNXT_QPLIB_RESERVED_QP_WRS 128
44
45#define PCI_EXP_DEVCTL2_ATOMIC_REQ 0x0040
46
47struct bnxt_qplib_dev_attr {
48#define FW_VER_ARR_LEN 4
49 u8 fw_ver[FW_VER_ARR_LEN];
50 u16 max_sgid;
51 u16 max_mrw;
52 u32 max_qp;
53#define BNXT_QPLIB_MAX_OUT_RD_ATOM 126
54 u32 max_qp_rd_atom;
55 u32 max_qp_init_rd_atom;
56 u32 max_qp_wqes;
57 u32 max_qp_sges;
58 u32 max_cq;
59 u32 max_cq_wqes;
60 u32 max_cq_sges;
61 u32 max_mr;
62 u64 max_mr_size;
63 u32 max_pd;
64 u32 max_mw;
65 u32 max_raw_ethy_qp;
66 u32 max_ah;
67 u32 max_fmr;
68 u32 max_map_per_fmr;
69 u32 max_srq;
70 u32 max_srq_wqes;
71 u32 max_srq_sges;
72 u32 max_pkey;
73 u32 max_inline_data;
74 u32 l2_db_size;
75 u8 tqm_alloc_reqs[MAX_TQM_ALLOC_REQ];
76 bool is_atomic;
77};
78
79struct bnxt_qplib_pd {
80 u32 id;
81};
82
83struct bnxt_qplib_gid {
84 u8 data[16];
85};
86
87struct bnxt_qplib_gid_info {
88 struct bnxt_qplib_gid gid;
89 u16 vlan_id;
90};
91
92struct bnxt_qplib_ah {
93 struct bnxt_qplib_gid dgid;
94 struct bnxt_qplib_pd *pd;
95 u32 id;
96 u8 sgid_index;
97 /* For Query AH if the hw table and SW table are differnt */
98 u8 host_sgid_index;
99 u8 traffic_class;
100 u32 flow_label;
101 u8 hop_limit;
102 u8 sl;
103 u8 dmac[6];
104 u16 vlan_id;
105 u8 nw_type;
106};
107
108struct bnxt_qplib_mrw {
109 struct bnxt_qplib_pd *pd;
110 int type;
111 u32 flags;
112#define BNXT_QPLIB_FR_PMR 0x80000000
113 u32 lkey;
114 u32 rkey;
115#define BNXT_QPLIB_RSVD_LKEY 0xFFFFFFFF
116 u64 va;
117 u64 total_size;
118 u32 npages;
119 u64 mr_handle;
120 struct bnxt_qplib_hwq hwq;
121};
122
123struct bnxt_qplib_frpl {
124 int max_pg_ptrs;
125 struct bnxt_qplib_hwq hwq;
126};
127
128#define BNXT_QPLIB_ACCESS_LOCAL_WRITE BIT(0)
129#define BNXT_QPLIB_ACCESS_REMOTE_READ BIT(1)
130#define BNXT_QPLIB_ACCESS_REMOTE_WRITE BIT(2)
131#define BNXT_QPLIB_ACCESS_REMOTE_ATOMIC BIT(3)
132#define BNXT_QPLIB_ACCESS_MW_BIND BIT(4)
133#define BNXT_QPLIB_ACCESS_ZERO_BASED BIT(5)
134#define BNXT_QPLIB_ACCESS_ON_DEMAND BIT(6)
135
136struct bnxt_qplib_roce_stats {
137 u64 to_retransmits;
138 u64 seq_err_naks_rcvd;
139 /* seq_err_naks_rcvd is 64 b */
140 u64 max_retry_exceeded;
141 /* max_retry_exceeded is 64 b */
142 u64 rnr_naks_rcvd;
143 /* rnr_naks_rcvd is 64 b */
144 u64 missing_resp;
145 u64 unrecoverable_err;
146 /* unrecoverable_err is 64 b */
147 u64 bad_resp_err;
148 /* bad_resp_err is 64 b */
149 u64 local_qp_op_err;
150 /* local_qp_op_err is 64 b */
151 u64 local_protection_err;
152 /* local_protection_err is 64 b */
153 u64 mem_mgmt_op_err;
154 /* mem_mgmt_op_err is 64 b */
155 u64 remote_invalid_req_err;
156 /* remote_invalid_req_err is 64 b */
157 u64 remote_access_err;
158 /* remote_access_err is 64 b */
159 u64 remote_op_err;
160 /* remote_op_err is 64 b */
161 u64 dup_req;
162 /* dup_req is 64 b */
163 u64 res_exceed_max;
164 /* res_exceed_max is 64 b */
165 u64 res_length_mismatch;
166 /* res_length_mismatch is 64 b */
167 u64 res_exceeds_wqe;
168 /* res_exceeds_wqe is 64 b */
169 u64 res_opcode_err;
170 /* res_opcode_err is 64 b */
171 u64 res_rx_invalid_rkey;
172 /* res_rx_invalid_rkey is 64 b */
173 u64 res_rx_domain_err;
174 /* res_rx_domain_err is 64 b */
175 u64 res_rx_no_perm;
176 /* res_rx_no_perm is 64 b */
177 u64 res_rx_range_err;
178 /* res_rx_range_err is 64 b */
179 u64 res_tx_invalid_rkey;
180 /* res_tx_invalid_rkey is 64 b */
181 u64 res_tx_domain_err;
182 /* res_tx_domain_err is 64 b */
183 u64 res_tx_no_perm;
184 /* res_tx_no_perm is 64 b */
185 u64 res_tx_range_err;
186 /* res_tx_range_err is 64 b */
187 u64 res_irrq_oflow;
188 /* res_irrq_oflow is 64 b */
189 u64 res_unsup_opcode;
190 /* res_unsup_opcode is 64 b */
191 u64 res_unaligned_atomic;
192 /* res_unaligned_atomic is 64 b */
193 u64 res_rem_inv_err;
194 /* res_rem_inv_err is 64 b */
195 u64 res_mem_error;
196 /* res_mem_error is 64 b */
197 u64 res_srq_err;
198 /* res_srq_err is 64 b */
199 u64 res_cmp_err;
200 /* res_cmp_err is 64 b */
201 u64 res_invalid_dup_rkey;
202 /* res_invalid_dup_rkey is 64 b */
203 u64 res_wqe_format_err;
204 /* res_wqe_format_err is 64 b */
205 u64 res_cq_load_err;
206 /* res_cq_load_err is 64 b */
207 u64 res_srq_load_err;
208 /* res_srq_load_err is 64 b */
209 u64 res_tx_pci_err;
210 /* res_tx_pci_err is 64 b */
211 u64 res_rx_pci_err;
212 /* res_rx_pci_err is 64 b */
213 u64 res_oos_drop_count;
214 /* res_oos_drop_count */
215 u64 active_qp_count_p0;
216 /* port 0 active qps */
217 u64 active_qp_count_p1;
218 /* port 1 active qps */
219 u64 active_qp_count_p2;
220 /* port 2 active qps */
221 u64 active_qp_count_p3;
222 /* port 3 active qps */
223};
224
225int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res,
226 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index,
227 struct bnxt_qplib_gid *gid);
228int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
229 struct bnxt_qplib_gid *gid, u16 vlan_id, bool update);
230int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
231 struct bnxt_qplib_gid *gid, u8 *mac, u16 vlan_id,
232 bool update, u32 *index);
233int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
234 struct bnxt_qplib_gid *gid, u16 gid_idx, u8 *smac);
235int bnxt_qplib_get_pkey(struct bnxt_qplib_res *res,
236 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 index,
237 u16 *pkey);
238int bnxt_qplib_del_pkey(struct bnxt_qplib_res *res,
239 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
240 bool update);
241int bnxt_qplib_add_pkey(struct bnxt_qplib_res *res,
242 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
243 bool update);
244int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
245 struct bnxt_qplib_dev_attr *attr, bool vf);
246int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res,
247 struct bnxt_qplib_rcfw *rcfw,
248 struct bnxt_qplib_ctx *ctx);
249int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah,
250 bool block);
251void bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah,
252 bool block);
253int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res,
254 struct bnxt_qplib_mrw *mrw);
255int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw,
256 bool block);
257int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr,
258 u64 *pbl_tbl, int num_pbls, bool block, u32 buf_pg_size);
259int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr);
260int bnxt_qplib_alloc_fast_reg_mr(struct bnxt_qplib_res *res,
261 struct bnxt_qplib_mrw *mr, int max);
262int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res,
263 struct bnxt_qplib_frpl *frpl, int max);
264int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res,
265 struct bnxt_qplib_frpl *frpl);
266int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids);
267int bnxt_qplib_get_roce_stats(struct bnxt_qplib_rcfw *rcfw,
268 struct bnxt_qplib_roce_stats *stats);
269#endif /* __BNXT_QPLIB_SP_H__*/