1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  Copyright (C) 2003 ATI Inc. <hyu@ati.com>
  4 *  Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
  5 */
  6
  7#include <linux/types.h>
  8#include <linux/module.h>
  9#include <linux/kernel.h>
 10#include <linux/pci.h>
 11#include <linux/ide.h>
 12#include <linux/init.h>
 13
 14#define DRV_NAME "atiixp"
 15
 16#define ATIIXP_IDE_PIO_TIMING		0x40
 17#define ATIIXP_IDE_MDMA_TIMING		0x44
 18#define ATIIXP_IDE_PIO_CONTROL		0x48
 19#define ATIIXP_IDE_PIO_MODE		0x4a
 20#define ATIIXP_IDE_UDMA_CONTROL		0x54
 21#define ATIIXP_IDE_UDMA_MODE		0x56
 22
 23struct atiixp_ide_timing {
 24	u8 command_width;
 25	u8 recover_width;
 26};
 27
 28static struct atiixp_ide_timing pio_timing[] = {
 29	{ 0x05, 0x0d },
 30	{ 0x04, 0x07 },
 31	{ 0x03, 0x04 },
 32	{ 0x02, 0x02 },
 33	{ 0x02, 0x00 },
 34};
 35
 36static struct atiixp_ide_timing mdma_timing[] = {
 37	{ 0x07, 0x07 },
 38	{ 0x02, 0x01 },
 39	{ 0x02, 0x00 },
 40};
 41
 42static DEFINE_SPINLOCK(atiixp_lock);
 43
 44/**
 45 *	atiixp_set_pio_mode	-	set host controller for PIO mode
 46 *	@hwif: port
 47 *	@drive: drive
 48 *
 49 *	Set the interface PIO mode.
 50 */
 51
 52static void atiixp_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 53{
 54	struct pci_dev *dev = to_pci_dev(hwif->dev);
 55	unsigned long flags;
 56	int timing_shift = (drive->dn ^ 1) * 8;
 57	u32 pio_timing_data;
 58	u16 pio_mode_data;
 59	const u8 pio = drive->pio_mode - XFER_PIO_0;
 60
 61	spin_lock_irqsave(&atiixp_lock, flags);
 62
 63	pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
 64	pio_mode_data &= ~(0x07 << (drive->dn * 4));
 65	pio_mode_data |= (pio << (drive->dn * 4));
 66	pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
 67
 68	pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
 69	pio_timing_data &= ~(0xff << timing_shift);
 70	pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
 71		 (pio_timing[pio].command_width << (timing_shift + 4));
 72	pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
 73
 74	spin_unlock_irqrestore(&atiixp_lock, flags);
 75}
 76
 77/**
 78 *	atiixp_set_dma_mode	-	set host controller for DMA mode
 79 *	@hwif: port
 80 *	@drive: drive
 81 *
 82 *	Set a ATIIXP host controller to the desired DMA mode.  This involves
 83 *	programming the right timing data into the PCI configuration space.
 84 */
 85
 86static void atiixp_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 87{
 88	struct pci_dev *dev = to_pci_dev(hwif->dev);
 89	unsigned long flags;
 90	int timing_shift = (drive->dn ^ 1) * 8;
 91	u32 tmp32;
 92	u16 tmp16;
 93	u16 udma_ctl = 0;
 94	const u8 speed = drive->dma_mode;
 95
 96	spin_lock_irqsave(&atiixp_lock, flags);
 97
 98	pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl);
 99
100	if (speed >= XFER_UDMA_0) {
101		pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
102		tmp16 &= ~(0x07 << (drive->dn * 4));
103		tmp16 |= ((speed & 0x07) << (drive->dn * 4));
104		pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
105
106		udma_ctl |= (1 << drive->dn);
107	} else if (speed >= XFER_MW_DMA_0) {
108		u8 i = speed & 0x03;
109
110		pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
111		tmp32 &= ~(0xff << timing_shift);
112		tmp32 |= (mdma_timing[i].recover_width << timing_shift) |
113			 (mdma_timing[i].command_width << (timing_shift + 4));
114		pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
115
116		udma_ctl &= ~(1 << drive->dn);
117	}
118
119	pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
120
121	spin_unlock_irqrestore(&atiixp_lock, flags);
122}
123
124static u8 atiixp_cable_detect(ide_hwif_t *hwif)
125{
126	struct pci_dev *pdev = to_pci_dev(hwif->dev);
127	u8 udma_mode = 0, ch = hwif->channel;
128
129	pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
130
131	if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
132		return ATA_CBL_PATA80;
133	else
134		return ATA_CBL_PATA40;
135}
136
137static const struct ide_port_ops atiixp_port_ops = {
138	.set_pio_mode		= atiixp_set_pio_mode,
139	.set_dma_mode		= atiixp_set_dma_mode,
140	.cable_detect		= atiixp_cable_detect,
141};
142
143static const struct ide_port_info atiixp_pci_info[] = {
144	{	/* 0: IXP200/300/400/700 */
145		.name		= DRV_NAME,
146		.enablebits	= {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
147		.port_ops	= &atiixp_port_ops,
148		.pio_mask	= ATA_PIO4,
149		.mwdma_mask	= ATA_MWDMA2,
150		.udma_mask	= ATA_UDMA5,
151	},
152	{	/* 1: IXP600 */
153		.name		= DRV_NAME,
154		.enablebits	= {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
155		.port_ops	= &atiixp_port_ops,
156		.host_flags	= IDE_HFLAG_SINGLE,
157		.pio_mask	= ATA_PIO4,
158		.mwdma_mask	= ATA_MWDMA2,
159		.udma_mask	= ATA_UDMA5,
160 	},
161};
162
163/**
164 *	atiixp_init_one	-	called when a ATIIXP is found
165 *	@dev: the atiixp device
166 *	@id: the matching pci id
167 *
168 *	Called when the PCI registration layer (or the IDE initialization)
169 *	finds a device matching our IDE device tables.
170 */
171
172static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
173{
174	return ide_pci_init_one(dev, &atiixp_pci_info[id->driver_data], NULL);
175}
176
177static const struct pci_device_id atiixp_pci_tbl[] = {
178	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 },
179	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 },
180	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
181	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
182	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
183	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), 0 },
184	{ 0, },
185};
186MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
187
188static struct pci_driver atiixp_pci_driver = {
189	.name		= "ATIIXP_IDE",
190	.id_table	= atiixp_pci_tbl,
191	.probe		= atiixp_init_one,
192	.remove		= ide_pci_remove,
193	.suspend	= ide_pci_suspend,
194	.resume		= ide_pci_resume,
195};
196
197static int __init atiixp_ide_init(void)
198{
199	return ide_pci_register_driver(&atiixp_pci_driver);
200}
201
202static void __exit atiixp_ide_exit(void)
203{
204	pci_unregister_driver(&atiixp_pci_driver);
205}
206
207module_init(atiixp_ide_init);
208module_exit(atiixp_ide_exit);
209
210MODULE_AUTHOR("HUI YU");
211MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
212MODULE_LICENSE("GPL");