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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com
4 */
5
6#include <linux/kernel.h>
7
8#include "k3-psil-priv.h"
9
10#define PSIL_PDMA_XY_TR(x) \
11 { \
12 .thread_id = x, \
13 .ep_config = { \
14 .ep_type = PSIL_EP_PDMA_XY, \
15 }, \
16 }
17
18#define PSIL_PDMA_XY_PKT(x) \
19 { \
20 .thread_id = x, \
21 .ep_config = { \
22 .ep_type = PSIL_EP_PDMA_XY, \
23 .pkt_mode = 1, \
24 }, \
25 }
26
27#define PSIL_PDMA_MCASP(x) \
28 { \
29 .thread_id = x, \
30 .ep_config = { \
31 .ep_type = PSIL_EP_PDMA_XY, \
32 .pdma_acc32 = 1, \
33 .pdma_burst = 1, \
34 }, \
35 }
36
37#define PSIL_ETHERNET(x) \
38 { \
39 .thread_id = x, \
40 .ep_config = { \
41 .ep_type = PSIL_EP_NATIVE, \
42 .pkt_mode = 1, \
43 .needs_epib = 1, \
44 .psd_size = 16, \
45 }, \
46 }
47
48#define PSIL_SA2UL(x, tx) \
49 { \
50 .thread_id = x, \
51 .ep_config = { \
52 .ep_type = PSIL_EP_NATIVE, \
53 .pkt_mode = 1, \
54 .needs_epib = 1, \
55 .psd_size = 64, \
56 .notdpkt = tx, \
57 }, \
58 }
59
60#define PSIL_CSI2RX(x) \
61 { \
62 .thread_id = x, \
63 .ep_config = { \
64 .ep_type = PSIL_EP_NATIVE, \
65 }, \
66 }
67
68/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
69static struct psil_ep j784s4_src_ep_map[] = {
70 /* PDMA_MCASP - McASP0-4 */
71 PSIL_PDMA_MCASP(0x4400),
72 PSIL_PDMA_MCASP(0x4401),
73 PSIL_PDMA_MCASP(0x4402),
74 PSIL_PDMA_MCASP(0x4403),
75 PSIL_PDMA_MCASP(0x4404),
76 /* PDMA_SPI_G0 - SPI0-3 */
77 PSIL_PDMA_XY_PKT(0x4600),
78 PSIL_PDMA_XY_PKT(0x4601),
79 PSIL_PDMA_XY_PKT(0x4602),
80 PSIL_PDMA_XY_PKT(0x4603),
81 PSIL_PDMA_XY_PKT(0x4604),
82 PSIL_PDMA_XY_PKT(0x4605),
83 PSIL_PDMA_XY_PKT(0x4606),
84 PSIL_PDMA_XY_PKT(0x4607),
85 PSIL_PDMA_XY_PKT(0x4608),
86 PSIL_PDMA_XY_PKT(0x4609),
87 PSIL_PDMA_XY_PKT(0x460a),
88 PSIL_PDMA_XY_PKT(0x460b),
89 PSIL_PDMA_XY_PKT(0x460c),
90 PSIL_PDMA_XY_PKT(0x460d),
91 PSIL_PDMA_XY_PKT(0x460e),
92 PSIL_PDMA_XY_PKT(0x460f),
93 /* PDMA_SPI_G1 - SPI4-7 */
94 PSIL_PDMA_XY_PKT(0x4620),
95 PSIL_PDMA_XY_PKT(0x4621),
96 PSIL_PDMA_XY_PKT(0x4622),
97 PSIL_PDMA_XY_PKT(0x4623),
98 PSIL_PDMA_XY_PKT(0x4624),
99 PSIL_PDMA_XY_PKT(0x4625),
100 PSIL_PDMA_XY_PKT(0x4626),
101 PSIL_PDMA_XY_PKT(0x4627),
102 PSIL_PDMA_XY_PKT(0x4628),
103 PSIL_PDMA_XY_PKT(0x4629),
104 PSIL_PDMA_XY_PKT(0x462a),
105 PSIL_PDMA_XY_PKT(0x462b),
106 PSIL_PDMA_XY_PKT(0x462c),
107 PSIL_PDMA_XY_PKT(0x462d),
108 PSIL_PDMA_XY_PKT(0x462e),
109 PSIL_PDMA_XY_PKT(0x462f),
110 /* MAIN_CPSW2G */
111 PSIL_ETHERNET(0x4640),
112 /* PDMA_USART_G0 - UART0-1 */
113 PSIL_PDMA_XY_PKT(0x4700),
114 PSIL_PDMA_XY_PKT(0x4701),
115 /* PDMA_USART_G1 - UART2-3 */
116 PSIL_PDMA_XY_PKT(0x4702),
117 PSIL_PDMA_XY_PKT(0x4703),
118 /* PDMA_USART_G2 - UART4-9 */
119 PSIL_PDMA_XY_PKT(0x4704),
120 PSIL_PDMA_XY_PKT(0x4705),
121 PSIL_PDMA_XY_PKT(0x4706),
122 PSIL_PDMA_XY_PKT(0x4707),
123 PSIL_PDMA_XY_PKT(0x4708),
124 PSIL_PDMA_XY_PKT(0x4709),
125 /* CSI2RX */
126 PSIL_CSI2RX(0x4900),
127 PSIL_CSI2RX(0x4901),
128 PSIL_CSI2RX(0x4902),
129 PSIL_CSI2RX(0x4903),
130 PSIL_CSI2RX(0x4940),
131 PSIL_CSI2RX(0x4941),
132 PSIL_CSI2RX(0x4942),
133 PSIL_CSI2RX(0x4943),
134 PSIL_CSI2RX(0x4944),
135 PSIL_CSI2RX(0x4945),
136 PSIL_CSI2RX(0x4946),
137 PSIL_CSI2RX(0x4947),
138 PSIL_CSI2RX(0x4948),
139 PSIL_CSI2RX(0x4949),
140 PSIL_CSI2RX(0x494a),
141 PSIL_CSI2RX(0x494b),
142 PSIL_CSI2RX(0x494c),
143 PSIL_CSI2RX(0x494d),
144 PSIL_CSI2RX(0x494e),
145 PSIL_CSI2RX(0x494f),
146 PSIL_CSI2RX(0x4950),
147 PSIL_CSI2RX(0x4951),
148 PSIL_CSI2RX(0x4952),
149 PSIL_CSI2RX(0x4953),
150 PSIL_CSI2RX(0x4954),
151 PSIL_CSI2RX(0x4955),
152 PSIL_CSI2RX(0x4956),
153 PSIL_CSI2RX(0x4957),
154 PSIL_CSI2RX(0x4958),
155 PSIL_CSI2RX(0x4959),
156 PSIL_CSI2RX(0x495a),
157 PSIL_CSI2RX(0x495b),
158 PSIL_CSI2RX(0x495c),
159 PSIL_CSI2RX(0x495d),
160 PSIL_CSI2RX(0x495e),
161 PSIL_CSI2RX(0x495f),
162 PSIL_CSI2RX(0x4960),
163 PSIL_CSI2RX(0x4961),
164 PSIL_CSI2RX(0x4962),
165 PSIL_CSI2RX(0x4963),
166 PSIL_CSI2RX(0x4964),
167 PSIL_CSI2RX(0x4965),
168 PSIL_CSI2RX(0x4966),
169 PSIL_CSI2RX(0x4967),
170 PSIL_CSI2RX(0x4968),
171 PSIL_CSI2RX(0x4969),
172 PSIL_CSI2RX(0x496a),
173 PSIL_CSI2RX(0x496b),
174 PSIL_CSI2RX(0x496c),
175 PSIL_CSI2RX(0x496d),
176 PSIL_CSI2RX(0x496e),
177 PSIL_CSI2RX(0x496f),
178 PSIL_CSI2RX(0x4970),
179 PSIL_CSI2RX(0x4971),
180 PSIL_CSI2RX(0x4972),
181 PSIL_CSI2RX(0x4973),
182 PSIL_CSI2RX(0x4974),
183 PSIL_CSI2RX(0x4975),
184 PSIL_CSI2RX(0x4976),
185 PSIL_CSI2RX(0x4977),
186 PSIL_CSI2RX(0x4978),
187 PSIL_CSI2RX(0x4979),
188 PSIL_CSI2RX(0x497a),
189 PSIL_CSI2RX(0x497b),
190 PSIL_CSI2RX(0x497c),
191 PSIL_CSI2RX(0x497d),
192 PSIL_CSI2RX(0x497e),
193 PSIL_CSI2RX(0x497f),
194 PSIL_CSI2RX(0x4980),
195 PSIL_CSI2RX(0x4981),
196 PSIL_CSI2RX(0x4982),
197 PSIL_CSI2RX(0x4983),
198 PSIL_CSI2RX(0x4984),
199 PSIL_CSI2RX(0x4985),
200 PSIL_CSI2RX(0x4986),
201 PSIL_CSI2RX(0x4987),
202 PSIL_CSI2RX(0x4988),
203 PSIL_CSI2RX(0x4989),
204 PSIL_CSI2RX(0x498a),
205 PSIL_CSI2RX(0x498b),
206 PSIL_CSI2RX(0x498c),
207 PSIL_CSI2RX(0x498d),
208 PSIL_CSI2RX(0x498e),
209 PSIL_CSI2RX(0x498f),
210 PSIL_CSI2RX(0x4990),
211 PSIL_CSI2RX(0x4991),
212 PSIL_CSI2RX(0x4992),
213 PSIL_CSI2RX(0x4993),
214 PSIL_CSI2RX(0x4994),
215 PSIL_CSI2RX(0x4995),
216 PSIL_CSI2RX(0x4996),
217 PSIL_CSI2RX(0x4997),
218 PSIL_CSI2RX(0x4998),
219 PSIL_CSI2RX(0x4999),
220 PSIL_CSI2RX(0x499a),
221 PSIL_CSI2RX(0x499b),
222 PSIL_CSI2RX(0x499c),
223 PSIL_CSI2RX(0x499d),
224 PSIL_CSI2RX(0x499e),
225 PSIL_CSI2RX(0x499f),
226 /* MAIN_CPSW9G */
227 PSIL_ETHERNET(0x4a00),
228 /* MAIN-SA2UL */
229 PSIL_SA2UL(0x4a40, 0),
230 PSIL_SA2UL(0x4a41, 0),
231 PSIL_SA2UL(0x4a42, 0),
232 PSIL_SA2UL(0x4a43, 0),
233 /* MCU_CPSW0 */
234 PSIL_ETHERNET(0x7000),
235 /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
236 PSIL_PDMA_XY_PKT(0x7100),
237 PSIL_PDMA_XY_PKT(0x7101),
238 PSIL_PDMA_XY_PKT(0x7102),
239 PSIL_PDMA_XY_PKT(0x7103),
240 /* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
241 PSIL_PDMA_XY_PKT(0x7200),
242 PSIL_PDMA_XY_PKT(0x7201),
243 PSIL_PDMA_XY_PKT(0x7202),
244 PSIL_PDMA_XY_PKT(0x7203),
245 PSIL_PDMA_XY_PKT(0x7204),
246 PSIL_PDMA_XY_PKT(0x7205),
247 PSIL_PDMA_XY_PKT(0x7206),
248 PSIL_PDMA_XY_PKT(0x7207),
249 /* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
250 PSIL_PDMA_XY_PKT(0x7300),
251 /* MCU_PDMA_ADC - ADC0-1 */
252 PSIL_PDMA_XY_TR(0x7400),
253 PSIL_PDMA_XY_TR(0x7401),
254 PSIL_PDMA_XY_TR(0x7402),
255 PSIL_PDMA_XY_TR(0x7403),
256 /* MCU_SA2UL */
257 PSIL_SA2UL(0x7500, 0),
258 PSIL_SA2UL(0x7501, 0),
259 PSIL_SA2UL(0x7502, 0),
260 PSIL_SA2UL(0x7503, 0),
261};
262
263/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
264static struct psil_ep j784s4_dst_ep_map[] = {
265 /* MAIN_CPSW2G */
266 PSIL_ETHERNET(0xc640),
267 PSIL_ETHERNET(0xc641),
268 PSIL_ETHERNET(0xc642),
269 PSIL_ETHERNET(0xc643),
270 PSIL_ETHERNET(0xc644),
271 PSIL_ETHERNET(0xc645),
272 PSIL_ETHERNET(0xc646),
273 PSIL_ETHERNET(0xc647),
274 /* MAIN_CPSW9G */
275 PSIL_ETHERNET(0xca00),
276 PSIL_ETHERNET(0xca01),
277 PSIL_ETHERNET(0xca02),
278 PSIL_ETHERNET(0xca03),
279 PSIL_ETHERNET(0xca04),
280 PSIL_ETHERNET(0xca05),
281 PSIL_ETHERNET(0xca06),
282 PSIL_ETHERNET(0xca07),
283 /* MAIN-SA2UL */
284 PSIL_SA2UL(0xca40, 1),
285 PSIL_SA2UL(0xca41, 1),
286 /* PDMA_SPI_G0 - SPI0-3 */
287 PSIL_PDMA_XY_PKT(0xc600),
288 PSIL_PDMA_XY_PKT(0xc601),
289 PSIL_PDMA_XY_PKT(0xc602),
290 PSIL_PDMA_XY_PKT(0xc603),
291 PSIL_PDMA_XY_PKT(0xc604),
292 PSIL_PDMA_XY_PKT(0xc605),
293 PSIL_PDMA_XY_PKT(0xc606),
294 PSIL_PDMA_XY_PKT(0xc607),
295 PSIL_PDMA_XY_PKT(0xc608),
296 PSIL_PDMA_XY_PKT(0xc609),
297 PSIL_PDMA_XY_PKT(0xc60a),
298 PSIL_PDMA_XY_PKT(0xc60b),
299 PSIL_PDMA_XY_PKT(0xc60c),
300 PSIL_PDMA_XY_PKT(0xc60d),
301 PSIL_PDMA_XY_PKT(0xc60e),
302 PSIL_PDMA_XY_PKT(0xc60f),
303 /* PDMA_SPI_G1 - SPI4-7 */
304 PSIL_PDMA_XY_PKT(0xc620),
305 PSIL_PDMA_XY_PKT(0xc621),
306 PSIL_PDMA_XY_PKT(0xc622),
307 PSIL_PDMA_XY_PKT(0xc623),
308 PSIL_PDMA_XY_PKT(0xc624),
309 PSIL_PDMA_XY_PKT(0xc625),
310 PSIL_PDMA_XY_PKT(0xc626),
311 PSIL_PDMA_XY_PKT(0xc627),
312 PSIL_PDMA_XY_PKT(0xc628),
313 PSIL_PDMA_XY_PKT(0xc629),
314 PSIL_PDMA_XY_PKT(0xc62a),
315 PSIL_PDMA_XY_PKT(0xc62b),
316 PSIL_PDMA_XY_PKT(0xc62c),
317 PSIL_PDMA_XY_PKT(0xc62d),
318 PSIL_PDMA_XY_PKT(0xc62e),
319 PSIL_PDMA_XY_PKT(0xc62f),
320 /* MCU_CPSW0 */
321 PSIL_ETHERNET(0xf000),
322 PSIL_ETHERNET(0xf001),
323 PSIL_ETHERNET(0xf002),
324 PSIL_ETHERNET(0xf003),
325 PSIL_ETHERNET(0xf004),
326 PSIL_ETHERNET(0xf005),
327 PSIL_ETHERNET(0xf006),
328 PSIL_ETHERNET(0xf007),
329 /* MCU_PDMA_MISC_G0 - SPI0 */
330 PSIL_PDMA_XY_PKT(0xf100),
331 PSIL_PDMA_XY_PKT(0xf101),
332 PSIL_PDMA_XY_PKT(0xf102),
333 PSIL_PDMA_XY_PKT(0xf103),
334 /* MCU_PDMA_MISC_G1 - SPI1-2 */
335 PSIL_PDMA_XY_PKT(0xf200),
336 PSIL_PDMA_XY_PKT(0xf201),
337 PSIL_PDMA_XY_PKT(0xf202),
338 PSIL_PDMA_XY_PKT(0xf203),
339 PSIL_PDMA_XY_PKT(0xf204),
340 PSIL_PDMA_XY_PKT(0xf205),
341 PSIL_PDMA_XY_PKT(0xf206),
342 PSIL_PDMA_XY_PKT(0xf207),
343 /* MCU_SA2UL */
344 PSIL_SA2UL(0xf500, 1),
345 PSIL_SA2UL(0xf501, 1),
346};
347
348struct psil_ep_map j784s4_ep_map = {
349 .name = "j784s4",
350 .src = j784s4_src_ep_map,
351 .src_count = ARRAY_SIZE(j784s4_src_ep_map),
352 .dst = j784s4_dst_ep_map,
353 .dst_count = ARRAY_SIZE(j784s4_dst_ep_map),
354};