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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Routines providing a simple monitor for use on the PowerMac.
4 *
5 * Copyright (C) 1996-2005 Paul Mackerras.
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
8 */
9
10#include <linux/kernel.h>
11#include <linux/errno.h>
12#include <linux/sched/signal.h>
13#include <linux/smp.h>
14#include <linux/mm.h>
15#include <linux/reboot.h>
16#include <linux/delay.h>
17#include <linux/kallsyms.h>
18#include <linux/kmsg_dump.h>
19#include <linux/cpumask.h>
20#include <linux/export.h>
21#include <linux/sysrq.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/bug.h>
25#include <linux/nmi.h>
26#include <linux/ctype.h>
27#include <linux/highmem.h>
28#include <linux/security.h>
29#include <linux/debugfs.h>
30
31#include <asm/ptrace.h>
32#include <asm/smp.h>
33#include <asm/string.h>
34#include <asm/machdep.h>
35#include <asm/xmon.h>
36#include <asm/processor.h>
37#include <asm/mmu.h>
38#include <asm/mmu_context.h>
39#include <asm/plpar_wrappers.h>
40#include <asm/cputable.h>
41#include <asm/rtas.h>
42#include <asm/sstep.h>
43#include <asm/irq_regs.h>
44#include <asm/spu.h>
45#include <asm/spu_priv1.h>
46#include <asm/setjmp.h>
47#include <asm/reg.h>
48#include <asm/debug.h>
49#include <asm/hw_breakpoint.h>
50#include <asm/xive.h>
51#include <asm/opal.h>
52#include <asm/firmware.h>
53#include <asm/code-patching.h>
54#include <asm/sections.h>
55#include <asm/inst.h>
56#include <asm/interrupt.h>
57
58#ifdef CONFIG_PPC64
59#include <asm/hvcall.h>
60#include <asm/paca.h>
61#include <asm/lppaca.h>
62#endif
63
64#include "nonstdio.h"
65#include "dis-asm.h"
66#include "xmon_bpts.h"
67
68#ifdef CONFIG_SMP
69static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
70static unsigned long xmon_taken = 1;
71static int xmon_owner;
72static int xmon_gate;
73static int xmon_batch;
74static unsigned long xmon_batch_start_cpu;
75static cpumask_t xmon_batch_cpus = CPU_MASK_NONE;
76#else
77#define xmon_owner 0
78#endif /* CONFIG_SMP */
79
80static unsigned long in_xmon __read_mostly = 0;
81static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
82static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE);
83
84static unsigned long adrs;
85static int size = 1;
86#define MAX_DUMP (64 * 1024)
87static unsigned long ndump = 64;
88#define MAX_IDUMP (MAX_DUMP >> 2)
89static unsigned long nidump = 16;
90static unsigned long ncsum = 4096;
91static int termch;
92static char tmpstr[KSYM_NAME_LEN];
93static int tracing_enabled;
94
95static long bus_error_jmp[JMP_BUF_LEN];
96static int catch_memory_errors;
97static int catch_spr_faults;
98static long *xmon_fault_jmp[NR_CPUS];
99
100/* Breakpoint stuff */
101struct bpt {
102 unsigned long address;
103 u32 *instr;
104 atomic_t ref_count;
105 int enabled;
106 unsigned long pad;
107};
108
109/* Bits in bpt.enabled */
110#define BP_CIABR 1
111#define BP_TRAP 2
112#define BP_DABR 4
113
114static struct bpt bpts[NBPTS];
115static struct bpt dabr[HBP_NUM_MAX];
116static struct bpt *iabr;
117static unsigned int bpinstr = PPC_RAW_TRAP();
118
119#define BP_NUM(bp) ((bp) - bpts + 1)
120
121/* Prototypes */
122static int cmds(struct pt_regs *);
123static int mread(unsigned long, void *, int);
124static int mwrite(unsigned long, void *, int);
125static int mread_instr(unsigned long, ppc_inst_t *);
126static int handle_fault(struct pt_regs *);
127static void byterev(unsigned char *, int);
128static void memex(void);
129static int bsesc(void);
130static void dump(void);
131static void show_pte(unsigned long);
132static void prdump(unsigned long, long);
133static int ppc_inst_dump(unsigned long, long, int);
134static void dump_log_buf(void);
135
136#ifdef CONFIG_SMP
137static int xmon_switch_cpu(unsigned long);
138static int xmon_batch_next_cpu(void);
139static int batch_cmds(struct pt_regs *);
140#endif
141
142#ifdef CONFIG_PPC_POWERNV
143static void dump_opal_msglog(void);
144#else
145static inline void dump_opal_msglog(void)
146{
147 printf("Machine is not running OPAL firmware.\n");
148}
149#endif
150
151static void backtrace(struct pt_regs *);
152static void excprint(struct pt_regs *);
153static void prregs(struct pt_regs *);
154static void memops(int);
155static void memlocate(void);
156static void memzcan(void);
157static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
158int skipbl(void);
159int scanhex(unsigned long *valp);
160static void scannl(void);
161static int hexdigit(int);
162void getstring(char *, int);
163static void flush_input(void);
164static int inchar(void);
165static void take_input(char *);
166static int read_spr(int, unsigned long *);
167static void write_spr(int, unsigned long);
168static void super_regs(void);
169static void remove_bpts(void);
170static void insert_bpts(void);
171static void remove_cpu_bpts(void);
172static void insert_cpu_bpts(void);
173static struct bpt *at_breakpoint(unsigned long pc);
174static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
175static int do_step(struct pt_regs *);
176static void bpt_cmds(void);
177static void cacheflush(void);
178static int cpu_cmd(void);
179static void csum(void);
180static void bootcmds(void);
181static void proccall(void);
182static void show_tasks(void);
183void dump_segments(void);
184static void symbol_lookup(void);
185static void xmon_show_stack(unsigned long sp, unsigned long lr,
186 unsigned long pc);
187static void xmon_print_symbol(unsigned long address, const char *mid,
188 const char *after);
189static const char *getvecname(unsigned long vec);
190
191static int do_spu_cmd(void);
192
193#ifdef CONFIG_44x
194static void dump_tlb_44x(void);
195#endif
196#ifdef CONFIG_PPC_BOOK3E_64
197static void dump_tlb_book3e(void);
198#endif
199
200static void clear_all_bpt(void);
201
202#ifdef CONFIG_PPC64
203#define REG "%.16lx"
204#else
205#define REG "%.8lx"
206#endif
207
208#ifdef __LITTLE_ENDIAN__
209#define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
210#else
211#define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
212#endif
213
214static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n";
215
216static char *help_string = "\
217Commands:\n\
218 b show breakpoints\n\
219 bd set data breakpoint\n\
220 bi set instruction breakpoint\n\
221 bc clear breakpoint\n"
222#ifdef CONFIG_SMP
223 "\
224 c print cpus stopped in xmon\n\
225 c# try to switch to cpu number h (in hex)\n\
226 c# $ run command '$' (one of 'r','S' or 't') on all cpus in xmon\n"
227#endif
228 "\
229 C checksum\n\
230 d dump bytes\n\
231 d1 dump 1 byte values\n\
232 d2 dump 2 byte values\n\
233 d4 dump 4 byte values\n\
234 d8 dump 8 byte values\n\
235 di dump instructions\n\
236 df dump float values\n\
237 dd dump double values\n\
238 dl dump the kernel log buffer\n"
239#ifdef CONFIG_PPC_POWERNV
240 "\
241 do dump the OPAL message log\n"
242#endif
243#ifdef CONFIG_PPC64
244 "\
245 dp[#] dump paca for current cpu, or cpu #\n\
246 dpa dump paca for all possible cpus\n"
247#endif
248 "\
249 dr dump stream of raw bytes\n\
250 dv dump virtual address translation \n\
251 dt dump the tracing buffers (uses printk)\n\
252 dtc dump the tracing buffers for current CPU (uses printk)\n\
253"
254#ifdef CONFIG_PPC_POWERNV
255" dx# dump xive on CPU #\n\
256 dxi# dump xive irq state #\n\
257 dxa dump xive on all CPUs\n"
258#endif
259" e print exception information\n\
260 f flush cache\n\
261 la lookup symbol+offset of specified address\n\
262 ls lookup address of specified symbol\n\
263 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\
264 m examine/change memory\n\
265 mm move a block of memory\n\
266 ms set a block of memory\n\
267 md compare two blocks of memory\n\
268 ml locate a block of memory\n\
269 mz zero a block of memory\n\
270 mi show information about memory allocation\n\
271 p call a procedure\n\
272 P list processes/tasks\n\
273 r print registers\n\
274 s single step\n"
275#ifdef CONFIG_SPU_BASE
276" ss stop execution on all spus\n\
277 sr restore execution on stopped spus\n\
278 sf # dump spu fields for spu # (in hex)\n\
279 sd # dump spu local store for spu # (in hex)\n\
280 sdi # disassemble spu local store for spu # (in hex)\n"
281#endif
282" S print special registers\n\
283 Sa print all SPRs\n\
284 Sr # read SPR #\n\
285 Sw #v write v to SPR #\n\
286 t print backtrace\n\
287 x exit monitor and recover\n\
288 X exit monitor and don't recover\n"
289#if defined(CONFIG_PPC_BOOK3S_64)
290" u dump segment table or SLB\n"
291#elif defined(CONFIG_PPC_BOOK3S_32)
292" u dump segment registers\n"
293#elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E_64)
294" u dump TLB\n"
295#endif
296" U show uptime information\n"
297" ? help\n"
298" # n limit output to n lines per page (for dp, dpa, dl)\n"
299" zr reboot\n"
300" zh halt\n"
301;
302
303#ifdef CONFIG_SECURITY
304static bool xmon_is_locked_down(void)
305{
306 static bool lockdown;
307
308 if (!lockdown) {
309 lockdown = !!security_locked_down(LOCKDOWN_XMON_RW);
310 if (lockdown) {
311 printf("xmon: Disabled due to kernel lockdown\n");
312 xmon_is_ro = true;
313 }
314 }
315
316 if (!xmon_is_ro) {
317 xmon_is_ro = !!security_locked_down(LOCKDOWN_XMON_WR);
318 if (xmon_is_ro)
319 printf("xmon: Read-only due to kernel lockdown\n");
320 }
321
322 return lockdown;
323}
324#else /* CONFIG_SECURITY */
325static inline bool xmon_is_locked_down(void)
326{
327 return false;
328}
329#endif
330
331static struct pt_regs *xmon_regs;
332
333static inline void sync(void)
334{
335 asm volatile("sync; isync");
336}
337
338static inline void cflush(void *p)
339{
340 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
341}
342
343static inline void cinval(void *p)
344{
345 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
346}
347
348/**
349 * write_ciabr() - write the CIABR SPR
350 * @ciabr: The value to write.
351 *
352 * This function writes a value to the CIARB register either directly
353 * through mtspr instruction if the kernel is in HV privilege mode or
354 * call a hypervisor function to achieve the same in case the kernel
355 * is in supervisor privilege mode.
356 */
357static void write_ciabr(unsigned long ciabr)
358{
359 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
360 return;
361
362 if (cpu_has_feature(CPU_FTR_HVMODE)) {
363 mtspr(SPRN_CIABR, ciabr);
364 return;
365 }
366 plpar_set_ciabr(ciabr);
367}
368
369/**
370 * set_ciabr() - set the CIABR
371 * @addr: The value to set.
372 *
373 * This function sets the correct privilege value into the HW
374 * breakpoint address before writing it up in the CIABR register.
375 */
376static void set_ciabr(unsigned long addr)
377{
378 addr &= ~CIABR_PRIV;
379
380 if (cpu_has_feature(CPU_FTR_HVMODE))
381 addr |= CIABR_PRIV_HYPER;
382 else
383 addr |= CIABR_PRIV_SUPER;
384 write_ciabr(addr);
385}
386
387/*
388 * Disable surveillance (the service processor watchdog function)
389 * while we are in xmon.
390 * XXX we should re-enable it when we leave. :)
391 */
392#define SURVEILLANCE_TOKEN 9000
393
394static inline void disable_surveillance(void)
395{
396#ifdef CONFIG_PPC_PSERIES
397 /* Since this can't be a module, args should end up below 4GB. */
398 static struct rtas_args args;
399 const s32 token = rtas_function_token(RTAS_FN_SET_INDICATOR);
400
401 /*
402 * At this point we have got all the cpus we can into
403 * xmon, so there is hopefully no other cpu calling RTAS
404 * at the moment, even though we don't take rtas.lock.
405 * If we did try to take rtas.lock there would be a
406 * real possibility of deadlock.
407 */
408 if (token == RTAS_UNKNOWN_SERVICE)
409 return;
410
411 rtas_call_unlocked(&args, token, 3, 1, NULL,
412 SURVEILLANCE_TOKEN, 0, 0);
413
414#endif /* CONFIG_PPC_PSERIES */
415}
416
417#ifdef CONFIG_SMP
418static int xmon_speaker;
419
420static void get_output_lock(void)
421{
422 int me = smp_processor_id() + 0x100;
423 int last_speaker = 0, prev;
424 long timeout;
425
426 if (xmon_speaker == me)
427 return;
428
429 for (;;) {
430 last_speaker = cmpxchg(&xmon_speaker, 0, me);
431 if (last_speaker == 0)
432 return;
433
434 /*
435 * Wait a full second for the lock, we might be on a slow
436 * console, but check every 100us.
437 */
438 timeout = 10000;
439 while (xmon_speaker == last_speaker) {
440 if (--timeout > 0) {
441 udelay(100);
442 continue;
443 }
444
445 /* hostile takeover */
446 prev = cmpxchg(&xmon_speaker, last_speaker, me);
447 if (prev == last_speaker)
448 return;
449 break;
450 }
451 }
452}
453
454static void release_output_lock(void)
455{
456 xmon_speaker = 0;
457}
458
459int cpus_are_in_xmon(void)
460{
461 return !cpumask_empty(&cpus_in_xmon);
462}
463
464static bool wait_for_other_cpus(int ncpus)
465{
466 unsigned long timeout;
467
468 /* We wait for 2s, which is a metric "little while" */
469 for (timeout = 20000; timeout != 0; --timeout) {
470 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
471 return true;
472 udelay(100);
473 barrier();
474 }
475
476 return false;
477}
478#else /* CONFIG_SMP */
479static inline void get_output_lock(void) {}
480static inline void release_output_lock(void) {}
481#endif
482
483static void xmon_touch_watchdogs(void)
484{
485 touch_softlockup_watchdog_sync();
486 rcu_cpu_stall_reset();
487 touch_nmi_watchdog();
488}
489
490static int xmon_core(struct pt_regs *regs, volatile int fromipi)
491{
492 volatile int cmd = 0;
493 struct bpt *volatile bp;
494 long recurse_jmp[JMP_BUF_LEN];
495 bool locked_down;
496 unsigned long offset;
497 unsigned long flags;
498#ifdef CONFIG_SMP
499 int cpu;
500 int secondary;
501#endif
502
503 local_irq_save(flags);
504 hard_irq_disable();
505
506 locked_down = xmon_is_locked_down();
507
508 if (!fromipi) {
509 tracing_enabled = tracing_is_on();
510 tracing_off();
511 }
512
513 bp = in_breakpoint_table(regs->nip, &offset);
514 if (bp != NULL) {
515 regs_set_return_ip(regs, bp->address + offset);
516 atomic_dec(&bp->ref_count);
517 }
518
519 remove_cpu_bpts();
520
521#ifdef CONFIG_SMP
522 cpu = smp_processor_id();
523 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
524 /*
525 * We catch SPR read/write faults here because the 0x700, 0xf60
526 * etc. handlers don't call debugger_fault_handler().
527 */
528 if (catch_spr_faults)
529 longjmp(bus_error_jmp, 1);
530 get_output_lock();
531 excprint(regs);
532 printf("cpu 0x%x: Exception %lx %s in xmon, "
533 "returning to main loop\n",
534 cpu, regs->trap, getvecname(TRAP(regs)));
535 release_output_lock();
536 longjmp(xmon_fault_jmp[cpu], 1);
537 }
538
539 if (setjmp(recurse_jmp) != 0) {
540 if (!in_xmon || !xmon_gate) {
541 get_output_lock();
542 printf("xmon: WARNING: bad recursive fault "
543 "on cpu 0x%x\n", cpu);
544 release_output_lock();
545 goto waiting;
546 }
547 secondary = !(xmon_taken && cpu == xmon_owner);
548 goto cmdloop;
549 }
550
551 xmon_fault_jmp[cpu] = recurse_jmp;
552
553 bp = NULL;
554 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
555 bp = at_breakpoint(regs->nip);
556 if (bp || regs_is_unrecoverable(regs))
557 fromipi = 0;
558
559 if (!fromipi) {
560 get_output_lock();
561 if (!locked_down)
562 excprint(regs);
563 if (bp) {
564 printf("cpu 0x%x stopped at breakpoint 0x%tx (",
565 cpu, BP_NUM(bp));
566 xmon_print_symbol(regs->nip, " ", ")\n");
567 }
568 if (regs_is_unrecoverable(regs))
569 printf("WARNING: exception is not recoverable, "
570 "can't continue\n");
571 release_output_lock();
572 }
573
574 cpumask_set_cpu(cpu, &cpus_in_xmon);
575
576 waiting:
577 secondary = 1;
578 spin_begin();
579 while (secondary && !xmon_gate) {
580 if (in_xmon == 0) {
581 if (fromipi) {
582 spin_end();
583 goto leave;
584 }
585 secondary = test_and_set_bit(0, &in_xmon);
586 }
587 spin_cpu_relax();
588 touch_nmi_watchdog();
589 }
590 spin_end();
591
592 if (!secondary && !xmon_gate) {
593 /* we are the first cpu to come in */
594 /* interrupt other cpu(s) */
595 int ncpus = num_online_cpus();
596
597 xmon_owner = cpu;
598 mb();
599 if (ncpus > 1) {
600 /*
601 * A system reset (trap == 0x100) can be triggered on
602 * all CPUs, so when we come in via 0x100 try waiting
603 * for the other CPUs to come in before we send the
604 * debugger break (IPI). This is similar to
605 * crash_kexec_secondary().
606 */
607 if (TRAP(regs) != INTERRUPT_SYSTEM_RESET || !wait_for_other_cpus(ncpus))
608 smp_send_debugger_break();
609
610 wait_for_other_cpus(ncpus);
611 }
612 remove_bpts();
613 disable_surveillance();
614
615 if (!locked_down) {
616 /* for breakpoint or single step, print curr insn */
617 if (bp || TRAP(regs) == INTERRUPT_TRACE)
618 ppc_inst_dump(regs->nip, 1, 0);
619 printf("enter ? for help\n");
620 }
621
622 mb();
623 xmon_gate = 1;
624 barrier();
625 touch_nmi_watchdog();
626 }
627
628 cmdloop:
629 while (in_xmon) {
630 if (secondary) {
631 spin_begin();
632 if (cpu == xmon_owner) {
633 if (!test_and_set_bit(0, &xmon_taken)) {
634 secondary = 0;
635 spin_end();
636 continue;
637 }
638 /* missed it */
639 while (cpu == xmon_owner)
640 spin_cpu_relax();
641 }
642 spin_cpu_relax();
643 touch_nmi_watchdog();
644 } else {
645 cmd = 1;
646#ifdef CONFIG_SMP
647 if (xmon_batch)
648 cmd = batch_cmds(regs);
649#endif
650 if (!locked_down && cmd)
651 cmd = cmds(regs);
652 if (locked_down || cmd != 0) {
653 /* exiting xmon */
654 insert_bpts();
655 xmon_gate = 0;
656 wmb();
657 in_xmon = 0;
658 break;
659 }
660 /* have switched to some other cpu */
661 secondary = 1;
662 }
663 }
664 leave:
665 cpumask_clear_cpu(cpu, &cpus_in_xmon);
666 xmon_fault_jmp[cpu] = NULL;
667#else
668 /* UP is simple... */
669 if (in_xmon) {
670 printf("Exception %lx %s in xmon, returning to main loop\n",
671 regs->trap, getvecname(TRAP(regs)));
672 longjmp(xmon_fault_jmp[0], 1);
673 }
674 if (setjmp(recurse_jmp) == 0) {
675 xmon_fault_jmp[0] = recurse_jmp;
676 in_xmon = 1;
677
678 excprint(regs);
679 bp = at_breakpoint(regs->nip);
680 if (bp) {
681 printf("Stopped at breakpoint %tx (", BP_NUM(bp));
682 xmon_print_symbol(regs->nip, " ", ")\n");
683 }
684 if (regs_is_unrecoverable(regs))
685 printf("WARNING: exception is not recoverable, "
686 "can't continue\n");
687 remove_bpts();
688 disable_surveillance();
689 if (!locked_down) {
690 /* for breakpoint or single step, print current insn */
691 if (bp || TRAP(regs) == INTERRUPT_TRACE)
692 ppc_inst_dump(regs->nip, 1, 0);
693 printf("enter ? for help\n");
694 }
695 }
696
697 if (!locked_down)
698 cmd = cmds(regs);
699
700 insert_bpts();
701 in_xmon = 0;
702#endif
703
704#ifdef CONFIG_BOOKE
705 if (regs->msr & MSR_DE) {
706 bp = at_breakpoint(regs->nip);
707 if (bp != NULL) {
708 regs_set_return_ip(regs, (unsigned long) &bp->instr[0]);
709 atomic_inc(&bp->ref_count);
710 }
711 }
712#else
713 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
714 bp = at_breakpoint(regs->nip);
715 if (bp != NULL) {
716 int stepped = emulate_step(regs, ppc_inst_read(bp->instr));
717 if (stepped == 0) {
718 regs_set_return_ip(regs, (unsigned long) &bp->instr[0]);
719 atomic_inc(&bp->ref_count);
720 } else if (stepped < 0) {
721 printf("Couldn't single-step %s instruction\n",
722 IS_RFID(ppc_inst_read(bp->instr))? "rfid": "mtmsrd");
723 }
724 }
725 }
726#endif
727 if (locked_down)
728 clear_all_bpt();
729 else
730 insert_cpu_bpts();
731
732 xmon_touch_watchdogs();
733 local_irq_restore(flags);
734
735 return cmd != 'X' && cmd != EOF;
736}
737
738int xmon(struct pt_regs *excp)
739{
740 struct pt_regs regs;
741
742 if (excp == NULL) {
743 ppc_save_regs(®s);
744 excp = ®s;
745 }
746
747 return xmon_core(excp, 0);
748}
749EXPORT_SYMBOL(xmon);
750
751irqreturn_t xmon_irq(int irq, void *d)
752{
753 unsigned long flags;
754 local_irq_save(flags);
755 printf("Keyboard interrupt\n");
756 xmon(get_irq_regs());
757 local_irq_restore(flags);
758 return IRQ_HANDLED;
759}
760
761static int xmon_bpt(struct pt_regs *regs)
762{
763 struct bpt *bp;
764 unsigned long offset;
765
766 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
767 return 0;
768
769 /* Are we at the trap at bp->instr[1] for some bp? */
770 bp = in_breakpoint_table(regs->nip, &offset);
771 if (bp != NULL && (offset == 4 || offset == 8)) {
772 regs_set_return_ip(regs, bp->address + offset);
773 atomic_dec(&bp->ref_count);
774 return 1;
775 }
776
777 /* Are we at a breakpoint? */
778 bp = at_breakpoint(regs->nip);
779 if (!bp)
780 return 0;
781
782 xmon_core(regs, 0);
783
784 return 1;
785}
786
787static int xmon_sstep(struct pt_regs *regs)
788{
789 if (user_mode(regs))
790 return 0;
791 xmon_core(regs, 0);
792 return 1;
793}
794
795static int xmon_break_match(struct pt_regs *regs)
796{
797 int i;
798
799 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
800 return 0;
801 for (i = 0; i < nr_wp_slots(); i++) {
802 if (dabr[i].enabled)
803 goto found;
804 }
805 return 0;
806
807found:
808 xmon_core(regs, 0);
809 return 1;
810}
811
812static int xmon_iabr_match(struct pt_regs *regs)
813{
814 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
815 return 0;
816 if (iabr == NULL)
817 return 0;
818 xmon_core(regs, 0);
819 return 1;
820}
821
822static int xmon_ipi(struct pt_regs *regs)
823{
824#ifdef CONFIG_SMP
825 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
826 xmon_core(regs, 1);
827#endif
828 return 0;
829}
830
831static int xmon_fault_handler(struct pt_regs *regs)
832{
833 struct bpt *bp;
834 unsigned long offset;
835
836 if (in_xmon && catch_memory_errors)
837 handle_fault(regs); /* doesn't return */
838
839 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
840 bp = in_breakpoint_table(regs->nip, &offset);
841 if (bp != NULL) {
842 regs_set_return_ip(regs, bp->address + offset);
843 atomic_dec(&bp->ref_count);
844 }
845 }
846
847 return 0;
848}
849
850/* Force enable xmon if not already enabled */
851static inline void force_enable_xmon(void)
852{
853 /* Enable xmon hooks if needed */
854 if (!xmon_on) {
855 printf("xmon: Enabling debugger hooks\n");
856 xmon_on = 1;
857 }
858}
859
860static struct bpt *at_breakpoint(unsigned long pc)
861{
862 int i;
863 struct bpt *volatile bp;
864
865 bp = bpts;
866 for (i = 0; i < NBPTS; ++i, ++bp)
867 if (bp->enabled && pc == bp->address)
868 return bp;
869 return NULL;
870}
871
872static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
873{
874 unsigned long off;
875
876 off = nip - (unsigned long)bpt_table;
877 if (off >= sizeof(bpt_table))
878 return NULL;
879 *offp = off & (BPT_SIZE - 1);
880 if (off & 3)
881 return NULL;
882 return bpts + (off / BPT_SIZE);
883}
884
885static struct bpt *new_breakpoint(unsigned long a)
886{
887 struct bpt *bp;
888
889 a &= ~3UL;
890 bp = at_breakpoint(a);
891 if (bp)
892 return bp;
893
894 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
895 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
896 bp->address = a;
897 bp->instr = (void *)(bpt_table + ((bp - bpts) * BPT_WORDS));
898 return bp;
899 }
900 }
901
902 printf("Sorry, no free breakpoints. Please clear one first.\n");
903 return NULL;
904}
905
906static void insert_bpts(void)
907{
908 int i;
909 ppc_inst_t instr, instr2;
910 struct bpt *bp, *bp2;
911
912 bp = bpts;
913 for (i = 0; i < NBPTS; ++i, ++bp) {
914 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
915 continue;
916 if (!mread_instr(bp->address, &instr)) {
917 printf("Couldn't read instruction at %lx, "
918 "disabling breakpoint there\n", bp->address);
919 bp->enabled = 0;
920 continue;
921 }
922 if (!can_single_step(ppc_inst_val(instr))) {
923 printf("Breakpoint at %lx is on an instruction that can't be single stepped, disabling it\n",
924 bp->address);
925 bp->enabled = 0;
926 continue;
927 }
928 /*
929 * Check the address is not a suffix by looking for a prefix in
930 * front of it.
931 */
932 if (mread_instr(bp->address - 4, &instr2) == 8) {
933 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n",
934 bp->address);
935 bp->enabled = 0;
936 continue;
937 }
938 /*
939 * We might still be a suffix - if the prefix has already been
940 * replaced by a breakpoint we won't catch it with the above
941 * test.
942 */
943 bp2 = at_breakpoint(bp->address - 4);
944 if (bp2 && ppc_inst_prefixed(ppc_inst_read(bp2->instr))) {
945 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n",
946 bp->address);
947 bp->enabled = 0;
948 continue;
949 }
950
951 patch_instruction(bp->instr, instr);
952 patch_instruction(ppc_inst_next(bp->instr, bp->instr),
953 ppc_inst(bpinstr));
954 if (bp->enabled & BP_CIABR)
955 continue;
956 if (patch_instruction((u32 *)bp->address,
957 ppc_inst(bpinstr)) != 0) {
958 printf("Couldn't write instruction at %lx, "
959 "disabling breakpoint there\n", bp->address);
960 bp->enabled &= ~BP_TRAP;
961 continue;
962 }
963 }
964}
965
966static void insert_cpu_bpts(void)
967{
968 int i;
969 struct arch_hw_breakpoint brk;
970
971 for (i = 0; i < nr_wp_slots(); i++) {
972 if (dabr[i].enabled) {
973 brk.address = dabr[i].address;
974 brk.type = (dabr[i].enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
975 brk.len = 8;
976 brk.hw_len = 8;
977 __set_breakpoint(i, &brk);
978 }
979 }
980
981 if (iabr)
982 set_ciabr(iabr->address);
983}
984
985static void remove_bpts(void)
986{
987 int i;
988 struct bpt *bp;
989 ppc_inst_t instr;
990
991 bp = bpts;
992 for (i = 0; i < NBPTS; ++i, ++bp) {
993 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
994 continue;
995 if (mread_instr(bp->address, &instr)
996 && ppc_inst_equal(instr, ppc_inst(bpinstr))
997 && patch_instruction(
998 (u32 *)bp->address, ppc_inst_read(bp->instr)) != 0)
999 printf("Couldn't remove breakpoint at %lx\n",
1000 bp->address);
1001 }
1002}
1003
1004static void remove_cpu_bpts(void)
1005{
1006 hw_breakpoint_disable();
1007 write_ciabr(0);
1008}
1009
1010/* Based on uptime_proc_show(). */
1011static void
1012show_uptime(void)
1013{
1014 struct timespec64 uptime;
1015
1016 if (setjmp(bus_error_jmp) == 0) {
1017 catch_memory_errors = 1;
1018 sync();
1019
1020 ktime_get_coarse_boottime_ts64(&uptime);
1021 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec,
1022 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100)));
1023
1024 sync();
1025 __delay(200); \
1026 }
1027 catch_memory_errors = 0;
1028}
1029
1030static void set_lpp_cmd(void)
1031{
1032 unsigned long lpp;
1033
1034 if (!scanhex(&lpp)) {
1035 printf("Invalid number.\n");
1036 lpp = 0;
1037 }
1038 xmon_set_pagination_lpp(lpp);
1039}
1040/* Command interpreting routine */
1041static char *last_cmd;
1042
1043static int
1044cmds(struct pt_regs *excp)
1045{
1046 int cmd = 0;
1047
1048 last_cmd = NULL;
1049 xmon_regs = excp;
1050
1051 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1052
1053 for(;;) {
1054#ifdef CONFIG_SMP
1055 printf("%x:", smp_processor_id());
1056#endif /* CONFIG_SMP */
1057 printf("mon> ");
1058 flush_input();
1059 termch = 0;
1060 cmd = skipbl();
1061 if( cmd == '\n' ) {
1062 if (last_cmd == NULL)
1063 continue;
1064 take_input(last_cmd);
1065 last_cmd = NULL;
1066 cmd = inchar();
1067 }
1068 switch (cmd) {
1069 case 'm':
1070 cmd = inchar();
1071 switch (cmd) {
1072 case 'm':
1073 case 's':
1074 case 'd':
1075 memops(cmd);
1076 break;
1077 case 'l':
1078 memlocate();
1079 break;
1080 case 'z':
1081 if (xmon_is_ro) {
1082 printf(xmon_ro_msg);
1083 break;
1084 }
1085 memzcan();
1086 break;
1087 case 'i':
1088 show_mem();
1089 break;
1090 default:
1091 termch = cmd;
1092 memex();
1093 }
1094 break;
1095 case 'd':
1096 dump();
1097 break;
1098 case 'l':
1099 symbol_lookup();
1100 break;
1101 case 'r':
1102 prregs(excp); /* print regs */
1103 break;
1104 case 'e':
1105 excprint(excp);
1106 break;
1107 case 'S':
1108 super_regs();
1109 break;
1110 case 't':
1111 backtrace(excp);
1112 break;
1113 case 'f':
1114 cacheflush();
1115 break;
1116 case 's':
1117 if (do_spu_cmd() == 0)
1118 break;
1119 if (do_step(excp))
1120 return cmd;
1121 break;
1122 case 'x':
1123 case 'X':
1124 if (tracing_enabled)
1125 tracing_on();
1126 return cmd;
1127 case EOF:
1128 printf(" <no input ...>\n");
1129 mdelay(2000);
1130 return cmd;
1131 case '?':
1132 xmon_puts(help_string);
1133 break;
1134 case '#':
1135 set_lpp_cmd();
1136 break;
1137 case 'b':
1138 bpt_cmds();
1139 break;
1140 case 'C':
1141 csum();
1142 break;
1143 case 'c':
1144 if (cpu_cmd())
1145 return 0;
1146 break;
1147 case 'z':
1148 bootcmds();
1149 break;
1150 case 'p':
1151 if (xmon_is_ro) {
1152 printf(xmon_ro_msg);
1153 break;
1154 }
1155 proccall();
1156 break;
1157 case 'P':
1158 show_tasks();
1159 break;
1160#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_64S_HASH_MMU)
1161 case 'u':
1162 dump_segments();
1163 break;
1164#elif defined(CONFIG_44x)
1165 case 'u':
1166 dump_tlb_44x();
1167 break;
1168#elif defined(CONFIG_PPC_BOOK3E_64)
1169 case 'u':
1170 dump_tlb_book3e();
1171 break;
1172#endif
1173 case 'U':
1174 show_uptime();
1175 break;
1176 default:
1177 printf("Unrecognized command: ");
1178 do {
1179 if (' ' < cmd && cmd <= '~')
1180 putchar(cmd);
1181 else
1182 printf("\\x%x", cmd);
1183 cmd = inchar();
1184 } while (cmd != '\n');
1185 printf(" (type ? for help)\n");
1186 break;
1187 }
1188 }
1189}
1190
1191#ifdef CONFIG_BOOKE
1192static int do_step(struct pt_regs *regs)
1193{
1194 regs_set_return_msr(regs, regs->msr | MSR_DE);
1195 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1196 return 1;
1197}
1198#else
1199/*
1200 * Step a single instruction.
1201 * Some instructions we emulate, others we execute with MSR_SE set.
1202 */
1203static int do_step(struct pt_regs *regs)
1204{
1205 ppc_inst_t instr;
1206 int stepped;
1207
1208 force_enable_xmon();
1209 /* check we are in 64-bit kernel mode, translation enabled */
1210 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1211 if (mread_instr(regs->nip, &instr)) {
1212 stepped = emulate_step(regs, instr);
1213 if (stepped < 0) {
1214 printf("Couldn't single-step %s instruction\n",
1215 (IS_RFID(instr)? "rfid": "mtmsrd"));
1216 return 0;
1217 }
1218 if (stepped > 0) {
1219 set_trap(regs, 0xd00);
1220 printf("stepped to ");
1221 xmon_print_symbol(regs->nip, " ", "\n");
1222 ppc_inst_dump(regs->nip, 1, 0);
1223 return 0;
1224 }
1225 }
1226 }
1227 regs_set_return_msr(regs, regs->msr | MSR_SE);
1228 return 1;
1229}
1230#endif
1231
1232static void bootcmds(void)
1233{
1234 char tmp[64];
1235 int cmd;
1236
1237 cmd = inchar();
1238 if (cmd == 'r') {
1239 getstring(tmp, 64);
1240 ppc_md.restart(tmp);
1241 } else if (cmd == 'h') {
1242 ppc_md.halt();
1243 } else if (cmd == 'p') {
1244 do_kernel_power_off();
1245 }
1246}
1247
1248#ifdef CONFIG_SMP
1249static int xmon_switch_cpu(unsigned long cpu)
1250{
1251 int timeout;
1252
1253 xmon_taken = 0;
1254 mb();
1255 xmon_owner = cpu;
1256 timeout = 10000000;
1257 while (!xmon_taken) {
1258 if (--timeout == 0) {
1259 if (test_and_set_bit(0, &xmon_taken))
1260 break;
1261 /* take control back */
1262 mb();
1263 xmon_owner = smp_processor_id();
1264 printf("cpu 0x%lx didn't take control\n", cpu);
1265 return 0;
1266 }
1267 barrier();
1268 }
1269 return 1;
1270}
1271
1272static int xmon_batch_next_cpu(void)
1273{
1274 unsigned long cpu;
1275
1276 while (!cpumask_empty(&xmon_batch_cpus)) {
1277 cpu = cpumask_next_wrap(smp_processor_id(), &xmon_batch_cpus,
1278 xmon_batch_start_cpu, true);
1279 if (cpu >= nr_cpu_ids)
1280 break;
1281 if (xmon_batch_start_cpu == -1)
1282 xmon_batch_start_cpu = cpu;
1283 if (xmon_switch_cpu(cpu))
1284 return 0;
1285 cpumask_clear_cpu(cpu, &xmon_batch_cpus);
1286 }
1287
1288 xmon_batch = 0;
1289 printf("%x:mon> \n", smp_processor_id());
1290 return 1;
1291}
1292
1293static int batch_cmds(struct pt_regs *excp)
1294{
1295 int cmd;
1296
1297 /* simulate command entry */
1298 cmd = xmon_batch;
1299 termch = '\n';
1300
1301 last_cmd = NULL;
1302 xmon_regs = excp;
1303
1304 printf("%x:", smp_processor_id());
1305 printf("mon> ");
1306 printf("%c\n", (char)cmd);
1307
1308 switch (cmd) {
1309 case 'r':
1310 prregs(excp); /* print regs */
1311 break;
1312 case 'S':
1313 super_regs();
1314 break;
1315 case 't':
1316 backtrace(excp);
1317 break;
1318 }
1319
1320 cpumask_clear_cpu(smp_processor_id(), &xmon_batch_cpus);
1321
1322 return xmon_batch_next_cpu();
1323}
1324
1325static int cpu_cmd(void)
1326{
1327 unsigned long cpu, first_cpu, last_cpu;
1328
1329 cpu = skipbl();
1330 if (cpu == '#') {
1331 xmon_batch = skipbl();
1332 if (xmon_batch) {
1333 switch (xmon_batch) {
1334 case 'r':
1335 case 'S':
1336 case 't':
1337 cpumask_copy(&xmon_batch_cpus, &cpus_in_xmon);
1338 if (cpumask_weight(&xmon_batch_cpus) <= 1) {
1339 printf("There are no other cpus in xmon\n");
1340 break;
1341 }
1342 xmon_batch_start_cpu = -1;
1343 if (!xmon_batch_next_cpu())
1344 return 1;
1345 break;
1346 default:
1347 printf("c# only supports 'r', 'S' and 't' commands\n");
1348 }
1349 xmon_batch = 0;
1350 return 0;
1351 }
1352 }
1353 termch = cpu;
1354
1355 if (!scanhex(&cpu)) {
1356 /* print cpus waiting or in xmon */
1357 printf("cpus stopped:");
1358 last_cpu = first_cpu = NR_CPUS;
1359 for_each_possible_cpu(cpu) {
1360 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1361 if (cpu == last_cpu + 1) {
1362 last_cpu = cpu;
1363 } else {
1364 if (last_cpu != first_cpu)
1365 printf("-0x%lx", last_cpu);
1366 last_cpu = first_cpu = cpu;
1367 printf(" 0x%lx", cpu);
1368 }
1369 }
1370 }
1371 if (last_cpu != first_cpu)
1372 printf("-0x%lx", last_cpu);
1373 printf("\n");
1374 return 0;
1375 }
1376 /* try to switch to cpu specified */
1377 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1378 printf("cpu 0x%lx isn't in xmon\n", cpu);
1379#ifdef CONFIG_PPC64
1380 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu);
1381 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0);
1382#endif
1383 return 0;
1384 }
1385
1386 return xmon_switch_cpu(cpu);
1387}
1388#else
1389static int cpu_cmd(void)
1390{
1391 return 0;
1392}
1393#endif /* CONFIG_SMP */
1394
1395static unsigned short fcstab[256] = {
1396 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1397 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1398 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1399 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1400 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1401 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1402 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1403 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1404 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1405 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1406 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1407 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1408 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1409 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1410 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1411 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1412 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1413 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1414 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1415 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1416 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1417 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1418 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1419 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1420 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1421 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1422 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1423 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1424 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1425 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1426 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1427 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1428};
1429
1430#define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1431
1432static void
1433csum(void)
1434{
1435 unsigned int i;
1436 unsigned short fcs;
1437 unsigned char v;
1438
1439 if (!scanhex(&adrs))
1440 return;
1441 if (!scanhex(&ncsum))
1442 return;
1443 fcs = 0xffff;
1444 for (i = 0; i < ncsum; ++i) {
1445 if (mread(adrs+i, &v, 1) == 0) {
1446 printf("csum stopped at "REG"\n", adrs+i);
1447 break;
1448 }
1449 fcs = FCS(fcs, v);
1450 }
1451 printf("%x\n", fcs);
1452}
1453
1454/*
1455 * Check if this is a suitable place to put a breakpoint.
1456 */
1457static long check_bp_loc(unsigned long addr)
1458{
1459 ppc_inst_t instr;
1460
1461 addr &= ~3;
1462 if (!is_kernel_addr(addr)) {
1463 printf("Breakpoints may only be placed at kernel addresses\n");
1464 return 0;
1465 }
1466 if (!mread_instr(addr, &instr)) {
1467 printf("Can't read instruction at address %lx\n", addr);
1468 return 0;
1469 }
1470 if (!can_single_step(ppc_inst_val(instr))) {
1471 printf("Breakpoints may not be placed on instructions that can't be single stepped\n");
1472 return 0;
1473 }
1474 return 1;
1475}
1476
1477static int find_free_data_bpt(void)
1478{
1479 int i;
1480
1481 for (i = 0; i < nr_wp_slots(); i++) {
1482 if (!dabr[i].enabled)
1483 return i;
1484 }
1485 printf("Couldn't find free breakpoint register\n");
1486 return -1;
1487}
1488
1489static void print_data_bpts(void)
1490{
1491 int i;
1492
1493 for (i = 0; i < nr_wp_slots(); i++) {
1494 if (!dabr[i].enabled)
1495 continue;
1496
1497 printf(" data "REG" [", dabr[i].address);
1498 if (dabr[i].enabled & 1)
1499 printf("r");
1500 if (dabr[i].enabled & 2)
1501 printf("w");
1502 printf("]\n");
1503 }
1504}
1505
1506static char *breakpoint_help_string =
1507 "Breakpoint command usage:\n"
1508 "b show breakpoints\n"
1509 "b <addr> [cnt] set breakpoint at given instr addr\n"
1510 "bc clear all breakpoints\n"
1511 "bc <n/addr> clear breakpoint number n or at addr\n"
1512 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1513 "bd <addr> [cnt] set hardware data breakpoint\n"
1514 "";
1515
1516static void
1517bpt_cmds(void)
1518{
1519 int cmd;
1520 unsigned long a;
1521 int i;
1522 struct bpt *bp;
1523
1524 cmd = inchar();
1525
1526 switch (cmd) {
1527 case 'd': { /* bd - hardware data breakpoint */
1528 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1529 int mode;
1530 if (xmon_is_ro) {
1531 printf(xmon_ro_msg);
1532 break;
1533 }
1534 if (!ppc_breakpoint_available()) {
1535 printf("Hardware data breakpoint not supported on this cpu\n");
1536 break;
1537 }
1538 i = find_free_data_bpt();
1539 if (i < 0)
1540 break;
1541 mode = 7;
1542 cmd = inchar();
1543 if (cmd == 'r')
1544 mode = 5;
1545 else if (cmd == 'w')
1546 mode = 6;
1547 else
1548 termch = cmd;
1549 dabr[i].address = 0;
1550 dabr[i].enabled = 0;
1551 if (scanhex(&dabr[i].address)) {
1552 if (!is_kernel_addr(dabr[i].address)) {
1553 printf(badaddr);
1554 break;
1555 }
1556 dabr[i].address &= ~HW_BRK_TYPE_DABR;
1557 dabr[i].enabled = mode | BP_DABR;
1558 }
1559
1560 force_enable_xmon();
1561 break;
1562 }
1563
1564 case 'i': /* bi - hardware instr breakpoint */
1565 if (xmon_is_ro) {
1566 printf(xmon_ro_msg);
1567 break;
1568 }
1569 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1570 printf("Hardware instruction breakpoint "
1571 "not supported on this cpu\n");
1572 break;
1573 }
1574 if (iabr) {
1575 iabr->enabled &= ~BP_CIABR;
1576 iabr = NULL;
1577 }
1578 if (!scanhex(&a))
1579 break;
1580 if (!check_bp_loc(a))
1581 break;
1582 bp = new_breakpoint(a);
1583 if (bp != NULL) {
1584 bp->enabled |= BP_CIABR;
1585 iabr = bp;
1586 force_enable_xmon();
1587 }
1588 break;
1589
1590 case 'c':
1591 if (!scanhex(&a)) {
1592 /* clear all breakpoints */
1593 for (i = 0; i < NBPTS; ++i)
1594 bpts[i].enabled = 0;
1595 iabr = NULL;
1596 for (i = 0; i < nr_wp_slots(); i++)
1597 dabr[i].enabled = 0;
1598
1599 printf("All breakpoints cleared\n");
1600 break;
1601 }
1602
1603 if (a <= NBPTS && a >= 1) {
1604 /* assume a breakpoint number */
1605 bp = &bpts[a-1]; /* bp nums are 1 based */
1606 } else {
1607 /* assume a breakpoint address */
1608 bp = at_breakpoint(a);
1609 if (bp == NULL) {
1610 printf("No breakpoint at %lx\n", a);
1611 break;
1612 }
1613 }
1614
1615 printf("Cleared breakpoint %tx (", BP_NUM(bp));
1616 xmon_print_symbol(bp->address, " ", ")\n");
1617 bp->enabled = 0;
1618 break;
1619
1620 default:
1621 termch = cmd;
1622 cmd = skipbl();
1623 if (cmd == '?') {
1624 printf(breakpoint_help_string);
1625 break;
1626 }
1627 termch = cmd;
1628
1629 if (xmon_is_ro || !scanhex(&a)) {
1630 /* print all breakpoints */
1631 printf(" type address\n");
1632 print_data_bpts();
1633 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1634 if (!bp->enabled)
1635 continue;
1636 printf("%tx %s ", BP_NUM(bp),
1637 (bp->enabled & BP_CIABR) ? "inst": "trap");
1638 xmon_print_symbol(bp->address, " ", "\n");
1639 }
1640 break;
1641 }
1642
1643 if (!check_bp_loc(a))
1644 break;
1645 bp = new_breakpoint(a);
1646 if (bp != NULL) {
1647 bp->enabled |= BP_TRAP;
1648 force_enable_xmon();
1649 }
1650 break;
1651 }
1652}
1653
1654/* Very cheap human name for vector lookup. */
1655static
1656const char *getvecname(unsigned long vec)
1657{
1658 char *ret;
1659
1660 switch (vec) {
1661 case 0x100: ret = "(System Reset)"; break;
1662 case 0x200: ret = "(Machine Check)"; break;
1663 case 0x300: ret = "(Data Access)"; break;
1664 case 0x380:
1665 if (radix_enabled())
1666 ret = "(Data Access Out of Range)";
1667 else
1668 ret = "(Data SLB Access)";
1669 break;
1670 case 0x400: ret = "(Instruction Access)"; break;
1671 case 0x480:
1672 if (radix_enabled())
1673 ret = "(Instruction Access Out of Range)";
1674 else
1675 ret = "(Instruction SLB Access)";
1676 break;
1677 case 0x500: ret = "(Hardware Interrupt)"; break;
1678 case 0x600: ret = "(Alignment)"; break;
1679 case 0x700: ret = "(Program Check)"; break;
1680 case 0x800: ret = "(FPU Unavailable)"; break;
1681 case 0x900: ret = "(Decrementer)"; break;
1682 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1683 case 0xa00: ret = "(Doorbell)"; break;
1684 case 0xc00: ret = "(System Call)"; break;
1685 case 0xd00: ret = "(Single Step)"; break;
1686 case 0xe40: ret = "(Emulation Assist)"; break;
1687 case 0xe60: ret = "(HMI)"; break;
1688 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1689 case 0xf00: ret = "(Performance Monitor)"; break;
1690 case 0xf20: ret = "(Altivec Unavailable)"; break;
1691 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1692 case 0x1500: ret = "(Denormalisation)"; break;
1693 case 0x1700: ret = "(Altivec Assist)"; break;
1694 case 0x3000: ret = "(System Call Vectored)"; break;
1695 default: ret = "";
1696 }
1697 return ret;
1698}
1699
1700static void get_function_bounds(unsigned long pc, unsigned long *startp,
1701 unsigned long *endp)
1702{
1703 unsigned long size, offset;
1704 const char *name;
1705
1706 *startp = *endp = 0;
1707 if (pc == 0)
1708 return;
1709 if (setjmp(bus_error_jmp) == 0) {
1710 catch_memory_errors = 1;
1711 sync();
1712 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1713 if (name != NULL) {
1714 *startp = pc - offset;
1715 *endp = pc - offset + size;
1716 }
1717 sync();
1718 }
1719 catch_memory_errors = 0;
1720}
1721
1722#define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1723
1724static void xmon_show_stack(unsigned long sp, unsigned long lr,
1725 unsigned long pc)
1726{
1727 int max_to_print = 64;
1728 unsigned long ip;
1729 unsigned long newsp;
1730 unsigned long marker;
1731 struct pt_regs regs;
1732
1733 while (max_to_print--) {
1734 if (!is_kernel_addr(sp)) {
1735 if (sp != 0)
1736 printf("SP (%lx) is in userspace\n", sp);
1737 break;
1738 }
1739
1740 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1741 || !mread(sp, &newsp, sizeof(unsigned long))) {
1742 printf("Couldn't read stack frame at %lx\n", sp);
1743 break;
1744 }
1745
1746 /*
1747 * For the first stack frame, try to work out if
1748 * LR and/or the saved LR value in the bottommost
1749 * stack frame are valid.
1750 */
1751 if ((pc | lr) != 0) {
1752 unsigned long fnstart, fnend;
1753 unsigned long nextip;
1754 int printip = 1;
1755
1756 get_function_bounds(pc, &fnstart, &fnend);
1757 nextip = 0;
1758 if (newsp > sp)
1759 mread(newsp + LRSAVE_OFFSET, &nextip,
1760 sizeof(unsigned long));
1761 if (lr == ip) {
1762 if (!is_kernel_addr(lr)
1763 || (fnstart <= lr && lr < fnend))
1764 printip = 0;
1765 } else if (lr == nextip) {
1766 printip = 0;
1767 } else if (is_kernel_addr(lr)
1768 && !(fnstart <= lr && lr < fnend)) {
1769 printf("[link register ] ");
1770 xmon_print_symbol(lr, " ", "\n");
1771 }
1772 if (printip) {
1773 printf("["REG"] ", sp);
1774 xmon_print_symbol(ip, " ", " (unreliable)\n");
1775 }
1776 pc = lr = 0;
1777
1778 } else {
1779 printf("["REG"] ", sp);
1780 xmon_print_symbol(ip, " ", "\n");
1781 }
1782
1783 /* Look for "regs" marker to see if this is
1784 an exception frame. */
1785 if (mread(sp + STACK_INT_FRAME_MARKER, &marker, sizeof(unsigned long))
1786 && marker == STACK_FRAME_REGS_MARKER) {
1787 if (mread(sp + STACK_INT_FRAME_REGS, ®s, sizeof(regs)) != sizeof(regs)) {
1788 printf("Couldn't read registers at %lx\n",
1789 sp + STACK_INT_FRAME_REGS);
1790 break;
1791 }
1792 printf("--- Exception: %lx %s at ", regs.trap,
1793 getvecname(TRAP(®s)));
1794 pc = regs.nip;
1795 lr = regs.link;
1796 xmon_print_symbol(pc, " ", "\n");
1797 }
1798
1799 if (newsp == 0)
1800 break;
1801
1802 sp = newsp;
1803 }
1804}
1805
1806static void backtrace(struct pt_regs *excp)
1807{
1808 unsigned long sp;
1809
1810 if (scanhex(&sp))
1811 xmon_show_stack(sp, 0, 0);
1812 else
1813 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1814 scannl();
1815}
1816
1817static void print_bug_trap(struct pt_regs *regs)
1818{
1819#ifdef CONFIG_BUG
1820 const struct bug_entry *bug;
1821 unsigned long addr;
1822
1823 if (regs->msr & MSR_PR)
1824 return; /* not in kernel */
1825 addr = regs->nip; /* address of trap instruction */
1826 if (!is_kernel_addr(addr))
1827 return;
1828 bug = find_bug(regs->nip);
1829 if (bug == NULL)
1830 return;
1831 if (is_warning_bug(bug))
1832 return;
1833
1834#ifdef CONFIG_DEBUG_BUGVERBOSE
1835 printf("kernel BUG at %s:%u!\n",
1836 (char *)bug + bug->file_disp, bug->line);
1837#else
1838 printf("kernel BUG at %px!\n", (void *)bug + bug->bug_addr_disp);
1839#endif
1840#endif /* CONFIG_BUG */
1841}
1842
1843static void excprint(struct pt_regs *fp)
1844{
1845 unsigned long trap;
1846
1847#ifdef CONFIG_SMP
1848 printf("cpu 0x%x: ", smp_processor_id());
1849#endif /* CONFIG_SMP */
1850
1851 trap = TRAP(fp);
1852 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp);
1853 printf(" pc: ");
1854 xmon_print_symbol(fp->nip, ": ", "\n");
1855
1856 printf(" lr: ");
1857 xmon_print_symbol(fp->link, ": ", "\n");
1858
1859 printf(" sp: %lx\n", fp->gpr[1]);
1860 printf(" msr: %lx\n", fp->msr);
1861
1862 if (trap == INTERRUPT_DATA_STORAGE ||
1863 trap == INTERRUPT_DATA_SEGMENT ||
1864 trap == INTERRUPT_ALIGNMENT ||
1865 trap == INTERRUPT_MACHINE_CHECK) {
1866 printf(" dar: %lx\n", fp->dar);
1867 if (trap != INTERRUPT_DATA_SEGMENT)
1868 printf(" dsisr: %lx\n", fp->dsisr);
1869 }
1870
1871 printf(" current = 0x%px\n", current);
1872#ifdef CONFIG_PPC64
1873 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n",
1874 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened);
1875#endif
1876 if (current) {
1877 printf(" pid = %d, comm = %s\n",
1878 current->pid, current->comm);
1879 }
1880
1881 if (trap == INTERRUPT_PROGRAM)
1882 print_bug_trap(fp);
1883
1884 printf(linux_banner);
1885}
1886
1887static void prregs(struct pt_regs *fp)
1888{
1889 int n, trap;
1890 unsigned long base;
1891 struct pt_regs regs;
1892
1893 if (scanhex(&base)) {
1894 if (setjmp(bus_error_jmp) == 0) {
1895 catch_memory_errors = 1;
1896 sync();
1897 regs = *(struct pt_regs *)base;
1898 sync();
1899 __delay(200);
1900 } else {
1901 catch_memory_errors = 0;
1902 printf("*** Error reading registers from "REG"\n",
1903 base);
1904 return;
1905 }
1906 catch_memory_errors = 0;
1907 fp = ®s;
1908 }
1909
1910#ifdef CONFIG_PPC64
1911#define R_PER_LINE 2
1912#else
1913#define R_PER_LINE 4
1914#endif
1915
1916 for (n = 0; n < 32; ++n) {
1917 printf("R%.2d = "REG"%s", n, fp->gpr[n],
1918 (n % R_PER_LINE) == R_PER_LINE - 1 ? "\n" : " ");
1919 }
1920
1921 printf("pc = ");
1922 xmon_print_symbol(fp->nip, " ", "\n");
1923 if (!trap_is_syscall(fp) && cpu_has_feature(CPU_FTR_CFAR)) {
1924 printf("cfar= ");
1925 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1926 }
1927 printf("lr = ");
1928 xmon_print_symbol(fp->link, " ", "\n");
1929 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1930 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1931 fp->ctr, fp->xer, fp->trap);
1932 trap = TRAP(fp);
1933 if (trap == INTERRUPT_DATA_STORAGE ||
1934 trap == INTERRUPT_DATA_SEGMENT ||
1935 trap == INTERRUPT_ALIGNMENT)
1936 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1937}
1938
1939static void cacheflush(void)
1940{
1941 int cmd;
1942 unsigned long nflush;
1943
1944 cmd = inchar();
1945 if (cmd != 'i')
1946 termch = cmd;
1947 scanhex((void *)&adrs);
1948 if (termch != '\n')
1949 termch = 0;
1950 nflush = 1;
1951 scanhex(&nflush);
1952 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1953 if (setjmp(bus_error_jmp) == 0) {
1954 catch_memory_errors = 1;
1955 sync();
1956
1957 if (cmd != 'i' || IS_ENABLED(CONFIG_PPC_BOOK3S_64)) {
1958 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1959 cflush((void *) adrs);
1960 } else {
1961 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1962 cinval((void *) adrs);
1963 }
1964 sync();
1965 /* wait a little while to see if we get a machine check */
1966 __delay(200);
1967 }
1968 catch_memory_errors = 0;
1969}
1970
1971extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1972extern void xmon_mtspr(int spr, unsigned long value);
1973
1974static int
1975read_spr(int n, unsigned long *vp)
1976{
1977 unsigned long ret = -1UL;
1978 int ok = 0;
1979
1980 if (setjmp(bus_error_jmp) == 0) {
1981 catch_spr_faults = 1;
1982 sync();
1983
1984 ret = xmon_mfspr(n, *vp);
1985
1986 sync();
1987 *vp = ret;
1988 ok = 1;
1989 }
1990 catch_spr_faults = 0;
1991
1992 return ok;
1993}
1994
1995static void
1996write_spr(int n, unsigned long val)
1997{
1998 if (xmon_is_ro) {
1999 printf(xmon_ro_msg);
2000 return;
2001 }
2002
2003 if (setjmp(bus_error_jmp) == 0) {
2004 catch_spr_faults = 1;
2005 sync();
2006
2007 xmon_mtspr(n, val);
2008
2009 sync();
2010 } else {
2011 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
2012 }
2013 catch_spr_faults = 0;
2014}
2015
2016static void dump_206_sprs(void)
2017{
2018#ifdef CONFIG_PPC64
2019 if (!cpu_has_feature(CPU_FTR_ARCH_206))
2020 return;
2021
2022 /* Actually some of these pre-date 2.06, but whatever */
2023
2024 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n",
2025 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
2026 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n",
2027 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
2028 printf("amr = %.16lx uamor = %.16lx\n",
2029 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
2030
2031 if (!(mfmsr() & MSR_HV))
2032 return;
2033
2034 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n",
2035 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
2036 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
2037 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
2038 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n",
2039 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
2040 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
2041 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
2042 printf("dabr = %.16lx dabrx = %.16lx\n",
2043 mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
2044#endif
2045}
2046
2047static void dump_207_sprs(void)
2048{
2049#ifdef CONFIG_PPC64
2050 unsigned long msr;
2051
2052 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2053 return;
2054
2055 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n",
2056 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
2057
2058 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n",
2059 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
2060
2061 msr = mfmsr();
2062 if (msr & MSR_TM) {
2063 /* Only if TM has been enabled in the kernel */
2064 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n",
2065 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
2066 mfspr(SPRN_TEXASR));
2067 }
2068
2069 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n",
2070 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
2071 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n",
2072 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
2073 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
2074 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n",
2075 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
2076 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n",
2077 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
2078 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
2079 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
2080 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
2081
2082 if (!(msr & MSR_HV))
2083 return;
2084
2085 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
2086 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
2087 printf("dawr0 = %.16lx dawrx0 = %.16lx\n",
2088 mfspr(SPRN_DAWR0), mfspr(SPRN_DAWRX0));
2089 if (nr_wp_slots() > 1) {
2090 printf("dawr1 = %.16lx dawrx1 = %.16lx\n",
2091 mfspr(SPRN_DAWR1), mfspr(SPRN_DAWRX1));
2092 }
2093 printf("ciabr = %.16lx\n", mfspr(SPRN_CIABR));
2094#endif
2095}
2096
2097static void dump_300_sprs(void)
2098{
2099#ifdef CONFIG_PPC64
2100 bool hv = mfmsr() & MSR_HV;
2101
2102 if (!cpu_has_feature(CPU_FTR_ARCH_300))
2103 return;
2104
2105 if (cpu_has_feature(CPU_FTR_P9_TIDR)) {
2106 printf("pidr = %.16lx tidr = %.16lx\n",
2107 mfspr(SPRN_PID), mfspr(SPRN_TIDR));
2108 } else {
2109 printf("pidr = %.16lx\n",
2110 mfspr(SPRN_PID));
2111 }
2112
2113 printf("psscr = %.16lx\n",
2114 hv ? mfspr(SPRN_PSSCR) : mfspr(SPRN_PSSCR_PR));
2115
2116 if (!hv)
2117 return;
2118
2119 printf("ptcr = %.16lx asdr = %.16lx\n",
2120 mfspr(SPRN_PTCR), mfspr(SPRN_ASDR));
2121#endif
2122}
2123
2124static void dump_310_sprs(void)
2125{
2126#ifdef CONFIG_PPC64
2127 if (!cpu_has_feature(CPU_FTR_ARCH_31))
2128 return;
2129
2130 printf("mmcr3 = %.16lx, sier2 = %.16lx, sier3 = %.16lx\n",
2131 mfspr(SPRN_MMCR3), mfspr(SPRN_SIER2), mfspr(SPRN_SIER3));
2132
2133#endif
2134}
2135
2136static void dump_one_spr(int spr, bool show_unimplemented)
2137{
2138 unsigned long val;
2139
2140 val = 0xdeadbeef;
2141 if (!read_spr(spr, &val)) {
2142 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
2143 return;
2144 }
2145
2146 if (val == 0xdeadbeef) {
2147 /* Looks like read was a nop, confirm */
2148 val = 0x0badcafe;
2149 if (!read_spr(spr, &val)) {
2150 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
2151 return;
2152 }
2153
2154 if (val == 0x0badcafe) {
2155 if (show_unimplemented)
2156 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
2157 return;
2158 }
2159 }
2160
2161 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
2162}
2163
2164static void super_regs(void)
2165{
2166 static unsigned long regno;
2167 int cmd;
2168 int spr;
2169
2170 cmd = skipbl();
2171
2172 switch (cmd) {
2173 case '\n': {
2174 unsigned long sp, toc;
2175 asm("mr %0,1" : "=r" (sp) :);
2176 asm("mr %0,2" : "=r" (toc) :);
2177
2178 printf("msr = "REG" sprg0 = "REG"\n",
2179 mfmsr(), mfspr(SPRN_SPRG0));
2180 printf("pvr = "REG" sprg1 = "REG"\n",
2181 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
2182 printf("dec = "REG" sprg2 = "REG"\n",
2183 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
2184 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
2185 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
2186
2187 dump_206_sprs();
2188 dump_207_sprs();
2189 dump_300_sprs();
2190 dump_310_sprs();
2191
2192 return;
2193 }
2194 case 'w': {
2195 unsigned long val;
2196 scanhex(®no);
2197 val = 0;
2198 read_spr(regno, &val);
2199 scanhex(&val);
2200 write_spr(regno, val);
2201 dump_one_spr(regno, true);
2202 break;
2203 }
2204 case 'r':
2205 scanhex(®no);
2206 dump_one_spr(regno, true);
2207 break;
2208 case 'a':
2209 /* dump ALL SPRs */
2210 for (spr = 1; spr < 1024; ++spr)
2211 dump_one_spr(spr, false);
2212 break;
2213 }
2214
2215 scannl();
2216}
2217
2218/*
2219 * Stuff for reading and writing memory safely
2220 */
2221static int
2222mread(unsigned long adrs, void *buf, int size)
2223{
2224 volatile int n;
2225 char *p, *q;
2226
2227 n = 0;
2228 if (setjmp(bus_error_jmp) == 0) {
2229 catch_memory_errors = 1;
2230 sync();
2231 p = (char *)adrs;
2232 q = (char *)buf;
2233 switch (size) {
2234 case 2:
2235 *(u16 *)q = *(u16 *)p;
2236 break;
2237 case 4:
2238 *(u32 *)q = *(u32 *)p;
2239 break;
2240 case 8:
2241 *(u64 *)q = *(u64 *)p;
2242 break;
2243 default:
2244 for( ; n < size; ++n) {
2245 *q++ = *p++;
2246 sync();
2247 }
2248 }
2249 sync();
2250 /* wait a little while to see if we get a machine check */
2251 __delay(200);
2252 n = size;
2253 }
2254 catch_memory_errors = 0;
2255 return n;
2256}
2257
2258static int
2259mwrite(unsigned long adrs, void *buf, int size)
2260{
2261 volatile int n;
2262 char *p, *q;
2263
2264 n = 0;
2265
2266 if (xmon_is_ro) {
2267 printf(xmon_ro_msg);
2268 return n;
2269 }
2270
2271 if (setjmp(bus_error_jmp) == 0) {
2272 catch_memory_errors = 1;
2273 sync();
2274 p = (char *) adrs;
2275 q = (char *) buf;
2276 switch (size) {
2277 case 2:
2278 *(u16 *)p = *(u16 *)q;
2279 break;
2280 case 4:
2281 *(u32 *)p = *(u32 *)q;
2282 break;
2283 case 8:
2284 *(u64 *)p = *(u64 *)q;
2285 break;
2286 default:
2287 for ( ; n < size; ++n) {
2288 *p++ = *q++;
2289 sync();
2290 }
2291 }
2292 sync();
2293 /* wait a little while to see if we get a machine check */
2294 __delay(200);
2295 n = size;
2296 } else {
2297 printf("*** Error writing address "REG"\n", adrs + n);
2298 }
2299 catch_memory_errors = 0;
2300 return n;
2301}
2302
2303static int
2304mread_instr(unsigned long adrs, ppc_inst_t *instr)
2305{
2306 volatile int n;
2307
2308 n = 0;
2309 if (setjmp(bus_error_jmp) == 0) {
2310 catch_memory_errors = 1;
2311 sync();
2312 *instr = ppc_inst_read((u32 *)adrs);
2313 sync();
2314 /* wait a little while to see if we get a machine check */
2315 __delay(200);
2316 n = ppc_inst_len(*instr);
2317 }
2318 catch_memory_errors = 0;
2319 return n;
2320}
2321
2322static int fault_type;
2323static int fault_except;
2324static char *fault_chars[] = { "--", "**", "##" };
2325
2326static int handle_fault(struct pt_regs *regs)
2327{
2328 fault_except = TRAP(regs);
2329 switch (TRAP(regs)) {
2330 case 0x200:
2331 fault_type = 0;
2332 break;
2333 case 0x300:
2334 case 0x380:
2335 fault_type = 1;
2336 break;
2337 default:
2338 fault_type = 2;
2339 }
2340
2341 longjmp(bus_error_jmp, 1);
2342
2343 return 0;
2344}
2345
2346#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
2347
2348static void
2349byterev(unsigned char *val, int size)
2350{
2351 int t;
2352
2353 switch (size) {
2354 case 2:
2355 SWAP(val[0], val[1], t);
2356 break;
2357 case 4:
2358 SWAP(val[0], val[3], t);
2359 SWAP(val[1], val[2], t);
2360 break;
2361 case 8: /* is there really any use for this? */
2362 SWAP(val[0], val[7], t);
2363 SWAP(val[1], val[6], t);
2364 SWAP(val[2], val[5], t);
2365 SWAP(val[3], val[4], t);
2366 break;
2367 }
2368}
2369
2370static int brev;
2371static int mnoread;
2372
2373static char *memex_help_string =
2374 "Memory examine command usage:\n"
2375 "m [addr] [flags] examine/change memory\n"
2376 " addr is optional. will start where left off.\n"
2377 " flags may include chars from this set:\n"
2378 " b modify by bytes (default)\n"
2379 " w modify by words (2 byte)\n"
2380 " l modify by longs (4 byte)\n"
2381 " d modify by doubleword (8 byte)\n"
2382 " r toggle reverse byte order mode\n"
2383 " n do not read memory (for i/o spaces)\n"
2384 " . ok to read (default)\n"
2385 "NOTE: flags are saved as defaults\n"
2386 "";
2387
2388static char *memex_subcmd_help_string =
2389 "Memory examine subcommands:\n"
2390 " hexval write this val to current location\n"
2391 " 'string' write chars from string to this location\n"
2392 " ' increment address\n"
2393 " ^ decrement address\n"
2394 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
2395 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
2396 " ` clear no-read flag\n"
2397 " ; stay at this addr\n"
2398 " v change to byte mode\n"
2399 " w change to word (2 byte) mode\n"
2400 " l change to long (4 byte) mode\n"
2401 " u change to doubleword (8 byte) mode\n"
2402 " m addr change current addr\n"
2403 " n toggle no-read flag\n"
2404 " r toggle byte reverse flag\n"
2405 " < count back up count bytes\n"
2406 " > count skip forward count bytes\n"
2407 " x exit this mode\n"
2408 "";
2409
2410static void
2411memex(void)
2412{
2413 int cmd, inc, i, nslash;
2414 unsigned long n;
2415 unsigned char val[16];
2416
2417 scanhex((void *)&adrs);
2418 cmd = skipbl();
2419 if (cmd == '?') {
2420 printf(memex_help_string);
2421 return;
2422 } else {
2423 termch = cmd;
2424 }
2425 last_cmd = "m\n";
2426 while ((cmd = skipbl()) != '\n') {
2427 switch( cmd ){
2428 case 'b': size = 1; break;
2429 case 'w': size = 2; break;
2430 case 'l': size = 4; break;
2431 case 'd': size = 8; break;
2432 case 'r': brev = !brev; break;
2433 case 'n': mnoread = 1; break;
2434 case '.': mnoread = 0; break;
2435 }
2436 }
2437 if( size <= 0 )
2438 size = 1;
2439 else if( size > 8 )
2440 size = 8;
2441 for(;;){
2442 if (!mnoread)
2443 n = mread(adrs, val, size);
2444 printf(REG"%c", adrs, brev? 'r': ' ');
2445 if (!mnoread) {
2446 if (brev)
2447 byterev(val, size);
2448 putchar(' ');
2449 for (i = 0; i < n; ++i)
2450 printf("%.2x", val[i]);
2451 for (; i < size; ++i)
2452 printf("%s", fault_chars[fault_type]);
2453 }
2454 putchar(' ');
2455 inc = size;
2456 nslash = 0;
2457 for(;;){
2458 if( scanhex(&n) ){
2459 for (i = 0; i < size; ++i)
2460 val[i] = n >> (i * 8);
2461 if (!brev)
2462 byterev(val, size);
2463 mwrite(adrs, val, size);
2464 inc = size;
2465 }
2466 cmd = skipbl();
2467 if (cmd == '\n')
2468 break;
2469 inc = 0;
2470 switch (cmd) {
2471 case '\'':
2472 for(;;){
2473 n = inchar();
2474 if( n == '\\' )
2475 n = bsesc();
2476 else if( n == '\'' )
2477 break;
2478 for (i = 0; i < size; ++i)
2479 val[i] = n >> (i * 8);
2480 if (!brev)
2481 byterev(val, size);
2482 mwrite(adrs, val, size);
2483 adrs += size;
2484 }
2485 adrs -= size;
2486 inc = size;
2487 break;
2488 case ',':
2489 adrs += size;
2490 break;
2491 case '.':
2492 mnoread = 0;
2493 break;
2494 case ';':
2495 break;
2496 case 'x':
2497 case EOF:
2498 scannl();
2499 return;
2500 case 'b':
2501 case 'v':
2502 size = 1;
2503 break;
2504 case 'w':
2505 size = 2;
2506 break;
2507 case 'l':
2508 size = 4;
2509 break;
2510 case 'u':
2511 size = 8;
2512 break;
2513 case '^':
2514 adrs -= size;
2515 break;
2516 case '/':
2517 if (nslash > 0)
2518 adrs -= 1 << nslash;
2519 else
2520 nslash = 0;
2521 nslash += 4;
2522 adrs += 1 << nslash;
2523 break;
2524 case '\\':
2525 if (nslash < 0)
2526 adrs += 1 << -nslash;
2527 else
2528 nslash = 0;
2529 nslash -= 4;
2530 adrs -= 1 << -nslash;
2531 break;
2532 case 'm':
2533 scanhex((void *)&adrs);
2534 break;
2535 case 'n':
2536 mnoread = 1;
2537 break;
2538 case 'r':
2539 brev = !brev;
2540 break;
2541 case '<':
2542 n = size;
2543 scanhex(&n);
2544 adrs -= n;
2545 break;
2546 case '>':
2547 n = size;
2548 scanhex(&n);
2549 adrs += n;
2550 break;
2551 case '?':
2552 printf(memex_subcmd_help_string);
2553 break;
2554 }
2555 }
2556 adrs += inc;
2557 }
2558}
2559
2560static int
2561bsesc(void)
2562{
2563 int c;
2564
2565 c = inchar();
2566 switch( c ){
2567 case 'n': c = '\n'; break;
2568 case 'r': c = '\r'; break;
2569 case 'b': c = '\b'; break;
2570 case 't': c = '\t'; break;
2571 }
2572 return c;
2573}
2574
2575static void xmon_rawdump (unsigned long adrs, long ndump)
2576{
2577 long n, m, r, nr;
2578 unsigned char temp[16];
2579
2580 for (n = ndump; n > 0;) {
2581 r = n < 16? n: 16;
2582 nr = mread(adrs, temp, r);
2583 adrs += nr;
2584 for (m = 0; m < r; ++m) {
2585 if (m < nr)
2586 printf("%.2x", temp[m]);
2587 else
2588 printf("%s", fault_chars[fault_type]);
2589 }
2590 n -= r;
2591 if (nr < r)
2592 break;
2593 }
2594 printf("\n");
2595}
2596
2597static void dump_tracing(void)
2598{
2599 int c;
2600
2601 c = inchar();
2602 if (c == 'c')
2603 ftrace_dump(DUMP_ORIG);
2604 else
2605 ftrace_dump(DUMP_ALL);
2606}
2607
2608#ifdef CONFIG_PPC64
2609static void dump_one_paca(int cpu)
2610{
2611 struct paca_struct *p;
2612#ifdef CONFIG_PPC_64S_HASH_MMU
2613 int i = 0;
2614#endif
2615
2616 if (setjmp(bus_error_jmp) != 0) {
2617 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2618 return;
2619 }
2620
2621 catch_memory_errors = 1;
2622 sync();
2623
2624 p = paca_ptrs[cpu];
2625
2626 printf("paca for cpu 0x%x @ %px:\n", cpu, p);
2627
2628 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no");
2629 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no");
2630 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no");
2631
2632#define DUMP(paca, name, format) \
2633 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \
2634 offsetof(struct paca_struct, name));
2635
2636 DUMP(p, lock_token, "%#-*x");
2637 DUMP(p, paca_index, "%#-*x");
2638#ifndef CONFIG_PPC_KERNEL_PCREL
2639 DUMP(p, kernel_toc, "%#-*llx");
2640#endif
2641 DUMP(p, kernelbase, "%#-*llx");
2642 DUMP(p, kernel_msr, "%#-*llx");
2643 DUMP(p, emergency_sp, "%-*px");
2644#ifdef CONFIG_PPC_BOOK3S_64
2645 DUMP(p, nmi_emergency_sp, "%-*px");
2646 DUMP(p, mc_emergency_sp, "%-*px");
2647 DUMP(p, in_nmi, "%#-*x");
2648 DUMP(p, in_mce, "%#-*x");
2649 DUMP(p, hmi_event_available, "%#-*x");
2650#endif
2651 DUMP(p, data_offset, "%#-*llx");
2652 DUMP(p, hw_cpu_id, "%#-*x");
2653 DUMP(p, cpu_start, "%#-*x");
2654 DUMP(p, kexec_state, "%#-*x");
2655#ifdef CONFIG_PPC_BOOK3S_64
2656#ifdef CONFIG_PPC_64S_HASH_MMU
2657 if (!early_radix_enabled()) {
2658 for (i = 0; i < SLB_NUM_BOLTED; i++) {
2659 u64 esid, vsid;
2660
2661 if (!p->slb_shadow_ptr)
2662 continue;
2663
2664 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2665 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2666
2667 if (esid || vsid) {
2668 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n",
2669 22, "slb_shadow", i, esid, vsid);
2670 }
2671 }
2672 DUMP(p, vmalloc_sllp, "%#-*x");
2673 DUMP(p, stab_rr, "%#-*x");
2674 DUMP(p, slb_used_bitmap, "%#-*x");
2675 DUMP(p, slb_kern_bitmap, "%#-*x");
2676
2677 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
2678 DUMP(p, slb_cache_ptr, "%#-*x");
2679 for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2680 printf(" %-*s[%d] = 0x%016x\n",
2681 22, "slb_cache", i, p->slb_cache[i]);
2682 }
2683 }
2684#endif
2685
2686 DUMP(p, rfi_flush_fallback_area, "%-*px");
2687#endif
2688 DUMP(p, dscr_default, "%#-*llx");
2689#ifdef CONFIG_PPC_BOOK3E_64
2690 DUMP(p, pgd, "%-*px");
2691 DUMP(p, kernel_pgd, "%-*px");
2692 DUMP(p, tcd_ptr, "%-*px");
2693 DUMP(p, mc_kstack, "%-*px");
2694 DUMP(p, crit_kstack, "%-*px");
2695 DUMP(p, dbg_kstack, "%-*px");
2696#endif
2697 DUMP(p, __current, "%-*px");
2698 DUMP(p, kstack, "%#-*llx");
2699 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1));
2700#ifdef CONFIG_STACKPROTECTOR
2701 DUMP(p, canary, "%#-*lx");
2702#endif
2703 DUMP(p, saved_r1, "%#-*llx");
2704#ifdef CONFIG_PPC_BOOK3E_64
2705 DUMP(p, trap_save, "%#-*x");
2706#endif
2707 DUMP(p, irq_soft_mask, "%#-*x");
2708 DUMP(p, irq_happened, "%#-*x");
2709#ifdef CONFIG_MMIOWB
2710 DUMP(p, mmiowb_state.nesting_count, "%#-*x");
2711 DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x");
2712#endif
2713 DUMP(p, irq_work_pending, "%#-*x");
2714 DUMP(p, sprg_vdso, "%#-*llx");
2715
2716#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2717 DUMP(p, tm_scratch, "%#-*llx");
2718#endif
2719
2720#ifdef CONFIG_PPC_POWERNV
2721 DUMP(p, idle_state, "%#-*lx");
2722 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
2723 DUMP(p, thread_idle_state, "%#-*x");
2724 DUMP(p, subcore_sibling_mask, "%#-*x");
2725 } else {
2726#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
2727 DUMP(p, requested_psscr, "%#-*llx");
2728 DUMP(p, dont_stop.counter, "%#-*x");
2729#endif
2730 }
2731#endif
2732
2733 DUMP(p, accounting.utime, "%#-*lx");
2734 DUMP(p, accounting.stime, "%#-*lx");
2735#ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME
2736 DUMP(p, accounting.utime_scaled, "%#-*lx");
2737#endif
2738 DUMP(p, accounting.starttime, "%#-*lx");
2739 DUMP(p, accounting.starttime_user, "%#-*lx");
2740#ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME
2741 DUMP(p, accounting.startspurr, "%#-*lx");
2742 DUMP(p, accounting.utime_sspurr, "%#-*lx");
2743#endif
2744 DUMP(p, accounting.steal_time, "%#-*lx");
2745#undef DUMP
2746
2747 catch_memory_errors = 0;
2748 sync();
2749}
2750
2751static void dump_all_pacas(void)
2752{
2753 int cpu;
2754
2755 if (num_possible_cpus() == 0) {
2756 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2757 return;
2758 }
2759
2760 for_each_possible_cpu(cpu)
2761 dump_one_paca(cpu);
2762}
2763
2764static void dump_pacas(void)
2765{
2766 unsigned long num;
2767 int c;
2768
2769 c = inchar();
2770 if (c == 'a') {
2771 dump_all_pacas();
2772 return;
2773 }
2774
2775 termch = c; /* Put c back, it wasn't 'a' */
2776
2777 if (scanhex(&num))
2778 dump_one_paca(num);
2779 else
2780 dump_one_paca(xmon_owner);
2781}
2782#endif
2783
2784#ifdef CONFIG_PPC_POWERNV
2785static void dump_one_xive(int cpu)
2786{
2787 unsigned int hwid = get_hard_smp_processor_id(cpu);
2788 bool hv = cpu_has_feature(CPU_FTR_HVMODE);
2789
2790 if (hv) {
2791 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2792 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2793 opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2794 opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2795 opal_xive_dump(XIVE_DUMP_VP, hwid);
2796 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2797 }
2798
2799 if (setjmp(bus_error_jmp) != 0) {
2800 catch_memory_errors = 0;
2801 printf("*** Error dumping xive on cpu %d\n", cpu);
2802 return;
2803 }
2804
2805 catch_memory_errors = 1;
2806 sync();
2807 xmon_xive_do_dump(cpu);
2808 sync();
2809 __delay(200);
2810 catch_memory_errors = 0;
2811}
2812
2813static void dump_all_xives(void)
2814{
2815 int cpu;
2816
2817 if (num_online_cpus() == 0) {
2818 printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2819 return;
2820 }
2821
2822 for_each_online_cpu(cpu)
2823 dump_one_xive(cpu);
2824}
2825
2826static void dump_xives(void)
2827{
2828 unsigned long num;
2829 int c;
2830
2831 if (!xive_enabled()) {
2832 printf("Xive disabled on this system\n");
2833 return;
2834 }
2835
2836 c = inchar();
2837 if (c == 'a') {
2838 dump_all_xives();
2839 return;
2840 } else if (c == 'i') {
2841 if (scanhex(&num))
2842 xmon_xive_get_irq_config(num, NULL);
2843 else
2844 xmon_xive_get_irq_all();
2845 return;
2846 }
2847
2848 termch = c; /* Put c back, it wasn't 'a' */
2849
2850 if (scanhex(&num))
2851 dump_one_xive(num);
2852 else
2853 dump_one_xive(xmon_owner);
2854}
2855#endif /* CONFIG_PPC_POWERNV */
2856
2857static void dump_by_size(unsigned long addr, long count, int size)
2858{
2859 unsigned char temp[16];
2860 int i, j;
2861 u64 val;
2862
2863 count = ALIGN(count, 16);
2864
2865 for (i = 0; i < count; i += 16, addr += 16) {
2866 printf(REG, addr);
2867
2868 if (mread(addr, temp, 16) != 16) {
2869 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2870 return;
2871 }
2872
2873 for (j = 0; j < 16; j += size) {
2874 putchar(' ');
2875 switch (size) {
2876 case 1: val = temp[j]; break;
2877 case 2: val = *(u16 *)&temp[j]; break;
2878 case 4: val = *(u32 *)&temp[j]; break;
2879 case 8: val = *(u64 *)&temp[j]; break;
2880 default: val = 0;
2881 }
2882
2883 printf("%0*llx", size * 2, val);
2884 }
2885 printf(" |");
2886 for (j = 0; j < 16; ++j) {
2887 val = temp[j];
2888 putchar(' ' <= val && val <= '~' ? val : '.');
2889 }
2890 printf("|\n");
2891 }
2892}
2893
2894static void
2895dump(void)
2896{
2897 static char last[] = { "d?\n" };
2898 int c;
2899
2900 c = inchar();
2901
2902#ifdef CONFIG_PPC64
2903 if (c == 'p') {
2904 xmon_start_pagination();
2905 dump_pacas();
2906 xmon_end_pagination();
2907 return;
2908 }
2909#endif
2910#ifdef CONFIG_PPC_POWERNV
2911 if (c == 'x') {
2912 xmon_start_pagination();
2913 dump_xives();
2914 xmon_end_pagination();
2915 return;
2916 }
2917#endif
2918
2919 if (c == 't') {
2920 dump_tracing();
2921 return;
2922 }
2923
2924 if (c == '\n')
2925 termch = c;
2926
2927 scanhex((void *)&adrs);
2928 if (termch != '\n')
2929 termch = 0;
2930 if (c == 'i') {
2931 scanhex(&nidump);
2932 if (nidump == 0)
2933 nidump = 16;
2934 else if (nidump > MAX_IDUMP)
2935 nidump = MAX_IDUMP;
2936 adrs += ppc_inst_dump(adrs, nidump, 1);
2937 last_cmd = "di\n";
2938 } else if (c == 'l') {
2939 dump_log_buf();
2940 } else if (c == 'o') {
2941 dump_opal_msglog();
2942 } else if (c == 'v') {
2943 /* dump virtual to physical translation */
2944 show_pte(adrs);
2945 } else if (c == 'r') {
2946 scanhex(&ndump);
2947 if (ndump == 0)
2948 ndump = 64;
2949 xmon_rawdump(adrs, ndump);
2950 adrs += ndump;
2951 last_cmd = "dr\n";
2952 } else {
2953 scanhex(&ndump);
2954 if (ndump == 0)
2955 ndump = 64;
2956 else if (ndump > MAX_DUMP)
2957 ndump = MAX_DUMP;
2958
2959 switch (c) {
2960 case '8':
2961 case '4':
2962 case '2':
2963 case '1':
2964 ndump = ALIGN(ndump, 16);
2965 dump_by_size(adrs, ndump, c - '0');
2966 last[1] = c;
2967 last_cmd = last;
2968 break;
2969 default:
2970 prdump(adrs, ndump);
2971 last_cmd = "d\n";
2972 }
2973
2974 adrs += ndump;
2975 }
2976}
2977
2978static void
2979prdump(unsigned long adrs, long ndump)
2980{
2981 long n, m, c, r, nr;
2982 unsigned char temp[16];
2983
2984 for (n = ndump; n > 0;) {
2985 printf(REG, adrs);
2986 putchar(' ');
2987 r = n < 16? n: 16;
2988 nr = mread(adrs, temp, r);
2989 adrs += nr;
2990 for (m = 0; m < r; ++m) {
2991 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2992 putchar(' ');
2993 if (m < nr)
2994 printf("%.2x", temp[m]);
2995 else
2996 printf("%s", fault_chars[fault_type]);
2997 }
2998 for (; m < 16; ++m) {
2999 if ((m & (sizeof(long) - 1)) == 0)
3000 putchar(' ');
3001 printf(" ");
3002 }
3003 printf(" |");
3004 for (m = 0; m < r; ++m) {
3005 if (m < nr) {
3006 c = temp[m];
3007 putchar(' ' <= c && c <= '~'? c: '.');
3008 } else
3009 putchar(' ');
3010 }
3011 n -= r;
3012 for (; m < 16; ++m)
3013 putchar(' ');
3014 printf("|\n");
3015 if (nr < r)
3016 break;
3017 }
3018}
3019
3020typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
3021
3022static int
3023generic_inst_dump(unsigned long adr, long count, int praddr,
3024 instruction_dump_func dump_func)
3025{
3026 int nr, dotted;
3027 unsigned long first_adr;
3028 ppc_inst_t inst, last_inst = ppc_inst(0);
3029
3030 dotted = 0;
3031 for (first_adr = adr; count > 0; --count, adr += ppc_inst_len(inst)) {
3032 nr = mread_instr(adr, &inst);
3033 if (nr == 0) {
3034 if (praddr) {
3035 const char *x = fault_chars[fault_type];
3036 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
3037 }
3038 break;
3039 }
3040 if (adr > first_adr && ppc_inst_equal(inst, last_inst)) {
3041 if (!dotted) {
3042 printf(" ...\n");
3043 dotted = 1;
3044 }
3045 continue;
3046 }
3047 dotted = 0;
3048 last_inst = inst;
3049 if (praddr)
3050 printf(REG" %08lx", adr, ppc_inst_as_ulong(inst));
3051 printf("\t");
3052 if (!ppc_inst_prefixed(inst))
3053 dump_func(ppc_inst_val(inst), adr);
3054 else
3055 dump_func(ppc_inst_as_ulong(inst), adr);
3056 printf("\n");
3057 }
3058 return adr - first_adr;
3059}
3060
3061static int
3062ppc_inst_dump(unsigned long adr, long count, int praddr)
3063{
3064 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
3065}
3066
3067void
3068print_address(unsigned long addr)
3069{
3070 xmon_print_symbol(addr, "\t# ", "");
3071}
3072
3073static void
3074dump_log_buf(void)
3075{
3076 struct kmsg_dump_iter iter;
3077 static unsigned char buf[1024];
3078 size_t len;
3079
3080 if (setjmp(bus_error_jmp) != 0) {
3081 printf("Error dumping printk buffer!\n");
3082 return;
3083 }
3084
3085 catch_memory_errors = 1;
3086 sync();
3087
3088 kmsg_dump_rewind(&iter);
3089 xmon_start_pagination();
3090 while (kmsg_dump_get_line(&iter, false, buf, sizeof(buf), &len)) {
3091 buf[len] = '\0';
3092 printf("%s", buf);
3093 }
3094 xmon_end_pagination();
3095
3096 sync();
3097 /* wait a little while to see if we get a machine check */
3098 __delay(200);
3099 catch_memory_errors = 0;
3100}
3101
3102#ifdef CONFIG_PPC_POWERNV
3103static void dump_opal_msglog(void)
3104{
3105 unsigned char buf[128];
3106 ssize_t res;
3107 volatile loff_t pos = 0;
3108
3109 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
3110 printf("Machine is not running OPAL firmware.\n");
3111 return;
3112 }
3113
3114 if (setjmp(bus_error_jmp) != 0) {
3115 printf("Error dumping OPAL msglog!\n");
3116 return;
3117 }
3118
3119 catch_memory_errors = 1;
3120 sync();
3121
3122 xmon_start_pagination();
3123 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
3124 if (res < 0) {
3125 printf("Error dumping OPAL msglog! Error: %zd\n", res);
3126 break;
3127 }
3128 buf[res] = '\0';
3129 printf("%s", buf);
3130 pos += res;
3131 }
3132 xmon_end_pagination();
3133
3134 sync();
3135 /* wait a little while to see if we get a machine check */
3136 __delay(200);
3137 catch_memory_errors = 0;
3138}
3139#endif
3140
3141/*
3142 * Memory operations - move, set, print differences
3143 */
3144static unsigned long mdest; /* destination address */
3145static unsigned long msrc; /* source address */
3146static unsigned long mval; /* byte value to set memory to */
3147static unsigned long mcount; /* # bytes to affect */
3148static unsigned long mdiffs; /* max # differences to print */
3149
3150static void
3151memops(int cmd)
3152{
3153 scanhex((void *)&mdest);
3154 if( termch != '\n' )
3155 termch = 0;
3156 scanhex((void *)(cmd == 's'? &mval: &msrc));
3157 if( termch != '\n' )
3158 termch = 0;
3159 scanhex((void *)&mcount);
3160 switch( cmd ){
3161 case 'm':
3162 if (xmon_is_ro) {
3163 printf(xmon_ro_msg);
3164 break;
3165 }
3166 memmove((void *)mdest, (void *)msrc, mcount);
3167 break;
3168 case 's':
3169 if (xmon_is_ro) {
3170 printf(xmon_ro_msg);
3171 break;
3172 }
3173 memset((void *)mdest, mval, mcount);
3174 break;
3175 case 'd':
3176 if( termch != '\n' )
3177 termch = 0;
3178 scanhex((void *)&mdiffs);
3179 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
3180 break;
3181 }
3182}
3183
3184static void
3185memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
3186{
3187 unsigned n, prt;
3188
3189 prt = 0;
3190 for( n = nb; n > 0; --n )
3191 if( *p1++ != *p2++ )
3192 if( ++prt <= maxpr )
3193 printf("%px %.2x # %px %.2x\n", p1 - 1,
3194 p1[-1], p2 - 1, p2[-1]);
3195 if( prt > maxpr )
3196 printf("Total of %d differences\n", prt);
3197}
3198
3199static unsigned mend;
3200static unsigned mask;
3201
3202static void
3203memlocate(void)
3204{
3205 unsigned a, n;
3206 unsigned char val[4];
3207
3208 last_cmd = "ml";
3209 scanhex((void *)&mdest);
3210 if (termch != '\n') {
3211 termch = 0;
3212 scanhex((void *)&mend);
3213 if (termch != '\n') {
3214 termch = 0;
3215 scanhex((void *)&mval);
3216 mask = ~0;
3217 if (termch != '\n') termch = 0;
3218 scanhex((void *)&mask);
3219 }
3220 }
3221 n = 0;
3222 for (a = mdest; a < mend; a += 4) {
3223 if (mread(a, val, 4) == 4
3224 && ((GETWORD(val) ^ mval) & mask) == 0) {
3225 printf("%.16x: %.16x\n", a, GETWORD(val));
3226 if (++n >= 10)
3227 break;
3228 }
3229 }
3230}
3231
3232static unsigned long mskip = 0x1000;
3233static unsigned long mlim = 0xffffffff;
3234
3235static void
3236memzcan(void)
3237{
3238 unsigned char v;
3239 unsigned a;
3240 int ok, ook;
3241
3242 scanhex(&mdest);
3243 if (termch != '\n') termch = 0;
3244 scanhex(&mskip);
3245 if (termch != '\n') termch = 0;
3246 scanhex(&mlim);
3247 ook = 0;
3248 for (a = mdest; a < mlim; a += mskip) {
3249 ok = mread(a, &v, 1);
3250 if (ok && !ook) {
3251 printf("%.8x .. ", a);
3252 } else if (!ok && ook)
3253 printf("%.8lx\n", a - mskip);
3254 ook = ok;
3255 if (a + mskip < a)
3256 break;
3257 }
3258 if (ook)
3259 printf("%.8lx\n", a - mskip);
3260}
3261
3262static void show_task(struct task_struct *volatile tsk)
3263{
3264 unsigned int p_state = READ_ONCE(tsk->__state);
3265 char state;
3266
3267 /*
3268 * Cloned from kdb_task_state_char(), which is not entirely
3269 * appropriate for calling from xmon. This could be moved
3270 * to a common, generic, routine used by both.
3271 */
3272 state = (p_state == TASK_RUNNING) ? 'R' :
3273 (p_state & TASK_UNINTERRUPTIBLE) ? 'D' :
3274 (p_state & TASK_STOPPED) ? 'T' :
3275 (p_state & TASK_TRACED) ? 'C' :
3276 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
3277 (tsk->exit_state & EXIT_DEAD) ? 'E' :
3278 (p_state & TASK_INTERRUPTIBLE) ? 'S' : '?';
3279
3280 printf("%16px %16lx %16px %6d %6d %c %2d %s\n", tsk,
3281 tsk->thread.ksp, tsk->thread.regs,
3282 tsk->pid, rcu_dereference(tsk->parent)->pid,
3283 state, task_cpu(tsk),
3284 tsk->comm);
3285}
3286
3287#ifdef CONFIG_PPC_BOOK3S_64
3288static void format_pte(void *ptep, unsigned long pte)
3289{
3290 pte_t entry = __pte(pte);
3291
3292 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte);
3293 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK);
3294
3295 printf("Flags = %s%s%s%s%s\n",
3296 pte_young(entry) ? "Accessed " : "",
3297 pte_dirty(entry) ? "Dirty " : "",
3298 pte_read(entry) ? "Read " : "",
3299 pte_write(entry) ? "Write " : "",
3300 pte_exec(entry) ? "Exec " : "");
3301}
3302
3303static void show_pte(unsigned long addr)
3304{
3305 unsigned long tskv = 0;
3306 struct task_struct *volatile tsk = NULL;
3307 struct mm_struct *volatile mm;
3308 pgd_t *pgdp;
3309 p4d_t *p4dp;
3310 pud_t *pudp;
3311 pmd_t *pmdp;
3312 pte_t *ptep;
3313
3314 if (!scanhex(&tskv))
3315 mm = &init_mm;
3316 else
3317 tsk = (struct task_struct *)tskv;
3318
3319 if (tsk == NULL)
3320 mm = &init_mm;
3321 else
3322 mm = tsk->active_mm;
3323
3324 if (setjmp(bus_error_jmp) != 0) {
3325 catch_memory_errors = 0;
3326 printf("*** Error dumping pte for task %px\n", tsk);
3327 return;
3328 }
3329
3330 catch_memory_errors = 1;
3331 sync();
3332
3333 if (mm == &init_mm)
3334 pgdp = pgd_offset_k(addr);
3335 else
3336 pgdp = pgd_offset(mm, addr);
3337
3338 p4dp = p4d_offset(pgdp, addr);
3339
3340 if (p4d_none(*p4dp)) {
3341 printf("No valid P4D\n");
3342 return;
3343 }
3344
3345 if (p4d_is_leaf(*p4dp)) {
3346 format_pte(p4dp, p4d_val(*p4dp));
3347 return;
3348 }
3349
3350 printf("p4dp @ 0x%px = 0x%016lx\n", p4dp, p4d_val(*p4dp));
3351
3352 pudp = pud_offset(p4dp, addr);
3353
3354 if (pud_none(*pudp)) {
3355 printf("No valid PUD\n");
3356 return;
3357 }
3358
3359 if (pud_is_leaf(*pudp)) {
3360 format_pte(pudp, pud_val(*pudp));
3361 return;
3362 }
3363
3364 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp));
3365
3366 pmdp = pmd_offset(pudp, addr);
3367
3368 if (pmd_none(*pmdp)) {
3369 printf("No valid PMD\n");
3370 return;
3371 }
3372
3373 if (pmd_is_leaf(*pmdp)) {
3374 format_pte(pmdp, pmd_val(*pmdp));
3375 return;
3376 }
3377 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp));
3378
3379 ptep = pte_offset_map(pmdp, addr);
3380 if (!ptep || pte_none(*ptep)) {
3381 if (ptep)
3382 pte_unmap(ptep);
3383 printf("no valid PTE\n");
3384 return;
3385 }
3386
3387 format_pte(ptep, pte_val(*ptep));
3388 pte_unmap(ptep);
3389
3390 sync();
3391 __delay(200);
3392 catch_memory_errors = 0;
3393}
3394#else
3395static void show_pte(unsigned long addr)
3396{
3397 printf("show_pte not yet implemented\n");
3398}
3399#endif /* CONFIG_PPC_BOOK3S_64 */
3400
3401static void show_tasks(void)
3402{
3403 unsigned long tskv;
3404 struct task_struct *volatile tsk = NULL;
3405
3406 printf(" task_struct ->thread.ksp ->thread.regs PID PPID S P CMD\n");
3407
3408 if (scanhex(&tskv))
3409 tsk = (struct task_struct *)tskv;
3410
3411 if (setjmp(bus_error_jmp) != 0) {
3412 catch_memory_errors = 0;
3413 printf("*** Error dumping task %px\n", tsk);
3414 return;
3415 }
3416
3417 catch_memory_errors = 1;
3418 sync();
3419
3420 if (tsk)
3421 show_task(tsk);
3422 else
3423 for_each_process(tsk)
3424 show_task(tsk);
3425
3426 sync();
3427 __delay(200);
3428 catch_memory_errors = 0;
3429}
3430
3431static void proccall(void)
3432{
3433 unsigned long args[8];
3434 unsigned long ret;
3435 int i;
3436 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
3437 unsigned long, unsigned long, unsigned long,
3438 unsigned long, unsigned long, unsigned long);
3439 callfunc_t func;
3440
3441 if (!scanhex(&adrs))
3442 return;
3443 if (termch != '\n')
3444 termch = 0;
3445 for (i = 0; i < 8; ++i)
3446 args[i] = 0;
3447 for (i = 0; i < 8; ++i) {
3448 if (!scanhex(&args[i]) || termch == '\n')
3449 break;
3450 termch = 0;
3451 }
3452 func = (callfunc_t) adrs;
3453 ret = 0;
3454 if (setjmp(bus_error_jmp) == 0) {
3455 catch_memory_errors = 1;
3456 sync();
3457 ret = func(args[0], args[1], args[2], args[3],
3458 args[4], args[5], args[6], args[7]);
3459 sync();
3460 printf("return value is 0x%lx\n", ret);
3461 } else {
3462 printf("*** %x exception occurred\n", fault_except);
3463 }
3464 catch_memory_errors = 0;
3465}
3466
3467/* Input scanning routines */
3468int
3469skipbl(void)
3470{
3471 int c;
3472
3473 if( termch != 0 ){
3474 c = termch;
3475 termch = 0;
3476 } else
3477 c = inchar();
3478 while( c == ' ' || c == '\t' )
3479 c = inchar();
3480 return c;
3481}
3482
3483#define N_PTREGS 44
3484static const char *regnames[N_PTREGS] = {
3485 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3486 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3487 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3488 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3489 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3490#ifdef CONFIG_PPC64
3491 "softe",
3492#else
3493 "mq",
3494#endif
3495 "trap", "dar", "dsisr", "res"
3496};
3497
3498int
3499scanhex(unsigned long *vp)
3500{
3501 int c, d;
3502 unsigned long v;
3503
3504 c = skipbl();
3505 if (c == '%') {
3506 /* parse register name */
3507 char regname[8];
3508 int i;
3509
3510 for (i = 0; i < sizeof(regname) - 1; ++i) {
3511 c = inchar();
3512 if (!isalnum(c)) {
3513 termch = c;
3514 break;
3515 }
3516 regname[i] = c;
3517 }
3518 regname[i] = 0;
3519 i = match_string(regnames, N_PTREGS, regname);
3520 if (i < 0) {
3521 printf("invalid register name '%%%s'\n", regname);
3522 return 0;
3523 }
3524 if (xmon_regs == NULL) {
3525 printf("regs not available\n");
3526 return 0;
3527 }
3528 *vp = ((unsigned long *)xmon_regs)[i];
3529 return 1;
3530 }
3531
3532 /* skip leading "0x" if any */
3533
3534 if (c == '0') {
3535 c = inchar();
3536 if (c == 'x') {
3537 c = inchar();
3538 } else {
3539 d = hexdigit(c);
3540 if (d == EOF) {
3541 termch = c;
3542 *vp = 0;
3543 return 1;
3544 }
3545 }
3546 } else if (c == '$') {
3547 int i;
3548 for (i=0; i<63; i++) {
3549 c = inchar();
3550 if (isspace(c) || c == '\0') {
3551 termch = c;
3552 break;
3553 }
3554 tmpstr[i] = c;
3555 }
3556 tmpstr[i++] = 0;
3557 *vp = 0;
3558 if (setjmp(bus_error_jmp) == 0) {
3559 catch_memory_errors = 1;
3560 sync();
3561 *vp = kallsyms_lookup_name(tmpstr);
3562 sync();
3563 }
3564 catch_memory_errors = 0;
3565 if (!(*vp)) {
3566 printf("unknown symbol '%s'\n", tmpstr);
3567 return 0;
3568 }
3569 return 1;
3570 }
3571
3572 d = hexdigit(c);
3573 if (d == EOF) {
3574 termch = c;
3575 return 0;
3576 }
3577 v = 0;
3578 do {
3579 v = (v << 4) + d;
3580 c = inchar();
3581 d = hexdigit(c);
3582 } while (d != EOF);
3583 termch = c;
3584 *vp = v;
3585 return 1;
3586}
3587
3588static void
3589scannl(void)
3590{
3591 int c;
3592
3593 c = termch;
3594 termch = 0;
3595 while( c != '\n' )
3596 c = inchar();
3597}
3598
3599static int hexdigit(int c)
3600{
3601 if( '0' <= c && c <= '9' )
3602 return c - '0';
3603 if( 'A' <= c && c <= 'F' )
3604 return c - ('A' - 10);
3605 if( 'a' <= c && c <= 'f' )
3606 return c - ('a' - 10);
3607 return EOF;
3608}
3609
3610void
3611getstring(char *s, int size)
3612{
3613 int c;
3614
3615 c = skipbl();
3616 if (c == '\n') {
3617 *s = 0;
3618 return;
3619 }
3620
3621 do {
3622 if( size > 1 ){
3623 *s++ = c;
3624 --size;
3625 }
3626 c = inchar();
3627 } while( c != ' ' && c != '\t' && c != '\n' );
3628 termch = c;
3629 *s = 0;
3630}
3631
3632static char line[256];
3633static char *lineptr;
3634
3635static void
3636flush_input(void)
3637{
3638 lineptr = NULL;
3639}
3640
3641static int
3642inchar(void)
3643{
3644 if (lineptr == NULL || *lineptr == 0) {
3645 if (xmon_gets(line, sizeof(line)) == NULL) {
3646 lineptr = NULL;
3647 return EOF;
3648 }
3649 lineptr = line;
3650 }
3651 return *lineptr++;
3652}
3653
3654static void
3655take_input(char *str)
3656{
3657 lineptr = str;
3658}
3659
3660
3661static void
3662symbol_lookup(void)
3663{
3664 int type = inchar();
3665 unsigned long addr, cpu;
3666 void __percpu *ptr = NULL;
3667 static char tmp[64];
3668
3669 switch (type) {
3670 case 'a':
3671 if (scanhex(&addr))
3672 xmon_print_symbol(addr, ": ", "\n");
3673 termch = 0;
3674 break;
3675 case 's':
3676 getstring(tmp, 64);
3677 if (setjmp(bus_error_jmp) == 0) {
3678 catch_memory_errors = 1;
3679 sync();
3680 addr = kallsyms_lookup_name(tmp);
3681 if (addr)
3682 printf("%s: %lx\n", tmp, addr);
3683 else
3684 printf("Symbol '%s' not found.\n", tmp);
3685 sync();
3686 }
3687 catch_memory_errors = 0;
3688 termch = 0;
3689 break;
3690 case 'p':
3691 getstring(tmp, 64);
3692 if (setjmp(bus_error_jmp) == 0) {
3693 catch_memory_errors = 1;
3694 sync();
3695 ptr = (void __percpu *)kallsyms_lookup_name(tmp);
3696 sync();
3697 }
3698
3699 if (ptr &&
3700 ptr >= (void __percpu *)__per_cpu_start &&
3701 ptr < (void __percpu *)__per_cpu_end)
3702 {
3703 if (scanhex(&cpu) && cpu < num_possible_cpus()) {
3704 addr = (unsigned long)per_cpu_ptr(ptr, cpu);
3705 } else {
3706 cpu = raw_smp_processor_id();
3707 addr = (unsigned long)this_cpu_ptr(ptr);
3708 }
3709
3710 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr);
3711 } else {
3712 printf("Percpu symbol '%s' not found.\n", tmp);
3713 }
3714
3715 catch_memory_errors = 0;
3716 termch = 0;
3717 break;
3718 }
3719}
3720
3721
3722/* Print an address in numeric and symbolic form (if possible) */
3723static void xmon_print_symbol(unsigned long address, const char *mid,
3724 const char *after)
3725{
3726 char *modname;
3727 const char *volatile name = NULL;
3728 unsigned long offset, size;
3729
3730 printf(REG, address);
3731 if (setjmp(bus_error_jmp) == 0) {
3732 catch_memory_errors = 1;
3733 sync();
3734 name = kallsyms_lookup(address, &size, &offset, &modname,
3735 tmpstr);
3736 sync();
3737 /* wait a little while to see if we get a machine check */
3738 __delay(200);
3739 }
3740
3741 catch_memory_errors = 0;
3742
3743 if (name) {
3744 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3745 if (modname)
3746 printf(" [%s]", modname);
3747 }
3748 printf("%s", after);
3749}
3750
3751#ifdef CONFIG_PPC_64S_HASH_MMU
3752void dump_segments(void)
3753{
3754 int i;
3755 unsigned long esid,vsid;
3756 unsigned long llp;
3757
3758 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3759
3760 for (i = 0; i < mmu_slb_size; i++) {
3761 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
3762 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
3763
3764 if (!esid && !vsid)
3765 continue;
3766
3767 printf("%02d %016lx %016lx", i, esid, vsid);
3768
3769 if (!(esid & SLB_ESID_V)) {
3770 printf("\n");
3771 continue;
3772 }
3773
3774 llp = vsid & SLB_VSID_LLP;
3775 if (vsid & SLB_VSID_B_1T) {
3776 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
3777 GET_ESID_1T(esid),
3778 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3779 llp);
3780 } else {
3781 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
3782 GET_ESID(esid),
3783 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3784 llp);
3785 }
3786 }
3787}
3788#endif
3789
3790#ifdef CONFIG_PPC_BOOK3S_32
3791void dump_segments(void)
3792{
3793 int i;
3794
3795 printf("sr0-15 =");
3796 for (i = 0; i < 16; ++i)
3797 printf(" %x", mfsr(i << 28));
3798 printf("\n");
3799}
3800#endif
3801
3802#ifdef CONFIG_44x
3803static void dump_tlb_44x(void)
3804{
3805 int i;
3806
3807 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3808 unsigned long w0,w1,w2;
3809 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
3810 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
3811 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
3812 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2);
3813 if (w0 & PPC44x_TLB_VALID) {
3814 printf("V %08lx -> %01lx%08lx %c%c%c%c%c",
3815 w0 & PPC44x_TLB_EPN_MASK,
3816 w1 & PPC44x_TLB_ERPN_MASK,
3817 w1 & PPC44x_TLB_RPN_MASK,
3818 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3819 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3820 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3821 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3822 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3823 }
3824 printf("\n");
3825 }
3826}
3827#endif /* CONFIG_44x */
3828
3829#ifdef CONFIG_PPC_BOOK3E_64
3830static void dump_tlb_book3e(void)
3831{
3832 u32 mmucfg;
3833 u64 ramask;
3834 int i, tlb, ntlbs, pidsz, lpidsz, rasz;
3835 int mmu_version;
3836 static const char *pgsz_names[] = {
3837 " 1K",
3838 " 2K",
3839 " 4K",
3840 " 8K",
3841 " 16K",
3842 " 32K",
3843 " 64K",
3844 "128K",
3845 "256K",
3846 "512K",
3847 " 1M",
3848 " 2M",
3849 " 4M",
3850 " 8M",
3851 " 16M",
3852 " 32M",
3853 " 64M",
3854 "128M",
3855 "256M",
3856 "512M",
3857 " 1G",
3858 " 2G",
3859 " 4G",
3860 " 8G",
3861 " 16G",
3862 " 32G",
3863 " 64G",
3864 "128G",
3865 "256G",
3866 "512G",
3867 " 1T",
3868 " 2T",
3869 };
3870
3871 /* Gather some infos about the MMU */
3872 mmucfg = mfspr(SPRN_MMUCFG);
3873 mmu_version = (mmucfg & 3) + 1;
3874 ntlbs = ((mmucfg >> 2) & 3) + 1;
3875 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3876 lpidsz = (mmucfg >> 24) & 0xf;
3877 rasz = (mmucfg >> 16) & 0x7f;
3878 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3879 mmu_version, ntlbs, pidsz, lpidsz, rasz);
3880 ramask = (1ull << rasz) - 1;
3881
3882 for (tlb = 0; tlb < ntlbs; tlb++) {
3883 u32 tlbcfg;
3884 int nent, assoc, new_cc = 1;
3885 printf("TLB %d:\n------\n", tlb);
3886 switch(tlb) {
3887 case 0:
3888 tlbcfg = mfspr(SPRN_TLB0CFG);
3889 break;
3890 case 1:
3891 tlbcfg = mfspr(SPRN_TLB1CFG);
3892 break;
3893 case 2:
3894 tlbcfg = mfspr(SPRN_TLB2CFG);
3895 break;
3896 case 3:
3897 tlbcfg = mfspr(SPRN_TLB3CFG);
3898 break;
3899 default:
3900 printf("Unsupported TLB number !\n");
3901 continue;
3902 }
3903 nent = tlbcfg & 0xfff;
3904 assoc = (tlbcfg >> 24) & 0xff;
3905 for (i = 0; i < nent; i++) {
3906 u32 mas0 = MAS0_TLBSEL(tlb);
3907 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3908 u64 mas2 = 0;
3909 u64 mas7_mas3;
3910 int esel = i, cc = i;
3911
3912 if (assoc != 0) {
3913 cc = i / assoc;
3914 esel = i % assoc;
3915 mas2 = cc * 0x1000;
3916 }
3917
3918 mas0 |= MAS0_ESEL(esel);
3919 mtspr(SPRN_MAS0, mas0);
3920 mtspr(SPRN_MAS1, mas1);
3921 mtspr(SPRN_MAS2, mas2);
3922 asm volatile("tlbre 0,0,0" : : : "memory");
3923 mas1 = mfspr(SPRN_MAS1);
3924 mas2 = mfspr(SPRN_MAS2);
3925 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3926 if (assoc && (i % assoc) == 0)
3927 new_cc = 1;
3928 if (!(mas1 & MAS1_VALID))
3929 continue;
3930 if (assoc == 0)
3931 printf("%04x- ", i);
3932 else if (new_cc)
3933 printf("%04x-%c", cc, 'A' + esel);
3934 else
3935 printf(" |%c", 'A' + esel);
3936 new_cc = 0;
3937 printf(" %016llx %04x %s %c%c AS%c",
3938 mas2 & ~0x3ffull,
3939 (mas1 >> 16) & 0x3fff,
3940 pgsz_names[(mas1 >> 7) & 0x1f],
3941 mas1 & MAS1_IND ? 'I' : ' ',
3942 mas1 & MAS1_IPROT ? 'P' : ' ',
3943 mas1 & MAS1_TS ? '1' : '0');
3944 printf(" %c%c%c%c%c%c%c",
3945 mas2 & MAS2_X0 ? 'a' : ' ',
3946 mas2 & MAS2_X1 ? 'v' : ' ',
3947 mas2 & MAS2_W ? 'w' : ' ',
3948 mas2 & MAS2_I ? 'i' : ' ',
3949 mas2 & MAS2_M ? 'm' : ' ',
3950 mas2 & MAS2_G ? 'g' : ' ',
3951 mas2 & MAS2_E ? 'e' : ' ');
3952 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3953 if (mas1 & MAS1_IND)
3954 printf(" %s\n",
3955 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3956 else
3957 printf(" U%c%c%c S%c%c%c\n",
3958 mas7_mas3 & MAS3_UX ? 'x' : ' ',
3959 mas7_mas3 & MAS3_UW ? 'w' : ' ',
3960 mas7_mas3 & MAS3_UR ? 'r' : ' ',
3961 mas7_mas3 & MAS3_SX ? 'x' : ' ',
3962 mas7_mas3 & MAS3_SW ? 'w' : ' ',
3963 mas7_mas3 & MAS3_SR ? 'r' : ' ');
3964 }
3965 }
3966}
3967#endif /* CONFIG_PPC_BOOK3E_64 */
3968
3969static void xmon_init(int enable)
3970{
3971 if (enable) {
3972 __debugger = xmon;
3973 __debugger_ipi = xmon_ipi;
3974 __debugger_bpt = xmon_bpt;
3975 __debugger_sstep = xmon_sstep;
3976 __debugger_iabr_match = xmon_iabr_match;
3977 __debugger_break_match = xmon_break_match;
3978 __debugger_fault_handler = xmon_fault_handler;
3979 } else {
3980 __debugger = NULL;
3981 __debugger_ipi = NULL;
3982 __debugger_bpt = NULL;
3983 __debugger_sstep = NULL;
3984 __debugger_iabr_match = NULL;
3985 __debugger_break_match = NULL;
3986 __debugger_fault_handler = NULL;
3987 }
3988}
3989
3990#ifdef CONFIG_MAGIC_SYSRQ
3991static void sysrq_handle_xmon(u8 key)
3992{
3993 if (xmon_is_locked_down()) {
3994 clear_all_bpt();
3995 xmon_init(0);
3996 return;
3997 }
3998 /* ensure xmon is enabled */
3999 xmon_init(1);
4000 debugger(get_irq_regs());
4001 if (!xmon_on)
4002 xmon_init(0);
4003}
4004
4005static const struct sysrq_key_op sysrq_xmon_op = {
4006 .handler = sysrq_handle_xmon,
4007 .help_msg = "xmon(x)",
4008 .action_msg = "Entering xmon",
4009};
4010
4011static int __init setup_xmon_sysrq(void)
4012{
4013 register_sysrq_key('x', &sysrq_xmon_op);
4014 return 0;
4015}
4016device_initcall(setup_xmon_sysrq);
4017#endif /* CONFIG_MAGIC_SYSRQ */
4018
4019static void clear_all_bpt(void)
4020{
4021 int i;
4022
4023 /* clear/unpatch all breakpoints */
4024 remove_bpts();
4025 remove_cpu_bpts();
4026
4027 /* Disable all breakpoints */
4028 for (i = 0; i < NBPTS; ++i)
4029 bpts[i].enabled = 0;
4030
4031 /* Clear any data or iabr breakpoints */
4032 iabr = NULL;
4033 for (i = 0; i < nr_wp_slots(); i++)
4034 dabr[i].enabled = 0;
4035}
4036
4037#ifdef CONFIG_DEBUG_FS
4038static int xmon_dbgfs_set(void *data, u64 val)
4039{
4040 xmon_on = !!val;
4041 xmon_init(xmon_on);
4042
4043 /* make sure all breakpoints removed when disabling */
4044 if (!xmon_on) {
4045 clear_all_bpt();
4046 get_output_lock();
4047 printf("xmon: All breakpoints cleared\n");
4048 release_output_lock();
4049 }
4050
4051 return 0;
4052}
4053
4054static int xmon_dbgfs_get(void *data, u64 *val)
4055{
4056 *val = xmon_on;
4057 return 0;
4058}
4059
4060DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
4061 xmon_dbgfs_set, "%llu\n");
4062
4063static int __init setup_xmon_dbgfs(void)
4064{
4065 debugfs_create_file("xmon", 0600, arch_debugfs_dir, NULL,
4066 &xmon_dbgfs_ops);
4067 return 0;
4068}
4069device_initcall(setup_xmon_dbgfs);
4070#endif /* CONFIG_DEBUG_FS */
4071
4072static int xmon_early __initdata;
4073
4074static int __init early_parse_xmon(char *p)
4075{
4076 if (xmon_is_locked_down()) {
4077 xmon_init(0);
4078 xmon_early = 0;
4079 xmon_on = 0;
4080 } else if (!p || strncmp(p, "early", 5) == 0) {
4081 /* just "xmon" is equivalent to "xmon=early" */
4082 xmon_init(1);
4083 xmon_early = 1;
4084 xmon_on = 1;
4085 } else if (strncmp(p, "on", 2) == 0) {
4086 xmon_init(1);
4087 xmon_on = 1;
4088 } else if (strncmp(p, "rw", 2) == 0) {
4089 xmon_init(1);
4090 xmon_on = 1;
4091 xmon_is_ro = false;
4092 } else if (strncmp(p, "ro", 2) == 0) {
4093 xmon_init(1);
4094 xmon_on = 1;
4095 xmon_is_ro = true;
4096 } else if (strncmp(p, "off", 3) == 0)
4097 xmon_on = 0;
4098 else
4099 return 1;
4100
4101 return 0;
4102}
4103early_param("xmon", early_parse_xmon);
4104
4105void __init xmon_setup(void)
4106{
4107 if (xmon_on)
4108 xmon_init(1);
4109 if (xmon_early)
4110 debugger(NULL);
4111}
4112
4113#ifdef CONFIG_SPU_BASE
4114
4115struct spu_info {
4116 struct spu *spu;
4117 u64 saved_mfc_sr1_RW;
4118 u32 saved_spu_runcntl_RW;
4119 unsigned long dump_addr;
4120 u8 stopped_ok;
4121};
4122
4123#define XMON_NUM_SPUS 16 /* Enough for current hardware */
4124
4125static struct spu_info spu_info[XMON_NUM_SPUS];
4126
4127void __init xmon_register_spus(struct list_head *list)
4128{
4129 struct spu *spu;
4130
4131 list_for_each_entry(spu, list, full_list) {
4132 if (spu->number >= XMON_NUM_SPUS) {
4133 WARN_ON(1);
4134 continue;
4135 }
4136
4137 spu_info[spu->number].spu = spu;
4138 spu_info[spu->number].stopped_ok = 0;
4139 spu_info[spu->number].dump_addr = (unsigned long)
4140 spu_info[spu->number].spu->local_store;
4141 }
4142}
4143
4144static void stop_spus(void)
4145{
4146 struct spu *spu;
4147 volatile int i;
4148 u64 tmp;
4149
4150 for (i = 0; i < XMON_NUM_SPUS; i++) {
4151 if (!spu_info[i].spu)
4152 continue;
4153
4154 if (setjmp(bus_error_jmp) == 0) {
4155 catch_memory_errors = 1;
4156 sync();
4157
4158 spu = spu_info[i].spu;
4159
4160 spu_info[i].saved_spu_runcntl_RW =
4161 in_be32(&spu->problem->spu_runcntl_RW);
4162
4163 tmp = spu_mfc_sr1_get(spu);
4164 spu_info[i].saved_mfc_sr1_RW = tmp;
4165
4166 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
4167 spu_mfc_sr1_set(spu, tmp);
4168
4169 sync();
4170 __delay(200);
4171
4172 spu_info[i].stopped_ok = 1;
4173
4174 printf("Stopped spu %.2d (was %s)\n", i,
4175 spu_info[i].saved_spu_runcntl_RW ?
4176 "running" : "stopped");
4177 } else {
4178 catch_memory_errors = 0;
4179 printf("*** Error stopping spu %.2d\n", i);
4180 }
4181 catch_memory_errors = 0;
4182 }
4183}
4184
4185static void restart_spus(void)
4186{
4187 struct spu *spu;
4188 volatile int i;
4189
4190 for (i = 0; i < XMON_NUM_SPUS; i++) {
4191 if (!spu_info[i].spu)
4192 continue;
4193
4194 if (!spu_info[i].stopped_ok) {
4195 printf("*** Error, spu %d was not successfully stopped"
4196 ", not restarting\n", i);
4197 continue;
4198 }
4199
4200 if (setjmp(bus_error_jmp) == 0) {
4201 catch_memory_errors = 1;
4202 sync();
4203
4204 spu = spu_info[i].spu;
4205 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
4206 out_be32(&spu->problem->spu_runcntl_RW,
4207 spu_info[i].saved_spu_runcntl_RW);
4208
4209 sync();
4210 __delay(200);
4211
4212 printf("Restarted spu %.2d\n", i);
4213 } else {
4214 catch_memory_errors = 0;
4215 printf("*** Error restarting spu %.2d\n", i);
4216 }
4217 catch_memory_errors = 0;
4218 }
4219}
4220
4221#define DUMP_WIDTH 23
4222#define DUMP_VALUE(format, field, value) \
4223do { \
4224 if (setjmp(bus_error_jmp) == 0) { \
4225 catch_memory_errors = 1; \
4226 sync(); \
4227 printf(" %-*s = "format"\n", DUMP_WIDTH, \
4228 #field, value); \
4229 sync(); \
4230 __delay(200); \
4231 } else { \
4232 catch_memory_errors = 0; \
4233 printf(" %-*s = *** Error reading field.\n", \
4234 DUMP_WIDTH, #field); \
4235 } \
4236 catch_memory_errors = 0; \
4237} while (0)
4238
4239#define DUMP_FIELD(obj, format, field) \
4240 DUMP_VALUE(format, field, obj->field)
4241
4242static void dump_spu_fields(struct spu *spu)
4243{
4244 printf("Dumping spu fields at address %p:\n", spu);
4245
4246 DUMP_FIELD(spu, "0x%x", number);
4247 DUMP_FIELD(spu, "%s", name);
4248 DUMP_FIELD(spu, "0x%lx", local_store_phys);
4249 DUMP_FIELD(spu, "0x%p", local_store);
4250 DUMP_FIELD(spu, "0x%lx", ls_size);
4251 DUMP_FIELD(spu, "0x%x", node);
4252 DUMP_FIELD(spu, "0x%lx", flags);
4253 DUMP_FIELD(spu, "%llu", class_0_pending);
4254 DUMP_FIELD(spu, "0x%llx", class_0_dar);
4255 DUMP_FIELD(spu, "0x%llx", class_1_dar);
4256 DUMP_FIELD(spu, "0x%llx", class_1_dsisr);
4257 DUMP_FIELD(spu, "0x%x", irqs[0]);
4258 DUMP_FIELD(spu, "0x%x", irqs[1]);
4259 DUMP_FIELD(spu, "0x%x", irqs[2]);
4260 DUMP_FIELD(spu, "0x%x", slb_replace);
4261 DUMP_FIELD(spu, "%d", pid);
4262 DUMP_FIELD(spu, "0x%p", mm);
4263 DUMP_FIELD(spu, "0x%p", ctx);
4264 DUMP_FIELD(spu, "0x%p", rq);
4265 DUMP_FIELD(spu, "0x%llx", timestamp);
4266 DUMP_FIELD(spu, "0x%lx", problem_phys);
4267 DUMP_FIELD(spu, "0x%p", problem);
4268 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
4269 in_be32(&spu->problem->spu_runcntl_RW));
4270 DUMP_VALUE("0x%x", problem->spu_status_R,
4271 in_be32(&spu->problem->spu_status_R));
4272 DUMP_VALUE("0x%x", problem->spu_npc_RW,
4273 in_be32(&spu->problem->spu_npc_RW));
4274 DUMP_FIELD(spu, "0x%p", priv2);
4275 DUMP_FIELD(spu, "0x%p", pdata);
4276}
4277
4278static int spu_inst_dump(unsigned long adr, long count, int praddr)
4279{
4280 return generic_inst_dump(adr, count, praddr, print_insn_spu);
4281}
4282
4283static void dump_spu_ls(unsigned long num, int subcmd)
4284{
4285 unsigned long offset, addr, ls_addr;
4286
4287 if (setjmp(bus_error_jmp) == 0) {
4288 catch_memory_errors = 1;
4289 sync();
4290 ls_addr = (unsigned long)spu_info[num].spu->local_store;
4291 sync();
4292 __delay(200);
4293 } else {
4294 catch_memory_errors = 0;
4295 printf("*** Error: accessing spu info for spu %ld\n", num);
4296 return;
4297 }
4298 catch_memory_errors = 0;
4299
4300 if (scanhex(&offset))
4301 addr = ls_addr + offset;
4302 else
4303 addr = spu_info[num].dump_addr;
4304
4305 if (addr >= ls_addr + LS_SIZE) {
4306 printf("*** Error: address outside of local store\n");
4307 return;
4308 }
4309
4310 switch (subcmd) {
4311 case 'i':
4312 addr += spu_inst_dump(addr, 16, 1);
4313 last_cmd = "sdi\n";
4314 break;
4315 default:
4316 prdump(addr, 64);
4317 addr += 64;
4318 last_cmd = "sd\n";
4319 break;
4320 }
4321
4322 spu_info[num].dump_addr = addr;
4323}
4324
4325static int do_spu_cmd(void)
4326{
4327 static unsigned long num = 0;
4328 int cmd, subcmd = 0;
4329
4330 cmd = inchar();
4331 switch (cmd) {
4332 case 's':
4333 stop_spus();
4334 break;
4335 case 'r':
4336 restart_spus();
4337 break;
4338 case 'd':
4339 subcmd = inchar();
4340 if (isxdigit(subcmd) || subcmd == '\n')
4341 termch = subcmd;
4342 fallthrough;
4343 case 'f':
4344 scanhex(&num);
4345 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
4346 printf("*** Error: invalid spu number\n");
4347 return 0;
4348 }
4349
4350 switch (cmd) {
4351 case 'f':
4352 dump_spu_fields(spu_info[num].spu);
4353 break;
4354 default:
4355 dump_spu_ls(num, subcmd);
4356 break;
4357 }
4358
4359 break;
4360 default:
4361 return -1;
4362 }
4363
4364 return 0;
4365}
4366#else /* ! CONFIG_SPU_BASE */
4367static int do_spu_cmd(void)
4368{
4369 return -1;
4370}
4371#endif
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Routines providing a simple monitor for use on the PowerMac.
4 *
5 * Copyright (C) 1996-2005 Paul Mackerras.
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
8 */
9
10#include <linux/kernel.h>
11#include <linux/errno.h>
12#include <linux/sched/signal.h>
13#include <linux/smp.h>
14#include <linux/mm.h>
15#include <linux/reboot.h>
16#include <linux/delay.h>
17#include <linux/kallsyms.h>
18#include <linux/kmsg_dump.h>
19#include <linux/cpumask.h>
20#include <linux/export.h>
21#include <linux/sysrq.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/bug.h>
25#include <linux/nmi.h>
26#include <linux/ctype.h>
27#include <linux/highmem.h>
28
29#include <asm/debugfs.h>
30#include <asm/ptrace.h>
31#include <asm/smp.h>
32#include <asm/string.h>
33#include <asm/prom.h>
34#include <asm/machdep.h>
35#include <asm/xmon.h>
36#include <asm/processor.h>
37#include <asm/pgtable.h>
38#include <asm/mmu.h>
39#include <asm/mmu_context.h>
40#include <asm/plpar_wrappers.h>
41#include <asm/cputable.h>
42#include <asm/rtas.h>
43#include <asm/sstep.h>
44#include <asm/irq_regs.h>
45#include <asm/spu.h>
46#include <asm/spu_priv1.h>
47#include <asm/setjmp.h>
48#include <asm/reg.h>
49#include <asm/debug.h>
50#include <asm/hw_breakpoint.h>
51#include <asm/xive.h>
52#include <asm/opal.h>
53#include <asm/firmware.h>
54#include <asm/code-patching.h>
55#include <asm/sections.h>
56
57#ifdef CONFIG_PPC64
58#include <asm/hvcall.h>
59#include <asm/paca.h>
60#endif
61
62#include "nonstdio.h"
63#include "dis-asm.h"
64
65#ifdef CONFIG_SMP
66static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
67static unsigned long xmon_taken = 1;
68static int xmon_owner;
69static int xmon_gate;
70#else
71#define xmon_owner 0
72#endif /* CONFIG_SMP */
73
74#ifdef CONFIG_PPC_PSERIES
75static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
76#endif
77static unsigned long in_xmon __read_mostly = 0;
78static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
79static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE);
80
81static unsigned long adrs;
82static int size = 1;
83#define MAX_DUMP (128 * 1024)
84static unsigned long ndump = 64;
85static unsigned long nidump = 16;
86static unsigned long ncsum = 4096;
87static int termch;
88static char tmpstr[128];
89static int tracing_enabled;
90
91static long bus_error_jmp[JMP_BUF_LEN];
92static int catch_memory_errors;
93static int catch_spr_faults;
94static long *xmon_fault_jmp[NR_CPUS];
95
96/* Breakpoint stuff */
97struct bpt {
98 unsigned long address;
99 unsigned int instr[2];
100 atomic_t ref_count;
101 int enabled;
102 unsigned long pad;
103};
104
105/* Bits in bpt.enabled */
106#define BP_CIABR 1
107#define BP_TRAP 2
108#define BP_DABR 4
109
110#define NBPTS 256
111static struct bpt bpts[NBPTS];
112static struct bpt dabr;
113static struct bpt *iabr;
114static unsigned bpinstr = 0x7fe00008; /* trap */
115
116#define BP_NUM(bp) ((bp) - bpts + 1)
117
118/* Prototypes */
119static int cmds(struct pt_regs *);
120static int mread(unsigned long, void *, int);
121static int mwrite(unsigned long, void *, int);
122static int handle_fault(struct pt_regs *);
123static void byterev(unsigned char *, int);
124static void memex(void);
125static int bsesc(void);
126static void dump(void);
127static void show_pte(unsigned long);
128static void prdump(unsigned long, long);
129static int ppc_inst_dump(unsigned long, long, int);
130static void dump_log_buf(void);
131
132#ifdef CONFIG_PPC_POWERNV
133static void dump_opal_msglog(void);
134#else
135static inline void dump_opal_msglog(void)
136{
137 printf("Machine is not running OPAL firmware.\n");
138}
139#endif
140
141static void backtrace(struct pt_regs *);
142static void excprint(struct pt_regs *);
143static void prregs(struct pt_regs *);
144static void memops(int);
145static void memlocate(void);
146static void memzcan(void);
147static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
148int skipbl(void);
149int scanhex(unsigned long *valp);
150static void scannl(void);
151static int hexdigit(int);
152void getstring(char *, int);
153static void flush_input(void);
154static int inchar(void);
155static void take_input(char *);
156static int read_spr(int, unsigned long *);
157static void write_spr(int, unsigned long);
158static void super_regs(void);
159static void remove_bpts(void);
160static void insert_bpts(void);
161static void remove_cpu_bpts(void);
162static void insert_cpu_bpts(void);
163static struct bpt *at_breakpoint(unsigned long pc);
164static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
165static int do_step(struct pt_regs *);
166static void bpt_cmds(void);
167static void cacheflush(void);
168static int cpu_cmd(void);
169static void csum(void);
170static void bootcmds(void);
171static void proccall(void);
172static void show_tasks(void);
173void dump_segments(void);
174static void symbol_lookup(void);
175static void xmon_show_stack(unsigned long sp, unsigned long lr,
176 unsigned long pc);
177static void xmon_print_symbol(unsigned long address, const char *mid,
178 const char *after);
179static const char *getvecname(unsigned long vec);
180
181static int do_spu_cmd(void);
182
183#ifdef CONFIG_44x
184static void dump_tlb_44x(void);
185#endif
186#ifdef CONFIG_PPC_BOOK3E
187static void dump_tlb_book3e(void);
188#endif
189
190#ifdef CONFIG_PPC64
191#define REG "%.16lx"
192#else
193#define REG "%.8lx"
194#endif
195
196#ifdef __LITTLE_ENDIAN__
197#define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
198#else
199#define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
200#endif
201
202static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n";
203
204static char *help_string = "\
205Commands:\n\
206 b show breakpoints\n\
207 bd set data breakpoint\n\
208 bi set instruction breakpoint\n\
209 bc clear breakpoint\n"
210#ifdef CONFIG_SMP
211 "\
212 c print cpus stopped in xmon\n\
213 c# try to switch to cpu number h (in hex)\n"
214#endif
215 "\
216 C checksum\n\
217 d dump bytes\n\
218 d1 dump 1 byte values\n\
219 d2 dump 2 byte values\n\
220 d4 dump 4 byte values\n\
221 d8 dump 8 byte values\n\
222 di dump instructions\n\
223 df dump float values\n\
224 dd dump double values\n\
225 dl dump the kernel log buffer\n"
226#ifdef CONFIG_PPC_POWERNV
227 "\
228 do dump the OPAL message log\n"
229#endif
230#ifdef CONFIG_PPC64
231 "\
232 dp[#] dump paca for current cpu, or cpu #\n\
233 dpa dump paca for all possible cpus\n"
234#endif
235 "\
236 dr dump stream of raw bytes\n\
237 dv dump virtual address translation \n\
238 dt dump the tracing buffers (uses printk)\n\
239 dtc dump the tracing buffers for current CPU (uses printk)\n\
240"
241#ifdef CONFIG_PPC_POWERNV
242" dx# dump xive on CPU #\n\
243 dxi# dump xive irq state #\n\
244 dxa dump xive on all CPUs\n"
245#endif
246" e print exception information\n\
247 f flush cache\n\
248 la lookup symbol+offset of specified address\n\
249 ls lookup address of specified symbol\n\
250 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\
251 m examine/change memory\n\
252 mm move a block of memory\n\
253 ms set a block of memory\n\
254 md compare two blocks of memory\n\
255 ml locate a block of memory\n\
256 mz zero a block of memory\n\
257 mi show information about memory allocation\n\
258 p call a procedure\n\
259 P list processes/tasks\n\
260 r print registers\n\
261 s single step\n"
262#ifdef CONFIG_SPU_BASE
263" ss stop execution on all spus\n\
264 sr restore execution on stopped spus\n\
265 sf # dump spu fields for spu # (in hex)\n\
266 sd # dump spu local store for spu # (in hex)\n\
267 sdi # disassemble spu local store for spu # (in hex)\n"
268#endif
269" S print special registers\n\
270 Sa print all SPRs\n\
271 Sr # read SPR #\n\
272 Sw #v write v to SPR #\n\
273 t print backtrace\n\
274 x exit monitor and recover\n\
275 X exit monitor and don't recover\n"
276#if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
277" u dump segment table or SLB\n"
278#elif defined(CONFIG_PPC_BOOK3S_32)
279" u dump segment registers\n"
280#elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
281" u dump TLB\n"
282#endif
283" U show uptime information\n"
284" ? help\n"
285" # n limit output to n lines per page (for dp, dpa, dl)\n"
286" zr reboot\n\
287 zh halt\n"
288;
289
290static struct pt_regs *xmon_regs;
291
292static inline void sync(void)
293{
294 asm volatile("sync; isync");
295}
296
297static inline void store_inst(void *p)
298{
299 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
300}
301
302static inline void cflush(void *p)
303{
304 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
305}
306
307static inline void cinval(void *p)
308{
309 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
310}
311
312/**
313 * write_ciabr() - write the CIABR SPR
314 * @ciabr: The value to write.
315 *
316 * This function writes a value to the CIARB register either directly
317 * through mtspr instruction if the kernel is in HV privilege mode or
318 * call a hypervisor function to achieve the same in case the kernel
319 * is in supervisor privilege mode.
320 */
321static void write_ciabr(unsigned long ciabr)
322{
323 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
324 return;
325
326 if (cpu_has_feature(CPU_FTR_HVMODE)) {
327 mtspr(SPRN_CIABR, ciabr);
328 return;
329 }
330 plpar_set_ciabr(ciabr);
331}
332
333/**
334 * set_ciabr() - set the CIABR
335 * @addr: The value to set.
336 *
337 * This function sets the correct privilege value into the the HW
338 * breakpoint address before writing it up in the CIABR register.
339 */
340static void set_ciabr(unsigned long addr)
341{
342 addr &= ~CIABR_PRIV;
343
344 if (cpu_has_feature(CPU_FTR_HVMODE))
345 addr |= CIABR_PRIV_HYPER;
346 else
347 addr |= CIABR_PRIV_SUPER;
348 write_ciabr(addr);
349}
350
351/*
352 * Disable surveillance (the service processor watchdog function)
353 * while we are in xmon.
354 * XXX we should re-enable it when we leave. :)
355 */
356#define SURVEILLANCE_TOKEN 9000
357
358static inline void disable_surveillance(void)
359{
360#ifdef CONFIG_PPC_PSERIES
361 /* Since this can't be a module, args should end up below 4GB. */
362 static struct rtas_args args;
363
364 /*
365 * At this point we have got all the cpus we can into
366 * xmon, so there is hopefully no other cpu calling RTAS
367 * at the moment, even though we don't take rtas.lock.
368 * If we did try to take rtas.lock there would be a
369 * real possibility of deadlock.
370 */
371 if (set_indicator_token == RTAS_UNKNOWN_SERVICE)
372 return;
373
374 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL,
375 SURVEILLANCE_TOKEN, 0, 0);
376
377#endif /* CONFIG_PPC_PSERIES */
378}
379
380#ifdef CONFIG_SMP
381static int xmon_speaker;
382
383static void get_output_lock(void)
384{
385 int me = smp_processor_id() + 0x100;
386 int last_speaker = 0, prev;
387 long timeout;
388
389 if (xmon_speaker == me)
390 return;
391
392 for (;;) {
393 last_speaker = cmpxchg(&xmon_speaker, 0, me);
394 if (last_speaker == 0)
395 return;
396
397 /*
398 * Wait a full second for the lock, we might be on a slow
399 * console, but check every 100us.
400 */
401 timeout = 10000;
402 while (xmon_speaker == last_speaker) {
403 if (--timeout > 0) {
404 udelay(100);
405 continue;
406 }
407
408 /* hostile takeover */
409 prev = cmpxchg(&xmon_speaker, last_speaker, me);
410 if (prev == last_speaker)
411 return;
412 break;
413 }
414 }
415}
416
417static void release_output_lock(void)
418{
419 xmon_speaker = 0;
420}
421
422int cpus_are_in_xmon(void)
423{
424 return !cpumask_empty(&cpus_in_xmon);
425}
426
427static bool wait_for_other_cpus(int ncpus)
428{
429 unsigned long timeout;
430
431 /* We wait for 2s, which is a metric "little while" */
432 for (timeout = 20000; timeout != 0; --timeout) {
433 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
434 return true;
435 udelay(100);
436 barrier();
437 }
438
439 return false;
440}
441#endif /* CONFIG_SMP */
442
443static inline int unrecoverable_excp(struct pt_regs *regs)
444{
445#if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
446 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
447 return 0;
448#else
449 return ((regs->msr & MSR_RI) == 0);
450#endif
451}
452
453static int xmon_core(struct pt_regs *regs, int fromipi)
454{
455 int cmd = 0;
456 struct bpt *bp;
457 long recurse_jmp[JMP_BUF_LEN];
458 unsigned long offset;
459 unsigned long flags;
460#ifdef CONFIG_SMP
461 int cpu;
462 int secondary;
463#endif
464
465 local_irq_save(flags);
466 hard_irq_disable();
467
468 if (!fromipi) {
469 tracing_enabled = tracing_is_on();
470 tracing_off();
471 }
472
473 bp = in_breakpoint_table(regs->nip, &offset);
474 if (bp != NULL) {
475 regs->nip = bp->address + offset;
476 atomic_dec(&bp->ref_count);
477 }
478
479 remove_cpu_bpts();
480
481#ifdef CONFIG_SMP
482 cpu = smp_processor_id();
483 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
484 /*
485 * We catch SPR read/write faults here because the 0x700, 0xf60
486 * etc. handlers don't call debugger_fault_handler().
487 */
488 if (catch_spr_faults)
489 longjmp(bus_error_jmp, 1);
490 get_output_lock();
491 excprint(regs);
492 printf("cpu 0x%x: Exception %lx %s in xmon, "
493 "returning to main loop\n",
494 cpu, regs->trap, getvecname(TRAP(regs)));
495 release_output_lock();
496 longjmp(xmon_fault_jmp[cpu], 1);
497 }
498
499 if (setjmp(recurse_jmp) != 0) {
500 if (!in_xmon || !xmon_gate) {
501 get_output_lock();
502 printf("xmon: WARNING: bad recursive fault "
503 "on cpu 0x%x\n", cpu);
504 release_output_lock();
505 goto waiting;
506 }
507 secondary = !(xmon_taken && cpu == xmon_owner);
508 goto cmdloop;
509 }
510
511 xmon_fault_jmp[cpu] = recurse_jmp;
512
513 bp = NULL;
514 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
515 bp = at_breakpoint(regs->nip);
516 if (bp || unrecoverable_excp(regs))
517 fromipi = 0;
518
519 if (!fromipi) {
520 get_output_lock();
521 excprint(regs);
522 if (bp) {
523 printf("cpu 0x%x stopped at breakpoint 0x%tx (",
524 cpu, BP_NUM(bp));
525 xmon_print_symbol(regs->nip, " ", ")\n");
526 }
527 if (unrecoverable_excp(regs))
528 printf("WARNING: exception is not recoverable, "
529 "can't continue\n");
530 release_output_lock();
531 }
532
533 cpumask_set_cpu(cpu, &cpus_in_xmon);
534
535 waiting:
536 secondary = 1;
537 spin_begin();
538 while (secondary && !xmon_gate) {
539 if (in_xmon == 0) {
540 if (fromipi) {
541 spin_end();
542 goto leave;
543 }
544 secondary = test_and_set_bit(0, &in_xmon);
545 }
546 spin_cpu_relax();
547 touch_nmi_watchdog();
548 }
549 spin_end();
550
551 if (!secondary && !xmon_gate) {
552 /* we are the first cpu to come in */
553 /* interrupt other cpu(s) */
554 int ncpus = num_online_cpus();
555
556 xmon_owner = cpu;
557 mb();
558 if (ncpus > 1) {
559 /*
560 * A system reset (trap == 0x100) can be triggered on
561 * all CPUs, so when we come in via 0x100 try waiting
562 * for the other CPUs to come in before we send the
563 * debugger break (IPI). This is similar to
564 * crash_kexec_secondary().
565 */
566 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
567 smp_send_debugger_break();
568
569 wait_for_other_cpus(ncpus);
570 }
571 remove_bpts();
572 disable_surveillance();
573 /* for breakpoint or single step, print the current instr. */
574 if (bp || TRAP(regs) == 0xd00)
575 ppc_inst_dump(regs->nip, 1, 0);
576 printf("enter ? for help\n");
577 mb();
578 xmon_gate = 1;
579 barrier();
580 touch_nmi_watchdog();
581 }
582
583 cmdloop:
584 while (in_xmon) {
585 if (secondary) {
586 spin_begin();
587 if (cpu == xmon_owner) {
588 if (!test_and_set_bit(0, &xmon_taken)) {
589 secondary = 0;
590 spin_end();
591 continue;
592 }
593 /* missed it */
594 while (cpu == xmon_owner)
595 spin_cpu_relax();
596 }
597 spin_cpu_relax();
598 touch_nmi_watchdog();
599 } else {
600 cmd = cmds(regs);
601 if (cmd != 0) {
602 /* exiting xmon */
603 insert_bpts();
604 xmon_gate = 0;
605 wmb();
606 in_xmon = 0;
607 break;
608 }
609 /* have switched to some other cpu */
610 secondary = 1;
611 }
612 }
613 leave:
614 cpumask_clear_cpu(cpu, &cpus_in_xmon);
615 xmon_fault_jmp[cpu] = NULL;
616#else
617 /* UP is simple... */
618 if (in_xmon) {
619 printf("Exception %lx %s in xmon, returning to main loop\n",
620 regs->trap, getvecname(TRAP(regs)));
621 longjmp(xmon_fault_jmp[0], 1);
622 }
623 if (setjmp(recurse_jmp) == 0) {
624 xmon_fault_jmp[0] = recurse_jmp;
625 in_xmon = 1;
626
627 excprint(regs);
628 bp = at_breakpoint(regs->nip);
629 if (bp) {
630 printf("Stopped at breakpoint %tx (", BP_NUM(bp));
631 xmon_print_symbol(regs->nip, " ", ")\n");
632 }
633 if (unrecoverable_excp(regs))
634 printf("WARNING: exception is not recoverable, "
635 "can't continue\n");
636 remove_bpts();
637 disable_surveillance();
638 /* for breakpoint or single step, print the current instr. */
639 if (bp || TRAP(regs) == 0xd00)
640 ppc_inst_dump(regs->nip, 1, 0);
641 printf("enter ? for help\n");
642 }
643
644 cmd = cmds(regs);
645
646 insert_bpts();
647 in_xmon = 0;
648#endif
649
650#ifdef CONFIG_BOOKE
651 if (regs->msr & MSR_DE) {
652 bp = at_breakpoint(regs->nip);
653 if (bp != NULL) {
654 regs->nip = (unsigned long) &bp->instr[0];
655 atomic_inc(&bp->ref_count);
656 }
657 }
658#else
659 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
660 bp = at_breakpoint(regs->nip);
661 if (bp != NULL) {
662 int stepped = emulate_step(regs, bp->instr[0]);
663 if (stepped == 0) {
664 regs->nip = (unsigned long) &bp->instr[0];
665 atomic_inc(&bp->ref_count);
666 } else if (stepped < 0) {
667 printf("Couldn't single-step %s instruction\n",
668 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
669 }
670 }
671 }
672#endif
673 insert_cpu_bpts();
674
675 touch_nmi_watchdog();
676 local_irq_restore(flags);
677
678 return cmd != 'X' && cmd != EOF;
679}
680
681int xmon(struct pt_regs *excp)
682{
683 struct pt_regs regs;
684
685 if (excp == NULL) {
686 ppc_save_regs(®s);
687 excp = ®s;
688 }
689
690 return xmon_core(excp, 0);
691}
692EXPORT_SYMBOL(xmon);
693
694irqreturn_t xmon_irq(int irq, void *d)
695{
696 unsigned long flags;
697 local_irq_save(flags);
698 printf("Keyboard interrupt\n");
699 xmon(get_irq_regs());
700 local_irq_restore(flags);
701 return IRQ_HANDLED;
702}
703
704static int xmon_bpt(struct pt_regs *regs)
705{
706 struct bpt *bp;
707 unsigned long offset;
708
709 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
710 return 0;
711
712 /* Are we at the trap at bp->instr[1] for some bp? */
713 bp = in_breakpoint_table(regs->nip, &offset);
714 if (bp != NULL && offset == 4) {
715 regs->nip = bp->address + 4;
716 atomic_dec(&bp->ref_count);
717 return 1;
718 }
719
720 /* Are we at a breakpoint? */
721 bp = at_breakpoint(regs->nip);
722 if (!bp)
723 return 0;
724
725 xmon_core(regs, 0);
726
727 return 1;
728}
729
730static int xmon_sstep(struct pt_regs *regs)
731{
732 if (user_mode(regs))
733 return 0;
734 xmon_core(regs, 0);
735 return 1;
736}
737
738static int xmon_break_match(struct pt_regs *regs)
739{
740 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
741 return 0;
742 if (dabr.enabled == 0)
743 return 0;
744 xmon_core(regs, 0);
745 return 1;
746}
747
748static int xmon_iabr_match(struct pt_regs *regs)
749{
750 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
751 return 0;
752 if (iabr == NULL)
753 return 0;
754 xmon_core(regs, 0);
755 return 1;
756}
757
758static int xmon_ipi(struct pt_regs *regs)
759{
760#ifdef CONFIG_SMP
761 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
762 xmon_core(regs, 1);
763#endif
764 return 0;
765}
766
767static int xmon_fault_handler(struct pt_regs *regs)
768{
769 struct bpt *bp;
770 unsigned long offset;
771
772 if (in_xmon && catch_memory_errors)
773 handle_fault(regs); /* doesn't return */
774
775 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
776 bp = in_breakpoint_table(regs->nip, &offset);
777 if (bp != NULL) {
778 regs->nip = bp->address + offset;
779 atomic_dec(&bp->ref_count);
780 }
781 }
782
783 return 0;
784}
785
786/* Force enable xmon if not already enabled */
787static inline void force_enable_xmon(void)
788{
789 /* Enable xmon hooks if needed */
790 if (!xmon_on) {
791 printf("xmon: Enabling debugger hooks\n");
792 xmon_on = 1;
793 }
794}
795
796static struct bpt *at_breakpoint(unsigned long pc)
797{
798 int i;
799 struct bpt *bp;
800
801 bp = bpts;
802 for (i = 0; i < NBPTS; ++i, ++bp)
803 if (bp->enabled && pc == bp->address)
804 return bp;
805 return NULL;
806}
807
808static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
809{
810 unsigned long off;
811
812 off = nip - (unsigned long) bpts;
813 if (off >= sizeof(bpts))
814 return NULL;
815 off %= sizeof(struct bpt);
816 if (off != offsetof(struct bpt, instr[0])
817 && off != offsetof(struct bpt, instr[1]))
818 return NULL;
819 *offp = off - offsetof(struct bpt, instr[0]);
820 return (struct bpt *) (nip - off);
821}
822
823static struct bpt *new_breakpoint(unsigned long a)
824{
825 struct bpt *bp;
826
827 a &= ~3UL;
828 bp = at_breakpoint(a);
829 if (bp)
830 return bp;
831
832 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
833 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
834 bp->address = a;
835 bp->instr[1] = bpinstr;
836 store_inst(&bp->instr[1]);
837 return bp;
838 }
839 }
840
841 printf("Sorry, no free breakpoints. Please clear one first.\n");
842 return NULL;
843}
844
845static void insert_bpts(void)
846{
847 int i;
848 struct bpt *bp;
849
850 bp = bpts;
851 for (i = 0; i < NBPTS; ++i, ++bp) {
852 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
853 continue;
854 if (mread(bp->address, &bp->instr[0], 4) != 4) {
855 printf("Couldn't read instruction at %lx, "
856 "disabling breakpoint there\n", bp->address);
857 bp->enabled = 0;
858 continue;
859 }
860 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
861 printf("Breakpoint at %lx is on an mtmsrd or rfid "
862 "instruction, disabling it\n", bp->address);
863 bp->enabled = 0;
864 continue;
865 }
866 store_inst(&bp->instr[0]);
867 if (bp->enabled & BP_CIABR)
868 continue;
869 if (patch_instruction((unsigned int *)bp->address,
870 bpinstr) != 0) {
871 printf("Couldn't write instruction at %lx, "
872 "disabling breakpoint there\n", bp->address);
873 bp->enabled &= ~BP_TRAP;
874 continue;
875 }
876 store_inst((void *)bp->address);
877 }
878}
879
880static void insert_cpu_bpts(void)
881{
882 struct arch_hw_breakpoint brk;
883
884 if (dabr.enabled) {
885 brk.address = dabr.address;
886 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
887 brk.len = 8;
888 __set_breakpoint(&brk);
889 }
890
891 if (iabr)
892 set_ciabr(iabr->address);
893}
894
895static void remove_bpts(void)
896{
897 int i;
898 struct bpt *bp;
899 unsigned instr;
900
901 bp = bpts;
902 for (i = 0; i < NBPTS; ++i, ++bp) {
903 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
904 continue;
905 if (mread(bp->address, &instr, 4) == 4
906 && instr == bpinstr
907 && patch_instruction(
908 (unsigned int *)bp->address, bp->instr[0]) != 0)
909 printf("Couldn't remove breakpoint at %lx\n",
910 bp->address);
911 else
912 store_inst((void *)bp->address);
913 }
914}
915
916static void remove_cpu_bpts(void)
917{
918 hw_breakpoint_disable();
919 write_ciabr(0);
920}
921
922/* Based on uptime_proc_show(). */
923static void
924show_uptime(void)
925{
926 struct timespec64 uptime;
927
928 if (setjmp(bus_error_jmp) == 0) {
929 catch_memory_errors = 1;
930 sync();
931
932 ktime_get_coarse_boottime_ts64(&uptime);
933 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec,
934 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100)));
935
936 sync();
937 __delay(200); \
938 }
939 catch_memory_errors = 0;
940}
941
942static void set_lpp_cmd(void)
943{
944 unsigned long lpp;
945
946 if (!scanhex(&lpp)) {
947 printf("Invalid number.\n");
948 lpp = 0;
949 }
950 xmon_set_pagination_lpp(lpp);
951}
952/* Command interpreting routine */
953static char *last_cmd;
954
955static int
956cmds(struct pt_regs *excp)
957{
958 int cmd = 0;
959
960 last_cmd = NULL;
961 xmon_regs = excp;
962
963 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
964
965 for(;;) {
966#ifdef CONFIG_SMP
967 printf("%x:", smp_processor_id());
968#endif /* CONFIG_SMP */
969 printf("mon> ");
970 flush_input();
971 termch = 0;
972 cmd = skipbl();
973 if( cmd == '\n' ) {
974 if (last_cmd == NULL)
975 continue;
976 take_input(last_cmd);
977 last_cmd = NULL;
978 cmd = inchar();
979 }
980 switch (cmd) {
981 case 'm':
982 cmd = inchar();
983 switch (cmd) {
984 case 'm':
985 case 's':
986 case 'd':
987 memops(cmd);
988 break;
989 case 'l':
990 memlocate();
991 break;
992 case 'z':
993 if (xmon_is_ro) {
994 printf(xmon_ro_msg);
995 break;
996 }
997 memzcan();
998 break;
999 case 'i':
1000 show_mem(0, NULL);
1001 break;
1002 default:
1003 termch = cmd;
1004 memex();
1005 }
1006 break;
1007 case 'd':
1008 dump();
1009 break;
1010 case 'l':
1011 symbol_lookup();
1012 break;
1013 case 'r':
1014 prregs(excp); /* print regs */
1015 break;
1016 case 'e':
1017 excprint(excp);
1018 break;
1019 case 'S':
1020 super_regs();
1021 break;
1022 case 't':
1023 backtrace(excp);
1024 break;
1025 case 'f':
1026 cacheflush();
1027 break;
1028 case 's':
1029 if (do_spu_cmd() == 0)
1030 break;
1031 if (do_step(excp))
1032 return cmd;
1033 break;
1034 case 'x':
1035 case 'X':
1036 if (tracing_enabled)
1037 tracing_on();
1038 return cmd;
1039 case EOF:
1040 printf(" <no input ...>\n");
1041 mdelay(2000);
1042 return cmd;
1043 case '?':
1044 xmon_puts(help_string);
1045 break;
1046 case '#':
1047 set_lpp_cmd();
1048 break;
1049 case 'b':
1050 if (xmon_is_ro) {
1051 printf(xmon_ro_msg);
1052 break;
1053 }
1054 bpt_cmds();
1055 break;
1056 case 'C':
1057 csum();
1058 break;
1059 case 'c':
1060 if (cpu_cmd())
1061 return 0;
1062 break;
1063 case 'z':
1064 bootcmds();
1065 break;
1066 case 'p':
1067 if (xmon_is_ro) {
1068 printf(xmon_ro_msg);
1069 break;
1070 }
1071 proccall();
1072 break;
1073 case 'P':
1074 show_tasks();
1075 break;
1076#ifdef CONFIG_PPC_BOOK3S
1077 case 'u':
1078 dump_segments();
1079 break;
1080#elif defined(CONFIG_44x)
1081 case 'u':
1082 dump_tlb_44x();
1083 break;
1084#elif defined(CONFIG_PPC_BOOK3E)
1085 case 'u':
1086 dump_tlb_book3e();
1087 break;
1088#endif
1089 case 'U':
1090 show_uptime();
1091 break;
1092 default:
1093 printf("Unrecognized command: ");
1094 do {
1095 if (' ' < cmd && cmd <= '~')
1096 putchar(cmd);
1097 else
1098 printf("\\x%x", cmd);
1099 cmd = inchar();
1100 } while (cmd != '\n');
1101 printf(" (type ? for help)\n");
1102 break;
1103 }
1104 }
1105}
1106
1107#ifdef CONFIG_BOOKE
1108static int do_step(struct pt_regs *regs)
1109{
1110 regs->msr |= MSR_DE;
1111 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1112 return 1;
1113}
1114#else
1115/*
1116 * Step a single instruction.
1117 * Some instructions we emulate, others we execute with MSR_SE set.
1118 */
1119static int do_step(struct pt_regs *regs)
1120{
1121 unsigned int instr;
1122 int stepped;
1123
1124 force_enable_xmon();
1125 /* check we are in 64-bit kernel mode, translation enabled */
1126 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1127 if (mread(regs->nip, &instr, 4) == 4) {
1128 stepped = emulate_step(regs, instr);
1129 if (stepped < 0) {
1130 printf("Couldn't single-step %s instruction\n",
1131 (IS_RFID(instr)? "rfid": "mtmsrd"));
1132 return 0;
1133 }
1134 if (stepped > 0) {
1135 regs->trap = 0xd00 | (regs->trap & 1);
1136 printf("stepped to ");
1137 xmon_print_symbol(regs->nip, " ", "\n");
1138 ppc_inst_dump(regs->nip, 1, 0);
1139 return 0;
1140 }
1141 }
1142 }
1143 regs->msr |= MSR_SE;
1144 return 1;
1145}
1146#endif
1147
1148static void bootcmds(void)
1149{
1150 int cmd;
1151
1152 cmd = inchar();
1153 if (cmd == 'r')
1154 ppc_md.restart(NULL);
1155 else if (cmd == 'h')
1156 ppc_md.halt();
1157 else if (cmd == 'p')
1158 if (pm_power_off)
1159 pm_power_off();
1160}
1161
1162static int cpu_cmd(void)
1163{
1164#ifdef CONFIG_SMP
1165 unsigned long cpu, first_cpu, last_cpu;
1166 int timeout;
1167
1168 if (!scanhex(&cpu)) {
1169 /* print cpus waiting or in xmon */
1170 printf("cpus stopped:");
1171 last_cpu = first_cpu = NR_CPUS;
1172 for_each_possible_cpu(cpu) {
1173 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1174 if (cpu == last_cpu + 1) {
1175 last_cpu = cpu;
1176 } else {
1177 if (last_cpu != first_cpu)
1178 printf("-0x%lx", last_cpu);
1179 last_cpu = first_cpu = cpu;
1180 printf(" 0x%lx", cpu);
1181 }
1182 }
1183 }
1184 if (last_cpu != first_cpu)
1185 printf("-0x%lx", last_cpu);
1186 printf("\n");
1187 return 0;
1188 }
1189 /* try to switch to cpu specified */
1190 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1191 printf("cpu 0x%lx isn't in xmon\n", cpu);
1192#ifdef CONFIG_PPC64
1193 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu);
1194 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0);
1195#endif
1196 return 0;
1197 }
1198 xmon_taken = 0;
1199 mb();
1200 xmon_owner = cpu;
1201 timeout = 10000000;
1202 while (!xmon_taken) {
1203 if (--timeout == 0) {
1204 if (test_and_set_bit(0, &xmon_taken))
1205 break;
1206 /* take control back */
1207 mb();
1208 xmon_owner = smp_processor_id();
1209 printf("cpu 0x%lx didn't take control\n", cpu);
1210 return 0;
1211 }
1212 barrier();
1213 }
1214 return 1;
1215#else
1216 return 0;
1217#endif /* CONFIG_SMP */
1218}
1219
1220static unsigned short fcstab[256] = {
1221 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1222 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1223 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1224 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1225 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1226 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1227 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1228 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1229 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1230 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1231 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1232 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1233 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1234 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1235 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1236 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1237 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1238 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1239 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1240 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1241 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1242 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1243 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1244 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1245 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1246 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1247 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1248 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1249 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1250 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1251 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1252 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1253};
1254
1255#define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1256
1257static void
1258csum(void)
1259{
1260 unsigned int i;
1261 unsigned short fcs;
1262 unsigned char v;
1263
1264 if (!scanhex(&adrs))
1265 return;
1266 if (!scanhex(&ncsum))
1267 return;
1268 fcs = 0xffff;
1269 for (i = 0; i < ncsum; ++i) {
1270 if (mread(adrs+i, &v, 1) == 0) {
1271 printf("csum stopped at "REG"\n", adrs+i);
1272 break;
1273 }
1274 fcs = FCS(fcs, v);
1275 }
1276 printf("%x\n", fcs);
1277}
1278
1279/*
1280 * Check if this is a suitable place to put a breakpoint.
1281 */
1282static long check_bp_loc(unsigned long addr)
1283{
1284 unsigned int instr;
1285
1286 addr &= ~3;
1287 if (!is_kernel_addr(addr)) {
1288 printf("Breakpoints may only be placed at kernel addresses\n");
1289 return 0;
1290 }
1291 if (!mread(addr, &instr, sizeof(instr))) {
1292 printf("Can't read instruction at address %lx\n", addr);
1293 return 0;
1294 }
1295 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1296 printf("Breakpoints may not be placed on mtmsrd or rfid "
1297 "instructions\n");
1298 return 0;
1299 }
1300 return 1;
1301}
1302
1303static char *breakpoint_help_string =
1304 "Breakpoint command usage:\n"
1305 "b show breakpoints\n"
1306 "b <addr> [cnt] set breakpoint at given instr addr\n"
1307 "bc clear all breakpoints\n"
1308 "bc <n/addr> clear breakpoint number n or at addr\n"
1309 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1310 "bd <addr> [cnt] set hardware data breakpoint\n"
1311 "";
1312
1313static void
1314bpt_cmds(void)
1315{
1316 int cmd;
1317 unsigned long a;
1318 int i;
1319 struct bpt *bp;
1320
1321 cmd = inchar();
1322 switch (cmd) {
1323#ifndef CONFIG_PPC_8xx
1324 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1325 int mode;
1326 case 'd': /* bd - hardware data breakpoint */
1327 if (!ppc_breakpoint_available()) {
1328 printf("Hardware data breakpoint not supported on this cpu\n");
1329 break;
1330 }
1331 mode = 7;
1332 cmd = inchar();
1333 if (cmd == 'r')
1334 mode = 5;
1335 else if (cmd == 'w')
1336 mode = 6;
1337 else
1338 termch = cmd;
1339 dabr.address = 0;
1340 dabr.enabled = 0;
1341 if (scanhex(&dabr.address)) {
1342 if (!is_kernel_addr(dabr.address)) {
1343 printf(badaddr);
1344 break;
1345 }
1346 dabr.address &= ~HW_BRK_TYPE_DABR;
1347 dabr.enabled = mode | BP_DABR;
1348 }
1349
1350 force_enable_xmon();
1351 break;
1352
1353 case 'i': /* bi - hardware instr breakpoint */
1354 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1355 printf("Hardware instruction breakpoint "
1356 "not supported on this cpu\n");
1357 break;
1358 }
1359 if (iabr) {
1360 iabr->enabled &= ~BP_CIABR;
1361 iabr = NULL;
1362 }
1363 if (!scanhex(&a))
1364 break;
1365 if (!check_bp_loc(a))
1366 break;
1367 bp = new_breakpoint(a);
1368 if (bp != NULL) {
1369 bp->enabled |= BP_CIABR;
1370 iabr = bp;
1371 force_enable_xmon();
1372 }
1373 break;
1374#endif
1375
1376 case 'c':
1377 if (!scanhex(&a)) {
1378 /* clear all breakpoints */
1379 for (i = 0; i < NBPTS; ++i)
1380 bpts[i].enabled = 0;
1381 iabr = NULL;
1382 dabr.enabled = 0;
1383 printf("All breakpoints cleared\n");
1384 break;
1385 }
1386
1387 if (a <= NBPTS && a >= 1) {
1388 /* assume a breakpoint number */
1389 bp = &bpts[a-1]; /* bp nums are 1 based */
1390 } else {
1391 /* assume a breakpoint address */
1392 bp = at_breakpoint(a);
1393 if (bp == NULL) {
1394 printf("No breakpoint at %lx\n", a);
1395 break;
1396 }
1397 }
1398
1399 printf("Cleared breakpoint %tx (", BP_NUM(bp));
1400 xmon_print_symbol(bp->address, " ", ")\n");
1401 bp->enabled = 0;
1402 break;
1403
1404 default:
1405 termch = cmd;
1406 cmd = skipbl();
1407 if (cmd == '?') {
1408 printf(breakpoint_help_string);
1409 break;
1410 }
1411 termch = cmd;
1412 if (!scanhex(&a)) {
1413 /* print all breakpoints */
1414 printf(" type address\n");
1415 if (dabr.enabled) {
1416 printf(" data "REG" [", dabr.address);
1417 if (dabr.enabled & 1)
1418 printf("r");
1419 if (dabr.enabled & 2)
1420 printf("w");
1421 printf("]\n");
1422 }
1423 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1424 if (!bp->enabled)
1425 continue;
1426 printf("%tx %s ", BP_NUM(bp),
1427 (bp->enabled & BP_CIABR) ? "inst": "trap");
1428 xmon_print_symbol(bp->address, " ", "\n");
1429 }
1430 break;
1431 }
1432
1433 if (!check_bp_loc(a))
1434 break;
1435 bp = new_breakpoint(a);
1436 if (bp != NULL) {
1437 bp->enabled |= BP_TRAP;
1438 force_enable_xmon();
1439 }
1440 break;
1441 }
1442}
1443
1444/* Very cheap human name for vector lookup. */
1445static
1446const char *getvecname(unsigned long vec)
1447{
1448 char *ret;
1449
1450 switch (vec) {
1451 case 0x100: ret = "(System Reset)"; break;
1452 case 0x200: ret = "(Machine Check)"; break;
1453 case 0x300: ret = "(Data Access)"; break;
1454 case 0x380:
1455 if (radix_enabled())
1456 ret = "(Data Access Out of Range)";
1457 else
1458 ret = "(Data SLB Access)";
1459 break;
1460 case 0x400: ret = "(Instruction Access)"; break;
1461 case 0x480:
1462 if (radix_enabled())
1463 ret = "(Instruction Access Out of Range)";
1464 else
1465 ret = "(Instruction SLB Access)";
1466 break;
1467 case 0x500: ret = "(Hardware Interrupt)"; break;
1468 case 0x600: ret = "(Alignment)"; break;
1469 case 0x700: ret = "(Program Check)"; break;
1470 case 0x800: ret = "(FPU Unavailable)"; break;
1471 case 0x900: ret = "(Decrementer)"; break;
1472 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1473 case 0xa00: ret = "(Doorbell)"; break;
1474 case 0xc00: ret = "(System Call)"; break;
1475 case 0xd00: ret = "(Single Step)"; break;
1476 case 0xe40: ret = "(Emulation Assist)"; break;
1477 case 0xe60: ret = "(HMI)"; break;
1478 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1479 case 0xf00: ret = "(Performance Monitor)"; break;
1480 case 0xf20: ret = "(Altivec Unavailable)"; break;
1481 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1482 case 0x1500: ret = "(Denormalisation)"; break;
1483 case 0x1700: ret = "(Altivec Assist)"; break;
1484 default: ret = "";
1485 }
1486 return ret;
1487}
1488
1489static void get_function_bounds(unsigned long pc, unsigned long *startp,
1490 unsigned long *endp)
1491{
1492 unsigned long size, offset;
1493 const char *name;
1494
1495 *startp = *endp = 0;
1496 if (pc == 0)
1497 return;
1498 if (setjmp(bus_error_jmp) == 0) {
1499 catch_memory_errors = 1;
1500 sync();
1501 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1502 if (name != NULL) {
1503 *startp = pc - offset;
1504 *endp = pc - offset + size;
1505 }
1506 sync();
1507 }
1508 catch_memory_errors = 0;
1509}
1510
1511#define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1512#define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
1513
1514static void xmon_show_stack(unsigned long sp, unsigned long lr,
1515 unsigned long pc)
1516{
1517 int max_to_print = 64;
1518 unsigned long ip;
1519 unsigned long newsp;
1520 unsigned long marker;
1521 struct pt_regs regs;
1522
1523 while (max_to_print--) {
1524 if (!is_kernel_addr(sp)) {
1525 if (sp != 0)
1526 printf("SP (%lx) is in userspace\n", sp);
1527 break;
1528 }
1529
1530 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1531 || !mread(sp, &newsp, sizeof(unsigned long))) {
1532 printf("Couldn't read stack frame at %lx\n", sp);
1533 break;
1534 }
1535
1536 /*
1537 * For the first stack frame, try to work out if
1538 * LR and/or the saved LR value in the bottommost
1539 * stack frame are valid.
1540 */
1541 if ((pc | lr) != 0) {
1542 unsigned long fnstart, fnend;
1543 unsigned long nextip;
1544 int printip = 1;
1545
1546 get_function_bounds(pc, &fnstart, &fnend);
1547 nextip = 0;
1548 if (newsp > sp)
1549 mread(newsp + LRSAVE_OFFSET, &nextip,
1550 sizeof(unsigned long));
1551 if (lr == ip) {
1552 if (!is_kernel_addr(lr)
1553 || (fnstart <= lr && lr < fnend))
1554 printip = 0;
1555 } else if (lr == nextip) {
1556 printip = 0;
1557 } else if (is_kernel_addr(lr)
1558 && !(fnstart <= lr && lr < fnend)) {
1559 printf("[link register ] ");
1560 xmon_print_symbol(lr, " ", "\n");
1561 }
1562 if (printip) {
1563 printf("["REG"] ", sp);
1564 xmon_print_symbol(ip, " ", " (unreliable)\n");
1565 }
1566 pc = lr = 0;
1567
1568 } else {
1569 printf("["REG"] ", sp);
1570 xmon_print_symbol(ip, " ", "\n");
1571 }
1572
1573 /* Look for "regshere" marker to see if this is
1574 an exception frame. */
1575 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1576 && marker == STACK_FRAME_REGS_MARKER) {
1577 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs))
1578 != sizeof(regs)) {
1579 printf("Couldn't read registers at %lx\n",
1580 sp + STACK_FRAME_OVERHEAD);
1581 break;
1582 }
1583 printf("--- Exception: %lx %s at ", regs.trap,
1584 getvecname(TRAP(®s)));
1585 pc = regs.nip;
1586 lr = regs.link;
1587 xmon_print_symbol(pc, " ", "\n");
1588 }
1589
1590 if (newsp == 0)
1591 break;
1592
1593 sp = newsp;
1594 }
1595}
1596
1597static void backtrace(struct pt_regs *excp)
1598{
1599 unsigned long sp;
1600
1601 if (scanhex(&sp))
1602 xmon_show_stack(sp, 0, 0);
1603 else
1604 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1605 scannl();
1606}
1607
1608static void print_bug_trap(struct pt_regs *regs)
1609{
1610#ifdef CONFIG_BUG
1611 const struct bug_entry *bug;
1612 unsigned long addr;
1613
1614 if (regs->msr & MSR_PR)
1615 return; /* not in kernel */
1616 addr = regs->nip; /* address of trap instruction */
1617 if (!is_kernel_addr(addr))
1618 return;
1619 bug = find_bug(regs->nip);
1620 if (bug == NULL)
1621 return;
1622 if (is_warning_bug(bug))
1623 return;
1624
1625#ifdef CONFIG_DEBUG_BUGVERBOSE
1626 printf("kernel BUG at %s:%u!\n",
1627 bug->file, bug->line);
1628#else
1629 printf("kernel BUG at %px!\n", (void *)bug->bug_addr);
1630#endif
1631#endif /* CONFIG_BUG */
1632}
1633
1634static void excprint(struct pt_regs *fp)
1635{
1636 unsigned long trap;
1637
1638#ifdef CONFIG_SMP
1639 printf("cpu 0x%x: ", smp_processor_id());
1640#endif /* CONFIG_SMP */
1641
1642 trap = TRAP(fp);
1643 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp);
1644 printf(" pc: ");
1645 xmon_print_symbol(fp->nip, ": ", "\n");
1646
1647 printf(" lr: ");
1648 xmon_print_symbol(fp->link, ": ", "\n");
1649
1650 printf(" sp: %lx\n", fp->gpr[1]);
1651 printf(" msr: %lx\n", fp->msr);
1652
1653 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1654 printf(" dar: %lx\n", fp->dar);
1655 if (trap != 0x380)
1656 printf(" dsisr: %lx\n", fp->dsisr);
1657 }
1658
1659 printf(" current = 0x%px\n", current);
1660#ifdef CONFIG_PPC64
1661 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n",
1662 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened);
1663#endif
1664 if (current) {
1665 printf(" pid = %d, comm = %s\n",
1666 current->pid, current->comm);
1667 }
1668
1669 if (trap == 0x700)
1670 print_bug_trap(fp);
1671
1672 printf(linux_banner);
1673}
1674
1675static void prregs(struct pt_regs *fp)
1676{
1677 int n, trap;
1678 unsigned long base;
1679 struct pt_regs regs;
1680
1681 if (scanhex(&base)) {
1682 if (setjmp(bus_error_jmp) == 0) {
1683 catch_memory_errors = 1;
1684 sync();
1685 regs = *(struct pt_regs *)base;
1686 sync();
1687 __delay(200);
1688 } else {
1689 catch_memory_errors = 0;
1690 printf("*** Error reading registers from "REG"\n",
1691 base);
1692 return;
1693 }
1694 catch_memory_errors = 0;
1695 fp = ®s;
1696 }
1697
1698#ifdef CONFIG_PPC64
1699 if (FULL_REGS(fp)) {
1700 for (n = 0; n < 16; ++n)
1701 printf("R%.2d = "REG" R%.2d = "REG"\n",
1702 n, fp->gpr[n], n+16, fp->gpr[n+16]);
1703 } else {
1704 for (n = 0; n < 7; ++n)
1705 printf("R%.2d = "REG" R%.2d = "REG"\n",
1706 n, fp->gpr[n], n+7, fp->gpr[n+7]);
1707 }
1708#else
1709 for (n = 0; n < 32; ++n) {
1710 printf("R%.2d = %.8lx%s", n, fp->gpr[n],
1711 (n & 3) == 3? "\n": " ");
1712 if (n == 12 && !FULL_REGS(fp)) {
1713 printf("\n");
1714 break;
1715 }
1716 }
1717#endif
1718 printf("pc = ");
1719 xmon_print_symbol(fp->nip, " ", "\n");
1720 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1721 printf("cfar= ");
1722 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1723 }
1724 printf("lr = ");
1725 xmon_print_symbol(fp->link, " ", "\n");
1726 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1727 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1728 fp->ctr, fp->xer, fp->trap);
1729 trap = TRAP(fp);
1730 if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1731 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1732}
1733
1734static void cacheflush(void)
1735{
1736 int cmd;
1737 unsigned long nflush;
1738
1739 cmd = inchar();
1740 if (cmd != 'i')
1741 termch = cmd;
1742 scanhex((void *)&adrs);
1743 if (termch != '\n')
1744 termch = 0;
1745 nflush = 1;
1746 scanhex(&nflush);
1747 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1748 if (setjmp(bus_error_jmp) == 0) {
1749 catch_memory_errors = 1;
1750 sync();
1751
1752 if (cmd != 'i') {
1753 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1754 cflush((void *) adrs);
1755 } else {
1756 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1757 cinval((void *) adrs);
1758 }
1759 sync();
1760 /* wait a little while to see if we get a machine check */
1761 __delay(200);
1762 }
1763 catch_memory_errors = 0;
1764}
1765
1766extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1767extern void xmon_mtspr(int spr, unsigned long value);
1768
1769static int
1770read_spr(int n, unsigned long *vp)
1771{
1772 unsigned long ret = -1UL;
1773 int ok = 0;
1774
1775 if (setjmp(bus_error_jmp) == 0) {
1776 catch_spr_faults = 1;
1777 sync();
1778
1779 ret = xmon_mfspr(n, *vp);
1780
1781 sync();
1782 *vp = ret;
1783 ok = 1;
1784 }
1785 catch_spr_faults = 0;
1786
1787 return ok;
1788}
1789
1790static void
1791write_spr(int n, unsigned long val)
1792{
1793 if (xmon_is_ro) {
1794 printf(xmon_ro_msg);
1795 return;
1796 }
1797
1798 if (setjmp(bus_error_jmp) == 0) {
1799 catch_spr_faults = 1;
1800 sync();
1801
1802 xmon_mtspr(n, val);
1803
1804 sync();
1805 } else {
1806 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
1807 }
1808 catch_spr_faults = 0;
1809}
1810
1811static void dump_206_sprs(void)
1812{
1813#ifdef CONFIG_PPC64
1814 if (!cpu_has_feature(CPU_FTR_ARCH_206))
1815 return;
1816
1817 /* Actually some of these pre-date 2.06, but whatevs */
1818
1819 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n",
1820 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
1821 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n",
1822 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
1823 printf("amr = %.16lx uamor = %.16lx\n",
1824 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
1825
1826 if (!(mfmsr() & MSR_HV))
1827 return;
1828
1829 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n",
1830 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
1831 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
1832 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
1833 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n",
1834 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
1835 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
1836 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
1837 printf("dabr = %.16lx dabrx = %.16lx\n",
1838 mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
1839#endif
1840}
1841
1842static void dump_207_sprs(void)
1843{
1844#ifdef CONFIG_PPC64
1845 unsigned long msr;
1846
1847 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1848 return;
1849
1850 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n",
1851 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
1852
1853 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n",
1854 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
1855
1856 msr = mfmsr();
1857 if (msr & MSR_TM) {
1858 /* Only if TM has been enabled in the kernel */
1859 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n",
1860 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
1861 mfspr(SPRN_TEXASR));
1862 }
1863
1864 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n",
1865 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
1866 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n",
1867 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
1868 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
1869 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n",
1870 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
1871 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n",
1872 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
1873 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
1874 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
1875 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
1876
1877 if (!(msr & MSR_HV))
1878 return;
1879
1880 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
1881 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
1882 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n",
1883 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
1884#endif
1885}
1886
1887static void dump_300_sprs(void)
1888{
1889#ifdef CONFIG_PPC64
1890 bool hv = mfmsr() & MSR_HV;
1891
1892 if (!cpu_has_feature(CPU_FTR_ARCH_300))
1893 return;
1894
1895 printf("pidr = %.16lx tidr = %.16lx\n",
1896 mfspr(SPRN_PID), mfspr(SPRN_TIDR));
1897 printf("asdr = %.16lx psscr = %.16lx\n",
1898 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)
1899 : mfspr(SPRN_PSSCR_PR));
1900
1901 if (!hv)
1902 return;
1903
1904 printf("ptcr = %.16lx\n",
1905 mfspr(SPRN_PTCR));
1906#endif
1907}
1908
1909static void dump_one_spr(int spr, bool show_unimplemented)
1910{
1911 unsigned long val;
1912
1913 val = 0xdeadbeef;
1914 if (!read_spr(spr, &val)) {
1915 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1916 return;
1917 }
1918
1919 if (val == 0xdeadbeef) {
1920 /* Looks like read was a nop, confirm */
1921 val = 0x0badcafe;
1922 if (!read_spr(spr, &val)) {
1923 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1924 return;
1925 }
1926
1927 if (val == 0x0badcafe) {
1928 if (show_unimplemented)
1929 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
1930 return;
1931 }
1932 }
1933
1934 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
1935}
1936
1937static void super_regs(void)
1938{
1939 static unsigned long regno;
1940 int cmd;
1941 int spr;
1942
1943 cmd = skipbl();
1944
1945 switch (cmd) {
1946 case '\n': {
1947 unsigned long sp, toc;
1948 asm("mr %0,1" : "=r" (sp) :);
1949 asm("mr %0,2" : "=r" (toc) :);
1950
1951 printf("msr = "REG" sprg0 = "REG"\n",
1952 mfmsr(), mfspr(SPRN_SPRG0));
1953 printf("pvr = "REG" sprg1 = "REG"\n",
1954 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1955 printf("dec = "REG" sprg2 = "REG"\n",
1956 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1957 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
1958 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
1959
1960 dump_206_sprs();
1961 dump_207_sprs();
1962 dump_300_sprs();
1963
1964 return;
1965 }
1966 case 'w': {
1967 unsigned long val;
1968 scanhex(®no);
1969 val = 0;
1970 read_spr(regno, &val);
1971 scanhex(&val);
1972 write_spr(regno, val);
1973 dump_one_spr(regno, true);
1974 break;
1975 }
1976 case 'r':
1977 scanhex(®no);
1978 dump_one_spr(regno, true);
1979 break;
1980 case 'a':
1981 /* dump ALL SPRs */
1982 for (spr = 1; spr < 1024; ++spr)
1983 dump_one_spr(spr, false);
1984 break;
1985 }
1986
1987 scannl();
1988}
1989
1990/*
1991 * Stuff for reading and writing memory safely
1992 */
1993static int
1994mread(unsigned long adrs, void *buf, int size)
1995{
1996 volatile int n;
1997 char *p, *q;
1998
1999 n = 0;
2000 if (setjmp(bus_error_jmp) == 0) {
2001 catch_memory_errors = 1;
2002 sync();
2003 p = (char *)adrs;
2004 q = (char *)buf;
2005 switch (size) {
2006 case 2:
2007 *(u16 *)q = *(u16 *)p;
2008 break;
2009 case 4:
2010 *(u32 *)q = *(u32 *)p;
2011 break;
2012 case 8:
2013 *(u64 *)q = *(u64 *)p;
2014 break;
2015 default:
2016 for( ; n < size; ++n) {
2017 *q++ = *p++;
2018 sync();
2019 }
2020 }
2021 sync();
2022 /* wait a little while to see if we get a machine check */
2023 __delay(200);
2024 n = size;
2025 }
2026 catch_memory_errors = 0;
2027 return n;
2028}
2029
2030static int
2031mwrite(unsigned long adrs, void *buf, int size)
2032{
2033 volatile int n;
2034 char *p, *q;
2035
2036 n = 0;
2037
2038 if (xmon_is_ro) {
2039 printf(xmon_ro_msg);
2040 return n;
2041 }
2042
2043 if (setjmp(bus_error_jmp) == 0) {
2044 catch_memory_errors = 1;
2045 sync();
2046 p = (char *) adrs;
2047 q = (char *) buf;
2048 switch (size) {
2049 case 2:
2050 *(u16 *)p = *(u16 *)q;
2051 break;
2052 case 4:
2053 *(u32 *)p = *(u32 *)q;
2054 break;
2055 case 8:
2056 *(u64 *)p = *(u64 *)q;
2057 break;
2058 default:
2059 for ( ; n < size; ++n) {
2060 *p++ = *q++;
2061 sync();
2062 }
2063 }
2064 sync();
2065 /* wait a little while to see if we get a machine check */
2066 __delay(200);
2067 n = size;
2068 } else {
2069 printf("*** Error writing address "REG"\n", adrs + n);
2070 }
2071 catch_memory_errors = 0;
2072 return n;
2073}
2074
2075static int fault_type;
2076static int fault_except;
2077static char *fault_chars[] = { "--", "**", "##" };
2078
2079static int handle_fault(struct pt_regs *regs)
2080{
2081 fault_except = TRAP(regs);
2082 switch (TRAP(regs)) {
2083 case 0x200:
2084 fault_type = 0;
2085 break;
2086 case 0x300:
2087 case 0x380:
2088 fault_type = 1;
2089 break;
2090 default:
2091 fault_type = 2;
2092 }
2093
2094 longjmp(bus_error_jmp, 1);
2095
2096 return 0;
2097}
2098
2099#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
2100
2101static void
2102byterev(unsigned char *val, int size)
2103{
2104 int t;
2105
2106 switch (size) {
2107 case 2:
2108 SWAP(val[0], val[1], t);
2109 break;
2110 case 4:
2111 SWAP(val[0], val[3], t);
2112 SWAP(val[1], val[2], t);
2113 break;
2114 case 8: /* is there really any use for this? */
2115 SWAP(val[0], val[7], t);
2116 SWAP(val[1], val[6], t);
2117 SWAP(val[2], val[5], t);
2118 SWAP(val[3], val[4], t);
2119 break;
2120 }
2121}
2122
2123static int brev;
2124static int mnoread;
2125
2126static char *memex_help_string =
2127 "Memory examine command usage:\n"
2128 "m [addr] [flags] examine/change memory\n"
2129 " addr is optional. will start where left off.\n"
2130 " flags may include chars from this set:\n"
2131 " b modify by bytes (default)\n"
2132 " w modify by words (2 byte)\n"
2133 " l modify by longs (4 byte)\n"
2134 " d modify by doubleword (8 byte)\n"
2135 " r toggle reverse byte order mode\n"
2136 " n do not read memory (for i/o spaces)\n"
2137 " . ok to read (default)\n"
2138 "NOTE: flags are saved as defaults\n"
2139 "";
2140
2141static char *memex_subcmd_help_string =
2142 "Memory examine subcommands:\n"
2143 " hexval write this val to current location\n"
2144 " 'string' write chars from string to this location\n"
2145 " ' increment address\n"
2146 " ^ decrement address\n"
2147 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
2148 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
2149 " ` clear no-read flag\n"
2150 " ; stay at this addr\n"
2151 " v change to byte mode\n"
2152 " w change to word (2 byte) mode\n"
2153 " l change to long (4 byte) mode\n"
2154 " u change to doubleword (8 byte) mode\n"
2155 " m addr change current addr\n"
2156 " n toggle no-read flag\n"
2157 " r toggle byte reverse flag\n"
2158 " < count back up count bytes\n"
2159 " > count skip forward count bytes\n"
2160 " x exit this mode\n"
2161 "";
2162
2163static void
2164memex(void)
2165{
2166 int cmd, inc, i, nslash;
2167 unsigned long n;
2168 unsigned char val[16];
2169
2170 scanhex((void *)&adrs);
2171 cmd = skipbl();
2172 if (cmd == '?') {
2173 printf(memex_help_string);
2174 return;
2175 } else {
2176 termch = cmd;
2177 }
2178 last_cmd = "m\n";
2179 while ((cmd = skipbl()) != '\n') {
2180 switch( cmd ){
2181 case 'b': size = 1; break;
2182 case 'w': size = 2; break;
2183 case 'l': size = 4; break;
2184 case 'd': size = 8; break;
2185 case 'r': brev = !brev; break;
2186 case 'n': mnoread = 1; break;
2187 case '.': mnoread = 0; break;
2188 }
2189 }
2190 if( size <= 0 )
2191 size = 1;
2192 else if( size > 8 )
2193 size = 8;
2194 for(;;){
2195 if (!mnoread)
2196 n = mread(adrs, val, size);
2197 printf(REG"%c", adrs, brev? 'r': ' ');
2198 if (!mnoread) {
2199 if (brev)
2200 byterev(val, size);
2201 putchar(' ');
2202 for (i = 0; i < n; ++i)
2203 printf("%.2x", val[i]);
2204 for (; i < size; ++i)
2205 printf("%s", fault_chars[fault_type]);
2206 }
2207 putchar(' ');
2208 inc = size;
2209 nslash = 0;
2210 for(;;){
2211 if( scanhex(&n) ){
2212 for (i = 0; i < size; ++i)
2213 val[i] = n >> (i * 8);
2214 if (!brev)
2215 byterev(val, size);
2216 mwrite(adrs, val, size);
2217 inc = size;
2218 }
2219 cmd = skipbl();
2220 if (cmd == '\n')
2221 break;
2222 inc = 0;
2223 switch (cmd) {
2224 case '\'':
2225 for(;;){
2226 n = inchar();
2227 if( n == '\\' )
2228 n = bsesc();
2229 else if( n == '\'' )
2230 break;
2231 for (i = 0; i < size; ++i)
2232 val[i] = n >> (i * 8);
2233 if (!brev)
2234 byterev(val, size);
2235 mwrite(adrs, val, size);
2236 adrs += size;
2237 }
2238 adrs -= size;
2239 inc = size;
2240 break;
2241 case ',':
2242 adrs += size;
2243 break;
2244 case '.':
2245 mnoread = 0;
2246 break;
2247 case ';':
2248 break;
2249 case 'x':
2250 case EOF:
2251 scannl();
2252 return;
2253 case 'b':
2254 case 'v':
2255 size = 1;
2256 break;
2257 case 'w':
2258 size = 2;
2259 break;
2260 case 'l':
2261 size = 4;
2262 break;
2263 case 'u':
2264 size = 8;
2265 break;
2266 case '^':
2267 adrs -= size;
2268 break;
2269 case '/':
2270 if (nslash > 0)
2271 adrs -= 1 << nslash;
2272 else
2273 nslash = 0;
2274 nslash += 4;
2275 adrs += 1 << nslash;
2276 break;
2277 case '\\':
2278 if (nslash < 0)
2279 adrs += 1 << -nslash;
2280 else
2281 nslash = 0;
2282 nslash -= 4;
2283 adrs -= 1 << -nslash;
2284 break;
2285 case 'm':
2286 scanhex((void *)&adrs);
2287 break;
2288 case 'n':
2289 mnoread = 1;
2290 break;
2291 case 'r':
2292 brev = !brev;
2293 break;
2294 case '<':
2295 n = size;
2296 scanhex(&n);
2297 adrs -= n;
2298 break;
2299 case '>':
2300 n = size;
2301 scanhex(&n);
2302 adrs += n;
2303 break;
2304 case '?':
2305 printf(memex_subcmd_help_string);
2306 break;
2307 }
2308 }
2309 adrs += inc;
2310 }
2311}
2312
2313static int
2314bsesc(void)
2315{
2316 int c;
2317
2318 c = inchar();
2319 switch( c ){
2320 case 'n': c = '\n'; break;
2321 case 'r': c = '\r'; break;
2322 case 'b': c = '\b'; break;
2323 case 't': c = '\t'; break;
2324 }
2325 return c;
2326}
2327
2328static void xmon_rawdump (unsigned long adrs, long ndump)
2329{
2330 long n, m, r, nr;
2331 unsigned char temp[16];
2332
2333 for (n = ndump; n > 0;) {
2334 r = n < 16? n: 16;
2335 nr = mread(adrs, temp, r);
2336 adrs += nr;
2337 for (m = 0; m < r; ++m) {
2338 if (m < nr)
2339 printf("%.2x", temp[m]);
2340 else
2341 printf("%s", fault_chars[fault_type]);
2342 }
2343 n -= r;
2344 if (nr < r)
2345 break;
2346 }
2347 printf("\n");
2348}
2349
2350static void dump_tracing(void)
2351{
2352 int c;
2353
2354 c = inchar();
2355 if (c == 'c')
2356 ftrace_dump(DUMP_ORIG);
2357 else
2358 ftrace_dump(DUMP_ALL);
2359}
2360
2361#ifdef CONFIG_PPC64
2362static void dump_one_paca(int cpu)
2363{
2364 struct paca_struct *p;
2365#ifdef CONFIG_PPC_BOOK3S_64
2366 int i = 0;
2367#endif
2368
2369 if (setjmp(bus_error_jmp) != 0) {
2370 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2371 return;
2372 }
2373
2374 catch_memory_errors = 1;
2375 sync();
2376
2377 p = paca_ptrs[cpu];
2378
2379 printf("paca for cpu 0x%x @ %px:\n", cpu, p);
2380
2381 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no");
2382 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no");
2383 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no");
2384
2385#define DUMP(paca, name, format) \
2386 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \
2387 offsetof(struct paca_struct, name));
2388
2389 DUMP(p, lock_token, "%#-*x");
2390 DUMP(p, paca_index, "%#-*x");
2391 DUMP(p, kernel_toc, "%#-*llx");
2392 DUMP(p, kernelbase, "%#-*llx");
2393 DUMP(p, kernel_msr, "%#-*llx");
2394 DUMP(p, emergency_sp, "%-*px");
2395#ifdef CONFIG_PPC_BOOK3S_64
2396 DUMP(p, nmi_emergency_sp, "%-*px");
2397 DUMP(p, mc_emergency_sp, "%-*px");
2398 DUMP(p, in_nmi, "%#-*x");
2399 DUMP(p, in_mce, "%#-*x");
2400 DUMP(p, hmi_event_available, "%#-*x");
2401#endif
2402 DUMP(p, data_offset, "%#-*llx");
2403 DUMP(p, hw_cpu_id, "%#-*x");
2404 DUMP(p, cpu_start, "%#-*x");
2405 DUMP(p, kexec_state, "%#-*x");
2406#ifdef CONFIG_PPC_BOOK3S_64
2407 if (!early_radix_enabled()) {
2408 for (i = 0; i < SLB_NUM_BOLTED; i++) {
2409 u64 esid, vsid;
2410
2411 if (!p->slb_shadow_ptr)
2412 continue;
2413
2414 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2415 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2416
2417 if (esid || vsid) {
2418 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n",
2419 22, "slb_shadow", i, esid, vsid);
2420 }
2421 }
2422 DUMP(p, vmalloc_sllp, "%#-*x");
2423 DUMP(p, stab_rr, "%#-*x");
2424 DUMP(p, slb_used_bitmap, "%#-*x");
2425 DUMP(p, slb_kern_bitmap, "%#-*x");
2426
2427 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
2428 DUMP(p, slb_cache_ptr, "%#-*x");
2429 for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2430 printf(" %-*s[%d] = 0x%016x\n",
2431 22, "slb_cache", i, p->slb_cache[i]);
2432 }
2433 }
2434
2435 DUMP(p, rfi_flush_fallback_area, "%-*px");
2436#endif
2437 DUMP(p, dscr_default, "%#-*llx");
2438#ifdef CONFIG_PPC_BOOK3E
2439 DUMP(p, pgd, "%-*px");
2440 DUMP(p, kernel_pgd, "%-*px");
2441 DUMP(p, tcd_ptr, "%-*px");
2442 DUMP(p, mc_kstack, "%-*px");
2443 DUMP(p, crit_kstack, "%-*px");
2444 DUMP(p, dbg_kstack, "%-*px");
2445#endif
2446 DUMP(p, __current, "%-*px");
2447 DUMP(p, kstack, "%#-*llx");
2448 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1));
2449#ifdef CONFIG_STACKPROTECTOR
2450 DUMP(p, canary, "%#-*lx");
2451#endif
2452 DUMP(p, saved_r1, "%#-*llx");
2453#ifdef CONFIG_PPC_BOOK3E
2454 DUMP(p, trap_save, "%#-*x");
2455#endif
2456 DUMP(p, irq_soft_mask, "%#-*x");
2457 DUMP(p, irq_happened, "%#-*x");
2458#ifdef CONFIG_MMIOWB
2459 DUMP(p, mmiowb_state.nesting_count, "%#-*x");
2460 DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x");
2461#endif
2462 DUMP(p, irq_work_pending, "%#-*x");
2463 DUMP(p, sprg_vdso, "%#-*llx");
2464
2465#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2466 DUMP(p, tm_scratch, "%#-*llx");
2467#endif
2468
2469#ifdef CONFIG_PPC_POWERNV
2470 DUMP(p, idle_state, "%#-*lx");
2471 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
2472 DUMP(p, thread_idle_state, "%#-*x");
2473 DUMP(p, subcore_sibling_mask, "%#-*x");
2474 } else {
2475#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
2476 DUMP(p, requested_psscr, "%#-*llx");
2477 DUMP(p, dont_stop.counter, "%#-*x");
2478#endif
2479 }
2480#endif
2481
2482 DUMP(p, accounting.utime, "%#-*lx");
2483 DUMP(p, accounting.stime, "%#-*lx");
2484#ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME
2485 DUMP(p, accounting.utime_scaled, "%#-*lx");
2486#endif
2487 DUMP(p, accounting.starttime, "%#-*lx");
2488 DUMP(p, accounting.starttime_user, "%#-*lx");
2489#ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME
2490 DUMP(p, accounting.startspurr, "%#-*lx");
2491 DUMP(p, accounting.utime_sspurr, "%#-*lx");
2492#endif
2493 DUMP(p, accounting.steal_time, "%#-*lx");
2494#undef DUMP
2495
2496 catch_memory_errors = 0;
2497 sync();
2498}
2499
2500static void dump_all_pacas(void)
2501{
2502 int cpu;
2503
2504 if (num_possible_cpus() == 0) {
2505 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2506 return;
2507 }
2508
2509 for_each_possible_cpu(cpu)
2510 dump_one_paca(cpu);
2511}
2512
2513static void dump_pacas(void)
2514{
2515 unsigned long num;
2516 int c;
2517
2518 c = inchar();
2519 if (c == 'a') {
2520 dump_all_pacas();
2521 return;
2522 }
2523
2524 termch = c; /* Put c back, it wasn't 'a' */
2525
2526 if (scanhex(&num))
2527 dump_one_paca(num);
2528 else
2529 dump_one_paca(xmon_owner);
2530}
2531#endif
2532
2533#ifdef CONFIG_PPC_POWERNV
2534static void dump_one_xive(int cpu)
2535{
2536 unsigned int hwid = get_hard_smp_processor_id(cpu);
2537 bool hv = cpu_has_feature(CPU_FTR_HVMODE);
2538
2539 if (hv) {
2540 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2541 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2542 opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2543 opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2544 opal_xive_dump(XIVE_DUMP_VP, hwid);
2545 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2546 }
2547
2548 if (setjmp(bus_error_jmp) != 0) {
2549 catch_memory_errors = 0;
2550 printf("*** Error dumping xive on cpu %d\n", cpu);
2551 return;
2552 }
2553
2554 catch_memory_errors = 1;
2555 sync();
2556 xmon_xive_do_dump(cpu);
2557 sync();
2558 __delay(200);
2559 catch_memory_errors = 0;
2560}
2561
2562static void dump_all_xives(void)
2563{
2564 int cpu;
2565
2566 if (num_possible_cpus() == 0) {
2567 printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2568 return;
2569 }
2570
2571 for_each_possible_cpu(cpu)
2572 dump_one_xive(cpu);
2573}
2574
2575static void dump_one_xive_irq(u32 num, struct irq_data *d)
2576{
2577 xmon_xive_get_irq_config(num, d);
2578}
2579
2580static void dump_all_xive_irq(void)
2581{
2582 unsigned int i;
2583 struct irq_desc *desc;
2584
2585 for_each_irq_desc(i, desc) {
2586 struct irq_data *d = irq_desc_get_irq_data(desc);
2587 unsigned int hwirq;
2588
2589 if (!d)
2590 continue;
2591
2592 hwirq = (unsigned int)irqd_to_hwirq(d);
2593 /* IPIs are special (HW number 0) */
2594 if (hwirq)
2595 dump_one_xive_irq(hwirq, d);
2596 }
2597}
2598
2599static void dump_xives(void)
2600{
2601 unsigned long num;
2602 int c;
2603
2604 if (!xive_enabled()) {
2605 printf("Xive disabled on this system\n");
2606 return;
2607 }
2608
2609 c = inchar();
2610 if (c == 'a') {
2611 dump_all_xives();
2612 return;
2613 } else if (c == 'i') {
2614 if (scanhex(&num))
2615 dump_one_xive_irq(num, NULL);
2616 else
2617 dump_all_xive_irq();
2618 return;
2619 }
2620
2621 termch = c; /* Put c back, it wasn't 'a' */
2622
2623 if (scanhex(&num))
2624 dump_one_xive(num);
2625 else
2626 dump_one_xive(xmon_owner);
2627}
2628#endif /* CONFIG_PPC_POWERNV */
2629
2630static void dump_by_size(unsigned long addr, long count, int size)
2631{
2632 unsigned char temp[16];
2633 int i, j;
2634 u64 val;
2635
2636 count = ALIGN(count, 16);
2637
2638 for (i = 0; i < count; i += 16, addr += 16) {
2639 printf(REG, addr);
2640
2641 if (mread(addr, temp, 16) != 16) {
2642 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2643 return;
2644 }
2645
2646 for (j = 0; j < 16; j += size) {
2647 putchar(' ');
2648 switch (size) {
2649 case 1: val = temp[j]; break;
2650 case 2: val = *(u16 *)&temp[j]; break;
2651 case 4: val = *(u32 *)&temp[j]; break;
2652 case 8: val = *(u64 *)&temp[j]; break;
2653 default: val = 0;
2654 }
2655
2656 printf("%0*llx", size * 2, val);
2657 }
2658 printf("\n");
2659 }
2660}
2661
2662static void
2663dump(void)
2664{
2665 static char last[] = { "d?\n" };
2666 int c;
2667
2668 c = inchar();
2669
2670#ifdef CONFIG_PPC64
2671 if (c == 'p') {
2672 xmon_start_pagination();
2673 dump_pacas();
2674 xmon_end_pagination();
2675 return;
2676 }
2677#endif
2678#ifdef CONFIG_PPC_POWERNV
2679 if (c == 'x') {
2680 xmon_start_pagination();
2681 dump_xives();
2682 xmon_end_pagination();
2683 return;
2684 }
2685#endif
2686
2687 if (c == 't') {
2688 dump_tracing();
2689 return;
2690 }
2691
2692 if (c == '\n')
2693 termch = c;
2694
2695 scanhex((void *)&adrs);
2696 if (termch != '\n')
2697 termch = 0;
2698 if (c == 'i') {
2699 scanhex(&nidump);
2700 if (nidump == 0)
2701 nidump = 16;
2702 else if (nidump > MAX_DUMP)
2703 nidump = MAX_DUMP;
2704 adrs += ppc_inst_dump(adrs, nidump, 1);
2705 last_cmd = "di\n";
2706 } else if (c == 'l') {
2707 dump_log_buf();
2708 } else if (c == 'o') {
2709 dump_opal_msglog();
2710 } else if (c == 'v') {
2711 /* dump virtual to physical translation */
2712 show_pte(adrs);
2713 } else if (c == 'r') {
2714 scanhex(&ndump);
2715 if (ndump == 0)
2716 ndump = 64;
2717 xmon_rawdump(adrs, ndump);
2718 adrs += ndump;
2719 last_cmd = "dr\n";
2720 } else {
2721 scanhex(&ndump);
2722 if (ndump == 0)
2723 ndump = 64;
2724 else if (ndump > MAX_DUMP)
2725 ndump = MAX_DUMP;
2726
2727 switch (c) {
2728 case '8':
2729 case '4':
2730 case '2':
2731 case '1':
2732 ndump = ALIGN(ndump, 16);
2733 dump_by_size(adrs, ndump, c - '0');
2734 last[1] = c;
2735 last_cmd = last;
2736 break;
2737 default:
2738 prdump(adrs, ndump);
2739 last_cmd = "d\n";
2740 }
2741
2742 adrs += ndump;
2743 }
2744}
2745
2746static void
2747prdump(unsigned long adrs, long ndump)
2748{
2749 long n, m, c, r, nr;
2750 unsigned char temp[16];
2751
2752 for (n = ndump; n > 0;) {
2753 printf(REG, adrs);
2754 putchar(' ');
2755 r = n < 16? n: 16;
2756 nr = mread(adrs, temp, r);
2757 adrs += nr;
2758 for (m = 0; m < r; ++m) {
2759 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2760 putchar(' ');
2761 if (m < nr)
2762 printf("%.2x", temp[m]);
2763 else
2764 printf("%s", fault_chars[fault_type]);
2765 }
2766 for (; m < 16; ++m) {
2767 if ((m & (sizeof(long) - 1)) == 0)
2768 putchar(' ');
2769 printf(" ");
2770 }
2771 printf(" |");
2772 for (m = 0; m < r; ++m) {
2773 if (m < nr) {
2774 c = temp[m];
2775 putchar(' ' <= c && c <= '~'? c: '.');
2776 } else
2777 putchar(' ');
2778 }
2779 n -= r;
2780 for (; m < 16; ++m)
2781 putchar(' ');
2782 printf("|\n");
2783 if (nr < r)
2784 break;
2785 }
2786}
2787
2788typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2789
2790static int
2791generic_inst_dump(unsigned long adr, long count, int praddr,
2792 instruction_dump_func dump_func)
2793{
2794 int nr, dotted;
2795 unsigned long first_adr;
2796 unsigned int inst, last_inst = 0;
2797 unsigned char val[4];
2798
2799 dotted = 0;
2800 for (first_adr = adr; count > 0; --count, adr += 4) {
2801 nr = mread(adr, val, 4);
2802 if (nr == 0) {
2803 if (praddr) {
2804 const char *x = fault_chars[fault_type];
2805 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
2806 }
2807 break;
2808 }
2809 inst = GETWORD(val);
2810 if (adr > first_adr && inst == last_inst) {
2811 if (!dotted) {
2812 printf(" ...\n");
2813 dotted = 1;
2814 }
2815 continue;
2816 }
2817 dotted = 0;
2818 last_inst = inst;
2819 if (praddr)
2820 printf(REG" %.8x", adr, inst);
2821 printf("\t");
2822 dump_func(inst, adr);
2823 printf("\n");
2824 }
2825 return adr - first_adr;
2826}
2827
2828static int
2829ppc_inst_dump(unsigned long adr, long count, int praddr)
2830{
2831 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2832}
2833
2834void
2835print_address(unsigned long addr)
2836{
2837 xmon_print_symbol(addr, "\t# ", "");
2838}
2839
2840static void
2841dump_log_buf(void)
2842{
2843 struct kmsg_dumper dumper = { .active = 1 };
2844 unsigned char buf[128];
2845 size_t len;
2846
2847 if (setjmp(bus_error_jmp) != 0) {
2848 printf("Error dumping printk buffer!\n");
2849 return;
2850 }
2851
2852 catch_memory_errors = 1;
2853 sync();
2854
2855 kmsg_dump_rewind_nolock(&dumper);
2856 xmon_start_pagination();
2857 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2858 buf[len] = '\0';
2859 printf("%s", buf);
2860 }
2861 xmon_end_pagination();
2862
2863 sync();
2864 /* wait a little while to see if we get a machine check */
2865 __delay(200);
2866 catch_memory_errors = 0;
2867}
2868
2869#ifdef CONFIG_PPC_POWERNV
2870static void dump_opal_msglog(void)
2871{
2872 unsigned char buf[128];
2873 ssize_t res;
2874 loff_t pos = 0;
2875
2876 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
2877 printf("Machine is not running OPAL firmware.\n");
2878 return;
2879 }
2880
2881 if (setjmp(bus_error_jmp) != 0) {
2882 printf("Error dumping OPAL msglog!\n");
2883 return;
2884 }
2885
2886 catch_memory_errors = 1;
2887 sync();
2888
2889 xmon_start_pagination();
2890 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
2891 if (res < 0) {
2892 printf("Error dumping OPAL msglog! Error: %zd\n", res);
2893 break;
2894 }
2895 buf[res] = '\0';
2896 printf("%s", buf);
2897 pos += res;
2898 }
2899 xmon_end_pagination();
2900
2901 sync();
2902 /* wait a little while to see if we get a machine check */
2903 __delay(200);
2904 catch_memory_errors = 0;
2905}
2906#endif
2907
2908/*
2909 * Memory operations - move, set, print differences
2910 */
2911static unsigned long mdest; /* destination address */
2912static unsigned long msrc; /* source address */
2913static unsigned long mval; /* byte value to set memory to */
2914static unsigned long mcount; /* # bytes to affect */
2915static unsigned long mdiffs; /* max # differences to print */
2916
2917static void
2918memops(int cmd)
2919{
2920 scanhex((void *)&mdest);
2921 if( termch != '\n' )
2922 termch = 0;
2923 scanhex((void *)(cmd == 's'? &mval: &msrc));
2924 if( termch != '\n' )
2925 termch = 0;
2926 scanhex((void *)&mcount);
2927 switch( cmd ){
2928 case 'm':
2929 if (xmon_is_ro) {
2930 printf(xmon_ro_msg);
2931 break;
2932 }
2933 memmove((void *)mdest, (void *)msrc, mcount);
2934 break;
2935 case 's':
2936 if (xmon_is_ro) {
2937 printf(xmon_ro_msg);
2938 break;
2939 }
2940 memset((void *)mdest, mval, mcount);
2941 break;
2942 case 'd':
2943 if( termch != '\n' )
2944 termch = 0;
2945 scanhex((void *)&mdiffs);
2946 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2947 break;
2948 }
2949}
2950
2951static void
2952memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2953{
2954 unsigned n, prt;
2955
2956 prt = 0;
2957 for( n = nb; n > 0; --n )
2958 if( *p1++ != *p2++ )
2959 if( ++prt <= maxpr )
2960 printf("%px %.2x # %px %.2x\n", p1 - 1,
2961 p1[-1], p2 - 1, p2[-1]);
2962 if( prt > maxpr )
2963 printf("Total of %d differences\n", prt);
2964}
2965
2966static unsigned mend;
2967static unsigned mask;
2968
2969static void
2970memlocate(void)
2971{
2972 unsigned a, n;
2973 unsigned char val[4];
2974
2975 last_cmd = "ml";
2976 scanhex((void *)&mdest);
2977 if (termch != '\n') {
2978 termch = 0;
2979 scanhex((void *)&mend);
2980 if (termch != '\n') {
2981 termch = 0;
2982 scanhex((void *)&mval);
2983 mask = ~0;
2984 if (termch != '\n') termch = 0;
2985 scanhex((void *)&mask);
2986 }
2987 }
2988 n = 0;
2989 for (a = mdest; a < mend; a += 4) {
2990 if (mread(a, val, 4) == 4
2991 && ((GETWORD(val) ^ mval) & mask) == 0) {
2992 printf("%.16x: %.16x\n", a, GETWORD(val));
2993 if (++n >= 10)
2994 break;
2995 }
2996 }
2997}
2998
2999static unsigned long mskip = 0x1000;
3000static unsigned long mlim = 0xffffffff;
3001
3002static void
3003memzcan(void)
3004{
3005 unsigned char v;
3006 unsigned a;
3007 int ok, ook;
3008
3009 scanhex(&mdest);
3010 if (termch != '\n') termch = 0;
3011 scanhex(&mskip);
3012 if (termch != '\n') termch = 0;
3013 scanhex(&mlim);
3014 ook = 0;
3015 for (a = mdest; a < mlim; a += mskip) {
3016 ok = mread(a, &v, 1);
3017 if (ok && !ook) {
3018 printf("%.8x .. ", a);
3019 } else if (!ok && ook)
3020 printf("%.8lx\n", a - mskip);
3021 ook = ok;
3022 if (a + mskip < a)
3023 break;
3024 }
3025 if (ook)
3026 printf("%.8lx\n", a - mskip);
3027}
3028
3029static void show_task(struct task_struct *tsk)
3030{
3031 char state;
3032
3033 /*
3034 * Cloned from kdb_task_state_char(), which is not entirely
3035 * appropriate for calling from xmon. This could be moved
3036 * to a common, generic, routine used by both.
3037 */
3038 state = (tsk->state == 0) ? 'R' :
3039 (tsk->state < 0) ? 'U' :
3040 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
3041 (tsk->state & TASK_STOPPED) ? 'T' :
3042 (tsk->state & TASK_TRACED) ? 'C' :
3043 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
3044 (tsk->exit_state & EXIT_DEAD) ? 'E' :
3045 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
3046
3047 printf("%px %016lx %6d %6d %c %2d %s\n", tsk,
3048 tsk->thread.ksp,
3049 tsk->pid, rcu_dereference(tsk->parent)->pid,
3050 state, task_cpu(tsk),
3051 tsk->comm);
3052}
3053
3054#ifdef CONFIG_PPC_BOOK3S_64
3055static void format_pte(void *ptep, unsigned long pte)
3056{
3057 pte_t entry = __pte(pte);
3058
3059 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte);
3060 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK);
3061
3062 printf("Flags = %s%s%s%s%s\n",
3063 pte_young(entry) ? "Accessed " : "",
3064 pte_dirty(entry) ? "Dirty " : "",
3065 pte_read(entry) ? "Read " : "",
3066 pte_write(entry) ? "Write " : "",
3067 pte_exec(entry) ? "Exec " : "");
3068}
3069
3070static void show_pte(unsigned long addr)
3071{
3072 unsigned long tskv = 0;
3073 struct task_struct *tsk = NULL;
3074 struct mm_struct *mm;
3075 pgd_t *pgdp, *pgdir;
3076 pud_t *pudp;
3077 pmd_t *pmdp;
3078 pte_t *ptep;
3079
3080 if (!scanhex(&tskv))
3081 mm = &init_mm;
3082 else
3083 tsk = (struct task_struct *)tskv;
3084
3085 if (tsk == NULL)
3086 mm = &init_mm;
3087 else
3088 mm = tsk->active_mm;
3089
3090 if (setjmp(bus_error_jmp) != 0) {
3091 catch_memory_errors = 0;
3092 printf("*** Error dumping pte for task %px\n", tsk);
3093 return;
3094 }
3095
3096 catch_memory_errors = 1;
3097 sync();
3098
3099 if (mm == &init_mm) {
3100 pgdp = pgd_offset_k(addr);
3101 pgdir = pgd_offset_k(0);
3102 } else {
3103 pgdp = pgd_offset(mm, addr);
3104 pgdir = pgd_offset(mm, 0);
3105 }
3106
3107 if (pgd_none(*pgdp)) {
3108 printf("no linux page table for address\n");
3109 return;
3110 }
3111
3112 printf("pgd @ 0x%px\n", pgdir);
3113
3114 if (pgd_is_leaf(*pgdp)) {
3115 format_pte(pgdp, pgd_val(*pgdp));
3116 return;
3117 }
3118 printf("pgdp @ 0x%px = 0x%016lx\n", pgdp, pgd_val(*pgdp));
3119
3120 pudp = pud_offset(pgdp, addr);
3121
3122 if (pud_none(*pudp)) {
3123 printf("No valid PUD\n");
3124 return;
3125 }
3126
3127 if (pud_is_leaf(*pudp)) {
3128 format_pte(pudp, pud_val(*pudp));
3129 return;
3130 }
3131
3132 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp));
3133
3134 pmdp = pmd_offset(pudp, addr);
3135
3136 if (pmd_none(*pmdp)) {
3137 printf("No valid PMD\n");
3138 return;
3139 }
3140
3141 if (pmd_is_leaf(*pmdp)) {
3142 format_pte(pmdp, pmd_val(*pmdp));
3143 return;
3144 }
3145 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp));
3146
3147 ptep = pte_offset_map(pmdp, addr);
3148 if (pte_none(*ptep)) {
3149 printf("no valid PTE\n");
3150 return;
3151 }
3152
3153 format_pte(ptep, pte_val(*ptep));
3154
3155 sync();
3156 __delay(200);
3157 catch_memory_errors = 0;
3158}
3159#else
3160static void show_pte(unsigned long addr)
3161{
3162 printf("show_pte not yet implemented\n");
3163}
3164#endif /* CONFIG_PPC_BOOK3S_64 */
3165
3166static void show_tasks(void)
3167{
3168 unsigned long tskv;
3169 struct task_struct *tsk = NULL;
3170
3171 printf(" task_struct ->thread.ksp PID PPID S P CMD\n");
3172
3173 if (scanhex(&tskv))
3174 tsk = (struct task_struct *)tskv;
3175
3176 if (setjmp(bus_error_jmp) != 0) {
3177 catch_memory_errors = 0;
3178 printf("*** Error dumping task %px\n", tsk);
3179 return;
3180 }
3181
3182 catch_memory_errors = 1;
3183 sync();
3184
3185 if (tsk)
3186 show_task(tsk);
3187 else
3188 for_each_process(tsk)
3189 show_task(tsk);
3190
3191 sync();
3192 __delay(200);
3193 catch_memory_errors = 0;
3194}
3195
3196static void proccall(void)
3197{
3198 unsigned long args[8];
3199 unsigned long ret;
3200 int i;
3201 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
3202 unsigned long, unsigned long, unsigned long,
3203 unsigned long, unsigned long, unsigned long);
3204 callfunc_t func;
3205
3206 if (!scanhex(&adrs))
3207 return;
3208 if (termch != '\n')
3209 termch = 0;
3210 for (i = 0; i < 8; ++i)
3211 args[i] = 0;
3212 for (i = 0; i < 8; ++i) {
3213 if (!scanhex(&args[i]) || termch == '\n')
3214 break;
3215 termch = 0;
3216 }
3217 func = (callfunc_t) adrs;
3218 ret = 0;
3219 if (setjmp(bus_error_jmp) == 0) {
3220 catch_memory_errors = 1;
3221 sync();
3222 ret = func(args[0], args[1], args[2], args[3],
3223 args[4], args[5], args[6], args[7]);
3224 sync();
3225 printf("return value is 0x%lx\n", ret);
3226 } else {
3227 printf("*** %x exception occurred\n", fault_except);
3228 }
3229 catch_memory_errors = 0;
3230}
3231
3232/* Input scanning routines */
3233int
3234skipbl(void)
3235{
3236 int c;
3237
3238 if( termch != 0 ){
3239 c = termch;
3240 termch = 0;
3241 } else
3242 c = inchar();
3243 while( c == ' ' || c == '\t' )
3244 c = inchar();
3245 return c;
3246}
3247
3248#define N_PTREGS 44
3249static const char *regnames[N_PTREGS] = {
3250 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3251 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3252 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3253 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3254 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3255#ifdef CONFIG_PPC64
3256 "softe",
3257#else
3258 "mq",
3259#endif
3260 "trap", "dar", "dsisr", "res"
3261};
3262
3263int
3264scanhex(unsigned long *vp)
3265{
3266 int c, d;
3267 unsigned long v;
3268
3269 c = skipbl();
3270 if (c == '%') {
3271 /* parse register name */
3272 char regname[8];
3273 int i;
3274
3275 for (i = 0; i < sizeof(regname) - 1; ++i) {
3276 c = inchar();
3277 if (!isalnum(c)) {
3278 termch = c;
3279 break;
3280 }
3281 regname[i] = c;
3282 }
3283 regname[i] = 0;
3284 i = match_string(regnames, N_PTREGS, regname);
3285 if (i < 0) {
3286 printf("invalid register name '%%%s'\n", regname);
3287 return 0;
3288 }
3289 if (xmon_regs == NULL) {
3290 printf("regs not available\n");
3291 return 0;
3292 }
3293 *vp = ((unsigned long *)xmon_regs)[i];
3294 return 1;
3295 }
3296
3297 /* skip leading "0x" if any */
3298
3299 if (c == '0') {
3300 c = inchar();
3301 if (c == 'x') {
3302 c = inchar();
3303 } else {
3304 d = hexdigit(c);
3305 if (d == EOF) {
3306 termch = c;
3307 *vp = 0;
3308 return 1;
3309 }
3310 }
3311 } else if (c == '$') {
3312 int i;
3313 for (i=0; i<63; i++) {
3314 c = inchar();
3315 if (isspace(c) || c == '\0') {
3316 termch = c;
3317 break;
3318 }
3319 tmpstr[i] = c;
3320 }
3321 tmpstr[i++] = 0;
3322 *vp = 0;
3323 if (setjmp(bus_error_jmp) == 0) {
3324 catch_memory_errors = 1;
3325 sync();
3326 *vp = kallsyms_lookup_name(tmpstr);
3327 sync();
3328 }
3329 catch_memory_errors = 0;
3330 if (!(*vp)) {
3331 printf("unknown symbol '%s'\n", tmpstr);
3332 return 0;
3333 }
3334 return 1;
3335 }
3336
3337 d = hexdigit(c);
3338 if (d == EOF) {
3339 termch = c;
3340 return 0;
3341 }
3342 v = 0;
3343 do {
3344 v = (v << 4) + d;
3345 c = inchar();
3346 d = hexdigit(c);
3347 } while (d != EOF);
3348 termch = c;
3349 *vp = v;
3350 return 1;
3351}
3352
3353static void
3354scannl(void)
3355{
3356 int c;
3357
3358 c = termch;
3359 termch = 0;
3360 while( c != '\n' )
3361 c = inchar();
3362}
3363
3364static int hexdigit(int c)
3365{
3366 if( '0' <= c && c <= '9' )
3367 return c - '0';
3368 if( 'A' <= c && c <= 'F' )
3369 return c - ('A' - 10);
3370 if( 'a' <= c && c <= 'f' )
3371 return c - ('a' - 10);
3372 return EOF;
3373}
3374
3375void
3376getstring(char *s, int size)
3377{
3378 int c;
3379
3380 c = skipbl();
3381 do {
3382 if( size > 1 ){
3383 *s++ = c;
3384 --size;
3385 }
3386 c = inchar();
3387 } while( c != ' ' && c != '\t' && c != '\n' );
3388 termch = c;
3389 *s = 0;
3390}
3391
3392static char line[256];
3393static char *lineptr;
3394
3395static void
3396flush_input(void)
3397{
3398 lineptr = NULL;
3399}
3400
3401static int
3402inchar(void)
3403{
3404 if (lineptr == NULL || *lineptr == 0) {
3405 if (xmon_gets(line, sizeof(line)) == NULL) {
3406 lineptr = NULL;
3407 return EOF;
3408 }
3409 lineptr = line;
3410 }
3411 return *lineptr++;
3412}
3413
3414static void
3415take_input(char *str)
3416{
3417 lineptr = str;
3418}
3419
3420
3421static void
3422symbol_lookup(void)
3423{
3424 int type = inchar();
3425 unsigned long addr, cpu;
3426 void __percpu *ptr = NULL;
3427 static char tmp[64];
3428
3429 switch (type) {
3430 case 'a':
3431 if (scanhex(&addr))
3432 xmon_print_symbol(addr, ": ", "\n");
3433 termch = 0;
3434 break;
3435 case 's':
3436 getstring(tmp, 64);
3437 if (setjmp(bus_error_jmp) == 0) {
3438 catch_memory_errors = 1;
3439 sync();
3440 addr = kallsyms_lookup_name(tmp);
3441 if (addr)
3442 printf("%s: %lx\n", tmp, addr);
3443 else
3444 printf("Symbol '%s' not found.\n", tmp);
3445 sync();
3446 }
3447 catch_memory_errors = 0;
3448 termch = 0;
3449 break;
3450 case 'p':
3451 getstring(tmp, 64);
3452 if (setjmp(bus_error_jmp) == 0) {
3453 catch_memory_errors = 1;
3454 sync();
3455 ptr = (void __percpu *)kallsyms_lookup_name(tmp);
3456 sync();
3457 }
3458
3459 if (ptr &&
3460 ptr >= (void __percpu *)__per_cpu_start &&
3461 ptr < (void __percpu *)__per_cpu_end)
3462 {
3463 if (scanhex(&cpu) && cpu < num_possible_cpus()) {
3464 addr = (unsigned long)per_cpu_ptr(ptr, cpu);
3465 } else {
3466 cpu = raw_smp_processor_id();
3467 addr = (unsigned long)this_cpu_ptr(ptr);
3468 }
3469
3470 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr);
3471 } else {
3472 printf("Percpu symbol '%s' not found.\n", tmp);
3473 }
3474
3475 catch_memory_errors = 0;
3476 termch = 0;
3477 break;
3478 }
3479}
3480
3481
3482/* Print an address in numeric and symbolic form (if possible) */
3483static void xmon_print_symbol(unsigned long address, const char *mid,
3484 const char *after)
3485{
3486 char *modname;
3487 const char *name = NULL;
3488 unsigned long offset, size;
3489
3490 printf(REG, address);
3491 if (setjmp(bus_error_jmp) == 0) {
3492 catch_memory_errors = 1;
3493 sync();
3494 name = kallsyms_lookup(address, &size, &offset, &modname,
3495 tmpstr);
3496 sync();
3497 /* wait a little while to see if we get a machine check */
3498 __delay(200);
3499 }
3500
3501 catch_memory_errors = 0;
3502
3503 if (name) {
3504 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3505 if (modname)
3506 printf(" [%s]", modname);
3507 }
3508 printf("%s", after);
3509}
3510
3511#ifdef CONFIG_PPC_BOOK3S_64
3512void dump_segments(void)
3513{
3514 int i;
3515 unsigned long esid,vsid;
3516 unsigned long llp;
3517
3518 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3519
3520 for (i = 0; i < mmu_slb_size; i++) {
3521 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
3522 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
3523
3524 if (!esid && !vsid)
3525 continue;
3526
3527 printf("%02d %016lx %016lx", i, esid, vsid);
3528
3529 if (!(esid & SLB_ESID_V)) {
3530 printf("\n");
3531 continue;
3532 }
3533
3534 llp = vsid & SLB_VSID_LLP;
3535 if (vsid & SLB_VSID_B_1T) {
3536 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
3537 GET_ESID_1T(esid),
3538 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3539 llp);
3540 } else {
3541 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
3542 GET_ESID(esid),
3543 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3544 llp);
3545 }
3546 }
3547}
3548#endif
3549
3550#ifdef CONFIG_PPC_BOOK3S_32
3551void dump_segments(void)
3552{
3553 int i;
3554
3555 printf("sr0-15 =");
3556 for (i = 0; i < 16; ++i)
3557 printf(" %x", mfsrin(i << 28));
3558 printf("\n");
3559}
3560#endif
3561
3562#ifdef CONFIG_44x
3563static void dump_tlb_44x(void)
3564{
3565 int i;
3566
3567 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3568 unsigned long w0,w1,w2;
3569 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
3570 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
3571 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
3572 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2);
3573 if (w0 & PPC44x_TLB_VALID) {
3574 printf("V %08lx -> %01lx%08lx %c%c%c%c%c",
3575 w0 & PPC44x_TLB_EPN_MASK,
3576 w1 & PPC44x_TLB_ERPN_MASK,
3577 w1 & PPC44x_TLB_RPN_MASK,
3578 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3579 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3580 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3581 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3582 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3583 }
3584 printf("\n");
3585 }
3586}
3587#endif /* CONFIG_44x */
3588
3589#ifdef CONFIG_PPC_BOOK3E
3590static void dump_tlb_book3e(void)
3591{
3592 u32 mmucfg, pidmask, lpidmask;
3593 u64 ramask;
3594 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3595 int mmu_version;
3596 static const char *pgsz_names[] = {
3597 " 1K",
3598 " 2K",
3599 " 4K",
3600 " 8K",
3601 " 16K",
3602 " 32K",
3603 " 64K",
3604 "128K",
3605 "256K",
3606 "512K",
3607 " 1M",
3608 " 2M",
3609 " 4M",
3610 " 8M",
3611 " 16M",
3612 " 32M",
3613 " 64M",
3614 "128M",
3615 "256M",
3616 "512M",
3617 " 1G",
3618 " 2G",
3619 " 4G",
3620 " 8G",
3621 " 16G",
3622 " 32G",
3623 " 64G",
3624 "128G",
3625 "256G",
3626 "512G",
3627 " 1T",
3628 " 2T",
3629 };
3630
3631 /* Gather some infos about the MMU */
3632 mmucfg = mfspr(SPRN_MMUCFG);
3633 mmu_version = (mmucfg & 3) + 1;
3634 ntlbs = ((mmucfg >> 2) & 3) + 1;
3635 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3636 lpidsz = (mmucfg >> 24) & 0xf;
3637 rasz = (mmucfg >> 16) & 0x7f;
3638 if ((mmu_version > 1) && (mmucfg & 0x10000))
3639 lrat = 1;
3640 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3641 mmu_version, ntlbs, pidsz, lpidsz, rasz);
3642 pidmask = (1ul << pidsz) - 1;
3643 lpidmask = (1ul << lpidsz) - 1;
3644 ramask = (1ull << rasz) - 1;
3645
3646 for (tlb = 0; tlb < ntlbs; tlb++) {
3647 u32 tlbcfg;
3648 int nent, assoc, new_cc = 1;
3649 printf("TLB %d:\n------\n", tlb);
3650 switch(tlb) {
3651 case 0:
3652 tlbcfg = mfspr(SPRN_TLB0CFG);
3653 break;
3654 case 1:
3655 tlbcfg = mfspr(SPRN_TLB1CFG);
3656 break;
3657 case 2:
3658 tlbcfg = mfspr(SPRN_TLB2CFG);
3659 break;
3660 case 3:
3661 tlbcfg = mfspr(SPRN_TLB3CFG);
3662 break;
3663 default:
3664 printf("Unsupported TLB number !\n");
3665 continue;
3666 }
3667 nent = tlbcfg & 0xfff;
3668 assoc = (tlbcfg >> 24) & 0xff;
3669 for (i = 0; i < nent; i++) {
3670 u32 mas0 = MAS0_TLBSEL(tlb);
3671 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3672 u64 mas2 = 0;
3673 u64 mas7_mas3;
3674 int esel = i, cc = i;
3675
3676 if (assoc != 0) {
3677 cc = i / assoc;
3678 esel = i % assoc;
3679 mas2 = cc * 0x1000;
3680 }
3681
3682 mas0 |= MAS0_ESEL(esel);
3683 mtspr(SPRN_MAS0, mas0);
3684 mtspr(SPRN_MAS1, mas1);
3685 mtspr(SPRN_MAS2, mas2);
3686 asm volatile("tlbre 0,0,0" : : : "memory");
3687 mas1 = mfspr(SPRN_MAS1);
3688 mas2 = mfspr(SPRN_MAS2);
3689 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3690 if (assoc && (i % assoc) == 0)
3691 new_cc = 1;
3692 if (!(mas1 & MAS1_VALID))
3693 continue;
3694 if (assoc == 0)
3695 printf("%04x- ", i);
3696 else if (new_cc)
3697 printf("%04x-%c", cc, 'A' + esel);
3698 else
3699 printf(" |%c", 'A' + esel);
3700 new_cc = 0;
3701 printf(" %016llx %04x %s %c%c AS%c",
3702 mas2 & ~0x3ffull,
3703 (mas1 >> 16) & 0x3fff,
3704 pgsz_names[(mas1 >> 7) & 0x1f],
3705 mas1 & MAS1_IND ? 'I' : ' ',
3706 mas1 & MAS1_IPROT ? 'P' : ' ',
3707 mas1 & MAS1_TS ? '1' : '0');
3708 printf(" %c%c%c%c%c%c%c",
3709 mas2 & MAS2_X0 ? 'a' : ' ',
3710 mas2 & MAS2_X1 ? 'v' : ' ',
3711 mas2 & MAS2_W ? 'w' : ' ',
3712 mas2 & MAS2_I ? 'i' : ' ',
3713 mas2 & MAS2_M ? 'm' : ' ',
3714 mas2 & MAS2_G ? 'g' : ' ',
3715 mas2 & MAS2_E ? 'e' : ' ');
3716 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3717 if (mas1 & MAS1_IND)
3718 printf(" %s\n",
3719 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3720 else
3721 printf(" U%c%c%c S%c%c%c\n",
3722 mas7_mas3 & MAS3_UX ? 'x' : ' ',
3723 mas7_mas3 & MAS3_UW ? 'w' : ' ',
3724 mas7_mas3 & MAS3_UR ? 'r' : ' ',
3725 mas7_mas3 & MAS3_SX ? 'x' : ' ',
3726 mas7_mas3 & MAS3_SW ? 'w' : ' ',
3727 mas7_mas3 & MAS3_SR ? 'r' : ' ');
3728 }
3729 }
3730}
3731#endif /* CONFIG_PPC_BOOK3E */
3732
3733static void xmon_init(int enable)
3734{
3735 if (enable) {
3736 __debugger = xmon;
3737 __debugger_ipi = xmon_ipi;
3738 __debugger_bpt = xmon_bpt;
3739 __debugger_sstep = xmon_sstep;
3740 __debugger_iabr_match = xmon_iabr_match;
3741 __debugger_break_match = xmon_break_match;
3742 __debugger_fault_handler = xmon_fault_handler;
3743
3744#ifdef CONFIG_PPC_PSERIES
3745 /*
3746 * Get the token here to avoid trying to get a lock
3747 * during the crash, causing a deadlock.
3748 */
3749 set_indicator_token = rtas_token("set-indicator");
3750#endif
3751 } else {
3752 __debugger = NULL;
3753 __debugger_ipi = NULL;
3754 __debugger_bpt = NULL;
3755 __debugger_sstep = NULL;
3756 __debugger_iabr_match = NULL;
3757 __debugger_break_match = NULL;
3758 __debugger_fault_handler = NULL;
3759 }
3760}
3761
3762#ifdef CONFIG_MAGIC_SYSRQ
3763static void sysrq_handle_xmon(int key)
3764{
3765 /* ensure xmon is enabled */
3766 xmon_init(1);
3767 debugger(get_irq_regs());
3768 if (!xmon_on)
3769 xmon_init(0);
3770}
3771
3772static struct sysrq_key_op sysrq_xmon_op = {
3773 .handler = sysrq_handle_xmon,
3774 .help_msg = "xmon(x)",
3775 .action_msg = "Entering xmon",
3776};
3777
3778static int __init setup_xmon_sysrq(void)
3779{
3780 register_sysrq_key('x', &sysrq_xmon_op);
3781 return 0;
3782}
3783device_initcall(setup_xmon_sysrq);
3784#endif /* CONFIG_MAGIC_SYSRQ */
3785
3786#ifdef CONFIG_DEBUG_FS
3787static void clear_all_bpt(void)
3788{
3789 int i;
3790
3791 /* clear/unpatch all breakpoints */
3792 remove_bpts();
3793 remove_cpu_bpts();
3794
3795 /* Disable all breakpoints */
3796 for (i = 0; i < NBPTS; ++i)
3797 bpts[i].enabled = 0;
3798
3799 /* Clear any data or iabr breakpoints */
3800 if (iabr || dabr.enabled) {
3801 iabr = NULL;
3802 dabr.enabled = 0;
3803 }
3804
3805 printf("xmon: All breakpoints cleared\n");
3806}
3807
3808static int xmon_dbgfs_set(void *data, u64 val)
3809{
3810 xmon_on = !!val;
3811 xmon_init(xmon_on);
3812
3813 /* make sure all breakpoints removed when disabling */
3814 if (!xmon_on)
3815 clear_all_bpt();
3816 return 0;
3817}
3818
3819static int xmon_dbgfs_get(void *data, u64 *val)
3820{
3821 *val = xmon_on;
3822 return 0;
3823}
3824
3825DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
3826 xmon_dbgfs_set, "%llu\n");
3827
3828static int __init setup_xmon_dbgfs(void)
3829{
3830 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
3831 &xmon_dbgfs_ops);
3832 return 0;
3833}
3834device_initcall(setup_xmon_dbgfs);
3835#endif /* CONFIG_DEBUG_FS */
3836
3837static int xmon_early __initdata;
3838
3839static int __init early_parse_xmon(char *p)
3840{
3841 if (!p || strncmp(p, "early", 5) == 0) {
3842 /* just "xmon" is equivalent to "xmon=early" */
3843 xmon_init(1);
3844 xmon_early = 1;
3845 xmon_on = 1;
3846 } else if (strncmp(p, "on", 2) == 0) {
3847 xmon_init(1);
3848 xmon_on = 1;
3849 } else if (strncmp(p, "rw", 2) == 0) {
3850 xmon_init(1);
3851 xmon_on = 1;
3852 xmon_is_ro = false;
3853 } else if (strncmp(p, "ro", 2) == 0) {
3854 xmon_init(1);
3855 xmon_on = 1;
3856 xmon_is_ro = true;
3857 } else if (strncmp(p, "off", 3) == 0)
3858 xmon_on = 0;
3859 else
3860 return 1;
3861
3862 return 0;
3863}
3864early_param("xmon", early_parse_xmon);
3865
3866void __init xmon_setup(void)
3867{
3868 if (xmon_on)
3869 xmon_init(1);
3870 if (xmon_early)
3871 debugger(NULL);
3872}
3873
3874#ifdef CONFIG_SPU_BASE
3875
3876struct spu_info {
3877 struct spu *spu;
3878 u64 saved_mfc_sr1_RW;
3879 u32 saved_spu_runcntl_RW;
3880 unsigned long dump_addr;
3881 u8 stopped_ok;
3882};
3883
3884#define XMON_NUM_SPUS 16 /* Enough for current hardware */
3885
3886static struct spu_info spu_info[XMON_NUM_SPUS];
3887
3888void xmon_register_spus(struct list_head *list)
3889{
3890 struct spu *spu;
3891
3892 list_for_each_entry(spu, list, full_list) {
3893 if (spu->number >= XMON_NUM_SPUS) {
3894 WARN_ON(1);
3895 continue;
3896 }
3897
3898 spu_info[spu->number].spu = spu;
3899 spu_info[spu->number].stopped_ok = 0;
3900 spu_info[spu->number].dump_addr = (unsigned long)
3901 spu_info[spu->number].spu->local_store;
3902 }
3903}
3904
3905static void stop_spus(void)
3906{
3907 struct spu *spu;
3908 int i;
3909 u64 tmp;
3910
3911 for (i = 0; i < XMON_NUM_SPUS; i++) {
3912 if (!spu_info[i].spu)
3913 continue;
3914
3915 if (setjmp(bus_error_jmp) == 0) {
3916 catch_memory_errors = 1;
3917 sync();
3918
3919 spu = spu_info[i].spu;
3920
3921 spu_info[i].saved_spu_runcntl_RW =
3922 in_be32(&spu->problem->spu_runcntl_RW);
3923
3924 tmp = spu_mfc_sr1_get(spu);
3925 spu_info[i].saved_mfc_sr1_RW = tmp;
3926
3927 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3928 spu_mfc_sr1_set(spu, tmp);
3929
3930 sync();
3931 __delay(200);
3932
3933 spu_info[i].stopped_ok = 1;
3934
3935 printf("Stopped spu %.2d (was %s)\n", i,
3936 spu_info[i].saved_spu_runcntl_RW ?
3937 "running" : "stopped");
3938 } else {
3939 catch_memory_errors = 0;
3940 printf("*** Error stopping spu %.2d\n", i);
3941 }
3942 catch_memory_errors = 0;
3943 }
3944}
3945
3946static void restart_spus(void)
3947{
3948 struct spu *spu;
3949 int i;
3950
3951 for (i = 0; i < XMON_NUM_SPUS; i++) {
3952 if (!spu_info[i].spu)
3953 continue;
3954
3955 if (!spu_info[i].stopped_ok) {
3956 printf("*** Error, spu %d was not successfully stopped"
3957 ", not restarting\n", i);
3958 continue;
3959 }
3960
3961 if (setjmp(bus_error_jmp) == 0) {
3962 catch_memory_errors = 1;
3963 sync();
3964
3965 spu = spu_info[i].spu;
3966 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3967 out_be32(&spu->problem->spu_runcntl_RW,
3968 spu_info[i].saved_spu_runcntl_RW);
3969
3970 sync();
3971 __delay(200);
3972
3973 printf("Restarted spu %.2d\n", i);
3974 } else {
3975 catch_memory_errors = 0;
3976 printf("*** Error restarting spu %.2d\n", i);
3977 }
3978 catch_memory_errors = 0;
3979 }
3980}
3981
3982#define DUMP_WIDTH 23
3983#define DUMP_VALUE(format, field, value) \
3984do { \
3985 if (setjmp(bus_error_jmp) == 0) { \
3986 catch_memory_errors = 1; \
3987 sync(); \
3988 printf(" %-*s = "format"\n", DUMP_WIDTH, \
3989 #field, value); \
3990 sync(); \
3991 __delay(200); \
3992 } else { \
3993 catch_memory_errors = 0; \
3994 printf(" %-*s = *** Error reading field.\n", \
3995 DUMP_WIDTH, #field); \
3996 } \
3997 catch_memory_errors = 0; \
3998} while (0)
3999
4000#define DUMP_FIELD(obj, format, field) \
4001 DUMP_VALUE(format, field, obj->field)
4002
4003static void dump_spu_fields(struct spu *spu)
4004{
4005 printf("Dumping spu fields at address %p:\n", spu);
4006
4007 DUMP_FIELD(spu, "0x%x", number);
4008 DUMP_FIELD(spu, "%s", name);
4009 DUMP_FIELD(spu, "0x%lx", local_store_phys);
4010 DUMP_FIELD(spu, "0x%p", local_store);
4011 DUMP_FIELD(spu, "0x%lx", ls_size);
4012 DUMP_FIELD(spu, "0x%x", node);
4013 DUMP_FIELD(spu, "0x%lx", flags);
4014 DUMP_FIELD(spu, "%llu", class_0_pending);
4015 DUMP_FIELD(spu, "0x%llx", class_0_dar);
4016 DUMP_FIELD(spu, "0x%llx", class_1_dar);
4017 DUMP_FIELD(spu, "0x%llx", class_1_dsisr);
4018 DUMP_FIELD(spu, "0x%x", irqs[0]);
4019 DUMP_FIELD(spu, "0x%x", irqs[1]);
4020 DUMP_FIELD(spu, "0x%x", irqs[2]);
4021 DUMP_FIELD(spu, "0x%x", slb_replace);
4022 DUMP_FIELD(spu, "%d", pid);
4023 DUMP_FIELD(spu, "0x%p", mm);
4024 DUMP_FIELD(spu, "0x%p", ctx);
4025 DUMP_FIELD(spu, "0x%p", rq);
4026 DUMP_FIELD(spu, "0x%llx", timestamp);
4027 DUMP_FIELD(spu, "0x%lx", problem_phys);
4028 DUMP_FIELD(spu, "0x%p", problem);
4029 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
4030 in_be32(&spu->problem->spu_runcntl_RW));
4031 DUMP_VALUE("0x%x", problem->spu_status_R,
4032 in_be32(&spu->problem->spu_status_R));
4033 DUMP_VALUE("0x%x", problem->spu_npc_RW,
4034 in_be32(&spu->problem->spu_npc_RW));
4035 DUMP_FIELD(spu, "0x%p", priv2);
4036 DUMP_FIELD(spu, "0x%p", pdata);
4037}
4038
4039int
4040spu_inst_dump(unsigned long adr, long count, int praddr)
4041{
4042 return generic_inst_dump(adr, count, praddr, print_insn_spu);
4043}
4044
4045static void dump_spu_ls(unsigned long num, int subcmd)
4046{
4047 unsigned long offset, addr, ls_addr;
4048
4049 if (setjmp(bus_error_jmp) == 0) {
4050 catch_memory_errors = 1;
4051 sync();
4052 ls_addr = (unsigned long)spu_info[num].spu->local_store;
4053 sync();
4054 __delay(200);
4055 } else {
4056 catch_memory_errors = 0;
4057 printf("*** Error: accessing spu info for spu %ld\n", num);
4058 return;
4059 }
4060 catch_memory_errors = 0;
4061
4062 if (scanhex(&offset))
4063 addr = ls_addr + offset;
4064 else
4065 addr = spu_info[num].dump_addr;
4066
4067 if (addr >= ls_addr + LS_SIZE) {
4068 printf("*** Error: address outside of local store\n");
4069 return;
4070 }
4071
4072 switch (subcmd) {
4073 case 'i':
4074 addr += spu_inst_dump(addr, 16, 1);
4075 last_cmd = "sdi\n";
4076 break;
4077 default:
4078 prdump(addr, 64);
4079 addr += 64;
4080 last_cmd = "sd\n";
4081 break;
4082 }
4083
4084 spu_info[num].dump_addr = addr;
4085}
4086
4087static int do_spu_cmd(void)
4088{
4089 static unsigned long num = 0;
4090 int cmd, subcmd = 0;
4091
4092 cmd = inchar();
4093 switch (cmd) {
4094 case 's':
4095 stop_spus();
4096 break;
4097 case 'r':
4098 restart_spus();
4099 break;
4100 case 'd':
4101 subcmd = inchar();
4102 if (isxdigit(subcmd) || subcmd == '\n')
4103 termch = subcmd;
4104 /* fall through */
4105 case 'f':
4106 scanhex(&num);
4107 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
4108 printf("*** Error: invalid spu number\n");
4109 return 0;
4110 }
4111
4112 switch (cmd) {
4113 case 'f':
4114 dump_spu_fields(spu_info[num].spu);
4115 break;
4116 default:
4117 dump_spu_ls(num, subcmd);
4118 break;
4119 }
4120
4121 break;
4122 default:
4123 return -1;
4124 }
4125
4126 return 0;
4127}
4128#else /* ! CONFIG_SPU_BASE */
4129static int do_spu_cmd(void)
4130{
4131 return -1;
4132}
4133#endif