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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved.
4 *
5 * Author: Varun Sethi, <varun.sethi@freescale.com>
6 *
7 * Description:
8 * This file is derived from arch/powerpc/kvm/e500.c,
9 * by Yu Liu <yu.liu@freescale.com>.
10 */
11
12#include <linux/kvm_host.h>
13#include <linux/slab.h>
14#include <linux/err.h>
15#include <linux/export.h>
16#include <linux/miscdevice.h>
17#include <linux/module.h>
18
19#include <asm/reg.h>
20#include <asm/cputable.h>
21#include <asm/kvm_ppc.h>
22#include <asm/dbell.h>
23#include <asm/ppc-opcode.h>
24
25#include "booke.h"
26#include "e500.h"
27
28void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type)
29{
30 enum ppc_dbell dbell_type;
31 unsigned long tag;
32
33 switch (type) {
34 case INT_CLASS_NONCRIT:
35 dbell_type = PPC_G_DBELL;
36 break;
37 case INT_CLASS_CRIT:
38 dbell_type = PPC_G_DBELL_CRIT;
39 break;
40 case INT_CLASS_MC:
41 dbell_type = PPC_G_DBELL_MC;
42 break;
43 default:
44 WARN_ONCE(1, "%s: unknown int type %d\n", __func__, type);
45 return;
46 }
47
48 preempt_disable();
49 tag = PPC_DBELL_LPID(get_lpid(vcpu)) | vcpu->vcpu_id;
50 mb();
51 ppc_msgsnd(dbell_type, 0, tag);
52 preempt_enable();
53}
54
55/* gtlbe must not be mapped by more than one host tlb entry */
56void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,
57 struct kvm_book3e_206_tlb_entry *gtlbe)
58{
59 unsigned int tid, ts;
60 gva_t eaddr;
61 u32 val;
62 unsigned long flags;
63
64 ts = get_tlb_ts(gtlbe);
65 tid = get_tlb_tid(gtlbe);
66
67 /* We search the host TLB to invalidate its shadow TLB entry */
68 val = (tid << 16) | ts;
69 eaddr = get_tlb_eaddr(gtlbe);
70
71 local_irq_save(flags);
72
73 mtspr(SPRN_MAS6, val);
74 mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
75
76 asm volatile("tlbsx 0, %[eaddr]\n" : : [eaddr] "r" (eaddr));
77 val = mfspr(SPRN_MAS1);
78 if (val & MAS1_VALID) {
79 mtspr(SPRN_MAS1, val & ~MAS1_VALID);
80 asm volatile("tlbwe");
81 }
82 mtspr(SPRN_MAS5, 0);
83 /* NOTE: tlbsx also updates mas8, so clear it for host tlbwe */
84 mtspr(SPRN_MAS8, 0);
85 isync();
86
87 local_irq_restore(flags);
88}
89
90void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500)
91{
92 unsigned long flags;
93
94 local_irq_save(flags);
95 mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
96 /*
97 * clang-17 and older could not assemble tlbilxlpid.
98 * https://github.com/ClangBuiltLinux/linux/issues/1891
99 */
100 asm volatile (PPC_TLBILX_LPID);
101 mtspr(SPRN_MAS5, 0);
102 local_irq_restore(flags);
103}
104
105void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
106{
107 vcpu->arch.pid = pid;
108}
109
110void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
111{
112}
113
114/* We use two lpids per VM */
115static DEFINE_PER_CPU(struct kvm_vcpu *[KVMPPC_NR_LPIDS], last_vcpu_of_lpid);
116
117static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu)
118{
119 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
120
121 kvmppc_booke_vcpu_load(vcpu, cpu);
122
123 mtspr(SPRN_LPID, get_lpid(vcpu));
124 mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr);
125 mtspr(SPRN_GPIR, vcpu->vcpu_id);
126 mtspr(SPRN_MSRP, vcpu->arch.shadow_msrp);
127 vcpu->arch.eplc = EPC_EGS | (get_lpid(vcpu) << EPC_ELPID_SHIFT);
128 vcpu->arch.epsc = vcpu->arch.eplc;
129 mtspr(SPRN_EPLC, vcpu->arch.eplc);
130 mtspr(SPRN_EPSC, vcpu->arch.epsc);
131
132 mtspr(SPRN_GIVPR, vcpu->arch.ivpr);
133 mtspr(SPRN_GIVOR2, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
134 mtspr(SPRN_GIVOR8, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
135 mtspr(SPRN_GSPRG0, (unsigned long)vcpu->arch.shared->sprg0);
136 mtspr(SPRN_GSPRG1, (unsigned long)vcpu->arch.shared->sprg1);
137 mtspr(SPRN_GSPRG2, (unsigned long)vcpu->arch.shared->sprg2);
138 mtspr(SPRN_GSPRG3, (unsigned long)vcpu->arch.shared->sprg3);
139
140 mtspr(SPRN_GSRR0, vcpu->arch.shared->srr0);
141 mtspr(SPRN_GSRR1, vcpu->arch.shared->srr1);
142
143 mtspr(SPRN_GEPR, vcpu->arch.epr);
144 mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
145 mtspr(SPRN_GESR, vcpu->arch.shared->esr);
146
147 if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
148 __this_cpu_read(last_vcpu_of_lpid[get_lpid(vcpu)]) != vcpu) {
149 kvmppc_e500_tlbil_all(vcpu_e500);
150 __this_cpu_write(last_vcpu_of_lpid[get_lpid(vcpu)], vcpu);
151 }
152}
153
154static void kvmppc_core_vcpu_put_e500mc(struct kvm_vcpu *vcpu)
155{
156 vcpu->arch.eplc = mfspr(SPRN_EPLC);
157 vcpu->arch.epsc = mfspr(SPRN_EPSC);
158
159 vcpu->arch.shared->sprg0 = mfspr(SPRN_GSPRG0);
160 vcpu->arch.shared->sprg1 = mfspr(SPRN_GSPRG1);
161 vcpu->arch.shared->sprg2 = mfspr(SPRN_GSPRG2);
162 vcpu->arch.shared->sprg3 = mfspr(SPRN_GSPRG3);
163
164 vcpu->arch.shared->srr0 = mfspr(SPRN_GSRR0);
165 vcpu->arch.shared->srr1 = mfspr(SPRN_GSRR1);
166
167 vcpu->arch.epr = mfspr(SPRN_GEPR);
168 vcpu->arch.shared->dar = mfspr(SPRN_GDEAR);
169 vcpu->arch.shared->esr = mfspr(SPRN_GESR);
170
171 vcpu->arch.oldpir = mfspr(SPRN_PIR);
172
173 kvmppc_booke_vcpu_put(vcpu);
174}
175
176static int kvmppc_e500mc_check_processor_compat(void)
177{
178 int r;
179
180 if (strcmp(cur_cpu_spec->cpu_name, "e500mc") == 0)
181 r = 0;
182 else if (strcmp(cur_cpu_spec->cpu_name, "e5500") == 0)
183 r = 0;
184#ifdef CONFIG_ALTIVEC
185 /*
186 * Since guests have the privilege to enable AltiVec, we need AltiVec
187 * support in the host to save/restore their context.
188 * Don't use CPU_FTR_ALTIVEC to identify cores with AltiVec unit
189 * because it's cleared in the absence of CONFIG_ALTIVEC!
190 */
191 else if (strcmp(cur_cpu_spec->cpu_name, "e6500") == 0)
192 r = 0;
193#endif
194 else
195 r = -ENOTSUPP;
196
197 return r;
198}
199
200int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
201{
202 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
203
204 vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \
205 SPRN_EPCR_DUVD;
206#ifdef CONFIG_64BIT
207 vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM;
208#endif
209 vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_PMMP;
210
211 vcpu->arch.pvr = mfspr(SPRN_PVR);
212 vcpu_e500->svr = mfspr(SPRN_SVR);
213
214 vcpu->arch.cpu_type = KVM_CPU_E500MC;
215
216 return 0;
217}
218
219static int kvmppc_core_get_sregs_e500mc(struct kvm_vcpu *vcpu,
220 struct kvm_sregs *sregs)
221{
222 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
223
224 sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_PM |
225 KVM_SREGS_E_PC;
226 sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL;
227
228 sregs->u.e.impl.fsl.features = 0;
229 sregs->u.e.impl.fsl.svr = vcpu_e500->svr;
230 sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0;
231 sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar;
232
233 kvmppc_get_sregs_e500_tlb(vcpu, sregs);
234
235 sregs->u.e.ivor_high[3] =
236 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
237 sregs->u.e.ivor_high[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
238 sregs->u.e.ivor_high[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
239
240 return kvmppc_get_sregs_ivor(vcpu, sregs);
241}
242
243static int kvmppc_core_set_sregs_e500mc(struct kvm_vcpu *vcpu,
244 struct kvm_sregs *sregs)
245{
246 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
247 int ret;
248
249 if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
250 vcpu_e500->svr = sregs->u.e.impl.fsl.svr;
251 vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0;
252 vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar;
253 }
254
255 ret = kvmppc_set_sregs_e500_tlb(vcpu, sregs);
256 if (ret < 0)
257 return ret;
258
259 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
260 return 0;
261
262 if (sregs->u.e.features & KVM_SREGS_E_PM) {
263 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
264 sregs->u.e.ivor_high[3];
265 }
266
267 if (sregs->u.e.features & KVM_SREGS_E_PC) {
268 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] =
269 sregs->u.e.ivor_high[4];
270 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] =
271 sregs->u.e.ivor_high[5];
272 }
273
274 return kvmppc_set_sregs_ivor(vcpu, sregs);
275}
276
277static int kvmppc_get_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
278 union kvmppc_one_reg *val)
279{
280 int r = 0;
281
282 switch (id) {
283 case KVM_REG_PPC_SPRG9:
284 *val = get_reg_val(id, vcpu->arch.sprg9);
285 break;
286 default:
287 r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
288 }
289
290 return r;
291}
292
293static int kvmppc_set_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
294 union kvmppc_one_reg *val)
295{
296 int r = 0;
297
298 switch (id) {
299 case KVM_REG_PPC_SPRG9:
300 vcpu->arch.sprg9 = set_reg_val(id, *val);
301 break;
302 default:
303 r = kvmppc_set_one_reg_e500_tlb(vcpu, id, val);
304 }
305
306 return r;
307}
308
309static int kvmppc_core_vcpu_create_e500mc(struct kvm_vcpu *vcpu)
310{
311 struct kvmppc_vcpu_e500 *vcpu_e500;
312 int err;
313
314 BUILD_BUG_ON(offsetof(struct kvmppc_vcpu_e500, vcpu) != 0);
315 vcpu_e500 = to_e500(vcpu);
316
317 /* Invalid PIR value -- this LPID doesn't have valid state on any cpu */
318 vcpu->arch.oldpir = 0xffffffff;
319
320 err = kvmppc_e500_tlb_init(vcpu_e500);
321 if (err)
322 return err;
323
324 vcpu->arch.shared = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
325 if (!vcpu->arch.shared) {
326 err = -ENOMEM;
327 goto uninit_tlb;
328 }
329
330 return 0;
331
332uninit_tlb:
333 kvmppc_e500_tlb_uninit(vcpu_e500);
334 return err;
335}
336
337static void kvmppc_core_vcpu_free_e500mc(struct kvm_vcpu *vcpu)
338{
339 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
340
341 free_page((unsigned long)vcpu->arch.shared);
342 kvmppc_e500_tlb_uninit(vcpu_e500);
343}
344
345static int kvmppc_core_init_vm_e500mc(struct kvm *kvm)
346{
347 int lpid;
348
349 lpid = kvmppc_alloc_lpid();
350 if (lpid < 0)
351 return lpid;
352
353 /*
354 * Use two lpids per VM on cores with two threads like e6500. Use
355 * even numbers to speedup vcpu lpid computation with consecutive lpids
356 * per VM. vm1 will use lpids 2 and 3, vm2 lpids 4 and 5, and so on.
357 */
358 if (threads_per_core == 2)
359 lpid <<= 1;
360
361 kvm->arch.lpid = lpid;
362 return 0;
363}
364
365static void kvmppc_core_destroy_vm_e500mc(struct kvm *kvm)
366{
367 int lpid = kvm->arch.lpid;
368
369 if (threads_per_core == 2)
370 lpid >>= 1;
371
372 kvmppc_free_lpid(lpid);
373}
374
375static struct kvmppc_ops kvm_ops_e500mc = {
376 .get_sregs = kvmppc_core_get_sregs_e500mc,
377 .set_sregs = kvmppc_core_set_sregs_e500mc,
378 .get_one_reg = kvmppc_get_one_reg_e500mc,
379 .set_one_reg = kvmppc_set_one_reg_e500mc,
380 .vcpu_load = kvmppc_core_vcpu_load_e500mc,
381 .vcpu_put = kvmppc_core_vcpu_put_e500mc,
382 .vcpu_create = kvmppc_core_vcpu_create_e500mc,
383 .vcpu_free = kvmppc_core_vcpu_free_e500mc,
384 .init_vm = kvmppc_core_init_vm_e500mc,
385 .destroy_vm = kvmppc_core_destroy_vm_e500mc,
386 .emulate_op = kvmppc_core_emulate_op_e500,
387 .emulate_mtspr = kvmppc_core_emulate_mtspr_e500,
388 .emulate_mfspr = kvmppc_core_emulate_mfspr_e500,
389 .create_vcpu_debugfs = kvmppc_create_vcpu_debugfs_e500,
390};
391
392static int __init kvmppc_e500mc_init(void)
393{
394 int r;
395
396 r = kvmppc_e500mc_check_processor_compat();
397 if (r)
398 goto err_out;
399
400 r = kvmppc_booke_init();
401 if (r)
402 goto err_out;
403
404 /*
405 * Use two lpids per VM on dual threaded processors like e6500
406 * to workarround the lack of tlb write conditional instruction.
407 * Expose half the number of available hardware lpids to the lpid
408 * allocator.
409 */
410 kvmppc_init_lpid(KVMPPC_NR_LPIDS/threads_per_core);
411
412 r = kvm_init(sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
413 if (r)
414 goto err_out;
415 kvm_ops_e500mc.owner = THIS_MODULE;
416 kvmppc_pr_ops = &kvm_ops_e500mc;
417
418err_out:
419 return r;
420}
421
422static void __exit kvmppc_e500mc_exit(void)
423{
424 kvmppc_pr_ops = NULL;
425 kvmppc_booke_exit();
426}
427
428module_init(kvmppc_e500mc_init);
429module_exit(kvmppc_e500mc_exit);
430MODULE_ALIAS_MISCDEV(KVM_MINOR);
431MODULE_ALIAS("devname:kvm");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved.
4 *
5 * Author: Varun Sethi, <varun.sethi@freescale.com>
6 *
7 * Description:
8 * This file is derived from arch/powerpc/kvm/e500.c,
9 * by Yu Liu <yu.liu@freescale.com>.
10 */
11
12#include <linux/kvm_host.h>
13#include <linux/slab.h>
14#include <linux/err.h>
15#include <linux/export.h>
16#include <linux/miscdevice.h>
17#include <linux/module.h>
18
19#include <asm/reg.h>
20#include <asm/cputable.h>
21#include <asm/kvm_ppc.h>
22#include <asm/dbell.h>
23
24#include "booke.h"
25#include "e500.h"
26
27void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type)
28{
29 enum ppc_dbell dbell_type;
30 unsigned long tag;
31
32 switch (type) {
33 case INT_CLASS_NONCRIT:
34 dbell_type = PPC_G_DBELL;
35 break;
36 case INT_CLASS_CRIT:
37 dbell_type = PPC_G_DBELL_CRIT;
38 break;
39 case INT_CLASS_MC:
40 dbell_type = PPC_G_DBELL_MC;
41 break;
42 default:
43 WARN_ONCE(1, "%s: unknown int type %d\n", __func__, type);
44 return;
45 }
46
47 preempt_disable();
48 tag = PPC_DBELL_LPID(get_lpid(vcpu)) | vcpu->vcpu_id;
49 mb();
50 ppc_msgsnd(dbell_type, 0, tag);
51 preempt_enable();
52}
53
54/* gtlbe must not be mapped by more than one host tlb entry */
55void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,
56 struct kvm_book3e_206_tlb_entry *gtlbe)
57{
58 unsigned int tid, ts;
59 gva_t eaddr;
60 u32 val;
61 unsigned long flags;
62
63 ts = get_tlb_ts(gtlbe);
64 tid = get_tlb_tid(gtlbe);
65
66 /* We search the host TLB to invalidate its shadow TLB entry */
67 val = (tid << 16) | ts;
68 eaddr = get_tlb_eaddr(gtlbe);
69
70 local_irq_save(flags);
71
72 mtspr(SPRN_MAS6, val);
73 mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
74
75 asm volatile("tlbsx 0, %[eaddr]\n" : : [eaddr] "r" (eaddr));
76 val = mfspr(SPRN_MAS1);
77 if (val & MAS1_VALID) {
78 mtspr(SPRN_MAS1, val & ~MAS1_VALID);
79 asm volatile("tlbwe");
80 }
81 mtspr(SPRN_MAS5, 0);
82 /* NOTE: tlbsx also updates mas8, so clear it for host tlbwe */
83 mtspr(SPRN_MAS8, 0);
84 isync();
85
86 local_irq_restore(flags);
87}
88
89void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500)
90{
91 unsigned long flags;
92
93 local_irq_save(flags);
94 mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
95 asm volatile("tlbilxlpid");
96 mtspr(SPRN_MAS5, 0);
97 local_irq_restore(flags);
98}
99
100void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
101{
102 vcpu->arch.pid = pid;
103}
104
105void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
106{
107}
108
109/* We use two lpids per VM */
110static DEFINE_PER_CPU(struct kvm_vcpu *[KVMPPC_NR_LPIDS], last_vcpu_of_lpid);
111
112static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu)
113{
114 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
115
116 kvmppc_booke_vcpu_load(vcpu, cpu);
117
118 mtspr(SPRN_LPID, get_lpid(vcpu));
119 mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr);
120 mtspr(SPRN_GPIR, vcpu->vcpu_id);
121 mtspr(SPRN_MSRP, vcpu->arch.shadow_msrp);
122 vcpu->arch.eplc = EPC_EGS | (get_lpid(vcpu) << EPC_ELPID_SHIFT);
123 vcpu->arch.epsc = vcpu->arch.eplc;
124 mtspr(SPRN_EPLC, vcpu->arch.eplc);
125 mtspr(SPRN_EPSC, vcpu->arch.epsc);
126
127 mtspr(SPRN_GIVPR, vcpu->arch.ivpr);
128 mtspr(SPRN_GIVOR2, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
129 mtspr(SPRN_GIVOR8, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
130 mtspr(SPRN_GSPRG0, (unsigned long)vcpu->arch.shared->sprg0);
131 mtspr(SPRN_GSPRG1, (unsigned long)vcpu->arch.shared->sprg1);
132 mtspr(SPRN_GSPRG2, (unsigned long)vcpu->arch.shared->sprg2);
133 mtspr(SPRN_GSPRG3, (unsigned long)vcpu->arch.shared->sprg3);
134
135 mtspr(SPRN_GSRR0, vcpu->arch.shared->srr0);
136 mtspr(SPRN_GSRR1, vcpu->arch.shared->srr1);
137
138 mtspr(SPRN_GEPR, vcpu->arch.epr);
139 mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
140 mtspr(SPRN_GESR, vcpu->arch.shared->esr);
141
142 if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
143 __this_cpu_read(last_vcpu_of_lpid[get_lpid(vcpu)]) != vcpu) {
144 kvmppc_e500_tlbil_all(vcpu_e500);
145 __this_cpu_write(last_vcpu_of_lpid[get_lpid(vcpu)], vcpu);
146 }
147}
148
149static void kvmppc_core_vcpu_put_e500mc(struct kvm_vcpu *vcpu)
150{
151 vcpu->arch.eplc = mfspr(SPRN_EPLC);
152 vcpu->arch.epsc = mfspr(SPRN_EPSC);
153
154 vcpu->arch.shared->sprg0 = mfspr(SPRN_GSPRG0);
155 vcpu->arch.shared->sprg1 = mfspr(SPRN_GSPRG1);
156 vcpu->arch.shared->sprg2 = mfspr(SPRN_GSPRG2);
157 vcpu->arch.shared->sprg3 = mfspr(SPRN_GSPRG3);
158
159 vcpu->arch.shared->srr0 = mfspr(SPRN_GSRR0);
160 vcpu->arch.shared->srr1 = mfspr(SPRN_GSRR1);
161
162 vcpu->arch.epr = mfspr(SPRN_GEPR);
163 vcpu->arch.shared->dar = mfspr(SPRN_GDEAR);
164 vcpu->arch.shared->esr = mfspr(SPRN_GESR);
165
166 vcpu->arch.oldpir = mfspr(SPRN_PIR);
167
168 kvmppc_booke_vcpu_put(vcpu);
169}
170
171int kvmppc_core_check_processor_compat(void)
172{
173 int r;
174
175 if (strcmp(cur_cpu_spec->cpu_name, "e500mc") == 0)
176 r = 0;
177 else if (strcmp(cur_cpu_spec->cpu_name, "e5500") == 0)
178 r = 0;
179#ifdef CONFIG_ALTIVEC
180 /*
181 * Since guests have the privilege to enable AltiVec, we need AltiVec
182 * support in the host to save/restore their context.
183 * Don't use CPU_FTR_ALTIVEC to identify cores with AltiVec unit
184 * because it's cleared in the absence of CONFIG_ALTIVEC!
185 */
186 else if (strcmp(cur_cpu_spec->cpu_name, "e6500") == 0)
187 r = 0;
188#endif
189 else
190 r = -ENOTSUPP;
191
192 return r;
193}
194
195int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
196{
197 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
198
199 vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \
200 SPRN_EPCR_DUVD;
201#ifdef CONFIG_64BIT
202 vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM;
203#endif
204 vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_PMMP;
205
206 vcpu->arch.pvr = mfspr(SPRN_PVR);
207 vcpu_e500->svr = mfspr(SPRN_SVR);
208
209 vcpu->arch.cpu_type = KVM_CPU_E500MC;
210
211 return 0;
212}
213
214static int kvmppc_core_get_sregs_e500mc(struct kvm_vcpu *vcpu,
215 struct kvm_sregs *sregs)
216{
217 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
218
219 sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_PM |
220 KVM_SREGS_E_PC;
221 sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL;
222
223 sregs->u.e.impl.fsl.features = 0;
224 sregs->u.e.impl.fsl.svr = vcpu_e500->svr;
225 sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0;
226 sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar;
227
228 kvmppc_get_sregs_e500_tlb(vcpu, sregs);
229
230 sregs->u.e.ivor_high[3] =
231 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
232 sregs->u.e.ivor_high[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
233 sregs->u.e.ivor_high[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
234
235 return kvmppc_get_sregs_ivor(vcpu, sregs);
236}
237
238static int kvmppc_core_set_sregs_e500mc(struct kvm_vcpu *vcpu,
239 struct kvm_sregs *sregs)
240{
241 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
242 int ret;
243
244 if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
245 vcpu_e500->svr = sregs->u.e.impl.fsl.svr;
246 vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0;
247 vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar;
248 }
249
250 ret = kvmppc_set_sregs_e500_tlb(vcpu, sregs);
251 if (ret < 0)
252 return ret;
253
254 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
255 return 0;
256
257 if (sregs->u.e.features & KVM_SREGS_E_PM) {
258 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
259 sregs->u.e.ivor_high[3];
260 }
261
262 if (sregs->u.e.features & KVM_SREGS_E_PC) {
263 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] =
264 sregs->u.e.ivor_high[4];
265 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] =
266 sregs->u.e.ivor_high[5];
267 }
268
269 return kvmppc_set_sregs_ivor(vcpu, sregs);
270}
271
272static int kvmppc_get_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
273 union kvmppc_one_reg *val)
274{
275 int r = 0;
276
277 switch (id) {
278 case KVM_REG_PPC_SPRG9:
279 *val = get_reg_val(id, vcpu->arch.sprg9);
280 break;
281 default:
282 r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
283 }
284
285 return r;
286}
287
288static int kvmppc_set_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
289 union kvmppc_one_reg *val)
290{
291 int r = 0;
292
293 switch (id) {
294 case KVM_REG_PPC_SPRG9:
295 vcpu->arch.sprg9 = set_reg_val(id, *val);
296 break;
297 default:
298 r = kvmppc_set_one_reg_e500_tlb(vcpu, id, val);
299 }
300
301 return r;
302}
303
304static struct kvm_vcpu *kvmppc_core_vcpu_create_e500mc(struct kvm *kvm,
305 unsigned int id)
306{
307 struct kvmppc_vcpu_e500 *vcpu_e500;
308 struct kvm_vcpu *vcpu;
309 int err;
310
311 vcpu_e500 = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
312 if (!vcpu_e500) {
313 err = -ENOMEM;
314 goto out;
315 }
316 vcpu = &vcpu_e500->vcpu;
317
318 /* Invalid PIR value -- this LPID dosn't have valid state on any cpu */
319 vcpu->arch.oldpir = 0xffffffff;
320
321 err = kvm_vcpu_init(vcpu, kvm, id);
322 if (err)
323 goto free_vcpu;
324
325 err = kvmppc_e500_tlb_init(vcpu_e500);
326 if (err)
327 goto uninit_vcpu;
328
329 vcpu->arch.shared = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
330 if (!vcpu->arch.shared) {
331 err = -ENOMEM;
332 goto uninit_tlb;
333 }
334
335 return vcpu;
336
337uninit_tlb:
338 kvmppc_e500_tlb_uninit(vcpu_e500);
339uninit_vcpu:
340 kvm_vcpu_uninit(vcpu);
341
342free_vcpu:
343 kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
344out:
345 return ERR_PTR(err);
346}
347
348static void kvmppc_core_vcpu_free_e500mc(struct kvm_vcpu *vcpu)
349{
350 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
351
352 free_page((unsigned long)vcpu->arch.shared);
353 kvmppc_e500_tlb_uninit(vcpu_e500);
354 kvm_vcpu_uninit(vcpu);
355 kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
356}
357
358static int kvmppc_core_init_vm_e500mc(struct kvm *kvm)
359{
360 int lpid;
361
362 lpid = kvmppc_alloc_lpid();
363 if (lpid < 0)
364 return lpid;
365
366 /*
367 * Use two lpids per VM on cores with two threads like e6500. Use
368 * even numbers to speedup vcpu lpid computation with consecutive lpids
369 * per VM. vm1 will use lpids 2 and 3, vm2 lpids 4 and 5, and so on.
370 */
371 if (threads_per_core == 2)
372 lpid <<= 1;
373
374 kvm->arch.lpid = lpid;
375 return 0;
376}
377
378static void kvmppc_core_destroy_vm_e500mc(struct kvm *kvm)
379{
380 int lpid = kvm->arch.lpid;
381
382 if (threads_per_core == 2)
383 lpid >>= 1;
384
385 kvmppc_free_lpid(lpid);
386}
387
388static struct kvmppc_ops kvm_ops_e500mc = {
389 .get_sregs = kvmppc_core_get_sregs_e500mc,
390 .set_sregs = kvmppc_core_set_sregs_e500mc,
391 .get_one_reg = kvmppc_get_one_reg_e500mc,
392 .set_one_reg = kvmppc_set_one_reg_e500mc,
393 .vcpu_load = kvmppc_core_vcpu_load_e500mc,
394 .vcpu_put = kvmppc_core_vcpu_put_e500mc,
395 .vcpu_create = kvmppc_core_vcpu_create_e500mc,
396 .vcpu_free = kvmppc_core_vcpu_free_e500mc,
397 .mmu_destroy = kvmppc_mmu_destroy_e500,
398 .init_vm = kvmppc_core_init_vm_e500mc,
399 .destroy_vm = kvmppc_core_destroy_vm_e500mc,
400 .emulate_op = kvmppc_core_emulate_op_e500,
401 .emulate_mtspr = kvmppc_core_emulate_mtspr_e500,
402 .emulate_mfspr = kvmppc_core_emulate_mfspr_e500,
403};
404
405static int __init kvmppc_e500mc_init(void)
406{
407 int r;
408
409 r = kvmppc_booke_init();
410 if (r)
411 goto err_out;
412
413 /*
414 * Use two lpids per VM on dual threaded processors like e6500
415 * to workarround the lack of tlb write conditional instruction.
416 * Expose half the number of available hardware lpids to the lpid
417 * allocator.
418 */
419 kvmppc_init_lpid(KVMPPC_NR_LPIDS/threads_per_core);
420 kvmppc_claim_lpid(0); /* host */
421
422 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
423 if (r)
424 goto err_out;
425 kvm_ops_e500mc.owner = THIS_MODULE;
426 kvmppc_pr_ops = &kvm_ops_e500mc;
427
428err_out:
429 return r;
430}
431
432static void __exit kvmppc_e500mc_exit(void)
433{
434 kvmppc_pr_ops = NULL;
435 kvmppc_booke_exit();
436}
437
438module_init(kvmppc_e500mc_init);
439module_exit(kvmppc_e500mc_exit);
440MODULE_ALIAS_MISCDEV(KVM_MINOR);
441MODULE_ALIAS("devname:kvm");