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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Pinctrl driver for Rockchip RK805/RK806 PMIC
4 *
5 * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
6 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
7 *
8 * Author: Joseph Chen <chenjh@rock-chips.com>
9 * Author: Xu Shengfei <xsf@rock-chips.com>
10 *
11 * Based on the pinctrl-as3722 driver
12 */
13
14#include <linux/gpio/driver.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/mfd/rk808.h>
18#include <linux/platform_device.h>
19#include <linux/pm.h>
20#include <linux/property.h>
21#include <linux/slab.h>
22
23#include <linux/pinctrl/consumer.h>
24#include <linux/pinctrl/machine.h>
25#include <linux/pinctrl/pinctrl.h>
26#include <linux/pinctrl/pinconf-generic.h>
27#include <linux/pinctrl/pinconf.h>
28#include <linux/pinctrl/pinmux.h>
29
30#include "core.h"
31#include "pinconf.h"
32#include "pinctrl-utils.h"
33
34struct rk805_pin_function {
35 const char *name;
36 const char *const *groups;
37 unsigned int ngroups;
38 int mux_option;
39};
40
41struct rk805_pin_group {
42 const char *name;
43 const unsigned int pins[1];
44 unsigned int npins;
45};
46
47/*
48 * @reg: gpio setting register;
49 * @fun_reg: functions select register;
50 * @fun_mask: functions select mask value, when set is gpio;
51 * @dir_mask: input or output mask value, when set is output, otherwise input;
52 * @val_mask: gpio set value, when set is level high, otherwise low;
53 *
54 * Different PMIC has different pin features, belowing 3 mask members are not
55 * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
56 * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
57 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
58 * necessary.
59 */
60struct rk805_pin_config {
61 u8 reg;
62 u8 fun_reg;
63 u8 fun_msk;
64 u8 dir_msk;
65 u8 val_msk;
66};
67
68struct rk805_pctrl_info {
69 struct rk808 *rk808;
70 struct device *dev;
71 struct pinctrl_dev *pctl;
72 struct gpio_chip gpio_chip;
73 struct pinctrl_desc pinctrl_desc;
74 const struct rk805_pin_function *functions;
75 unsigned int num_functions;
76 const struct rk805_pin_group *groups;
77 int num_pin_groups;
78 const struct pinctrl_pin_desc *pins;
79 unsigned int num_pins;
80 const struct rk805_pin_config *pin_cfg;
81};
82
83enum rk805_pinmux_option {
84 RK805_PINMUX_GPIO,
85};
86
87enum rk806_pinmux_option {
88 RK806_PINMUX_FUN0 = 0,
89 RK806_PINMUX_FUN1,
90 RK806_PINMUX_FUN2,
91 RK806_PINMUX_FUN3,
92 RK806_PINMUX_FUN4,
93 RK806_PINMUX_FUN5,
94};
95
96enum {
97 RK805_GPIO0,
98 RK805_GPIO1,
99};
100
101enum {
102 RK806_GPIO_DVS1,
103 RK806_GPIO_DVS2,
104 RK806_GPIO_DVS3
105};
106
107static const char *const rk805_gpio_groups[] = {
108 "gpio0",
109 "gpio1",
110};
111
112static const char *const rk806_gpio_groups[] = {
113 "gpio_pwrctrl1",
114 "gpio_pwrctrl2",
115 "gpio_pwrctrl3",
116};
117
118/* RK805: 2 output only GPIOs */
119static const struct pinctrl_pin_desc rk805_pins_desc[] = {
120 PINCTRL_PIN(RK805_GPIO0, "gpio0"),
121 PINCTRL_PIN(RK805_GPIO1, "gpio1"),
122};
123
124/* RK806 */
125static const struct pinctrl_pin_desc rk806_pins_desc[] = {
126 PINCTRL_PIN(RK806_GPIO_DVS1, "gpio_pwrctrl1"),
127 PINCTRL_PIN(RK806_GPIO_DVS2, "gpio_pwrctrl2"),
128 PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3"),
129};
130
131static const struct rk805_pin_function rk805_pin_functions[] = {
132 {
133 .name = "gpio",
134 .groups = rk805_gpio_groups,
135 .ngroups = ARRAY_SIZE(rk805_gpio_groups),
136 .mux_option = RK805_PINMUX_GPIO,
137 },
138};
139
140static const struct rk805_pin_function rk806_pin_functions[] = {
141 {
142 .name = "pin_fun0",
143 .groups = rk806_gpio_groups,
144 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
145 .mux_option = RK806_PINMUX_FUN0,
146 },
147 {
148 .name = "pin_fun1",
149 .groups = rk806_gpio_groups,
150 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
151 .mux_option = RK806_PINMUX_FUN1,
152 },
153 {
154 .name = "pin_fun2",
155 .groups = rk806_gpio_groups,
156 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
157 .mux_option = RK806_PINMUX_FUN2,
158 },
159 {
160 .name = "pin_fun3",
161 .groups = rk806_gpio_groups,
162 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
163 .mux_option = RK806_PINMUX_FUN3,
164 },
165 {
166 .name = "pin_fun4",
167 .groups = rk806_gpio_groups,
168 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
169 .mux_option = RK806_PINMUX_FUN4,
170 },
171 {
172 .name = "pin_fun5",
173 .groups = rk806_gpio_groups,
174 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
175 .mux_option = RK806_PINMUX_FUN5,
176 },
177};
178
179static const struct rk805_pin_group rk805_pin_groups[] = {
180 {
181 .name = "gpio0",
182 .pins = { RK805_GPIO0 },
183 .npins = 1,
184 },
185 {
186 .name = "gpio1",
187 .pins = { RK805_GPIO1 },
188 .npins = 1,
189 },
190};
191
192static const struct rk805_pin_group rk806_pin_groups[] = {
193 {
194 .name = "gpio_pwrctrl1",
195 .pins = { RK806_GPIO_DVS1 },
196 .npins = 1,
197 },
198 {
199 .name = "gpio_pwrctrl2",
200 .pins = { RK806_GPIO_DVS2 },
201 .npins = 1,
202 },
203 {
204 .name = "gpio_pwrctrl3",
205 .pins = { RK806_GPIO_DVS3 },
206 .npins = 1,
207 }
208};
209
210#define RK805_GPIO0_VAL_MSK BIT(0)
211#define RK805_GPIO1_VAL_MSK BIT(1)
212
213static const struct rk805_pin_config rk805_gpio_cfgs[] = {
214 {
215 .reg = RK805_OUT_REG,
216 .val_msk = RK805_GPIO0_VAL_MSK,
217 },
218 {
219 .reg = RK805_OUT_REG,
220 .val_msk = RK805_GPIO1_VAL_MSK,
221 },
222};
223
224#define RK806_PWRCTRL1_DR BIT(0)
225#define RK806_PWRCTRL2_DR BIT(1)
226#define RK806_PWRCTRL3_DR BIT(2)
227#define RK806_PWRCTRL1_DATA BIT(4)
228#define RK806_PWRCTRL2_DATA BIT(5)
229#define RK806_PWRCTRL3_DATA BIT(6)
230#define RK806_PWRCTRL1_FUN GENMASK(2, 0)
231#define RK806_PWRCTRL2_FUN GENMASK(6, 4)
232#define RK806_PWRCTRL3_FUN GENMASK(2, 0)
233
234static struct rk805_pin_config rk806_gpio_cfgs[] = {
235 {
236 .fun_reg = RK806_SLEEP_CONFIG0,
237 .fun_msk = RK806_PWRCTRL1_FUN,
238 .reg = RK806_SLEEP_GPIO,
239 .val_msk = RK806_PWRCTRL1_DATA,
240 .dir_msk = RK806_PWRCTRL1_DR,
241 },
242 {
243 .fun_reg = RK806_SLEEP_CONFIG0,
244 .fun_msk = RK806_PWRCTRL2_FUN,
245 .reg = RK806_SLEEP_GPIO,
246 .val_msk = RK806_PWRCTRL2_DATA,
247 .dir_msk = RK806_PWRCTRL2_DR,
248 },
249 {
250 .fun_reg = RK806_SLEEP_CONFIG1,
251 .fun_msk = RK806_PWRCTRL3_FUN,
252 .reg = RK806_SLEEP_GPIO,
253 .val_msk = RK806_PWRCTRL3_DATA,
254 .dir_msk = RK806_PWRCTRL3_DR,
255 }
256};
257
258/* generic gpio chip */
259static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
260{
261 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
262 int ret, val;
263
264 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
265 if (ret) {
266 dev_err(pci->dev, "get gpio%d value failed\n", offset);
267 return ret;
268 }
269
270 return !!(val & pci->pin_cfg[offset].val_msk);
271}
272
273static void rk805_gpio_set(struct gpio_chip *chip,
274 unsigned int offset,
275 int value)
276{
277 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
278 int ret;
279
280 ret = regmap_update_bits(pci->rk808->regmap,
281 pci->pin_cfg[offset].reg,
282 pci->pin_cfg[offset].val_msk,
283 value ? pci->pin_cfg[offset].val_msk : 0);
284 if (ret)
285 dev_err(pci->dev, "set gpio%d value %d failed\n",
286 offset, value);
287}
288
289static int rk805_gpio_direction_output(struct gpio_chip *chip,
290 unsigned int offset, int value)
291{
292 rk805_gpio_set(chip, offset, value);
293 return pinctrl_gpio_direction_output(chip, offset);
294}
295
296static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
297{
298 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
299 unsigned int val;
300 int ret;
301
302 /* default output*/
303 if (!pci->pin_cfg[offset].dir_msk)
304 return GPIO_LINE_DIRECTION_OUT;
305
306 ret = regmap_read(pci->rk808->regmap,
307 pci->pin_cfg[offset].reg,
308 &val);
309 if (ret) {
310 dev_err(pci->dev, "get gpio%d direction failed\n", offset);
311 return ret;
312 }
313
314 if (val & pci->pin_cfg[offset].dir_msk)
315 return GPIO_LINE_DIRECTION_OUT;
316
317 return GPIO_LINE_DIRECTION_IN;
318}
319
320static const struct gpio_chip rk805_gpio_chip = {
321 .label = "rk805-gpio",
322 .request = gpiochip_generic_request,
323 .free = gpiochip_generic_free,
324 .get_direction = rk805_gpio_get_direction,
325 .get = rk805_gpio_get,
326 .set = rk805_gpio_set,
327 .direction_input = pinctrl_gpio_direction_input,
328 .direction_output = rk805_gpio_direction_output,
329 .can_sleep = true,
330 .base = -1,
331 .owner = THIS_MODULE,
332};
333
334/* generic pinctrl */
335static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
336{
337 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
338
339 return pci->num_pin_groups;
340}
341
342static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
343 unsigned int group)
344{
345 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
346
347 return pci->groups[group].name;
348}
349
350static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
351 unsigned int group,
352 const unsigned int **pins,
353 unsigned int *num_pins)
354{
355 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
356
357 *pins = pci->groups[group].pins;
358 *num_pins = pci->groups[group].npins;
359
360 return 0;
361}
362
363static const struct pinctrl_ops rk805_pinctrl_ops = {
364 .get_groups_count = rk805_pinctrl_get_groups_count,
365 .get_group_name = rk805_pinctrl_get_group_name,
366 .get_group_pins = rk805_pinctrl_get_group_pins,
367 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
368 .dt_free_map = pinctrl_utils_free_map,
369};
370
371static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
372{
373 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
374
375 return pci->num_functions;
376}
377
378static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
379 unsigned int function)
380{
381 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
382
383 return pci->functions[function].name;
384}
385
386static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
387 unsigned int function,
388 const char *const **groups,
389 unsigned int *const num_groups)
390{
391 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
392
393 *groups = pci->functions[function].groups;
394 *num_groups = pci->functions[function].ngroups;
395
396 return 0;
397}
398
399static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
400 unsigned int offset,
401 int mux)
402{
403 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
404 int ret;
405
406 if (!pci->pin_cfg[offset].fun_msk)
407 return 0;
408
409 mux <<= ffs(pci->pin_cfg[offset].fun_msk) - 1;
410 ret = regmap_update_bits(pci->rk808->regmap,
411 pci->pin_cfg[offset].fun_reg,
412 pci->pin_cfg[offset].fun_msk, mux);
413
414 if (ret)
415 dev_err(pci->dev, "set gpio%d func%d failed\n", offset, mux);
416
417 return 0;
418}
419
420static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
421 unsigned int function,
422 unsigned int group)
423{
424 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
425 int mux = pci->functions[function].mux_option;
426 int offset = group;
427
428 return _rk805_pinctrl_set_mux(pctldev, offset, mux);
429}
430
431static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
432 struct pinctrl_gpio_range *range,
433 unsigned int offset)
434{
435 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
436
437 switch (pci->rk808->variant) {
438 case RK805_ID:
439 return _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
440 case RK806_ID:
441 return _rk805_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5);
442 }
443
444 return -ENOTSUPP;
445}
446
447static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
448 struct pinctrl_gpio_range *range,
449 unsigned int offset, bool input)
450{
451 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
452 int ret;
453
454 /* set direction */
455 if (!pci->pin_cfg[offset].dir_msk)
456 return 0;
457
458 ret = regmap_update_bits(pci->rk808->regmap,
459 pci->pin_cfg[offset].reg,
460 pci->pin_cfg[offset].dir_msk,
461 input ? 0 : pci->pin_cfg[offset].dir_msk);
462 if (ret) {
463 dev_err(pci->dev, "set gpio%d direction failed\n", offset);
464 return ret;
465 }
466
467 return ret;
468}
469
470static const struct pinmux_ops rk805_pinmux_ops = {
471 .get_functions_count = rk805_pinctrl_get_funcs_count,
472 .get_function_name = rk805_pinctrl_get_func_name,
473 .get_function_groups = rk805_pinctrl_get_func_groups,
474 .set_mux = rk805_pinctrl_set_mux,
475 .gpio_request_enable = rk805_pinctrl_gpio_request_enable,
476 .gpio_set_direction = rk805_pmx_gpio_set_direction,
477};
478
479static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
480 unsigned int pin, unsigned long *config)
481{
482 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
483 enum pin_config_param param = pinconf_to_config_param(*config);
484 u32 arg = 0;
485
486 switch (param) {
487 case PIN_CONFIG_OUTPUT:
488 case PIN_CONFIG_INPUT_ENABLE:
489 arg = rk805_gpio_get(&pci->gpio_chip, pin);
490 break;
491 default:
492 dev_err(pci->dev, "Properties not supported\n");
493 return -ENOTSUPP;
494 }
495
496 *config = pinconf_to_config_packed(param, (u16)arg);
497
498 return 0;
499}
500
501static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
502 unsigned int pin, unsigned long *configs,
503 unsigned int num_configs)
504{
505 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
506 enum pin_config_param param;
507 u32 i, arg = 0;
508
509 for (i = 0; i < num_configs; i++) {
510 param = pinconf_to_config_param(configs[i]);
511 arg = pinconf_to_config_argument(configs[i]);
512
513 switch (param) {
514 case PIN_CONFIG_OUTPUT:
515 rk805_gpio_set(&pci->gpio_chip, pin, arg);
516 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
517 break;
518 case PIN_CONFIG_INPUT_ENABLE:
519 if (pci->rk808->variant != RK805_ID && arg) {
520 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, true);
521 break;
522 }
523 fallthrough;
524 default:
525 dev_err(pci->dev, "Properties not supported\n");
526 return -ENOTSUPP;
527 }
528 }
529
530 return 0;
531}
532
533static const struct pinconf_ops rk805_pinconf_ops = {
534 .pin_config_get = rk805_pinconf_get,
535 .pin_config_set = rk805_pinconf_set,
536};
537
538static const struct pinctrl_desc rk805_pinctrl_desc = {
539 .name = "rk805-pinctrl",
540 .pctlops = &rk805_pinctrl_ops,
541 .pmxops = &rk805_pinmux_ops,
542 .confops = &rk805_pinconf_ops,
543 .owner = THIS_MODULE,
544};
545
546static int rk805_pinctrl_probe(struct platform_device *pdev)
547{
548 struct rk805_pctrl_info *pci;
549 int ret;
550
551 device_set_node(&pdev->dev, dev_fwnode(pdev->dev.parent));
552
553 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
554 if (!pci)
555 return -ENOMEM;
556
557 pci->dev = &pdev->dev;
558 pci->rk808 = dev_get_drvdata(pdev->dev.parent);
559
560 pci->pinctrl_desc = rk805_pinctrl_desc;
561 pci->gpio_chip = rk805_gpio_chip;
562 pci->gpio_chip.parent = &pdev->dev;
563
564 platform_set_drvdata(pdev, pci);
565
566 switch (pci->rk808->variant) {
567 case RK805_ID:
568 pci->pins = rk805_pins_desc;
569 pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
570 pci->functions = rk805_pin_functions;
571 pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
572 pci->groups = rk805_pin_groups;
573 pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
574 pci->pinctrl_desc.pins = rk805_pins_desc;
575 pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
576 pci->pin_cfg = rk805_gpio_cfgs;
577 pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
578 break;
579 case RK806_ID:
580 pci->pins = rk806_pins_desc;
581 pci->num_pins = ARRAY_SIZE(rk806_pins_desc);
582 pci->functions = rk806_pin_functions;
583 pci->num_functions = ARRAY_SIZE(rk806_pin_functions);
584 pci->groups = rk806_pin_groups;
585 pci->num_pin_groups = ARRAY_SIZE(rk806_pin_groups);
586 pci->pinctrl_desc.pins = rk806_pins_desc;
587 pci->pinctrl_desc.npins = ARRAY_SIZE(rk806_pins_desc);
588 pci->pin_cfg = rk806_gpio_cfgs;
589 pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs);
590 break;
591 default:
592 dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
593 pci->rk808->variant);
594 return -EINVAL;
595 }
596
597 /* Add gpio chip */
598 ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
599 if (ret < 0) {
600 dev_err(&pdev->dev, "Couldn't add gpiochip\n");
601 return ret;
602 }
603
604 /* Add pinctrl */
605 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
606 if (IS_ERR(pci->pctl)) {
607 dev_err(&pdev->dev, "Couldn't add pinctrl\n");
608 return PTR_ERR(pci->pctl);
609 }
610
611 /* Add pin range */
612 ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
613 0, 0, pci->gpio_chip.ngpio);
614 if (ret < 0) {
615 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
616 return ret;
617 }
618
619 return 0;
620}
621
622static struct platform_driver rk805_pinctrl_driver = {
623 .probe = rk805_pinctrl_probe,
624 .driver = {
625 .name = "rk805-pinctrl",
626 },
627};
628module_platform_driver(rk805_pinctrl_driver);
629
630MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
631MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
632MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
633MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Pinctrl driver for Rockchip RK805 PMIC
4 *
5 * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Author: Joseph Chen <chenjh@rock-chips.com>
8 *
9 * Based on the pinctrl-as3722 driver
10 */
11
12#include <linux/gpio/driver.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/mfd/rk808.h>
16#include <linux/of.h>
17#include <linux/of_device.h>
18#include <linux/platform_device.h>
19#include <linux/pinctrl/consumer.h>
20#include <linux/pinctrl/machine.h>
21#include <linux/pinctrl/pinctrl.h>
22#include <linux/pinctrl/pinconf-generic.h>
23#include <linux/pinctrl/pinconf.h>
24#include <linux/pinctrl/pinmux.h>
25#include <linux/pm.h>
26#include <linux/slab.h>
27
28#include "core.h"
29#include "pinconf.h"
30#include "pinctrl-utils.h"
31
32struct rk805_pin_function {
33 const char *name;
34 const char *const *groups;
35 unsigned int ngroups;
36 int mux_option;
37};
38
39struct rk805_pin_group {
40 const char *name;
41 const unsigned int pins[1];
42 unsigned int npins;
43};
44
45/*
46 * @reg: gpio setting register;
47 * @fun_mask: functions select mask value, when set is gpio;
48 * @dir_mask: input or output mask value, when set is output, otherwise input;
49 * @val_mask: gpio set value, when set is level high, otherwise low;
50 *
51 * Different PMIC has different pin features, belowing 3 mask members are not
52 * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
53 * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
54 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
55 * necessary.
56 */
57struct rk805_pin_config {
58 u8 reg;
59 u8 fun_msk;
60 u8 dir_msk;
61 u8 val_msk;
62};
63
64struct rk805_pctrl_info {
65 struct rk808 *rk808;
66 struct device *dev;
67 struct pinctrl_dev *pctl;
68 struct gpio_chip gpio_chip;
69 struct pinctrl_desc pinctrl_desc;
70 const struct rk805_pin_function *functions;
71 unsigned int num_functions;
72 const struct rk805_pin_group *groups;
73 int num_pin_groups;
74 const struct pinctrl_pin_desc *pins;
75 unsigned int num_pins;
76 struct rk805_pin_config *pin_cfg;
77};
78
79enum rk805_pinmux_option {
80 RK805_PINMUX_GPIO,
81};
82
83enum {
84 RK805_GPIO0,
85 RK805_GPIO1,
86};
87
88static const char *const rk805_gpio_groups[] = {
89 "gpio0",
90 "gpio1",
91};
92
93/* RK805: 2 output only GPIOs */
94static const struct pinctrl_pin_desc rk805_pins_desc[] = {
95 PINCTRL_PIN(RK805_GPIO0, "gpio0"),
96 PINCTRL_PIN(RK805_GPIO1, "gpio1"),
97};
98
99static const struct rk805_pin_function rk805_pin_functions[] = {
100 {
101 .name = "gpio",
102 .groups = rk805_gpio_groups,
103 .ngroups = ARRAY_SIZE(rk805_gpio_groups),
104 .mux_option = RK805_PINMUX_GPIO,
105 },
106};
107
108static const struct rk805_pin_group rk805_pin_groups[] = {
109 {
110 .name = "gpio0",
111 .pins = { RK805_GPIO0 },
112 .npins = 1,
113 },
114 {
115 .name = "gpio1",
116 .pins = { RK805_GPIO1 },
117 .npins = 1,
118 },
119};
120
121#define RK805_GPIO0_VAL_MSK BIT(0)
122#define RK805_GPIO1_VAL_MSK BIT(1)
123
124static struct rk805_pin_config rk805_gpio_cfgs[] = {
125 {
126 .reg = RK805_OUT_REG,
127 .val_msk = RK805_GPIO0_VAL_MSK,
128 },
129 {
130 .reg = RK805_OUT_REG,
131 .val_msk = RK805_GPIO1_VAL_MSK,
132 },
133};
134
135/* generic gpio chip */
136static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
137{
138 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
139 int ret, val;
140
141 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
142 if (ret) {
143 dev_err(pci->dev, "get gpio%d value failed\n", offset);
144 return ret;
145 }
146
147 return !!(val & pci->pin_cfg[offset].val_msk);
148}
149
150static void rk805_gpio_set(struct gpio_chip *chip,
151 unsigned int offset,
152 int value)
153{
154 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
155 int ret;
156
157 ret = regmap_update_bits(pci->rk808->regmap,
158 pci->pin_cfg[offset].reg,
159 pci->pin_cfg[offset].val_msk,
160 value ? pci->pin_cfg[offset].val_msk : 0);
161 if (ret)
162 dev_err(pci->dev, "set gpio%d value %d failed\n",
163 offset, value);
164}
165
166static int rk805_gpio_direction_input(struct gpio_chip *chip,
167 unsigned int offset)
168{
169 return pinctrl_gpio_direction_input(chip->base + offset);
170}
171
172static int rk805_gpio_direction_output(struct gpio_chip *chip,
173 unsigned int offset, int value)
174{
175 rk805_gpio_set(chip, offset, value);
176 return pinctrl_gpio_direction_output(chip->base + offset);
177}
178
179static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
180{
181 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
182 unsigned int val;
183 int ret;
184
185 /* default output*/
186 if (!pci->pin_cfg[offset].dir_msk)
187 return 0;
188
189 ret = regmap_read(pci->rk808->regmap,
190 pci->pin_cfg[offset].reg,
191 &val);
192 if (ret) {
193 dev_err(pci->dev, "get gpio%d direction failed\n", offset);
194 return ret;
195 }
196
197 return !(val & pci->pin_cfg[offset].dir_msk);
198}
199
200static const struct gpio_chip rk805_gpio_chip = {
201 .label = "rk805-gpio",
202 .request = gpiochip_generic_request,
203 .free = gpiochip_generic_free,
204 .get_direction = rk805_gpio_get_direction,
205 .get = rk805_gpio_get,
206 .set = rk805_gpio_set,
207 .direction_input = rk805_gpio_direction_input,
208 .direction_output = rk805_gpio_direction_output,
209 .can_sleep = true,
210 .base = -1,
211 .owner = THIS_MODULE,
212};
213
214/* generic pinctrl */
215static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
216{
217 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
218
219 return pci->num_pin_groups;
220}
221
222static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
223 unsigned int group)
224{
225 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
226
227 return pci->groups[group].name;
228}
229
230static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
231 unsigned int group,
232 const unsigned int **pins,
233 unsigned int *num_pins)
234{
235 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
236
237 *pins = pci->groups[group].pins;
238 *num_pins = pci->groups[group].npins;
239
240 return 0;
241}
242
243static const struct pinctrl_ops rk805_pinctrl_ops = {
244 .get_groups_count = rk805_pinctrl_get_groups_count,
245 .get_group_name = rk805_pinctrl_get_group_name,
246 .get_group_pins = rk805_pinctrl_get_group_pins,
247 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
248 .dt_free_map = pinctrl_utils_free_map,
249};
250
251static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
252{
253 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
254
255 return pci->num_functions;
256}
257
258static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
259 unsigned int function)
260{
261 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
262
263 return pci->functions[function].name;
264}
265
266static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
267 unsigned int function,
268 const char *const **groups,
269 unsigned int *const num_groups)
270{
271 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
272
273 *groups = pci->functions[function].groups;
274 *num_groups = pci->functions[function].ngroups;
275
276 return 0;
277}
278
279static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
280 unsigned int offset,
281 int mux)
282{
283 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
284 int ret;
285
286 if (!pci->pin_cfg[offset].fun_msk)
287 return 0;
288
289 if (mux == RK805_PINMUX_GPIO) {
290 ret = regmap_update_bits(pci->rk808->regmap,
291 pci->pin_cfg[offset].reg,
292 pci->pin_cfg[offset].fun_msk,
293 pci->pin_cfg[offset].fun_msk);
294 if (ret) {
295 dev_err(pci->dev, "set gpio%d GPIO failed\n", offset);
296 return ret;
297 }
298 } else {
299 dev_err(pci->dev, "Couldn't find function mux %d\n", mux);
300 return -EINVAL;
301 }
302
303 return 0;
304}
305
306static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
307 unsigned int function,
308 unsigned int group)
309{
310 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
311 int mux = pci->functions[function].mux_option;
312 int offset = group;
313
314 return _rk805_pinctrl_set_mux(pctldev, offset, mux);
315}
316
317static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
318 struct pinctrl_gpio_range *range,
319 unsigned int offset, bool input)
320{
321 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
322 int ret;
323
324 /* switch to gpio function */
325 ret = _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
326 if (ret) {
327 dev_err(pci->dev, "set gpio%d mux failed\n", offset);
328 return ret;
329 }
330
331 /* set direction */
332 if (!pci->pin_cfg[offset].dir_msk)
333 return 0;
334
335 ret = regmap_update_bits(pci->rk808->regmap,
336 pci->pin_cfg[offset].reg,
337 pci->pin_cfg[offset].dir_msk,
338 input ? 0 : pci->pin_cfg[offset].dir_msk);
339 if (ret) {
340 dev_err(pci->dev, "set gpio%d direction failed\n", offset);
341 return ret;
342 }
343
344 return ret;
345}
346
347static const struct pinmux_ops rk805_pinmux_ops = {
348 .get_functions_count = rk805_pinctrl_get_funcs_count,
349 .get_function_name = rk805_pinctrl_get_func_name,
350 .get_function_groups = rk805_pinctrl_get_func_groups,
351 .set_mux = rk805_pinctrl_set_mux,
352 .gpio_set_direction = rk805_pmx_gpio_set_direction,
353};
354
355static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
356 unsigned int pin, unsigned long *config)
357{
358 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
359 enum pin_config_param param = pinconf_to_config_param(*config);
360 u32 arg = 0;
361
362 switch (param) {
363 case PIN_CONFIG_OUTPUT:
364 arg = rk805_gpio_get(&pci->gpio_chip, pin);
365 break;
366 default:
367 dev_err(pci->dev, "Properties not supported\n");
368 return -ENOTSUPP;
369 }
370
371 *config = pinconf_to_config_packed(param, (u16)arg);
372
373 return 0;
374}
375
376static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
377 unsigned int pin, unsigned long *configs,
378 unsigned int num_configs)
379{
380 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
381 enum pin_config_param param;
382 u32 i, arg = 0;
383
384 for (i = 0; i < num_configs; i++) {
385 param = pinconf_to_config_param(configs[i]);
386 arg = pinconf_to_config_argument(configs[i]);
387
388 switch (param) {
389 case PIN_CONFIG_OUTPUT:
390 rk805_gpio_set(&pci->gpio_chip, pin, arg);
391 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
392 break;
393 default:
394 dev_err(pci->dev, "Properties not supported\n");
395 return -ENOTSUPP;
396 }
397 }
398
399 return 0;
400}
401
402static const struct pinconf_ops rk805_pinconf_ops = {
403 .pin_config_get = rk805_pinconf_get,
404 .pin_config_set = rk805_pinconf_set,
405};
406
407static const struct pinctrl_desc rk805_pinctrl_desc = {
408 .name = "rk805-pinctrl",
409 .pctlops = &rk805_pinctrl_ops,
410 .pmxops = &rk805_pinmux_ops,
411 .confops = &rk805_pinconf_ops,
412 .owner = THIS_MODULE,
413};
414
415static int rk805_pinctrl_probe(struct platform_device *pdev)
416{
417 struct rk805_pctrl_info *pci;
418 int ret;
419
420 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
421 if (!pci)
422 return -ENOMEM;
423
424 pci->dev = &pdev->dev;
425 pci->dev->of_node = pdev->dev.parent->of_node;
426 pci->rk808 = dev_get_drvdata(pdev->dev.parent);
427
428 pci->pinctrl_desc = rk805_pinctrl_desc;
429 pci->gpio_chip = rk805_gpio_chip;
430 pci->gpio_chip.parent = &pdev->dev;
431 pci->gpio_chip.of_node = pdev->dev.parent->of_node;
432
433 platform_set_drvdata(pdev, pci);
434
435 switch (pci->rk808->variant) {
436 case RK805_ID:
437 pci->pins = rk805_pins_desc;
438 pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
439 pci->functions = rk805_pin_functions;
440 pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
441 pci->groups = rk805_pin_groups;
442 pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
443 pci->pinctrl_desc.pins = rk805_pins_desc;
444 pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
445 pci->pin_cfg = rk805_gpio_cfgs;
446 pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
447 break;
448 default:
449 dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
450 pci->rk808->variant);
451 return -EINVAL;
452 }
453
454 /* Add gpio chip */
455 ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
456 if (ret < 0) {
457 dev_err(&pdev->dev, "Couldn't add gpiochip\n");
458 return ret;
459 }
460
461 /* Add pinctrl */
462 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
463 if (IS_ERR(pci->pctl)) {
464 dev_err(&pdev->dev, "Couldn't add pinctrl\n");
465 return PTR_ERR(pci->pctl);
466 }
467
468 /* Add pin range */
469 ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
470 0, 0, pci->gpio_chip.ngpio);
471 if (ret < 0) {
472 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
473 return ret;
474 }
475
476 return 0;
477}
478
479static struct platform_driver rk805_pinctrl_driver = {
480 .probe = rk805_pinctrl_probe,
481 .driver = {
482 .name = "rk805-pinctrl",
483 },
484};
485module_platform_driver(rk805_pinctrl_driver);
486
487MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
488MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
489MODULE_LICENSE("GPL v2");