Loading...
1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/*
3 * Copyright (C) 2012-2014, 2018, 2020-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#ifndef __iwl_fw_api_phy_ctxt_h__
8#define __iwl_fw_api_phy_ctxt_h__
9
10/* Supported bands */
11#define PHY_BAND_5 (0)
12#define PHY_BAND_24 (1)
13#define PHY_BAND_6 (2)
14
15/* Supported channel width, vary if there is VHT support */
16#define IWL_PHY_CHANNEL_MODE20 0x0
17#define IWL_PHY_CHANNEL_MODE40 0x1
18#define IWL_PHY_CHANNEL_MODE80 0x2
19#define IWL_PHY_CHANNEL_MODE160 0x3
20/* and 320 MHz for EHT */
21#define IWL_PHY_CHANNEL_MODE320 0x4
22
23/*
24 * Control channel position:
25 * For legacy set bit means upper channel, otherwise lower.
26 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
27 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
28 * For EHT - bit-3 is used for extended distance
29 * center_freq
30 * |
31 * 40Mhz |____|____|
32 * 80Mhz |____|____|____|____|
33 * 160Mhz |____|____|____|____|____|____|____|____|
34 * 320MHz |____|____|____|____|____|____|____|____|____|____|____|____|____|____|____|____|
35 * code 1011 1010 1001 1000 0011 0010 0001 0000 0100 0101 0110 0111 1100 1101 1110 1111
36 */
37#define IWL_PHY_CTRL_POS_ABOVE 0x4
38#define IWL_PHY_CTRL_POS_OFFS_EXT 0x8
39#define IWL_PHY_CTRL_POS_OFFS_MSK 0x3
40
41/*
42 * struct iwl_fw_channel_info_v1 - channel information
43 *
44 * @band: PHY_BAND_*
45 * @channel: channel number
46 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
47 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
48 */
49struct iwl_fw_channel_info_v1 {
50 u8 band;
51 u8 channel;
52 u8 width;
53 u8 ctrl_pos;
54} __packed; /* CHANNEL_CONFIG_API_S_VER_1 */
55
56/*
57 * struct iwl_fw_channel_info - channel information
58 *
59 * @channel: channel number
60 * @band: PHY_BAND_*
61 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
62 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
63 * @reserved: for future use and alignment
64 */
65struct iwl_fw_channel_info {
66 __le32 channel;
67 u8 band;
68 u8 width;
69 u8 ctrl_pos;
70 u8 reserved;
71} __packed; /*CHANNEL_CONFIG_API_S_VER_2 */
72
73#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
74#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
75 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
76#define PHY_RX_CHAIN_VALID_POS (1)
77#define PHY_RX_CHAIN_VALID_MSK \
78 (0x7 << PHY_RX_CHAIN_VALID_POS)
79#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
80#define PHY_RX_CHAIN_FORCE_SEL_MSK \
81 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
82#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
83#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
84 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
85#define PHY_RX_CHAIN_CNT_POS (10)
86#define PHY_RX_CHAIN_CNT_MSK \
87 (0x3 << PHY_RX_CHAIN_CNT_POS)
88#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
89#define PHY_RX_CHAIN_MIMO_CNT_MSK \
90 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
91#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
92#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
93 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
94
95/* TODO: fix the value, make it depend on firmware at runtime? */
96#define NUM_PHY_CTX 3
97
98/* TODO: complete missing documentation */
99/**
100 * struct iwl_phy_context_cmd_tail - tail of iwl_phy_ctx_cmd for alignment with
101 * various channel structures.
102 *
103 * @txchain_info: ???
104 * @rxchain_info: ???
105 * @acquisition_data: ???
106 * @dsp_cfg_flags: set to 0
107 */
108struct iwl_phy_context_cmd_tail {
109 __le32 txchain_info;
110 __le32 rxchain_info;
111 __le32 acquisition_data;
112 __le32 dsp_cfg_flags;
113} __packed;
114
115/**
116 * struct iwl_phy_context_cmd - config of the PHY context
117 * ( PHY_CONTEXT_CMD = 0x8 )
118 * @id_and_color: ID and color of the relevant Binding
119 * @action: action to perform, see &enum iwl_ctxt_action
120 * @apply_time: 0 means immediate apply and context switch.
121 * other value means apply new params after X usecs
122 * @tx_param_color: ???
123 * @ci: channel info
124 * @tail: command tail
125 */
126struct iwl_phy_context_cmd_v1 {
127 /* COMMON_INDEX_HDR_API_S_VER_1 */
128 __le32 id_and_color;
129 __le32 action;
130 /* PHY_CONTEXT_DATA_API_S_VER_3 */
131 __le32 apply_time;
132 __le32 tx_param_color;
133 struct iwl_fw_channel_info ci;
134 struct iwl_phy_context_cmd_tail tail;
135} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
136
137/**
138 * struct iwl_phy_context_cmd - config of the PHY context
139 * ( PHY_CONTEXT_CMD = 0x8 )
140 * @id_and_color: ID and color of the relevant Binding
141 * @action: action to perform, see &enum iwl_ctxt_action
142 * @lmac_id: the lmac id the phy context belongs to
143 * @ci: channel info
144 * @rxchain_info: ???
145 * @dsp_cfg_flags: set to 0
146 * @reserved: reserved to align to 64 bit
147 */
148struct iwl_phy_context_cmd {
149 /* COMMON_INDEX_HDR_API_S_VER_1 */
150 __le32 id_and_color;
151 __le32 action;
152 /* PHY_CONTEXT_DATA_API_S_VER_3, PHY_CONTEXT_DATA_API_S_VER_4 */
153 struct iwl_fw_channel_info ci;
154 __le32 lmac_id;
155 __le32 rxchain_info; /* reserved in _VER_4 */
156 __le32 dsp_cfg_flags;
157 __le32 reserved;
158} __packed; /* PHY_CONTEXT_CMD_API_VER_3, PHY_CONTEXT_CMD_API_VER_4 */
159
160#endif /* __iwl_fw_api_phy_ctxt_h__ */
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 Intel Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * The full GNU General Public License is included in this distribution
23 * in the file called COPYING.
24 *
25 * Contact Information:
26 * Intel Linux Wireless <linuxwifi@intel.com>
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 Intel Corporation
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *
63 *****************************************************************************/
64
65#ifndef __iwl_fw_api_phy_ctxt_h__
66#define __iwl_fw_api_phy_ctxt_h__
67
68/* Supported bands */
69#define PHY_BAND_5 (0)
70#define PHY_BAND_24 (1)
71
72/* Supported channel width, vary if there is VHT support */
73#define PHY_VHT_CHANNEL_MODE20 (0x0)
74#define PHY_VHT_CHANNEL_MODE40 (0x1)
75#define PHY_VHT_CHANNEL_MODE80 (0x2)
76#define PHY_VHT_CHANNEL_MODE160 (0x3)
77
78/*
79 * Control channel position:
80 * For legacy set bit means upper channel, otherwise lower.
81 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
82 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
83 * center_freq
84 * |
85 * 40Mhz |_______|_______|
86 * 80Mhz |_______|_______|_______|_______|
87 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
88 * code 011 010 001 000 | 100 101 110 111
89 */
90#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
91#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
92#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
93#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
94#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
95#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
96#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
97#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
98
99/*
100 * struct iwl_fw_channel_info_v1 - channel information
101 *
102 * @band: PHY_BAND_*
103 * @channel: channel number
104 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
105 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
106 */
107struct iwl_fw_channel_info_v1 {
108 u8 band;
109 u8 channel;
110 u8 width;
111 u8 ctrl_pos;
112} __packed; /* CHANNEL_CONFIG_API_S_VER_1 */
113
114/*
115 * struct iwl_fw_channel_info - channel information
116 *
117 * @channel: channel number
118 * @band: PHY_BAND_*
119 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
120 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
121 * @reserved: for future use and alignment
122 */
123struct iwl_fw_channel_info {
124 __le32 channel;
125 u8 band;
126 u8 width;
127 u8 ctrl_pos;
128 u8 reserved;
129} __packed; /*CHANNEL_CONFIG_API_S_VER_2 */
130
131#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
132#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
133 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
134#define PHY_RX_CHAIN_VALID_POS (1)
135#define PHY_RX_CHAIN_VALID_MSK \
136 (0x7 << PHY_RX_CHAIN_VALID_POS)
137#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
138#define PHY_RX_CHAIN_FORCE_SEL_MSK \
139 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
140#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
141#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
142 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
143#define PHY_RX_CHAIN_CNT_POS (10)
144#define PHY_RX_CHAIN_CNT_MSK \
145 (0x3 << PHY_RX_CHAIN_CNT_POS)
146#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
147#define PHY_RX_CHAIN_MIMO_CNT_MSK \
148 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
149#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
150#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
151 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
152
153/* TODO: fix the value, make it depend on firmware at runtime? */
154#define NUM_PHY_CTX 3
155
156/* TODO: complete missing documentation */
157/**
158 * struct iwl_phy_context_cmd_tail - tail of iwl_phy_ctx_cmd for alignment with
159 * various channel structures.
160 *
161 * @txchain_info: ???
162 * @rxchain_info: ???
163 * @acquisition_data: ???
164 * @dsp_cfg_flags: set to 0
165 */
166struct iwl_phy_context_cmd_tail {
167 __le32 txchain_info;
168 __le32 rxchain_info;
169 __le32 acquisition_data;
170 __le32 dsp_cfg_flags;
171} __packed;
172
173/**
174 * struct iwl_phy_context_cmd - config of the PHY context
175 * ( PHY_CONTEXT_CMD = 0x8 )
176 * @id_and_color: ID and color of the relevant Binding
177 * @action: action to perform, one of FW_CTXT_ACTION_*
178 * @apply_time: 0 means immediate apply and context switch.
179 * other value means apply new params after X usecs
180 * @tx_param_color: ???
181 * @ci: channel info
182 * @tail: command tail
183 */
184struct iwl_phy_context_cmd {
185 /* COMMON_INDEX_HDR_API_S_VER_1 */
186 __le32 id_and_color;
187 __le32 action;
188 /* PHY_CONTEXT_DATA_API_S_VER_1 */
189 __le32 apply_time;
190 __le32 tx_param_color;
191 struct iwl_fw_channel_info ci;
192 struct iwl_phy_context_cmd_tail tail;
193} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
194
195#endif /* __iwl_fw_api_phy_ctxt_h__ */