1/* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
   2/*
   3	Written 1998-2000 by Donald Becker.
   4	Updates 2000 by Keith Underwood.
   5
   6	This software may be used and distributed according to the terms of
   7	the GNU General Public License (GPL), incorporated herein by reference.
   8	Drivers based on or derived from this code fall under the GPL and must
   9	retain the authorship, copyright and license notice.  This file is not
  10	a complete program and may only be used when the entire operating
  11	system is licensed under the GPL.
  12
  13	The author may be reached as becker@scyld.com, or C/O
  14	Scyld Computing Corporation
  15	410 Severn Ave., Suite 210
  16	Annapolis MD 21403
  17
  18	This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
  19	adapter.
  20
  21	Support and updates available at
  22	http://www.scyld.com/network/hamachi.html
  23	[link no longer provides useful info -jgarzik]
  24	or
  25	http://www.parl.clemson.edu/~keithu/hamachi.html
  26
  27*/
  28
  29#define DRV_NAME	"hamachi"
  30#define DRV_VERSION	"2.1"
  31#define DRV_RELDATE	"Sept 11, 2006"
  32
  33
  34/* A few user-configurable values. */
  35
  36static int debug = 1;		/* 1 normal messages, 0 quiet .. 7 verbose.  */
  37#define final_version
  38#define hamachi_debug debug
  39/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
  40static int max_interrupt_work = 40;
  41static int mtu;
  42/* Default values selected by testing on a dual processor PIII-450 */
  43/* These six interrupt control parameters may be set directly when loading the
  44 * module, or through the rx_params and tx_params variables
  45 */
  46static int max_rx_latency = 0x11;
  47static int max_rx_gap = 0x05;
  48static int min_rx_pkt = 0x18;
  49static int max_tx_latency = 0x00;
  50static int max_tx_gap = 0x00;
  51static int min_tx_pkt = 0x30;
  52
  53/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
  54   -Setting to > 1518 causes all frames to be copied
  55	-Setting to 0 disables copies
  56*/
  57static int rx_copybreak;
  58
  59/* An override for the hardware detection of bus width.
  60	Set to 1 to force 32 bit PCI bus detection.  Set to 4 to force 64 bit.
  61	Add 2 to disable parity detection.
  62*/
  63static int force32;
  64
  65
  66/* Used to pass the media type, etc.
  67   These exist for driver interoperability.
  68   No media types are currently defined.
  69		- The lower 4 bits are reserved for the media type.
  70		- The next three bits may be set to one of the following:
  71			0x00000000 : Autodetect PCI bus
  72			0x00000010 : Force 32 bit PCI bus
  73			0x00000020 : Disable parity detection
  74			0x00000040 : Force 64 bit PCI bus
  75			Default is autodetect
  76		- The next bit can be used to force half-duplex.  This is a bad
  77		  idea since no known implementations implement half-duplex, and,
  78		  in general, half-duplex for gigabit ethernet is a bad idea.
  79			0x00000080 : Force half-duplex
  80			Default is full-duplex.
  81		- In the original driver, the ninth bit could be used to force
  82		  full-duplex.  Maintain that for compatibility
  83		   0x00000200 : Force full-duplex
  84*/
  85#define MAX_UNITS 8				/* More are supported, limit only on options */
  86static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
  87static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
  88/* The Hamachi chipset supports 3 parameters each for Rx and Tx
  89 * interruput management.  Parameters will be loaded as specified into
  90 * the TxIntControl and RxIntControl registers.
  91 *
  92 * The registers are arranged as follows:
  93 *     23 - 16   15 -  8   7    -    0
  94 *    _________________________________
  95 *   | min_pkt | max_gap | max_latency |
  96 *    ---------------------------------
  97 *   min_pkt      : The minimum number of packets processed between
  98 *                  interrupts.
  99 *   max_gap      : The maximum inter-packet gap in units of 8.192 us
 100 *   max_latency  : The absolute time between interrupts in units of 8.192 us
 101 *
 102 */
 103static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
 104static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
 105
 106/* Operational parameters that are set at compile time. */
 107
 108/* Keep the ring sizes a power of two for compile efficiency.
 109	The compiler will convert <unsigned>'%'<2^N> into a bit mask.
 110   Making the Tx ring too large decreases the effectiveness of channel
 111   bonding and packet priority.
 112   There are no ill effects from too-large receive rings, except for
 113	excessive memory usage */
 114/* Empirically it appears that the Tx ring needs to be a little bigger
 115   for these Gbit adapters or you get into an overrun condition really
 116   easily.  Also, things appear to work a bit better in back-to-back
 117   configurations if the Rx ring is 8 times the size of the Tx ring
 118*/
 119#define TX_RING_SIZE	64
 120#define RX_RING_SIZE	512
 121#define TX_TOTAL_SIZE	TX_RING_SIZE*sizeof(struct hamachi_desc)
 122#define RX_TOTAL_SIZE	RX_RING_SIZE*sizeof(struct hamachi_desc)
 123
 124/*
 125 * Enable netdev_ioctl.  Added interrupt coalescing parameter adjustment.
 126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
 127 */
 128
 129/* play with 64-bit addrlen; seems to be a teensy bit slower  --pw */
 130/* #define ADDRLEN 64 */
 131
 132/*
 133 * RX_CHECKSUM turns on card-generated receive checksum generation for
 134 *   TCP and UDP packets.  Otherwise the upper layers do the calculation.
 135 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
 136 */
 137#define RX_CHECKSUM
 138
 139/* Operational parameters that usually are not changed. */
 140/* Time in jiffies before concluding the transmitter is hung. */
 141#define TX_TIMEOUT  (5*HZ)
 142
 143#include <linux/capability.h>
 144#include <linux/module.h>
 145#include <linux/kernel.h>
 146#include <linux/string.h>
 147#include <linux/timer.h>
 148#include <linux/time.h>
 149#include <linux/errno.h>
 150#include <linux/ioport.h>
 151#include <linux/interrupt.h>
 152#include <linux/pci.h>
 153#include <linux/init.h>
 154#include <linux/ethtool.h>
 155#include <linux/mii.h>
 156#include <linux/netdevice.h>
 157#include <linux/etherdevice.h>
 158#include <linux/skbuff.h>
 159#include <linux/ip.h>
 160#include <linux/delay.h>
 161#include <linux/bitops.h>
 162
 163#include <linux/uaccess.h>
 164#include <asm/processor.h>	/* Processor type for cache alignment. */
 165#include <asm/io.h>
 166#include <asm/unaligned.h>
 167#include <asm/cache.h>
 168
 169static const char version[] =
 170KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE "  Written by Donald Becker\n"
 171"   Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
 172"   Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
 173
 174
 175/* IP_MF appears to be only defined in <netinet/ip.h>, however,
 176   we need it for hardware checksumming support.  FYI... some of
 177   the definitions in <netinet/ip.h> conflict/duplicate those in
 178   other linux headers causing many compiler warnings.
 179*/
 180#ifndef IP_MF
 181  #define IP_MF 0x2000   /* IP more frags from <netinet/ip.h> */
 182#endif
 183
 184/* Define IP_OFFSET to be IPOPT_OFFSET */
 185#ifndef IP_OFFSET
 186  #ifdef IPOPT_OFFSET
 187    #define IP_OFFSET IPOPT_OFFSET
 188  #else
 189    #define IP_OFFSET 2
 190  #endif
 191#endif
 192
 193#define RUN_AT(x) (jiffies + (x))
 194
 195#ifndef ADDRLEN
 196#define ADDRLEN 32
 197#endif
 198
 199/* Condensed bus+endian portability operations. */
 200#if ADDRLEN == 64
 201#define cpu_to_leXX(addr)	cpu_to_le64(addr)
 202#define leXX_to_cpu(addr)	le64_to_cpu(addr)
 203#else
 204#define cpu_to_leXX(addr)	cpu_to_le32(addr)
 205#define leXX_to_cpu(addr)	le32_to_cpu(addr)
 206#endif
 207
 208
 209/*
 210				Theory of Operation
 211
 212I. Board Compatibility
 213
 214This device driver is designed for the Packet Engines "Hamachi"
 215Gigabit Ethernet chip.  The only PCA currently supported is the GNIC-II 64-bit
 21666Mhz PCI card.
 217
 218II. Board-specific settings
 219
 220No jumpers exist on the board.  The chip supports software correction of
 221various motherboard wiring errors, however this driver does not support
 222that feature.
 223
 224III. Driver operation
 225
 226IIIa. Ring buffers
 227
 228The Hamachi uses a typical descriptor based bus-master architecture.
 229The descriptor list is similar to that used by the Digital Tulip.
 230This driver uses two statically allocated fixed-size descriptor lists
 231formed into rings by a branch from the final descriptor to the beginning of
 232the list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.
 233
 234This driver uses a zero-copy receive and transmit scheme similar my other
 235network drivers.
 236The driver allocates full frame size skbuffs for the Rx ring buffers at
 237open() time and passes the skb->data field to the Hamachi as receive data
 238buffers.  When an incoming frame is less than RX_COPYBREAK bytes long,
 239a fresh skbuff is allocated and the frame is copied to the new skbuff.
 240When the incoming frame is larger, the skbuff is passed directly up the
 241protocol stack and replaced by a newly allocated skbuff.
 242
 243The RX_COPYBREAK value is chosen to trade-off the memory wasted by
 244using a full-sized skbuff for small frames vs. the copying costs of larger
 245frames.  Gigabit cards are typically used on generously configured machines
 246and the underfilled buffers have negligible impact compared to the benefit of
 247a single allocation size, so the default value of zero results in never
 248copying packets.
 249
 250IIIb/c. Transmit/Receive Structure
 251
 252The Rx and Tx descriptor structure are straight-forward, with no historical
 253baggage that must be explained.  Unlike the awkward DBDMA structure, there
 254are no unused fields or option bits that had only one allowable setting.
 255
 256Two details should be noted about the descriptors: The chip supports both 32
 257bit and 64 bit address structures, and the length field is overwritten on
 258the receive descriptors.  The descriptor length is set in the control word
 259for each channel. The development driver uses 32 bit addresses only, however
 26064 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
 261
 262IIId. Synchronization
 263
 264This driver is very similar to my other network drivers.
 265The driver runs as two independent, single-threaded flows of control.  One
 266is the send-packet routine, which enforces single-threaded use by the
 267dev->tbusy flag.  The other thread is the interrupt handler, which is single
 268threaded by the hardware and other software.
 269
 270The send packet thread has partial control over the Tx ring and 'dev->tbusy'
 271flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the next
 272queue slot is empty, it clears the tbusy flag when finished otherwise it sets
 273the 'hmp->tx_full' flag.
 274
 275The interrupt handler has exclusive control over the Rx ring and records stats
 276from the Tx ring.  After reaping the stats, it marks the Tx queue entry as
 277empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
 278clears both the tx_full and tbusy flags.
 279
 280IV. Notes
 281
 282Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
 283
 284IVb. References
 285
 286Hamachi Engineering Design Specification, 5/15/97
 287(Note: This version was marked "Confidential".)
 288
 289IVc. Errata
 290
 291None noted.
 292
 293V.  Recent Changes
 294
 29501/15/1999 EPK  Enlargement of the TX and RX ring sizes.  This appears
 296    to help avoid some stall conditions -- this needs further research.
 297
 29801/15/1999 EPK  Creation of the hamachi_tx function.  This function cleans
 299    the Tx ring and is called from hamachi_start_xmit (this used to be
 300    called from hamachi_interrupt but it tends to delay execution of the
 301    interrupt handler and thus reduce bandwidth by reducing the latency
 302    between hamachi_rx()'s).  Notably, some modification has been made so
 303    that the cleaning loop checks only to make sure that the DescOwn bit
 304    isn't set in the status flag since the card is not required
 305    to set the entire flag to zero after processing.
 306
 30701/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
 308    checked before attempting to add a buffer to the ring.  If the ring is full
 309    an attempt is made to free any dirty buffers and thus find space for
 310    the new buffer or the function returns non-zero which should case the
 311    scheduler to reschedule the buffer later.
 312
 31301/15/1999 EPK Some adjustments were made to the chip initialization.
 314    End-to-end flow control should now be fully active and the interrupt
 315    algorithm vars have been changed.  These could probably use further tuning.
 316
 31701/15/1999 EPK Added the max_{rx,tx}_latency options.  These are used to
 318    set the rx and tx latencies for the Hamachi interrupts. If you're having
 319    problems with network stalls, try setting these to higher values.
 320    Valid values are 0x00 through 0xff.
 321
 32201/15/1999 EPK In general, the overall bandwidth has increased and
 323    latencies are better (sometimes by a factor of 2).  Stalls are rare at
 324    this point, however there still appears to be a bug somewhere between the
 325    hardware and driver.  TCP checksum errors under load also appear to be
 326    eliminated at this point.
 327
 32801/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
 329    Rx and Tx rings.  This appears to have been affecting whether a particular
 330    peer-to-peer connection would hang under high load.  I believe the Rx
 331    rings was typically getting set correctly, but the Tx ring wasn't getting
 332    the DescEndRing bit set during initialization. ??? Does this mean the
 333    hamachi card is using the DescEndRing in processing even if a particular
 334    slot isn't in use -- hypothetically, the card might be searching the
 335    entire Tx ring for slots with the DescOwn bit set and then processing
 336    them.  If the DescEndRing bit isn't set, then it might just wander off
 337    through memory until it hits a chunk of data with that bit set
 338    and then looping back.
 339
 34002/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
 341    problem (TxCmd and RxCmd need only to be set when idle or stopped.
 342
 34302/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
 344    (Michel Mueller pointed out the ``permanently busy'' potential
 345    problem here).
 346
 34702/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
 348
 34902/23/1999 EPK Verified that the interrupt status field bits for Tx were
 350    incorrectly defined and corrected (as per Michel Mueller).
 351
 35202/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
 353    were available before resetting the tbusy and tx_full flags
 354    (as per Michel Mueller).
 355
 35603/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
 357
 35812/31/1999 KDU Cleaned up assorted things and added Don's code to force
 35932 bit.
 360
 36102/20/2000 KDU Some of the control was just plain odd.  Cleaned up the
 362hamachi_start_xmit() and hamachi_interrupt() code.  There is still some
 363re-structuring I would like to do.
 364
 36503/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
 366parameters on a dual P3-450 setup yielded the new default interrupt
 367mitigation parameters.  Tx should interrupt VERY infrequently due to
 368Eric's scheme.  Rx should be more often...
 369
 37003/13/2000 KDU Added a patch to make the Rx Checksum code interact
 371nicely with non-linux machines.
 372
 37303/13/2000 KDU Experimented with some of the configuration values:
 374
 375	-It seems that enabling PCI performance commands for descriptors
 376	(changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
 377	performance impact for any of my tests. (ttcp, netpipe, netperf)  I will
 378	leave them that way until I hear further feedback.
 379
 380	-Increasing the PCI_LATENCY_TIMER to 130
 381	(2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
 382	degrade performance.  Leaving default at 64 pending further information.
 383
 38403/14/2000 KDU Further tuning:
 385
 386	-adjusted boguscnt in hamachi_rx() to depend on interrupt
 387	mitigation parameters chosen.
 388
 389	-Selected a set of interrupt parameters based on some extensive testing.
 390	These may change with more testing.
 391
 392TO DO:
 393
 394-Consider borrowing from the acenic driver code to check PCI_COMMAND for
 395PCI_COMMAND_INVALIDATE.  Set maximum burst size to cache line size in
 396that case.
 397
 398-fix the reset procedure.  It doesn't quite work.
 399*/
 400
 401/* A few values that may be tweaked. */
 402/* Size of each temporary Rx buffer, calculated as:
 403 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
 404 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum
 405 */
 406#define PKT_BUF_SZ		1536
 407
 408/* For now, this is going to be set to the maximum size of an ethernet
 409 * packet.  Eventually, we may want to make it a variable that is
 410 * related to the MTU
 411 */
 412#define MAX_FRAME_SIZE  1518
 413
 414/* The rest of these values should never change. */
 415
 416static void hamachi_timer(struct timer_list *t);
 417
 418enum capability_flags {CanHaveMII=1, };
 419static const struct chip_info {
 420	u16	vendor_id, device_id, device_id_mask, pad;
 421	const char *name;
 422	void (*media_timer)(struct timer_list *t);
 423	int flags;
 424} chip_tbl[] = {
 425	{0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
 426	{0,},
 427};
 428
 429/* Offsets to the Hamachi registers.  Various sizes. */
 430enum hamachi_offsets {
 431	TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
 432	RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
 433	PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
 434	LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
 435	TxChecksum=0x074, RxChecksum=0x076,
 436	TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
 437	InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
 438	EventStatus=0x08C,
 439	MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
 440	/* See enum MII_offsets below. */
 441	MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
 442	AddrMode=0x0D0, StationAddr=0x0D2,
 443	/* Gigabit AutoNegotiation. */
 444	ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
 445	ANLinkPartnerAbility=0x0EA,
 446	EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
 447	FIFOcfg=0x0F8,
 448};
 449
 450/* Offsets to the MII-mode registers. */
 451enum MII_offsets {
 452	MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
 453	MII_Status=0xAE,
 454};
 455
 456/* Bits in the interrupt status/mask registers. */
 457enum intr_status_bits {
 458	IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
 459	IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
 460	LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
 461
 462/* The Hamachi Rx and Tx buffer descriptors. */
 463struct hamachi_desc {
 464	__le32 status_n_length;
 465#if ADDRLEN == 64
 466	u32 pad;
 467	__le64 addr;
 468#else
 469	__le32 addr;
 470#endif
 471};
 472
 473/* Bits in hamachi_desc.status_n_length */
 474enum desc_status_bits {
 475	DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
 476	DescIntr=0x10000000,
 477};
 478
 479#define PRIV_ALIGN	15  			/* Required alignment mask */
 480#define MII_CNT		4
 481struct hamachi_private {
 482	/* Descriptor rings first for alignment.  Tx requires a second descriptor
 483	   for status. */
 484	struct hamachi_desc *rx_ring;
 485	struct hamachi_desc *tx_ring;
 486	struct sk_buff* rx_skbuff[RX_RING_SIZE];
 487	struct sk_buff* tx_skbuff[TX_RING_SIZE];
 488	dma_addr_t tx_ring_dma;
 489	dma_addr_t rx_ring_dma;
 490	struct timer_list timer;		/* Media selection timer. */
 491	/* Frequently used and paired value: keep adjacent for cache effect. */
 492	spinlock_t lock;
 493	int chip_id;
 494	unsigned int cur_rx, dirty_rx;		/* Producer/consumer ring indices */
 495	unsigned int cur_tx, dirty_tx;
 496	unsigned int rx_buf_sz;			/* Based on MTU+slack. */
 497	unsigned int tx_full:1;			/* The Tx queue is full. */
 498	unsigned int duplex_lock:1;
 499	unsigned int default_port:4;		/* Last dev->if_port value. */
 500	/* MII transceiver section. */
 501	int mii_cnt;								/* MII device addresses. */
 502	struct mii_if_info mii_if;		/* MII lib hooks/info */
 503	unsigned char phys[MII_CNT];		/* MII device addresses, only first one used. */
 504	u32 rx_int_var, tx_int_var;	/* interrupt control variables */
 505	u32 option;							/* Hold on to a copy of the options */
 506	struct pci_dev *pci_dev;
 507	void __iomem *base;
 508};
 509
 510MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
 511MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
 512MODULE_LICENSE("GPL");
 513
 514module_param(max_interrupt_work, int, 0);
 515module_param(mtu, int, 0);
 516module_param(debug, int, 0);
 517module_param(min_rx_pkt, int, 0);
 518module_param(max_rx_gap, int, 0);
 519module_param(max_rx_latency, int, 0);
 520module_param(min_tx_pkt, int, 0);
 521module_param(max_tx_gap, int, 0);
 522module_param(max_tx_latency, int, 0);
 523module_param(rx_copybreak, int, 0);
 524module_param_array(rx_params, int, NULL, 0);
 525module_param_array(tx_params, int, NULL, 0);
 526module_param_array(options, int, NULL, 0);
 527module_param_array(full_duplex, int, NULL, 0);
 528module_param(force32, int, 0);
 529MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
 530MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
 531MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
 532MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
 533MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
 534MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
 535MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
 536MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
 537MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
 538MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
 539MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
 540MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
 541MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
 542MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
 543MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
 544
 545static int read_eeprom(void __iomem *ioaddr, int location);
 546static int mdio_read(struct net_device *dev, int phy_id, int location);
 547static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
 548static int hamachi_open(struct net_device *dev);
 549static int hamachi_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 550static int hamachi_siocdevprivate(struct net_device *dev, struct ifreq *rq,
 551				  void __user *data, int cmd);
 552static void hamachi_timer(struct timer_list *t);
 553static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue);
 554static void hamachi_init_ring(struct net_device *dev);
 555static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
 556				      struct net_device *dev);
 557static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
 558static int hamachi_rx(struct net_device *dev);
 559static inline int hamachi_tx(struct net_device *dev);
 560static void hamachi_error(struct net_device *dev, int intr_status);
 561static int hamachi_close(struct net_device *dev);
 562static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
 563static void set_rx_mode(struct net_device *dev);
 564static const struct ethtool_ops ethtool_ops;
 565static const struct ethtool_ops ethtool_ops_no_mii;
 566
 567static const struct net_device_ops hamachi_netdev_ops = {
 568	.ndo_open		= hamachi_open,
 569	.ndo_stop		= hamachi_close,
 570	.ndo_start_xmit		= hamachi_start_xmit,
 571	.ndo_get_stats		= hamachi_get_stats,
 572	.ndo_set_rx_mode	= set_rx_mode,
 573	.ndo_validate_addr	= eth_validate_addr,
 574	.ndo_set_mac_address 	= eth_mac_addr,
 575	.ndo_tx_timeout		= hamachi_tx_timeout,
 576	.ndo_eth_ioctl		= hamachi_ioctl,
 577	.ndo_siocdevprivate	= hamachi_siocdevprivate,
 578};
 579
 580
 581static int hamachi_init_one(struct pci_dev *pdev,
 582			    const struct pci_device_id *ent)
 583{
 584	struct hamachi_private *hmp;
 585	int option, i, rx_int_var, tx_int_var, boguscnt;
 586	int chip_id = ent->driver_data;
 587	int irq;
 588	void __iomem *ioaddr;
 589	unsigned long base;
 590	static int card_idx;
 591	struct net_device *dev;
 592	void *ring_space;
 593	dma_addr_t ring_dma;
 594	int ret = -ENOMEM;
 595	u8 addr[ETH_ALEN];
 596
 597/* when built into the kernel, we only print version if device is found */
 598#ifndef MODULE
 599	static int printed_version;
 600	if (!printed_version++)
 601		printk(version);
 602#endif
 603
 604	if (pci_enable_device(pdev)) {
 605		ret = -EIO;
 606		goto err_out;
 607	}
 608
 609	base = pci_resource_start(pdev, 0);
 610#ifdef __alpha__				/* Really "64 bit addrs" */
 611	base |= (pci_resource_start(pdev, 1) << 32);
 612#endif
 613
 614	pci_set_master(pdev);
 615
 616	i = pci_request_regions(pdev, DRV_NAME);
 617	if (i)
 618		return i;
 619
 620	irq = pdev->irq;
 621	ioaddr = ioremap(base, 0x400);
 622	if (!ioaddr)
 623		goto err_out_release;
 624
 625	dev = alloc_etherdev(sizeof(struct hamachi_private));
 626	if (!dev)
 627		goto err_out_iounmap;
 628
 629	SET_NETDEV_DEV(dev, &pdev->dev);
 630
 631	for (i = 0; i < 6; i++)
 632		addr[i] = read_eeprom(ioaddr, 4 + i);
 633	eth_hw_addr_set(dev, addr);
 634
 635#if ! defined(final_version)
 636	if (hamachi_debug > 4)
 637		for (i = 0; i < 0x10; i++)
 638			printk("%2.2x%s",
 639				   read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
 640#endif
 641
 642	hmp = netdev_priv(dev);
 643	spin_lock_init(&hmp->lock);
 644
 645	hmp->mii_if.dev = dev;
 646	hmp->mii_if.mdio_read = mdio_read;
 647	hmp->mii_if.mdio_write = mdio_write;
 648	hmp->mii_if.phy_id_mask = 0x1f;
 649	hmp->mii_if.reg_num_mask = 0x1f;
 650
 651	ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma,
 652					GFP_KERNEL);
 653	if (!ring_space)
 654		goto err_out_cleardev;
 655	hmp->tx_ring = ring_space;
 656	hmp->tx_ring_dma = ring_dma;
 657
 658	ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma,
 659					GFP_KERNEL);
 660	if (!ring_space)
 661		goto err_out_unmap_tx;
 662	hmp->rx_ring = ring_space;
 663	hmp->rx_ring_dma = ring_dma;
 664
 665	/* Check for options being passed in */
 666	option = card_idx < MAX_UNITS ? options[card_idx] : 0;
 667	if (dev->mem_start)
 668		option = dev->mem_start;
 669
 670	/* If the bus size is misidentified, do the following. */
 671	force32 = force32 ? force32 :
 672		((option  >= 0) ? ((option & 0x00000070) >> 4) : 0 );
 673	if (force32)
 674		writeb(force32, ioaddr + VirtualJumpers);
 675
 676	/* Hmmm, do we really need to reset the chip???. */
 677	writeb(0x01, ioaddr + ChipReset);
 678
 679	/* After a reset, the clock speed measurement of the PCI bus will not
 680	 * be valid for a moment.  Wait for a little while until it is.  If
 681	 * it takes more than 10ms, forget it.
 682	 */
 683	udelay(10);
 684	i = readb(ioaddr + PCIClkMeas);
 685	for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
 686		udelay(10);
 687		i = readb(ioaddr + PCIClkMeas);
 688	}
 689
 690	hmp->base = ioaddr;
 691	pci_set_drvdata(pdev, dev);
 692
 693	hmp->chip_id = chip_id;
 694	hmp->pci_dev = pdev;
 695
 696	/* The lower four bits are the media type. */
 697	if (option > 0) {
 698		hmp->option = option;
 699		if (option & 0x200)
 700			hmp->mii_if.full_duplex = 1;
 701		else if (option & 0x080)
 702			hmp->mii_if.full_duplex = 0;
 703		hmp->default_port = option & 15;
 704		if (hmp->default_port)
 705			hmp->mii_if.force_media = 1;
 706	}
 707	if (card_idx < MAX_UNITS  &&  full_duplex[card_idx] > 0)
 708		hmp->mii_if.full_duplex = 1;
 709
 710	/* lock the duplex mode if someone specified a value */
 711	if (hmp->mii_if.full_duplex || (option & 0x080))
 712		hmp->duplex_lock = 1;
 713
 714	/* Set interrupt tuning parameters */
 715	max_rx_latency = max_rx_latency & 0x00ff;
 716	max_rx_gap = max_rx_gap & 0x00ff;
 717	min_rx_pkt = min_rx_pkt & 0x00ff;
 718	max_tx_latency = max_tx_latency & 0x00ff;
 719	max_tx_gap = max_tx_gap & 0x00ff;
 720	min_tx_pkt = min_tx_pkt & 0x00ff;
 721
 722	rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
 723	tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
 724	hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
 725		(min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
 726	hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
 727		(min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
 728
 729
 730	/* The Hamachi-specific entries in the device structure. */
 731	dev->netdev_ops = &hamachi_netdev_ops;
 732	dev->ethtool_ops = (chip_tbl[hmp->chip_id].flags & CanHaveMII) ?
 733		&ethtool_ops : &ethtool_ops_no_mii;
 734	dev->watchdog_timeo = TX_TIMEOUT;
 735	if (mtu)
 736		dev->mtu = mtu;
 737
 738	i = register_netdev(dev);
 739	if (i) {
 740		ret = i;
 741		goto err_out_unmap_rx;
 742	}
 743
 744	printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
 745		   dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
 746		   ioaddr, dev->dev_addr, irq);
 747	i = readb(ioaddr + PCIClkMeas);
 748	printk(KERN_INFO "%s:  %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
 749		   "%2.2x, LPA %4.4x.\n",
 750		   dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
 751		   i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
 752		   readw(ioaddr + ANLinkPartnerAbility));
 753
 754	if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
 755		int phy, phy_idx = 0;
 756		for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
 757			int mii_status = mdio_read(dev, phy, MII_BMSR);
 758			if (mii_status != 0xffff  &&
 759				mii_status != 0x0000) {
 760				hmp->phys[phy_idx++] = phy;
 761				hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
 762				printk(KERN_INFO "%s: MII PHY found at address %d, status "
 763					   "0x%4.4x advertising %4.4x.\n",
 764					   dev->name, phy, mii_status, hmp->mii_if.advertising);
 765			}
 766		}
 767		hmp->mii_cnt = phy_idx;
 768		if (hmp->mii_cnt > 0)
 769			hmp->mii_if.phy_id = hmp->phys[0];
 770		else
 771			memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
 772	}
 773	/* Configure gigabit autonegotiation. */
 774	writew(0x0400, ioaddr + ANXchngCtrl);	/* Enable legacy links. */
 775	writew(0x08e0, ioaddr + ANAdvertise);	/* Set our advertise word. */
 776	writew(0x1000, ioaddr + ANCtrl);			/* Enable negotiation */
 777
 778	card_idx++;
 779	return 0;
 780
 781err_out_unmap_rx:
 782	dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
 783			  hmp->rx_ring_dma);
 784err_out_unmap_tx:
 785	dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
 786			  hmp->tx_ring_dma);
 787err_out_cleardev:
 788	free_netdev (dev);
 789err_out_iounmap:
 790	iounmap(ioaddr);
 791err_out_release:
 792	pci_release_regions(pdev);
 793err_out:
 794	return ret;
 795}
 796
 797static int read_eeprom(void __iomem *ioaddr, int location)
 798{
 799	int bogus_cnt = 1000;
 800
 801	/* We should check busy first - per docs -KDU */
 802	while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
 803	writew(location, ioaddr + EEAddr);
 804	writeb(0x02, ioaddr + EECmdStatus);
 805	bogus_cnt = 1000;
 806	while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
 807	if (hamachi_debug > 5)
 808		printk("   EEPROM status is %2.2x after %d ticks.\n",
 809			   (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
 810	return readb(ioaddr + EEData);
 811}
 812
 813/* MII Managemen Data I/O accesses.
 814   These routines assume the MDIO controller is idle, and do not exit until
 815   the command is finished. */
 816
 817static int mdio_read(struct net_device *dev, int phy_id, int location)
 818{
 819	struct hamachi_private *hmp = netdev_priv(dev);
 820	void __iomem *ioaddr = hmp->base;
 821	int i;
 822
 823	/* We should check busy first - per docs -KDU */
 824	for (i = 10000; i >= 0; i--)
 825		if ((readw(ioaddr + MII_Status) & 1) == 0)
 826			break;
 827	writew((phy_id<<8) + location, ioaddr + MII_Addr);
 828	writew(0x0001, ioaddr + MII_Cmd);
 829	for (i = 10000; i >= 0; i--)
 830		if ((readw(ioaddr + MII_Status) & 1) == 0)
 831			break;
 832	return readw(ioaddr + MII_Rd_Data);
 833}
 834
 835static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
 836{
 837	struct hamachi_private *hmp = netdev_priv(dev);
 838	void __iomem *ioaddr = hmp->base;
 839	int i;
 840
 841	/* We should check busy first - per docs -KDU */
 842	for (i = 10000; i >= 0; i--)
 843		if ((readw(ioaddr + MII_Status) & 1) == 0)
 844			break;
 845	writew((phy_id<<8) + location, ioaddr + MII_Addr);
 846	writew(value, ioaddr + MII_Wr_Data);
 847
 848	/* Wait for the command to finish. */
 849	for (i = 10000; i >= 0; i--)
 850		if ((readw(ioaddr + MII_Status) & 1) == 0)
 851			break;
 852}
 853
 854
 855static int hamachi_open(struct net_device *dev)
 856{
 857	struct hamachi_private *hmp = netdev_priv(dev);
 858	void __iomem *ioaddr = hmp->base;
 859	int i;
 860	u32 rx_int_var, tx_int_var;
 861	u16 fifo_info;
 862
 863	i = request_irq(hmp->pci_dev->irq, hamachi_interrupt, IRQF_SHARED,
 864			dev->name, dev);
 865	if (i)
 866		return i;
 867
 868	hamachi_init_ring(dev);
 869
 870#if ADDRLEN == 64
 871	/* writellll anyone ? */
 872	writel(hmp->rx_ring_dma, ioaddr + RxPtr);
 873	writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
 874	writel(hmp->tx_ring_dma, ioaddr + TxPtr);
 875	writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
 876#else
 877	writel(hmp->rx_ring_dma, ioaddr + RxPtr);
 878	writel(hmp->tx_ring_dma, ioaddr + TxPtr);
 879#endif
 880
 881	/* TODO:  It would make sense to organize this as words since the card
 882	 * documentation does. -KDU
 883	 */
 884	for (i = 0; i < 6; i++)
 885		writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
 886
 887	/* Initialize other registers: with so many this eventually this will
 888	   converted to an offset/value list. */
 889
 890	/* Configure the FIFO */
 891	fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
 892	switch (fifo_info){
 893		case 0 :
 894			/* No FIFO */
 895			writew(0x0000, ioaddr + FIFOcfg);
 896			break;
 897		case 1 :
 898			/* Configure the FIFO for 512K external, 16K used for Tx. */
 899			writew(0x0028, ioaddr + FIFOcfg);
 900			break;
 901		case 2 :
 902			/* Configure the FIFO for 1024 external, 32K used for Tx. */
 903			writew(0x004C, ioaddr + FIFOcfg);
 904			break;
 905		case 3 :
 906			/* Configure the FIFO for 2048 external, 32K used for Tx. */
 907			writew(0x006C, ioaddr + FIFOcfg);
 908			break;
 909		default :
 910			printk(KERN_WARNING "%s:  Unsupported external memory config!\n",
 911				dev->name);
 912			/* Default to no FIFO */
 913			writew(0x0000, ioaddr + FIFOcfg);
 914			break;
 915	}
 916
 917	if (dev->if_port == 0)
 918		dev->if_port = hmp->default_port;
 919
 920
 921	/* Setting the Rx mode will start the Rx process. */
 922	/* If someone didn't choose a duplex, default to full-duplex */
 923	if (hmp->duplex_lock != 1)
 924		hmp->mii_if.full_duplex = 1;
 925
 926	/* always 1, takes no more time to do it */
 927	writew(0x0001, ioaddr + RxChecksum);
 928	writew(0x0000, ioaddr + TxChecksum);
 929	writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
 930	writew(0x215F, ioaddr + MACCnfg);
 931	writew(0x000C, ioaddr + FrameGap0);
 932	/* WHAT?!?!?  Why isn't this documented somewhere? -KDU */
 933	writew(0x1018, ioaddr + FrameGap1);
 934	/* Why do we enable receives/transmits here? -KDU */
 935	writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
 936	/* Enable automatic generation of flow control frames, period 0xffff. */
 937	writel(0x0030FFFF, ioaddr + FlowCtrl);
 938	writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); 	/* dev->mtu+14 ??? */
 939
 940	/* Enable legacy links. */
 941	writew(0x0400, ioaddr + ANXchngCtrl);	/* Enable legacy links. */
 942	/* Initial Link LED to blinking red. */
 943	writeb(0x03, ioaddr + LEDCtrl);
 944
 945	/* Configure interrupt mitigation.  This has a great effect on
 946	   performance, so systems tuning should start here!. */
 947
 948	rx_int_var = hmp->rx_int_var;
 949	tx_int_var = hmp->tx_int_var;
 950
 951	if (hamachi_debug > 1) {
 952		printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
 953			tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
 954			(tx_int_var & 0x00ff0000) >> 16);
 955		printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
 956			rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
 957			(rx_int_var & 0x00ff0000) >> 16);
 958		printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
 959	}
 960
 961	writel(tx_int_var, ioaddr + TxIntrCtrl);
 962	writel(rx_int_var, ioaddr + RxIntrCtrl);
 963
 964	set_rx_mode(dev);
 965
 966	netif_start_queue(dev);
 967
 968	/* Enable interrupts by setting the interrupt mask. */
 969	writel(0x80878787, ioaddr + InterruptEnable);
 970	writew(0x0000, ioaddr + EventStatus);	/* Clear non-interrupting events */
 971
 972	/* Configure and start the DMA channels. */
 973	/* Burst sizes are in the low three bits: size = 4<<(val&7) */
 974#if ADDRLEN == 64
 975	writew(0x005D, ioaddr + RxDMACtrl); 		/* 128 dword bursts */
 976	writew(0x005D, ioaddr + TxDMACtrl);
 977#else
 978	writew(0x001D, ioaddr + RxDMACtrl);
 979	writew(0x001D, ioaddr + TxDMACtrl);
 980#endif
 981	writew(0x0001, ioaddr + RxCmd);
 982
 983	if (hamachi_debug > 2) {
 984		printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
 985			   dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
 986	}
 987	/* Set the timer to check for link beat. */
 988	timer_setup(&hmp->timer, hamachi_timer, 0);
 989	hmp->timer.expires = RUN_AT((24*HZ)/10);			/* 2.4 sec. */
 990	add_timer(&hmp->timer);
 991
 992	return 0;
 993}
 994
 995static inline int hamachi_tx(struct net_device *dev)
 996{
 997	struct hamachi_private *hmp = netdev_priv(dev);
 998
 999	/* Update the dirty pointer until we find an entry that is
1000		still owned by the card */
1001	for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1002		int entry = hmp->dirty_tx % TX_RING_SIZE;
1003		struct sk_buff *skb;
1004
1005		if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1006			break;
1007		/* Free the original skb. */
1008		skb = hmp->tx_skbuff[entry];
1009		if (skb) {
1010			dma_unmap_single(&hmp->pci_dev->dev,
1011					 leXX_to_cpu(hmp->tx_ring[entry].addr),
1012					 skb->len, DMA_TO_DEVICE);
1013			dev_kfree_skb(skb);
1014			hmp->tx_skbuff[entry] = NULL;
1015		}
1016		hmp->tx_ring[entry].status_n_length = 0;
1017		if (entry >= TX_RING_SIZE-1)
1018			hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1019				cpu_to_le32(DescEndRing);
1020		dev->stats.tx_packets++;
1021	}
1022
1023	return 0;
1024}
1025
1026static void hamachi_timer(struct timer_list *t)
1027{
1028	struct hamachi_private *hmp = from_timer(hmp, t, timer);
1029	struct net_device *dev = hmp->mii_if.dev;
1030	void __iomem *ioaddr = hmp->base;
1031	int next_tick = 10*HZ;
1032
1033	if (hamachi_debug > 2) {
1034		printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1035			   "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1036			   readw(ioaddr + ANLinkPartnerAbility));
1037		printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1038		       "%4.4x %4.4x %4.4x.\n", dev->name,
1039		       readw(ioaddr + 0x0e0),
1040		       readw(ioaddr + 0x0e2),
1041		       readw(ioaddr + 0x0e4),
1042		       readw(ioaddr + 0x0e6),
1043		       readw(ioaddr + 0x0e8),
1044		       readw(ioaddr + 0x0eA));
1045	}
1046	/* We could do something here... nah. */
1047	hmp->timer.expires = RUN_AT(next_tick);
1048	add_timer(&hmp->timer);
1049}
1050
1051static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue)
1052{
1053	int i;
1054	struct hamachi_private *hmp = netdev_priv(dev);
1055	void __iomem *ioaddr = hmp->base;
1056
1057	printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1058		   " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1059
1060	{
1061		printk(KERN_DEBUG "  Rx ring %p: ", hmp->rx_ring);
1062		for (i = 0; i < RX_RING_SIZE; i++)
1063			printk(KERN_CONT " %8.8x",
1064			       le32_to_cpu(hmp->rx_ring[i].status_n_length));
1065		printk(KERN_CONT "\n");
1066		printk(KERN_DEBUG"  Tx ring %p: ", hmp->tx_ring);
1067		for (i = 0; i < TX_RING_SIZE; i++)
1068			printk(KERN_CONT " %4.4x",
1069			       le32_to_cpu(hmp->tx_ring[i].status_n_length));
1070		printk(KERN_CONT "\n");
1071	}
1072
1073	/* Reinit the hardware and make sure the Rx and Tx processes
1074		are up and running.
1075	 */
1076	dev->if_port = 0;
1077	/* The right way to do Reset. -KDU
1078	 *		-Clear OWN bit in all Rx/Tx descriptors
1079	 *		-Wait 50 uS for channels to go idle
1080	 *		-Turn off MAC receiver
1081	 *		-Issue Reset
1082	 */
1083
1084	for (i = 0; i < RX_RING_SIZE; i++)
1085		hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1086
1087	/* Presume that all packets in the Tx queue are gone if we have to
1088	 * re-init the hardware.
1089	 */
1090	for (i = 0; i < TX_RING_SIZE; i++){
1091		struct sk_buff *skb;
1092
1093		if (i >= TX_RING_SIZE - 1)
1094			hmp->tx_ring[i].status_n_length =
1095				cpu_to_le32(DescEndRing) |
1096				(hmp->tx_ring[i].status_n_length &
1097				 cpu_to_le32(0x0000ffff));
1098		else
1099			hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1100		skb = hmp->tx_skbuff[i];
1101		if (skb){
1102			dma_unmap_single(&hmp->pci_dev->dev,
1103					 leXX_to_cpu(hmp->tx_ring[i].addr),
1104					 skb->len, DMA_TO_DEVICE);
1105			dev_kfree_skb(skb);
1106			hmp->tx_skbuff[i] = NULL;
1107		}
1108	}
1109
1110	udelay(60); /* Sleep 60 us just for safety sake */
1111	writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1112
1113	writeb(0x01, ioaddr + ChipReset);  /* Reinit the hardware */
1114
1115	hmp->tx_full = 0;
1116	hmp->cur_rx = hmp->cur_tx = 0;
1117	hmp->dirty_rx = hmp->dirty_tx = 0;
1118	/* Rx packets are also presumed lost; however, we need to make sure a
1119	 * ring of buffers is in tact. -KDU
1120	 */
1121	for (i = 0; i < RX_RING_SIZE; i++){
1122		struct sk_buff *skb = hmp->rx_skbuff[i];
1123
1124		if (skb){
1125			dma_unmap_single(&hmp->pci_dev->dev,
1126					 leXX_to_cpu(hmp->rx_ring[i].addr),
1127					 hmp->rx_buf_sz, DMA_FROM_DEVICE);
1128			dev_kfree_skb(skb);
1129			hmp->rx_skbuff[i] = NULL;
1130		}
1131	}
1132	/* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1133	for (i = 0; i < RX_RING_SIZE; i++) {
1134		struct sk_buff *skb;
1135
1136		skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz);
1137		hmp->rx_skbuff[i] = skb;
1138		if (skb == NULL)
1139			break;
1140
1141		hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1142								  skb->data,
1143								  hmp->rx_buf_sz,
1144								  DMA_FROM_DEVICE));
1145		hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1146			DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1147	}
1148	hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1149	/* Mark the last entry as wrapping the ring. */
1150	hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1151
1152	/* Trigger an immediate transmit demand. */
1153	netif_trans_update(dev); /* prevent tx timeout */
1154	dev->stats.tx_errors++;
1155
1156	/* Restart the chip's Tx/Rx processes . */
1157	writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1158	writew(0x0001, ioaddr + TxCmd); /* START Tx */
1159	writew(0x0001, ioaddr + RxCmd); /* START Rx */
1160
1161	netif_wake_queue(dev);
1162}
1163
1164
1165/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1166static void hamachi_init_ring(struct net_device *dev)
1167{
1168	struct hamachi_private *hmp = netdev_priv(dev);
1169	int i;
1170
1171	hmp->tx_full = 0;
1172	hmp->cur_rx = hmp->cur_tx = 0;
1173	hmp->dirty_rx = hmp->dirty_tx = 0;
1174
1175	/* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1176	 * card needs room to do 8 byte alignment, +2 so we can reserve
1177	 * the first 2 bytes, and +16 gets room for the status word from the
1178	 * card.  -KDU
1179	 */
1180	hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1181		(((dev->mtu+26+7) & ~7) + 16));
1182
1183	/* Initialize all Rx descriptors. */
1184	for (i = 0; i < RX_RING_SIZE; i++) {
1185		hmp->rx_ring[i].status_n_length = 0;
1186		hmp->rx_skbuff[i] = NULL;
1187	}
1188	/* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1189	for (i = 0; i < RX_RING_SIZE; i++) {
1190		struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1191		hmp->rx_skbuff[i] = skb;
1192		if (skb == NULL)
1193			break;
1194		skb_reserve(skb, 2); /* 16 byte align the IP header. */
1195		hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1196								  skb->data,
1197								  hmp->rx_buf_sz,
1198								  DMA_FROM_DEVICE));
1199		/* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1200		hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1201			DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1202	}
1203	hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1204	hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1205
1206	for (i = 0; i < TX_RING_SIZE; i++) {
1207		hmp->tx_skbuff[i] = NULL;
1208		hmp->tx_ring[i].status_n_length = 0;
1209	}
1210	/* Mark the last entry of the ring */
1211	hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1212}
1213
1214
1215static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
1216				      struct net_device *dev)
1217{
1218	struct hamachi_private *hmp = netdev_priv(dev);
1219	unsigned entry;
1220	u16 status;
1221
1222	/* Ok, now make sure that the queue has space before trying to
1223		add another skbuff.  if we return non-zero the scheduler
1224		should interpret this as a queue full and requeue the buffer
1225		for later.
1226	 */
1227	if (hmp->tx_full) {
1228		/* We should NEVER reach this point -KDU */
1229		printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1230
1231		/* Wake the potentially-idle transmit channel. */
1232		/* If we don't need to read status, DON'T -KDU */
1233		status=readw(hmp->base + TxStatus);
1234		if( !(status & 0x0001) || (status & 0x0002))
1235			writew(0x0001, hmp->base + TxCmd);
1236		return NETDEV_TX_BUSY;
1237	}
1238
1239	/* Caution: the write order is important here, set the field
1240	   with the "ownership" bits last. */
1241
1242	/* Calculate the next Tx descriptor entry. */
1243	entry = hmp->cur_tx % TX_RING_SIZE;
1244
1245	hmp->tx_skbuff[entry] = skb;
1246
1247	hmp->tx_ring[entry].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1248							      skb->data,
1249							      skb->len,
1250							      DMA_TO_DEVICE));
1251
1252	/* Hmmmm, could probably put a DescIntr on these, but the way
1253		the driver is currently coded makes Tx interrupts unnecessary
1254		since the clearing of the Tx ring is handled by the start_xmit
1255		routine.  This organization helps mitigate the interrupts a
1256		bit and probably renders the max_tx_latency param useless.
1257
1258		Update: Putting a DescIntr bit on all of the descriptors and
1259		mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1260	*/
1261	if (entry >= TX_RING_SIZE-1)		 /* Wrap ring */
1262		hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1263			DescEndPacket | DescEndRing | DescIntr | skb->len);
1264	else
1265		hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1266			DescEndPacket | DescIntr | skb->len);
1267	hmp->cur_tx++;
1268
1269	/* Non-x86 Todo: explicitly flush cache lines here. */
1270
1271	/* Wake the potentially-idle transmit channel. */
1272	/* If we don't need to read status, DON'T -KDU */
1273	status=readw(hmp->base + TxStatus);
1274	if( !(status & 0x0001) || (status & 0x0002))
1275		writew(0x0001, hmp->base + TxCmd);
1276
1277	/* Immediately before returning, let's clear as many entries as we can. */
1278	hamachi_tx(dev);
1279
1280	/* We should kick the bottom half here, since we are not accepting
1281	 * interrupts with every packet.  i.e. realize that Gigabit ethernet
1282	 * can transmit faster than ordinary machines can load packets;
1283	 * hence, any packet that got put off because we were in the transmit
1284	 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1285	 */
1286	if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1287		netif_wake_queue(dev);  /* Typical path */
1288	else {
1289		hmp->tx_full = 1;
1290		netif_stop_queue(dev);
1291	}
1292
1293	if (hamachi_debug > 4) {
1294		printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1295			   dev->name, hmp->cur_tx, entry);
1296	}
1297	return NETDEV_TX_OK;
1298}
1299
1300/* The interrupt handler does all of the Rx thread work and cleans up
1301   after the Tx thread. */
1302static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1303{
1304	struct net_device *dev = dev_instance;
1305	struct hamachi_private *hmp = netdev_priv(dev);
1306	void __iomem *ioaddr = hmp->base;
1307	long boguscnt = max_interrupt_work;
1308	int handled = 0;
1309
1310#ifndef final_version			/* Can never occur. */
1311	if (dev == NULL) {
1312		printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1313		return IRQ_NONE;
1314	}
1315#endif
1316
1317	spin_lock(&hmp->lock);
1318
1319	do {
1320		u32 intr_status = readl(ioaddr + InterruptClear);
1321
1322		if (hamachi_debug > 4)
1323			printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1324				   dev->name, intr_status);
1325
1326		if (intr_status == 0)
1327			break;
1328
1329		handled = 1;
1330
1331		if (intr_status & IntrRxDone)
1332			hamachi_rx(dev);
1333
1334		if (intr_status & IntrTxDone){
1335			/* This code should RARELY need to execute. After all, this is
1336			 * a gigabit link, it should consume packets as fast as we put
1337			 * them in AND we clear the Tx ring in hamachi_start_xmit().
1338			 */
1339			if (hmp->tx_full){
1340				for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1341					int entry = hmp->dirty_tx % TX_RING_SIZE;
1342					struct sk_buff *skb;
1343
1344					if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1345						break;
1346					skb = hmp->tx_skbuff[entry];
1347					/* Free the original skb. */
1348					if (skb){
1349						dma_unmap_single(&hmp->pci_dev->dev,
1350								 leXX_to_cpu(hmp->tx_ring[entry].addr),
1351								 skb->len,
1352								 DMA_TO_DEVICE);
1353						dev_consume_skb_irq(skb);
1354						hmp->tx_skbuff[entry] = NULL;
1355					}
1356					hmp->tx_ring[entry].status_n_length = 0;
1357					if (entry >= TX_RING_SIZE-1)
1358						hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1359							cpu_to_le32(DescEndRing);
1360					dev->stats.tx_packets++;
1361				}
1362				if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1363					/* The ring is no longer full */
1364					hmp->tx_full = 0;
1365					netif_wake_queue(dev);
1366				}
1367			} else {
1368				netif_wake_queue(dev);
1369			}
1370		}
1371
1372
1373		/* Abnormal error summary/uncommon events handlers. */
1374		if (intr_status &
1375			(IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1376			 LinkChange | NegotiationChange | StatsMax))
1377			hamachi_error(dev, intr_status);
1378
1379		if (--boguscnt < 0) {
1380			printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1381				   dev->name, intr_status);
1382			break;
1383		}
1384	} while (1);
1385
1386	if (hamachi_debug > 3)
1387		printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1388			   dev->name, readl(ioaddr + IntrStatus));
1389
1390#ifndef final_version
1391	/* Code that should never be run!  Perhaps remove after testing.. */
1392	{
1393		static int stopit = 10;
1394		if (dev->start == 0  &&  --stopit < 0) {
1395			printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1396				   dev->name);
1397			free_irq(irq, dev);
1398		}
1399	}
1400#endif
1401
1402	spin_unlock(&hmp->lock);
1403	return IRQ_RETVAL(handled);
1404}
1405
1406/* This routine is logically part of the interrupt handler, but separated
1407   for clarity and better register allocation. */
1408static int hamachi_rx(struct net_device *dev)
1409{
1410	struct hamachi_private *hmp = netdev_priv(dev);
1411	int entry = hmp->cur_rx % RX_RING_SIZE;
1412	int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1413
1414	if (hamachi_debug > 4) {
1415		printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1416			   entry, hmp->rx_ring[entry].status_n_length);
1417	}
1418
1419	/* If EOP is set on the next entry, it's a new packet. Send it up. */
1420	while (1) {
1421		struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1422		u32 desc_status = le32_to_cpu(desc->status_n_length);
1423		u16 data_size = desc_status;	/* Implicit truncate */
1424		u8 *buf_addr;
1425		s32 frame_status;
1426
1427		if (desc_status & DescOwn)
1428			break;
1429		dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1430					leXX_to_cpu(desc->addr),
1431					hmp->rx_buf_sz, DMA_FROM_DEVICE);
 
1432		buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1433		frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1434		if (hamachi_debug > 4)
1435			printk(KERN_DEBUG "  hamachi_rx() status was %8.8x.\n",
1436				frame_status);
1437		if (--boguscnt < 0)
1438			break;
1439		if ( ! (desc_status & DescEndPacket)) {
1440			printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1441				   "multiple buffers, entry %#x length %d status %4.4x!\n",
1442				   dev->name, hmp->cur_rx, data_size, desc_status);
1443			printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1444				   dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1445			printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1446				   dev->name,
1447				   le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1448				   le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1449				   le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1450			dev->stats.rx_length_errors++;
1451		} /* else  Omit for prototype errata??? */
1452		if (frame_status & 0x00380000) {
1453			/* There was an error. */
1454			if (hamachi_debug > 2)
1455				printk(KERN_DEBUG "  hamachi_rx() Rx error was %8.8x.\n",
1456					   frame_status);
1457			dev->stats.rx_errors++;
1458			if (frame_status & 0x00600000)
1459				dev->stats.rx_length_errors++;
1460			if (frame_status & 0x00080000)
1461				dev->stats.rx_frame_errors++;
1462			if (frame_status & 0x00100000)
1463				dev->stats.rx_crc_errors++;
1464			if (frame_status < 0)
1465				dev->stats.rx_dropped++;
1466		} else {
1467			struct sk_buff *skb;
1468			/* Omit CRC */
1469			u16 pkt_len = (frame_status & 0x07ff) - 4;
1470#ifdef RX_CHECKSUM
1471			u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1472#endif
1473
1474
1475#ifndef final_version
1476			if (hamachi_debug > 4)
1477				printk(KERN_DEBUG "  hamachi_rx() normal Rx pkt length %d"
1478					   " of %d, bogus_cnt %d.\n",
1479					   pkt_len, data_size, boguscnt);
1480			if (hamachi_debug > 5)
1481				printk(KERN_DEBUG"%s:  rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1482					   dev->name,
1483					   *(s32*)&(buf_addr[data_size - 20]),
1484					   *(s32*)&(buf_addr[data_size - 16]),
1485					   *(s32*)&(buf_addr[data_size - 12]),
1486					   *(s32*)&(buf_addr[data_size - 8]),
1487					   *(s32*)&(buf_addr[data_size - 4]));
1488#endif
1489			/* Check if the packet is long enough to accept without copying
1490			   to a minimally-sized skbuff. */
1491			if (pkt_len < rx_copybreak &&
1492			    (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {
1493#ifdef RX_CHECKSUM
1494				printk(KERN_ERR "%s: rx_copybreak non-zero "
1495				  "not good with RX_CHECKSUM\n", dev->name);
1496#endif
1497				skb_reserve(skb, 2);	/* 16 byte align the IP header */
1498				dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1499							leXX_to_cpu(hmp->rx_ring[entry].addr),
1500							hmp->rx_buf_sz,
1501							DMA_FROM_DEVICE);
1502				/* Call copy + cksum if available. */
1503#if 1 || USE_IP_COPYSUM
1504				skb_copy_to_linear_data(skb,
1505					hmp->rx_skbuff[entry]->data, pkt_len);
1506				skb_put(skb, pkt_len);
1507#else
1508				skb_put_data(skb, hmp->rx_ring_dma
1509					     + entry*sizeof(*desc), pkt_len);
1510#endif
1511				dma_sync_single_for_device(&hmp->pci_dev->dev,
1512							   leXX_to_cpu(hmp->rx_ring[entry].addr),
1513							   hmp->rx_buf_sz,
1514							   DMA_FROM_DEVICE);
1515			} else {
1516				dma_unmap_single(&hmp->pci_dev->dev,
1517						 leXX_to_cpu(hmp->rx_ring[entry].addr),
1518						 hmp->rx_buf_sz,
1519						 DMA_FROM_DEVICE);
1520				skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1521				hmp->rx_skbuff[entry] = NULL;
1522			}
1523			skb->protocol = eth_type_trans(skb, dev);
1524
1525
1526#ifdef RX_CHECKSUM
1527			/* TCP or UDP on ipv4, DIX encoding */
1528			if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1529				struct iphdr *ih = (struct iphdr *) skb->data;
1530				/* Check that IP packet is at least 46 bytes, otherwise,
1531				 * there may be pad bytes included in the hardware checksum.
1532				 * This wouldn't happen if everyone padded with 0.
1533				 */
1534				if (ntohs(ih->tot_len) >= 46){
1535					/* don't worry about frags */
1536					if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) {
1537						u32 inv = *(u32 *) &buf_addr[data_size - 16];
1538						u32 *p = (u32 *) &buf_addr[data_size - 20];
1539						register u32 crc, p_r, p_r1;
1540
1541						if (inv & 4) {
1542							inv &= ~4;
1543							--p;
1544						}
1545						p_r = *p;
1546						p_r1 = *(p-1);
1547						switch (inv) {
1548							case 0:
1549								crc = (p_r & 0xffff) + (p_r >> 16);
1550								break;
1551							case 1:
1552								crc = (p_r >> 16) + (p_r & 0xffff)
1553									+ (p_r1 >> 16 & 0xff00);
1554								break;
1555							case 2:
1556								crc = p_r + (p_r1 >> 16);
1557								break;
1558							case 3:
1559								crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1560								break;
1561							default:	/*NOTREACHED*/ crc = 0;
1562						}
1563						if (crc & 0xffff0000) {
1564							crc &= 0xffff;
1565							++crc;
1566						}
1567						/* tcp/udp will add in pseudo */
1568						skb->csum = ntohs(pfck & 0xffff);
1569						if (skb->csum > crc)
1570							skb->csum -= crc;
1571						else
1572							skb->csum += (~crc & 0xffff);
1573						/*
1574						* could do the pseudo myself and return
1575						* CHECKSUM_UNNECESSARY
1576						*/
1577						skb->ip_summed = CHECKSUM_COMPLETE;
1578					}
1579				}
1580			}
1581#endif  /* RX_CHECKSUM */
1582
1583			netif_rx(skb);
1584			dev->stats.rx_packets++;
1585		}
1586		entry = (++hmp->cur_rx) % RX_RING_SIZE;
1587	}
1588
1589	/* Refill the Rx ring buffers. */
1590	for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1591		struct hamachi_desc *desc;
1592
1593		entry = hmp->dirty_rx % RX_RING_SIZE;
1594		desc = &(hmp->rx_ring[entry]);
1595		if (hmp->rx_skbuff[entry] == NULL) {
1596			struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1597
1598			hmp->rx_skbuff[entry] = skb;
1599			if (skb == NULL)
1600				break;		/* Better luck next round. */
1601			skb_reserve(skb, 2);	/* Align IP on 16 byte boundaries */
1602			desc->addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1603								skb->data,
1604								hmp->rx_buf_sz,
1605								DMA_FROM_DEVICE));
1606		}
1607		desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1608		if (entry >= RX_RING_SIZE-1)
1609			desc->status_n_length |= cpu_to_le32(DescOwn |
1610				DescEndPacket | DescEndRing | DescIntr);
1611		else
1612			desc->status_n_length |= cpu_to_le32(DescOwn |
1613				DescEndPacket | DescIntr);
1614	}
1615
1616	/* Restart Rx engine if stopped. */
1617	/* If we don't need to check status, don't. -KDU */
1618	if (readw(hmp->base + RxStatus) & 0x0002)
1619		writew(0x0001, hmp->base + RxCmd);
1620
1621	return 0;
1622}
1623
1624/* This is more properly named "uncommon interrupt events", as it covers more
1625   than just errors. */
1626static void hamachi_error(struct net_device *dev, int intr_status)
1627{
1628	struct hamachi_private *hmp = netdev_priv(dev);
1629	void __iomem *ioaddr = hmp->base;
1630
1631	if (intr_status & (LinkChange|NegotiationChange)) {
1632		if (hamachi_debug > 1)
1633			printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1634				   " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1635				   dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1636				   readw(ioaddr + ANLinkPartnerAbility),
1637				   readl(ioaddr + IntrStatus));
1638		if (readw(ioaddr + ANStatus) & 0x20)
1639			writeb(0x01, ioaddr + LEDCtrl);
1640		else
1641			writeb(0x03, ioaddr + LEDCtrl);
1642	}
1643	if (intr_status & StatsMax) {
1644		hamachi_get_stats(dev);
1645		/* Read the overflow bits to clear. */
1646		readl(ioaddr + 0x370);
1647		readl(ioaddr + 0x3F0);
1648	}
1649	if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) &&
1650	    hamachi_debug)
1651		printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1652		       dev->name, intr_status);
1653	/* Hmmmmm, it's not clear how to recover from PCI faults. */
1654	if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1655		dev->stats.tx_fifo_errors++;
1656	if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1657		dev->stats.rx_fifo_errors++;
1658}
1659
1660static int hamachi_close(struct net_device *dev)
1661{
1662	struct hamachi_private *hmp = netdev_priv(dev);
1663	void __iomem *ioaddr = hmp->base;
1664	struct sk_buff *skb;
1665	int i;
1666
1667	netif_stop_queue(dev);
1668
1669	if (hamachi_debug > 1) {
1670		printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1671			   dev->name, readw(ioaddr + TxStatus),
1672			   readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1673		printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d,  Rx %d / %d.\n",
1674			   dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1675	}
1676
1677	/* Disable interrupts by clearing the interrupt mask. */
1678	writel(0x0000, ioaddr + InterruptEnable);
1679
1680	/* Stop the chip's Tx and Rx processes. */
1681	writel(2, ioaddr + RxCmd);
1682	writew(2, ioaddr + TxCmd);
1683
1684#ifdef __i386__
1685	if (hamachi_debug > 2) {
1686		printk(KERN_DEBUG "  Tx ring at %8.8x:\n",
1687			   (int)hmp->tx_ring_dma);
1688		for (i = 0; i < TX_RING_SIZE; i++)
1689			printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n",
1690				   readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1691				   i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1692		printk(KERN_DEBUG "  Rx ring %8.8x:\n",
1693			   (int)hmp->rx_ring_dma);
1694		for (i = 0; i < RX_RING_SIZE; i++) {
1695			printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1696				   readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1697				   i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1698			if (hamachi_debug > 6) {
1699				if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1700					u16 *addr = (u16 *)
1701						hmp->rx_skbuff[i]->data;
1702					int j;
1703					printk(KERN_DEBUG "Addr: ");
1704					for (j = 0; j < 0x50; j++)
1705						printk(" %4.4x", addr[j]);
1706					printk("\n");
1707				}
1708			}
1709		}
1710	}
1711#endif /* __i386__ debugging only */
1712
1713	free_irq(hmp->pci_dev->irq, dev);
1714
1715	del_timer_sync(&hmp->timer);
1716
1717	/* Free all the skbuffs in the Rx queue. */
1718	for (i = 0; i < RX_RING_SIZE; i++) {
1719		skb = hmp->rx_skbuff[i];
1720		hmp->rx_ring[i].status_n_length = 0;
1721		if (skb) {
1722			dma_unmap_single(&hmp->pci_dev->dev,
1723					 leXX_to_cpu(hmp->rx_ring[i].addr),
1724					 hmp->rx_buf_sz, DMA_FROM_DEVICE);
1725			dev_kfree_skb(skb);
1726			hmp->rx_skbuff[i] = NULL;
1727		}
1728		hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1729	}
1730	for (i = 0; i < TX_RING_SIZE; i++) {
1731		skb = hmp->tx_skbuff[i];
1732		if (skb) {
1733			dma_unmap_single(&hmp->pci_dev->dev,
1734					 leXX_to_cpu(hmp->tx_ring[i].addr),
1735					 skb->len, DMA_TO_DEVICE);
1736			dev_kfree_skb(skb);
1737			hmp->tx_skbuff[i] = NULL;
1738		}
1739	}
1740
1741	writeb(0x00, ioaddr + LEDCtrl);
1742
1743	return 0;
1744}
1745
1746static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1747{
1748	struct hamachi_private *hmp = netdev_priv(dev);
1749	void __iomem *ioaddr = hmp->base;
1750
1751	/* We should lock this segment of code for SMP eventually, although
1752	   the vulnerability window is very small and statistics are
1753	   non-critical. */
1754        /* Ok, what goes here?  This appears to be stuck at 21 packets
1755           according to ifconfig.  It does get incremented in hamachi_tx(),
1756           so I think I'll comment it out here and see if better things
1757           happen.
1758        */
1759	/* dev->stats.tx_packets	= readl(ioaddr + 0x000); */
1760
1761	/* Total Uni+Brd+Multi */
1762	dev->stats.rx_bytes = readl(ioaddr + 0x330);
1763	/* Total Uni+Brd+Multi */
1764	dev->stats.tx_bytes = readl(ioaddr + 0x3B0);
1765	/* Multicast Rx */
1766	dev->stats.multicast = readl(ioaddr + 0x320);
1767
1768	/* Over+Undersized */
1769	dev->stats.rx_length_errors = readl(ioaddr + 0x368);
1770	/* Jabber */
1771	dev->stats.rx_over_errors = readl(ioaddr + 0x35C);
1772	/* Jabber */
1773	dev->stats.rx_crc_errors = readl(ioaddr + 0x360);
1774	/* Symbol Errs */
1775	dev->stats.rx_frame_errors = readl(ioaddr + 0x364);
1776	/* Dropped */
1777	dev->stats.rx_missed_errors = readl(ioaddr + 0x36C);
1778
1779	return &dev->stats;
1780}
1781
1782static void set_rx_mode(struct net_device *dev)
1783{
1784	struct hamachi_private *hmp = netdev_priv(dev);
1785	void __iomem *ioaddr = hmp->base;
1786
1787	if (dev->flags & IFF_PROMISC) {			/* Set promiscuous. */
1788		writew(0x000F, ioaddr + AddrMode);
1789	} else if ((netdev_mc_count(dev) > 63) || (dev->flags & IFF_ALLMULTI)) {
1790		/* Too many to match, or accept all multicasts. */
1791		writew(0x000B, ioaddr + AddrMode);
1792	} else if (!netdev_mc_empty(dev)) { /* Must use the CAM filter. */
1793		struct netdev_hw_addr *ha;
1794		int i = 0;
1795
1796		netdev_for_each_mc_addr(ha, dev) {
1797			writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8);
1798			writel(0x20000 | (*(u16 *)&ha->addr[4]),
1799				   ioaddr + 0x104 + i*8);
1800			i++;
1801		}
1802		/* Clear remaining entries. */
1803		for (; i < 64; i++)
1804			writel(0, ioaddr + 0x104 + i*8);
1805		writew(0x0003, ioaddr + AddrMode);
1806	} else {					/* Normal, unicast/broadcast-only mode. */
1807		writew(0x0001, ioaddr + AddrMode);
1808	}
1809}
1810
1811static int check_if_running(struct net_device *dev)
1812{
1813	if (!netif_running(dev))
1814		return -EINVAL;
1815	return 0;
1816}
1817
1818static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1819{
1820	struct hamachi_private *np = netdev_priv(dev);
1821
1822	strscpy(info->driver, DRV_NAME, sizeof(info->driver));
1823	strscpy(info->version, DRV_VERSION, sizeof(info->version));
1824	strscpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info));
1825}
1826
1827static int hamachi_get_link_ksettings(struct net_device *dev,
1828				      struct ethtool_link_ksettings *cmd)
1829{
1830	struct hamachi_private *np = netdev_priv(dev);
1831	spin_lock_irq(&np->lock);
1832	mii_ethtool_get_link_ksettings(&np->mii_if, cmd);
1833	spin_unlock_irq(&np->lock);
1834	return 0;
1835}
1836
1837static int hamachi_set_link_ksettings(struct net_device *dev,
1838				      const struct ethtool_link_ksettings *cmd)
1839{
1840	struct hamachi_private *np = netdev_priv(dev);
1841	int res;
1842	spin_lock_irq(&np->lock);
1843	res = mii_ethtool_set_link_ksettings(&np->mii_if, cmd);
1844	spin_unlock_irq(&np->lock);
1845	return res;
1846}
1847
1848static int hamachi_nway_reset(struct net_device *dev)
1849{
1850	struct hamachi_private *np = netdev_priv(dev);
1851	return mii_nway_restart(&np->mii_if);
1852}
1853
1854static u32 hamachi_get_link(struct net_device *dev)
1855{
1856	struct hamachi_private *np = netdev_priv(dev);
1857	return mii_link_ok(&np->mii_if);
1858}
1859
1860static const struct ethtool_ops ethtool_ops = {
1861	.begin = check_if_running,
1862	.get_drvinfo = hamachi_get_drvinfo,
1863	.nway_reset = hamachi_nway_reset,
1864	.get_link = hamachi_get_link,
1865	.get_link_ksettings = hamachi_get_link_ksettings,
1866	.set_link_ksettings = hamachi_set_link_ksettings,
1867};
1868
1869static const struct ethtool_ops ethtool_ops_no_mii = {
1870	.begin = check_if_running,
1871	.get_drvinfo = hamachi_get_drvinfo,
1872};
1873
1874/* private ioctl: set rx,tx intr params */
1875static int hamachi_siocdevprivate(struct net_device *dev, struct ifreq *rq,
1876				  void __user *data, int cmd)
1877{
1878	struct hamachi_private *np = netdev_priv(dev);
1879	u32 *d = (u32 *)&rq->ifr_ifru;
1880
1881	if (!netif_running(dev))
1882		return -EINVAL;
1883
1884	if (cmd != SIOCDEVPRIVATE + 3)
1885		return -EOPNOTSUPP;
1886
1887	/* Should add this check here or an ordinary user can do nasty
1888	 * things. -KDU
1889	 *
1890	 * TODO: Shut down the Rx and Tx engines while doing this.
1891	 */
1892	if (!capable(CAP_NET_ADMIN))
1893		return -EPERM;
1894	writel(d[0], np->base + TxIntrCtrl);
1895	writel(d[1], np->base + RxIntrCtrl);
1896	printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1897	       (u32)readl(np->base + TxIntrCtrl),
1898	       (u32)readl(np->base + RxIntrCtrl));
1899
1900	return 0;
1901}
1902
1903static int hamachi_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1904{
1905	struct hamachi_private *np = netdev_priv(dev);
1906	struct mii_ioctl_data *data = if_mii(rq);
1907	int rc;
1908
1909	if (!netif_running(dev))
1910		return -EINVAL;
1911
1912	spin_lock_irq(&np->lock);
1913	rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1914	spin_unlock_irq(&np->lock);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1915
1916	return rc;
1917}
1918
1919
1920static void hamachi_remove_one(struct pci_dev *pdev)
1921{
1922	struct net_device *dev = pci_get_drvdata(pdev);
1923
1924	if (dev) {
1925		struct hamachi_private *hmp = netdev_priv(dev);
1926
1927		dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
1928				  hmp->rx_ring_dma);
1929		dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
1930				  hmp->tx_ring_dma);
1931		unregister_netdev(dev);
1932		iounmap(hmp->base);
1933		free_netdev(dev);
1934		pci_release_regions(pdev);
1935	}
1936}
1937
1938static const struct pci_device_id hamachi_pci_tbl[] = {
1939	{ 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1940	{ 0, }
1941};
1942MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1943
1944static struct pci_driver hamachi_driver = {
1945	.name		= DRV_NAME,
1946	.id_table	= hamachi_pci_tbl,
1947	.probe		= hamachi_init_one,
1948	.remove		= hamachi_remove_one,
1949};
1950
1951static int __init hamachi_init (void)
1952{
1953/* when a module, this is printed whether or not devices are found in probe */
1954#ifdef MODULE
1955	printk(version);
1956#endif
1957	return pci_register_driver(&hamachi_driver);
1958}
1959
1960static void __exit hamachi_exit (void)
1961{
1962	pci_unregister_driver(&hamachi_driver);
1963}
1964
1965
1966module_init(hamachi_init);
1967module_exit(hamachi_exit);