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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
3
4#include <linux/kernel.h>
5#include <linux/interrupt.h>
6#include <linux/pm_runtime.h>
7#include "cc_driver.h"
8#include "cc_buffer_mgr.h"
9#include "cc_request_mgr.h"
10#include "cc_sram_mgr.h"
11#include "cc_hash.h"
12#include "cc_pm.h"
13#include "cc_fips.h"
14
15#define POWER_DOWN_ENABLE 0x01
16#define POWER_DOWN_DISABLE 0x00
17
18static int cc_pm_suspend(struct device *dev)
19{
20 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
21
22 dev_dbg(dev, "set HOST_POWER_DOWN_EN\n");
23 fini_cc_regs(drvdata);
24 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE);
25 clk_disable_unprepare(drvdata->clk);
26 return 0;
27}
28
29static int cc_pm_resume(struct device *dev)
30{
31 int rc;
32 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
33
34 dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n");
35 /* Enables the device source clk */
36 rc = clk_prepare_enable(drvdata->clk);
37 if (rc) {
38 dev_err(dev, "failed getting clock back on. We're toast.\n");
39 return rc;
40 }
41 /* wait for Cryptocell reset completion */
42 if (!cc_wait_for_reset_completion(drvdata)) {
43 dev_err(dev, "Cryptocell reset not completed");
44 clk_disable_unprepare(drvdata->clk);
45 return -EBUSY;
46 }
47
48 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE);
49 rc = init_cc_regs(drvdata);
50 if (rc) {
51 dev_err(dev, "init_cc_regs (%x)\n", rc);
52 clk_disable_unprepare(drvdata->clk);
53 return rc;
54 }
55 /* check if tee fips error occurred during power down */
56 cc_tee_handle_fips_error(drvdata);
57
58 cc_init_hash_sram(drvdata);
59
60 return 0;
61}
62
63const struct dev_pm_ops ccree_pm = {
64 SET_RUNTIME_PM_OPS(cc_pm_suspend, cc_pm_resume, NULL)
65};
66
67int cc_pm_get(struct device *dev)
68{
69 int rc = pm_runtime_get_sync(dev);
70 if (rc < 0) {
71 pm_runtime_put_noidle(dev);
72 return rc;
73 }
74
75 return 0;
76}
77
78void cc_pm_put_suspend(struct device *dev)
79{
80 pm_runtime_mark_last_busy(dev);
81 pm_runtime_put_autosuspend(dev);
82}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
3
4#include <linux/kernel.h>
5#include <linux/interrupt.h>
6#include <linux/pm_runtime.h>
7#include "cc_driver.h"
8#include "cc_buffer_mgr.h"
9#include "cc_request_mgr.h"
10#include "cc_sram_mgr.h"
11#include "cc_hash.h"
12#include "cc_pm.h"
13#include "cc_fips.h"
14
15#define POWER_DOWN_ENABLE 0x01
16#define POWER_DOWN_DISABLE 0x00
17
18const struct dev_pm_ops ccree_pm = {
19 SET_RUNTIME_PM_OPS(cc_pm_suspend, cc_pm_resume, NULL)
20};
21
22int cc_pm_suspend(struct device *dev)
23{
24 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
25 int rc;
26
27 dev_dbg(dev, "set HOST_POWER_DOWN_EN\n");
28 rc = cc_suspend_req_queue(drvdata);
29 if (rc) {
30 dev_err(dev, "cc_suspend_req_queue (%x)\n", rc);
31 return rc;
32 }
33 fini_cc_regs(drvdata);
34 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE);
35 cc_clk_off(drvdata);
36 return 0;
37}
38
39int cc_pm_resume(struct device *dev)
40{
41 int rc;
42 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
43
44 dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n");
45 /* Enables the device source clk */
46 rc = cc_clk_on(drvdata);
47 if (rc) {
48 dev_err(dev, "failed getting clock back on. We're toast.\n");
49 return rc;
50 }
51 /* wait for Crytpcell reset completion */
52 if (!cc_wait_for_reset_completion(drvdata)) {
53 dev_err(dev, "Cryptocell reset not completed");
54 return -EBUSY;
55 }
56
57 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE);
58 rc = init_cc_regs(drvdata, false);
59 if (rc) {
60 dev_err(dev, "init_cc_regs (%x)\n", rc);
61 return rc;
62 }
63 /* check if tee fips error occurred during power down */
64 cc_tee_handle_fips_error(drvdata);
65
66 rc = cc_resume_req_queue(drvdata);
67 if (rc) {
68 dev_err(dev, "cc_resume_req_queue (%x)\n", rc);
69 return rc;
70 }
71
72 /* must be after the queue resuming as it uses the HW queue*/
73 cc_init_hash_sram(drvdata);
74
75 return 0;
76}
77
78int cc_pm_get(struct device *dev)
79{
80 int rc = 0;
81 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
82
83 if (cc_req_queue_suspended(drvdata))
84 rc = pm_runtime_get_sync(dev);
85 else
86 pm_runtime_get_noresume(dev);
87
88 return rc;
89}
90
91int cc_pm_put_suspend(struct device *dev)
92{
93 int rc = 0;
94 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
95
96 if (!cc_req_queue_suspended(drvdata)) {
97 pm_runtime_mark_last_busy(dev);
98 rc = pm_runtime_put_autosuspend(dev);
99 } else {
100 /* Something wrong happens*/
101 dev_err(dev, "request to suspend already suspended queue");
102 rc = -EBUSY;
103 }
104 return rc;
105}
106
107bool cc_pm_is_dev_suspended(struct device *dev)
108{
109 /* check device state using runtime api */
110 return pm_runtime_suspended(dev);
111}
112
113int cc_pm_init(struct cc_drvdata *drvdata)
114{
115 struct device *dev = drvdata_to_dev(drvdata);
116
117 /* must be before the enabling to avoid resdundent suspending */
118 pm_runtime_set_autosuspend_delay(dev, CC_SUSPEND_TIMEOUT);
119 pm_runtime_use_autosuspend(dev);
120 /* activate the PM module */
121 return pm_runtime_set_active(dev);
122}
123
124/* enable the PM module*/
125void cc_pm_go(struct cc_drvdata *drvdata)
126{
127 pm_runtime_enable(drvdata_to_dev(drvdata));
128}
129
130void cc_pm_fini(struct cc_drvdata *drvdata)
131{
132 pm_runtime_disable(drvdata_to_dev(drvdata));
133}