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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>
3 */
4#include <linux/spi/spi.h>
5#include "sja1105.h"
6
7/* The adjfine API clamps ppb between [-32,768,000, 32,768,000], and
8 * therefore scaled_ppm between [-2,147,483,648, 2,147,483,647].
9 * Set the maximum supported ppb to a round value smaller than the maximum.
10 *
11 * Percentually speaking, this is a +/- 0.032x adjustment of the
12 * free-running counter (0.968x to 1.032x).
13 */
14#define SJA1105_MAX_ADJ_PPB 32000000
15#define SJA1105_SIZE_PTP_CMD 4
16
17/* PTPSYNCTS has no interrupt or update mechanism, because the intended
18 * hardware use case is for the timestamp to be collected synchronously,
19 * immediately after the CAS_MASTER SJA1105 switch has performed a CASSYNC
20 * one-shot toggle (no return to level) on the PTP_CLK pin. When used as a
21 * generic extts source, the PTPSYNCTS register needs polling and a comparison
22 * with the old value. The polling interval is configured as the Nyquist rate
23 * of a signal with 50% duty cycle and 1Hz frequency, which is sadly all that
24 * this hardware can do (but may be enough for some setups). Anything of higher
25 * frequency than 1 Hz will be lost, since there is no timestamp FIFO.
26 */
27#define SJA1105_EXTTS_INTERVAL (HZ / 6)
28
29/* This range is actually +/- SJA1105_MAX_ADJ_PPB
30 * divided by 1000 (ppb -> ppm) and with a 16-bit
31 * "fractional" part (actually fixed point).
32 * |
33 * v
34 * Convert scaled_ppm from the +/- ((10^6) << 16) range
35 * into the +/- (1 << 31) range.
36 *
37 * This forgoes a "ppb" numeric representation (up to NSEC_PER_SEC)
38 * and defines the scaling factor between scaled_ppm and the actual
39 * frequency adjustments of the PHC.
40 *
41 * ptpclkrate = scaled_ppm * 2^31 / (10^6 * 2^16)
42 * simplifies to
43 * ptpclkrate = scaled_ppm * 2^9 / 5^6
44 */
45#define SJA1105_CC_MULT_NUM (1 << 9)
46#define SJA1105_CC_MULT_DEM 15625
47#define SJA1105_CC_MULT 0x80000000
48
49enum sja1105_ptp_clk_mode {
50 PTP_ADD_MODE = 1,
51 PTP_SET_MODE = 0,
52};
53
54#define extts_to_data(t) \
55 container_of((t), struct sja1105_ptp_data, extts_timer)
56#define ptp_caps_to_data(d) \
57 container_of((d), struct sja1105_ptp_data, caps)
58#define ptp_data_to_sja1105(d) \
59 container_of((d), struct sja1105_private, ptp_data)
60
61int sja1105_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr)
62{
63 struct sja1105_private *priv = ds->priv;
64 struct hwtstamp_config config;
65
66 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
67 return -EFAULT;
68
69 switch (config.tx_type) {
70 case HWTSTAMP_TX_OFF:
71 priv->hwts_tx_en &= ~BIT(port);
72 break;
73 case HWTSTAMP_TX_ON:
74 priv->hwts_tx_en |= BIT(port);
75 break;
76 default:
77 return -ERANGE;
78 }
79
80 switch (config.rx_filter) {
81 case HWTSTAMP_FILTER_NONE:
82 priv->hwts_rx_en &= ~BIT(port);
83 break;
84 default:
85 priv->hwts_rx_en |= BIT(port);
86 break;
87 }
88
89 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
90 return -EFAULT;
91 return 0;
92}
93
94int sja1105_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr)
95{
96 struct sja1105_private *priv = ds->priv;
97 struct hwtstamp_config config;
98
99 config.flags = 0;
100 if (priv->hwts_tx_en & BIT(port))
101 config.tx_type = HWTSTAMP_TX_ON;
102 else
103 config.tx_type = HWTSTAMP_TX_OFF;
104 if (priv->hwts_rx_en & BIT(port))
105 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
106 else
107 config.rx_filter = HWTSTAMP_FILTER_NONE;
108
109 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
110 -EFAULT : 0;
111}
112
113int sja1105_get_ts_info(struct dsa_switch *ds, int port,
114 struct ethtool_ts_info *info)
115{
116 struct sja1105_private *priv = ds->priv;
117 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
118
119 /* Called during cleanup */
120 if (!ptp_data->clock)
121 return -ENODEV;
122
123 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
124 SOF_TIMESTAMPING_RX_HARDWARE |
125 SOF_TIMESTAMPING_RAW_HARDWARE;
126 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
127 (1 << HWTSTAMP_TX_ON);
128 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
129 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
130 info->phc_index = ptp_clock_index(ptp_data->clock);
131 return 0;
132}
133
134void sja1105et_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,
135 enum packing_op op)
136{
137 const int size = SJA1105_SIZE_PTP_CMD;
138 /* No need to keep this as part of the structure */
139 u64 valid = 1;
140
141 sja1105_packing(buf, &valid, 31, 31, size, op);
142 sja1105_packing(buf, &cmd->ptpstrtsch, 30, 30, size, op);
143 sja1105_packing(buf, &cmd->ptpstopsch, 29, 29, size, op);
144 sja1105_packing(buf, &cmd->startptpcp, 28, 28, size, op);
145 sja1105_packing(buf, &cmd->stopptpcp, 27, 27, size, op);
146 sja1105_packing(buf, &cmd->resptp, 2, 2, size, op);
147 sja1105_packing(buf, &cmd->corrclk4ts, 1, 1, size, op);
148 sja1105_packing(buf, &cmd->ptpclkadd, 0, 0, size, op);
149}
150
151void sja1105pqrs_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,
152 enum packing_op op)
153{
154 const int size = SJA1105_SIZE_PTP_CMD;
155 /* No need to keep this as part of the structure */
156 u64 valid = 1;
157
158 sja1105_packing(buf, &valid, 31, 31, size, op);
159 sja1105_packing(buf, &cmd->ptpstrtsch, 30, 30, size, op);
160 sja1105_packing(buf, &cmd->ptpstopsch, 29, 29, size, op);
161 sja1105_packing(buf, &cmd->startptpcp, 28, 28, size, op);
162 sja1105_packing(buf, &cmd->stopptpcp, 27, 27, size, op);
163 sja1105_packing(buf, &cmd->resptp, 3, 3, size, op);
164 sja1105_packing(buf, &cmd->corrclk4ts, 2, 2, size, op);
165 sja1105_packing(buf, &cmd->ptpclkadd, 0, 0, size, op);
166}
167
168int sja1105_ptp_commit(struct dsa_switch *ds, struct sja1105_ptp_cmd *cmd,
169 sja1105_spi_rw_mode_t rw)
170{
171 const struct sja1105_private *priv = ds->priv;
172 const struct sja1105_regs *regs = priv->info->regs;
173 u8 buf[SJA1105_SIZE_PTP_CMD] = {0};
174 int rc;
175
176 if (rw == SPI_WRITE)
177 priv->info->ptp_cmd_packing(buf, cmd, PACK);
178
179 rc = sja1105_xfer_buf(priv, rw, regs->ptp_control, buf,
180 SJA1105_SIZE_PTP_CMD);
181
182 if (rw == SPI_READ)
183 priv->info->ptp_cmd_packing(buf, cmd, UNPACK);
184
185 return rc;
186}
187
188/* The switch returns partial timestamps (24 bits for SJA1105 E/T, which wrap
189 * around in 0.135 seconds, and 32 bits for P/Q/R/S, wrapping around in 34.35
190 * seconds).
191 *
192 * This receives the RX or TX MAC timestamps, provided by hardware as
193 * the lower bits of the cycle counter, sampled at the time the timestamp was
194 * collected.
195 *
196 * To reconstruct into a full 64-bit-wide timestamp, the cycle counter is
197 * read and the high-order bits are filled in.
198 *
199 * Must be called within one wraparound period of the partial timestamp since
200 * it was generated by the MAC.
201 */
202static u64 sja1105_tstamp_reconstruct(struct dsa_switch *ds, u64 now,
203 u64 ts_partial)
204{
205 struct sja1105_private *priv = ds->priv;
206 u64 partial_tstamp_mask = CYCLECOUNTER_MASK(priv->info->ptp_ts_bits);
207 u64 ts_reconstructed;
208
209 ts_reconstructed = (now & ~partial_tstamp_mask) | ts_partial;
210
211 /* Check lower bits of current cycle counter against the timestamp.
212 * If the current cycle counter is lower than the partial timestamp,
213 * then wraparound surely occurred and must be accounted for.
214 */
215 if ((now & partial_tstamp_mask) <= ts_partial)
216 ts_reconstructed -= (partial_tstamp_mask + 1);
217
218 return ts_reconstructed;
219}
220
221/* Reads the SPI interface for an egress timestamp generated by the switch
222 * for frames sent using management routes.
223 *
224 * SJA1105 E/T layout of the 4-byte SPI payload:
225 *
226 * 31 23 15 7 0
227 * | | | | |
228 * +-----+-----+-----+ ^
229 * ^ |
230 * | |
231 * 24-bit timestamp Update bit
232 *
233 *
234 * SJA1105 P/Q/R/S layout of the 8-byte SPI payload:
235 *
236 * 31 23 15 7 0 63 55 47 39 32
237 * | | | | | | | | | |
238 * ^ +-----+-----+-----+-----+
239 * | ^
240 * | |
241 * Update bit 32-bit timestamp
242 *
243 * Notice that the update bit is in the same place.
244 * To have common code for E/T and P/Q/R/S for reading the timestamp,
245 * we need to juggle with the offset and the bit indices.
246 */
247static int sja1105_ptpegr_ts_poll(struct dsa_switch *ds, int port, u64 *ts)
248{
249 struct sja1105_private *priv = ds->priv;
250 const struct sja1105_regs *regs = priv->info->regs;
251 int tstamp_bit_start, tstamp_bit_end;
252 int timeout = 10;
253 u8 packed_buf[8];
254 u64 update;
255 int rc;
256
257 do {
258 rc = sja1105_xfer_buf(priv, SPI_READ, regs->ptpegr_ts[port],
259 packed_buf, priv->info->ptpegr_ts_bytes);
260 if (rc < 0)
261 return rc;
262
263 sja1105_unpack(packed_buf, &update, 0, 0,
264 priv->info->ptpegr_ts_bytes);
265 if (update)
266 break;
267
268 usleep_range(10, 50);
269 } while (--timeout);
270
271 if (!timeout)
272 return -ETIMEDOUT;
273
274 /* Point the end bit to the second 32-bit word on P/Q/R/S,
275 * no-op on E/T.
276 */
277 tstamp_bit_end = (priv->info->ptpegr_ts_bytes - 4) * 8;
278 /* Shift the 24-bit timestamp on E/T to be collected from 31:8.
279 * No-op on P/Q/R/S.
280 */
281 tstamp_bit_end += 32 - priv->info->ptp_ts_bits;
282 tstamp_bit_start = tstamp_bit_end + priv->info->ptp_ts_bits - 1;
283
284 *ts = 0;
285
286 sja1105_unpack(packed_buf, ts, tstamp_bit_start, tstamp_bit_end,
287 priv->info->ptpegr_ts_bytes);
288
289 return 0;
290}
291
292/* Caller must hold ptp_data->lock */
293static int sja1105_ptpclkval_read(struct sja1105_private *priv, u64 *ticks,
294 struct ptp_system_timestamp *ptp_sts)
295{
296 const struct sja1105_regs *regs = priv->info->regs;
297
298 return sja1105_xfer_u64(priv, SPI_READ, regs->ptpclkval, ticks,
299 ptp_sts);
300}
301
302/* Caller must hold ptp_data->lock */
303static int sja1105_ptpclkval_write(struct sja1105_private *priv, u64 ticks,
304 struct ptp_system_timestamp *ptp_sts)
305{
306 const struct sja1105_regs *regs = priv->info->regs;
307
308 return sja1105_xfer_u64(priv, SPI_WRITE, regs->ptpclkval, &ticks,
309 ptp_sts);
310}
311
312static void sja1105_extts_poll(struct sja1105_private *priv)
313{
314 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
315 const struct sja1105_regs *regs = priv->info->regs;
316 struct ptp_clock_event event;
317 u64 ptpsyncts = 0;
318 int rc;
319
320 rc = sja1105_xfer_u64(priv, SPI_READ, regs->ptpsyncts, &ptpsyncts,
321 NULL);
322 if (rc < 0)
323 dev_err_ratelimited(priv->ds->dev,
324 "Failed to read PTPSYNCTS: %d\n", rc);
325
326 if (ptpsyncts && ptp_data->ptpsyncts != ptpsyncts) {
327 event.index = 0;
328 event.type = PTP_CLOCK_EXTTS;
329 event.timestamp = ns_to_ktime(sja1105_ticks_to_ns(ptpsyncts));
330 ptp_clock_event(ptp_data->clock, &event);
331
332 ptp_data->ptpsyncts = ptpsyncts;
333 }
334}
335
336static long sja1105_rxtstamp_work(struct ptp_clock_info *ptp)
337{
338 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
339 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
340 struct dsa_switch *ds = priv->ds;
341 struct sk_buff *skb;
342
343 mutex_lock(&ptp_data->lock);
344
345 while ((skb = skb_dequeue(&ptp_data->skb_rxtstamp_queue)) != NULL) {
346 struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);
347 u64 ticks, ts;
348 int rc;
349
350 rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
351 if (rc < 0) {
352 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
353 kfree_skb(skb);
354 continue;
355 }
356
357 *shwt = (struct skb_shared_hwtstamps) {0};
358
359 ts = SJA1105_SKB_CB(skb)->tstamp;
360 ts = sja1105_tstamp_reconstruct(ds, ticks, ts);
361
362 shwt->hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
363 netif_rx(skb);
364 }
365
366 if (ptp_data->extts_enabled)
367 sja1105_extts_poll(priv);
368
369 mutex_unlock(&ptp_data->lock);
370
371 /* Don't restart */
372 return -1;
373}
374
375bool sja1105_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
376{
377 struct sja1105_private *priv = ds->priv;
378 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
379
380 if (!(priv->hwts_rx_en & BIT(port)))
381 return false;
382
383 /* We need to read the full PTP clock to reconstruct the Rx
384 * timestamp. For that we need a sleepable context.
385 */
386 skb_queue_tail(&ptp_data->skb_rxtstamp_queue, skb);
387 ptp_schedule_worker(ptp_data->clock, 0);
388 return true;
389}
390
391bool sja1110_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
392{
393 struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);
394 u64 ts = SJA1105_SKB_CB(skb)->tstamp;
395
396 *shwt = (struct skb_shared_hwtstamps) {0};
397
398 shwt->hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
399
400 /* Don't defer */
401 return false;
402}
403
404/* Called from dsa_skb_defer_rx_timestamp */
405bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,
406 struct sk_buff *skb, unsigned int type)
407{
408 struct sja1105_private *priv = ds->priv;
409
410 return priv->info->rxtstamp(ds, port, skb);
411}
412
413void sja1110_process_meta_tstamp(struct dsa_switch *ds, int port, u8 ts_id,
414 enum sja1110_meta_tstamp dir, u64 tstamp)
415{
416 struct sja1105_private *priv = ds->priv;
417 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
418 struct sk_buff *skb, *skb_tmp, *skb_match = NULL;
419 struct skb_shared_hwtstamps shwt = {0};
420
421 /* We don't care about RX timestamps on the CPU port */
422 if (dir == SJA1110_META_TSTAMP_RX)
423 return;
424
425 spin_lock(&ptp_data->skb_txtstamp_queue.lock);
426
427 skb_queue_walk_safe(&ptp_data->skb_txtstamp_queue, skb, skb_tmp) {
428 if (SJA1105_SKB_CB(skb)->ts_id != ts_id)
429 continue;
430
431 __skb_unlink(skb, &ptp_data->skb_txtstamp_queue);
432 skb_match = skb;
433
434 break;
435 }
436
437 spin_unlock(&ptp_data->skb_txtstamp_queue.lock);
438
439 if (WARN_ON(!skb_match))
440 return;
441
442 shwt.hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(tstamp));
443 skb_complete_tx_timestamp(skb_match, &shwt);
444}
445
446/* In addition to cloning the skb which is done by the common
447 * sja1105_port_txtstamp, we need to generate a timestamp ID and save the
448 * packet to the TX timestamping queue.
449 */
450void sja1110_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
451{
452 struct sk_buff *clone = SJA1105_SKB_CB(skb)->clone;
453 struct sja1105_private *priv = ds->priv;
454 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
455 u8 ts_id;
456
457 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
458
459 spin_lock(&priv->ts_id_lock);
460
461 ts_id = priv->ts_id;
462 /* Deal automatically with 8-bit wraparound */
463 priv->ts_id++;
464
465 SJA1105_SKB_CB(clone)->ts_id = ts_id;
466
467 spin_unlock(&priv->ts_id_lock);
468
469 skb_queue_tail(&ptp_data->skb_txtstamp_queue, clone);
470}
471
472/* Called from dsa_skb_tx_timestamp. This callback is just to clone
473 * the skb and have it available in SJA1105_SKB_CB in the .port_deferred_xmit
474 * callback, where we will timestamp it synchronously.
475 */
476void sja1105_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
477{
478 struct sja1105_private *priv = ds->priv;
479 struct sk_buff *clone;
480
481 if (!(priv->hwts_tx_en & BIT(port)))
482 return;
483
484 clone = skb_clone_sk(skb);
485 if (!clone)
486 return;
487
488 SJA1105_SKB_CB(skb)->clone = clone;
489
490 if (priv->info->txtstamp)
491 priv->info->txtstamp(ds, port, skb);
492}
493
494static int sja1105_ptp_reset(struct dsa_switch *ds)
495{
496 struct sja1105_private *priv = ds->priv;
497 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
498 struct sja1105_ptp_cmd cmd = ptp_data->cmd;
499 int rc;
500
501 mutex_lock(&ptp_data->lock);
502
503 cmd.resptp = 1;
504
505 dev_dbg(ds->dev, "Resetting PTP clock\n");
506 rc = sja1105_ptp_commit(ds, &cmd, SPI_WRITE);
507
508 sja1105_tas_clockstep(priv->ds);
509
510 mutex_unlock(&ptp_data->lock);
511
512 return rc;
513}
514
515/* Caller must hold ptp_data->lock */
516int __sja1105_ptp_gettimex(struct dsa_switch *ds, u64 *ns,
517 struct ptp_system_timestamp *ptp_sts)
518{
519 struct sja1105_private *priv = ds->priv;
520 u64 ticks;
521 int rc;
522
523 rc = sja1105_ptpclkval_read(priv, &ticks, ptp_sts);
524 if (rc < 0) {
525 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
526 return rc;
527 }
528
529 *ns = sja1105_ticks_to_ns(ticks);
530
531 return 0;
532}
533
534static int sja1105_ptp_gettimex(struct ptp_clock_info *ptp,
535 struct timespec64 *ts,
536 struct ptp_system_timestamp *ptp_sts)
537{
538 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
539 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
540 u64 now = 0;
541 int rc;
542
543 mutex_lock(&ptp_data->lock);
544
545 rc = __sja1105_ptp_gettimex(priv->ds, &now, ptp_sts);
546 *ts = ns_to_timespec64(now);
547
548 mutex_unlock(&ptp_data->lock);
549
550 return rc;
551}
552
553/* Caller must hold ptp_data->lock */
554static int sja1105_ptp_mode_set(struct sja1105_private *priv,
555 enum sja1105_ptp_clk_mode mode)
556{
557 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
558
559 if (ptp_data->cmd.ptpclkadd == mode)
560 return 0;
561
562 ptp_data->cmd.ptpclkadd = mode;
563
564 return sja1105_ptp_commit(priv->ds, &ptp_data->cmd, SPI_WRITE);
565}
566
567/* Write to PTPCLKVAL while PTPCLKADD is 0 */
568int __sja1105_ptp_settime(struct dsa_switch *ds, u64 ns,
569 struct ptp_system_timestamp *ptp_sts)
570{
571 struct sja1105_private *priv = ds->priv;
572 u64 ticks = ns_to_sja1105_ticks(ns);
573 int rc;
574
575 rc = sja1105_ptp_mode_set(priv, PTP_SET_MODE);
576 if (rc < 0) {
577 dev_err(priv->ds->dev, "Failed to put PTPCLK in set mode\n");
578 return rc;
579 }
580
581 rc = sja1105_ptpclkval_write(priv, ticks, ptp_sts);
582
583 sja1105_tas_clockstep(priv->ds);
584
585 return rc;
586}
587
588static int sja1105_ptp_settime(struct ptp_clock_info *ptp,
589 const struct timespec64 *ts)
590{
591 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
592 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
593 u64 ns = timespec64_to_ns(ts);
594 int rc;
595
596 mutex_lock(&ptp_data->lock);
597
598 rc = __sja1105_ptp_settime(priv->ds, ns, NULL);
599
600 mutex_unlock(&ptp_data->lock);
601
602 return rc;
603}
604
605static int sja1105_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
606{
607 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
608 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
609 const struct sja1105_regs *regs = priv->info->regs;
610 u32 clkrate32;
611 s64 clkrate;
612 int rc;
613
614 clkrate = (s64)scaled_ppm * SJA1105_CC_MULT_NUM;
615 clkrate = div_s64(clkrate, SJA1105_CC_MULT_DEM);
616
617 /* Take a +/- value and re-center it around 2^31. */
618 clkrate = SJA1105_CC_MULT + clkrate;
619 WARN_ON(abs(clkrate) >= GENMASK_ULL(31, 0));
620 clkrate32 = clkrate;
621
622 mutex_lock(&ptp_data->lock);
623
624 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptpclkrate, &clkrate32,
625 NULL);
626
627 sja1105_tas_adjfreq(priv->ds);
628
629 mutex_unlock(&ptp_data->lock);
630
631 return rc;
632}
633
634/* Write to PTPCLKVAL while PTPCLKADD is 1 */
635int __sja1105_ptp_adjtime(struct dsa_switch *ds, s64 delta)
636{
637 struct sja1105_private *priv = ds->priv;
638 s64 ticks = ns_to_sja1105_ticks(delta);
639 int rc;
640
641 rc = sja1105_ptp_mode_set(priv, PTP_ADD_MODE);
642 if (rc < 0) {
643 dev_err(priv->ds->dev, "Failed to put PTPCLK in add mode\n");
644 return rc;
645 }
646
647 rc = sja1105_ptpclkval_write(priv, ticks, NULL);
648
649 sja1105_tas_clockstep(priv->ds);
650
651 return rc;
652}
653
654static int sja1105_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
655{
656 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
657 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
658 int rc;
659
660 mutex_lock(&ptp_data->lock);
661
662 rc = __sja1105_ptp_adjtime(priv->ds, delta);
663
664 mutex_unlock(&ptp_data->lock);
665
666 return rc;
667}
668
669static void sja1105_ptp_extts_setup_timer(struct sja1105_ptp_data *ptp_data)
670{
671 unsigned long expires = ((jiffies / SJA1105_EXTTS_INTERVAL) + 1) *
672 SJA1105_EXTTS_INTERVAL;
673
674 mod_timer(&ptp_data->extts_timer, expires);
675}
676
677static void sja1105_ptp_extts_timer(struct timer_list *t)
678{
679 struct sja1105_ptp_data *ptp_data = extts_to_data(t);
680
681 ptp_schedule_worker(ptp_data->clock, 0);
682
683 sja1105_ptp_extts_setup_timer(ptp_data);
684}
685
686static int sja1105_change_ptp_clk_pin_func(struct sja1105_private *priv,
687 enum ptp_pin_function func)
688{
689 struct sja1105_avb_params_entry *avb;
690 enum ptp_pin_function old_func;
691
692 avb = priv->static_config.tables[BLK_IDX_AVB_PARAMS].entries;
693
694 if (priv->info->device_id == SJA1105E_DEVICE_ID ||
695 priv->info->device_id == SJA1105T_DEVICE_ID ||
696 avb->cas_master)
697 old_func = PTP_PF_PEROUT;
698 else
699 old_func = PTP_PF_EXTTS;
700
701 if (func == old_func)
702 return 0;
703
704 avb->cas_master = (func == PTP_PF_PEROUT);
705
706 return sja1105_dynamic_config_write(priv, BLK_IDX_AVB_PARAMS, 0, avb,
707 true);
708}
709
710/* The PTP_CLK pin may be configured to toggle with a 50% duty cycle and a
711 * frequency f:
712 *
713 * NSEC_PER_SEC
714 * f = ----------------------
715 * (PTPPINDUR * 8 ns) * 2
716 */
717static int sja1105_per_out_enable(struct sja1105_private *priv,
718 struct ptp_perout_request *perout,
719 bool on)
720{
721 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
722 const struct sja1105_regs *regs = priv->info->regs;
723 struct sja1105_ptp_cmd cmd = ptp_data->cmd;
724 int rc;
725
726 /* We only support one channel */
727 if (perout->index != 0)
728 return -EOPNOTSUPP;
729
730 /* Reject requests with unsupported flags */
731 if (perout->flags)
732 return -EOPNOTSUPP;
733
734 mutex_lock(&ptp_data->lock);
735
736 rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_PEROUT);
737 if (rc)
738 goto out;
739
740 if (on) {
741 struct timespec64 pin_duration_ts = {
742 .tv_sec = perout->period.sec,
743 .tv_nsec = perout->period.nsec,
744 };
745 struct timespec64 pin_start_ts = {
746 .tv_sec = perout->start.sec,
747 .tv_nsec = perout->start.nsec,
748 };
749 u64 pin_duration = timespec64_to_ns(&pin_duration_ts);
750 u64 pin_start = timespec64_to_ns(&pin_start_ts);
751 u32 pin_duration32;
752 u64 now;
753
754 /* ptppindur: 32 bit register which holds the interval between
755 * 2 edges on PTP_CLK. So check for truncation which happens
756 * at periods larger than around 68.7 seconds.
757 */
758 pin_duration = ns_to_sja1105_ticks(pin_duration / 2);
759 if (pin_duration > U32_MAX) {
760 rc = -ERANGE;
761 goto out;
762 }
763 pin_duration32 = pin_duration;
764
765 /* ptppins: 64 bit register which needs to hold a PTP time
766 * larger than the current time, otherwise the startptpcp
767 * command won't do anything. So advance the current time
768 * by a number of periods in a way that won't alter the
769 * phase offset.
770 */
771 rc = __sja1105_ptp_gettimex(priv->ds, &now, NULL);
772 if (rc < 0)
773 goto out;
774
775 pin_start = future_base_time(pin_start, pin_duration,
776 now + 1ull * NSEC_PER_SEC);
777 pin_start = ns_to_sja1105_ticks(pin_start);
778
779 rc = sja1105_xfer_u64(priv, SPI_WRITE, regs->ptppinst,
780 &pin_start, NULL);
781 if (rc < 0)
782 goto out;
783
784 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptppindur,
785 &pin_duration32, NULL);
786 if (rc < 0)
787 goto out;
788 }
789
790 if (on)
791 cmd.startptpcp = true;
792 else
793 cmd.stopptpcp = true;
794
795 rc = sja1105_ptp_commit(priv->ds, &cmd, SPI_WRITE);
796
797out:
798 mutex_unlock(&ptp_data->lock);
799
800 return rc;
801}
802
803static int sja1105_extts_enable(struct sja1105_private *priv,
804 struct ptp_extts_request *extts,
805 bool on)
806{
807 int rc;
808
809 /* We only support one channel */
810 if (extts->index != 0)
811 return -EOPNOTSUPP;
812
813 /* Reject requests with unsupported flags */
814 if (extts->flags & ~(PTP_ENABLE_FEATURE |
815 PTP_RISING_EDGE |
816 PTP_FALLING_EDGE |
817 PTP_STRICT_FLAGS))
818 return -EOPNOTSUPP;
819
820 /* We can only enable time stamping on both edges, sadly. */
821 if ((extts->flags & PTP_STRICT_FLAGS) &&
822 (extts->flags & PTP_ENABLE_FEATURE) &&
823 (extts->flags & PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES)
824 return -EOPNOTSUPP;
825
826 rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_EXTTS);
827 if (rc)
828 return rc;
829
830 priv->ptp_data.extts_enabled = on;
831
832 if (on)
833 sja1105_ptp_extts_setup_timer(&priv->ptp_data);
834 else
835 del_timer_sync(&priv->ptp_data.extts_timer);
836
837 return 0;
838}
839
840static int sja1105_ptp_enable(struct ptp_clock_info *ptp,
841 struct ptp_clock_request *req, int on)
842{
843 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
844 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
845 int rc = -EOPNOTSUPP;
846
847 if (req->type == PTP_CLK_REQ_PEROUT)
848 rc = sja1105_per_out_enable(priv, &req->perout, on);
849 else if (req->type == PTP_CLK_REQ_EXTTS)
850 rc = sja1105_extts_enable(priv, &req->extts, on);
851
852 return rc;
853}
854
855static int sja1105_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
856 enum ptp_pin_function func, unsigned int chan)
857{
858 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
859 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
860
861 if (chan != 0 || pin != 0)
862 return -1;
863
864 switch (func) {
865 case PTP_PF_NONE:
866 case PTP_PF_PEROUT:
867 break;
868 case PTP_PF_EXTTS:
869 if (priv->info->device_id == SJA1105E_DEVICE_ID ||
870 priv->info->device_id == SJA1105T_DEVICE_ID)
871 return -1;
872 break;
873 default:
874 return -1;
875 }
876 return 0;
877}
878
879static struct ptp_pin_desc sja1105_ptp_pin = {
880 .name = "ptp_clk",
881 .index = 0,
882 .func = PTP_PF_NONE,
883};
884
885int sja1105_ptp_clock_register(struct dsa_switch *ds)
886{
887 struct sja1105_private *priv = ds->priv;
888 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
889
890 ptp_data->caps = (struct ptp_clock_info) {
891 .owner = THIS_MODULE,
892 .name = "SJA1105 PHC",
893 .adjfine = sja1105_ptp_adjfine,
894 .adjtime = sja1105_ptp_adjtime,
895 .gettimex64 = sja1105_ptp_gettimex,
896 .settime64 = sja1105_ptp_settime,
897 .enable = sja1105_ptp_enable,
898 .verify = sja1105_ptp_verify_pin,
899 .do_aux_work = sja1105_rxtstamp_work,
900 .max_adj = SJA1105_MAX_ADJ_PPB,
901 .pin_config = &sja1105_ptp_pin,
902 .n_pins = 1,
903 .n_ext_ts = 1,
904 .n_per_out = 1,
905 };
906
907 /* Only used on SJA1105 */
908 skb_queue_head_init(&ptp_data->skb_rxtstamp_queue);
909 /* Only used on SJA1110 */
910 skb_queue_head_init(&ptp_data->skb_txtstamp_queue);
911
912 ptp_data->clock = ptp_clock_register(&ptp_data->caps, ds->dev);
913 if (IS_ERR_OR_NULL(ptp_data->clock))
914 return PTR_ERR(ptp_data->clock);
915
916 ptp_data->cmd.corrclk4ts = true;
917 ptp_data->cmd.ptpclkadd = PTP_SET_MODE;
918
919 timer_setup(&ptp_data->extts_timer, sja1105_ptp_extts_timer, 0);
920
921 return sja1105_ptp_reset(ds);
922}
923
924void sja1105_ptp_clock_unregister(struct dsa_switch *ds)
925{
926 struct sja1105_private *priv = ds->priv;
927 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
928
929 if (IS_ERR_OR_NULL(ptp_data->clock))
930 return;
931
932 del_timer_sync(&ptp_data->extts_timer);
933 ptp_cancel_worker_sync(ptp_data->clock);
934 skb_queue_purge(&ptp_data->skb_txtstamp_queue);
935 skb_queue_purge(&ptp_data->skb_rxtstamp_queue);
936 ptp_clock_unregister(ptp_data->clock);
937 ptp_data->clock = NULL;
938}
939
940void sja1105_ptp_txtstamp_skb(struct dsa_switch *ds, int port,
941 struct sk_buff *skb)
942{
943 struct sja1105_private *priv = ds->priv;
944 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
945 struct skb_shared_hwtstamps shwt = {0};
946 u64 ticks, ts;
947 int rc;
948
949 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
950
951 mutex_lock(&ptp_data->lock);
952
953 rc = sja1105_ptpegr_ts_poll(ds, port, &ts);
954 if (rc < 0) {
955 dev_err(ds->dev, "timed out polling for tstamp\n");
956 kfree_skb(skb);
957 goto out;
958 }
959
960 rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
961 if (rc < 0) {
962 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
963 kfree_skb(skb);
964 goto out;
965 }
966
967 ts = sja1105_tstamp_reconstruct(ds, ticks, ts);
968
969 shwt.hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
970 skb_complete_tx_timestamp(skb, &shwt);
971
972out:
973 mutex_unlock(&ptp_data->lock);
974}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>
3 */
4#include <linux/spi/spi.h>
5#include "sja1105.h"
6
7/* The adjfine API clamps ppb between [-32,768,000, 32,768,000], and
8 * therefore scaled_ppm between [-2,147,483,648, 2,147,483,647].
9 * Set the maximum supported ppb to a round value smaller than the maximum.
10 *
11 * Percentually speaking, this is a +/- 0.032x adjustment of the
12 * free-running counter (0.968x to 1.032x).
13 */
14#define SJA1105_MAX_ADJ_PPB 32000000
15#define SJA1105_SIZE_PTP_CMD 4
16
17/* PTPSYNCTS has no interrupt or update mechanism, because the intended
18 * hardware use case is for the timestamp to be collected synchronously,
19 * immediately after the CAS_MASTER SJA1105 switch has performed a CASSYNC
20 * one-shot toggle (no return to level) on the PTP_CLK pin. When used as a
21 * generic extts source, the PTPSYNCTS register needs polling and a comparison
22 * with the old value. The polling interval is configured as the Nyquist rate
23 * of a signal with 50% duty cycle and 1Hz frequency, which is sadly all that
24 * this hardware can do (but may be enough for some setups). Anything of higher
25 * frequency than 1 Hz will be lost, since there is no timestamp FIFO.
26 */
27#define SJA1105_EXTTS_INTERVAL (HZ / 6)
28
29/* This range is actually +/- SJA1105_MAX_ADJ_PPB
30 * divided by 1000 (ppb -> ppm) and with a 16-bit
31 * "fractional" part (actually fixed point).
32 * |
33 * v
34 * Convert scaled_ppm from the +/- ((10^6) << 16) range
35 * into the +/- (1 << 31) range.
36 *
37 * This forgoes a "ppb" numeric representation (up to NSEC_PER_SEC)
38 * and defines the scaling factor between scaled_ppm and the actual
39 * frequency adjustments of the PHC.
40 *
41 * ptpclkrate = scaled_ppm * 2^31 / (10^6 * 2^16)
42 * simplifies to
43 * ptpclkrate = scaled_ppm * 2^9 / 5^6
44 */
45#define SJA1105_CC_MULT_NUM (1 << 9)
46#define SJA1105_CC_MULT_DEM 15625
47#define SJA1105_CC_MULT 0x80000000
48
49enum sja1105_ptp_clk_mode {
50 PTP_ADD_MODE = 1,
51 PTP_SET_MODE = 0,
52};
53
54#define extts_to_data(t) \
55 container_of((t), struct sja1105_ptp_data, extts_timer)
56#define ptp_caps_to_data(d) \
57 container_of((d), struct sja1105_ptp_data, caps)
58#define ptp_data_to_sja1105(d) \
59 container_of((d), struct sja1105_private, ptp_data)
60
61/* Must be called only with priv->tagger_data.state bit
62 * SJA1105_HWTS_RX_EN cleared
63 */
64static int sja1105_change_rxtstamping(struct sja1105_private *priv,
65 bool on)
66{
67 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
68 struct sja1105_general_params_entry *general_params;
69 struct sja1105_table *table;
70
71 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
72 general_params = table->entries;
73 general_params->send_meta1 = on;
74 general_params->send_meta0 = on;
75
76 /* Initialize the meta state machine to a known state */
77 if (priv->tagger_data.stampable_skb) {
78 kfree_skb(priv->tagger_data.stampable_skb);
79 priv->tagger_data.stampable_skb = NULL;
80 }
81 ptp_cancel_worker_sync(ptp_data->clock);
82 skb_queue_purge(&ptp_data->skb_txtstamp_queue);
83 skb_queue_purge(&ptp_data->skb_rxtstamp_queue);
84
85 return sja1105_static_config_reload(priv, SJA1105_RX_HWTSTAMPING);
86}
87
88int sja1105_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr)
89{
90 struct sja1105_private *priv = ds->priv;
91 struct hwtstamp_config config;
92 bool rx_on;
93 int rc;
94
95 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
96 return -EFAULT;
97
98 switch (config.tx_type) {
99 case HWTSTAMP_TX_OFF:
100 priv->ports[port].hwts_tx_en = false;
101 break;
102 case HWTSTAMP_TX_ON:
103 priv->ports[port].hwts_tx_en = true;
104 break;
105 default:
106 return -ERANGE;
107 }
108
109 switch (config.rx_filter) {
110 case HWTSTAMP_FILTER_NONE:
111 rx_on = false;
112 break;
113 default:
114 rx_on = true;
115 break;
116 }
117
118 if (rx_on != test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state)) {
119 clear_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state);
120
121 rc = sja1105_change_rxtstamping(priv, rx_on);
122 if (rc < 0) {
123 dev_err(ds->dev,
124 "Failed to change RX timestamping: %d\n", rc);
125 return rc;
126 }
127 if (rx_on)
128 set_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state);
129 }
130
131 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
132 return -EFAULT;
133 return 0;
134}
135
136int sja1105_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr)
137{
138 struct sja1105_private *priv = ds->priv;
139 struct hwtstamp_config config;
140
141 config.flags = 0;
142 if (priv->ports[port].hwts_tx_en)
143 config.tx_type = HWTSTAMP_TX_ON;
144 else
145 config.tx_type = HWTSTAMP_TX_OFF;
146 if (test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state))
147 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
148 else
149 config.rx_filter = HWTSTAMP_FILTER_NONE;
150
151 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
152 -EFAULT : 0;
153}
154
155int sja1105_get_ts_info(struct dsa_switch *ds, int port,
156 struct ethtool_ts_info *info)
157{
158 struct sja1105_private *priv = ds->priv;
159 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
160
161 /* Called during cleanup */
162 if (!ptp_data->clock)
163 return -ENODEV;
164
165 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
166 SOF_TIMESTAMPING_RX_HARDWARE |
167 SOF_TIMESTAMPING_RAW_HARDWARE;
168 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
169 (1 << HWTSTAMP_TX_ON);
170 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
171 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
172 info->phc_index = ptp_clock_index(ptp_data->clock);
173 return 0;
174}
175
176void sja1105et_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,
177 enum packing_op op)
178{
179 const int size = SJA1105_SIZE_PTP_CMD;
180 /* No need to keep this as part of the structure */
181 u64 valid = 1;
182
183 sja1105_packing(buf, &valid, 31, 31, size, op);
184 sja1105_packing(buf, &cmd->ptpstrtsch, 30, 30, size, op);
185 sja1105_packing(buf, &cmd->ptpstopsch, 29, 29, size, op);
186 sja1105_packing(buf, &cmd->startptpcp, 28, 28, size, op);
187 sja1105_packing(buf, &cmd->stopptpcp, 27, 27, size, op);
188 sja1105_packing(buf, &cmd->resptp, 2, 2, size, op);
189 sja1105_packing(buf, &cmd->corrclk4ts, 1, 1, size, op);
190 sja1105_packing(buf, &cmd->ptpclkadd, 0, 0, size, op);
191}
192
193void sja1105pqrs_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,
194 enum packing_op op)
195{
196 const int size = SJA1105_SIZE_PTP_CMD;
197 /* No need to keep this as part of the structure */
198 u64 valid = 1;
199
200 sja1105_packing(buf, &valid, 31, 31, size, op);
201 sja1105_packing(buf, &cmd->ptpstrtsch, 30, 30, size, op);
202 sja1105_packing(buf, &cmd->ptpstopsch, 29, 29, size, op);
203 sja1105_packing(buf, &cmd->startptpcp, 28, 28, size, op);
204 sja1105_packing(buf, &cmd->stopptpcp, 27, 27, size, op);
205 sja1105_packing(buf, &cmd->resptp, 3, 3, size, op);
206 sja1105_packing(buf, &cmd->corrclk4ts, 2, 2, size, op);
207 sja1105_packing(buf, &cmd->ptpclkadd, 0, 0, size, op);
208}
209
210int sja1105_ptp_commit(struct dsa_switch *ds, struct sja1105_ptp_cmd *cmd,
211 sja1105_spi_rw_mode_t rw)
212{
213 const struct sja1105_private *priv = ds->priv;
214 const struct sja1105_regs *regs = priv->info->regs;
215 u8 buf[SJA1105_SIZE_PTP_CMD] = {0};
216 int rc;
217
218 if (rw == SPI_WRITE)
219 priv->info->ptp_cmd_packing(buf, cmd, PACK);
220
221 rc = sja1105_xfer_buf(priv, rw, regs->ptp_control, buf,
222 SJA1105_SIZE_PTP_CMD);
223
224 if (rw == SPI_READ)
225 priv->info->ptp_cmd_packing(buf, cmd, UNPACK);
226
227 return rc;
228}
229
230/* The switch returns partial timestamps (24 bits for SJA1105 E/T, which wrap
231 * around in 0.135 seconds, and 32 bits for P/Q/R/S, wrapping around in 34.35
232 * seconds).
233 *
234 * This receives the RX or TX MAC timestamps, provided by hardware as
235 * the lower bits of the cycle counter, sampled at the time the timestamp was
236 * collected.
237 *
238 * To reconstruct into a full 64-bit-wide timestamp, the cycle counter is
239 * read and the high-order bits are filled in.
240 *
241 * Must be called within one wraparound period of the partial timestamp since
242 * it was generated by the MAC.
243 */
244static u64 sja1105_tstamp_reconstruct(struct dsa_switch *ds, u64 now,
245 u64 ts_partial)
246{
247 struct sja1105_private *priv = ds->priv;
248 u64 partial_tstamp_mask = CYCLECOUNTER_MASK(priv->info->ptp_ts_bits);
249 u64 ts_reconstructed;
250
251 ts_reconstructed = (now & ~partial_tstamp_mask) | ts_partial;
252
253 /* Check lower bits of current cycle counter against the timestamp.
254 * If the current cycle counter is lower than the partial timestamp,
255 * then wraparound surely occurred and must be accounted for.
256 */
257 if ((now & partial_tstamp_mask) <= ts_partial)
258 ts_reconstructed -= (partial_tstamp_mask + 1);
259
260 return ts_reconstructed;
261}
262
263/* Reads the SPI interface for an egress timestamp generated by the switch
264 * for frames sent using management routes.
265 *
266 * SJA1105 E/T layout of the 4-byte SPI payload:
267 *
268 * 31 23 15 7 0
269 * | | | | |
270 * +-----+-----+-----+ ^
271 * ^ |
272 * | |
273 * 24-bit timestamp Update bit
274 *
275 *
276 * SJA1105 P/Q/R/S layout of the 8-byte SPI payload:
277 *
278 * 31 23 15 7 0 63 55 47 39 32
279 * | | | | | | | | | |
280 * ^ +-----+-----+-----+-----+
281 * | ^
282 * | |
283 * Update bit 32-bit timestamp
284 *
285 * Notice that the update bit is in the same place.
286 * To have common code for E/T and P/Q/R/S for reading the timestamp,
287 * we need to juggle with the offset and the bit indices.
288 */
289static int sja1105_ptpegr_ts_poll(struct dsa_switch *ds, int port, u64 *ts)
290{
291 struct sja1105_private *priv = ds->priv;
292 const struct sja1105_regs *regs = priv->info->regs;
293 int tstamp_bit_start, tstamp_bit_end;
294 int timeout = 10;
295 u8 packed_buf[8];
296 u64 update;
297 int rc;
298
299 do {
300 rc = sja1105_xfer_buf(priv, SPI_READ, regs->ptpegr_ts[port],
301 packed_buf, priv->info->ptpegr_ts_bytes);
302 if (rc < 0)
303 return rc;
304
305 sja1105_unpack(packed_buf, &update, 0, 0,
306 priv->info->ptpegr_ts_bytes);
307 if (update)
308 break;
309
310 usleep_range(10, 50);
311 } while (--timeout);
312
313 if (!timeout)
314 return -ETIMEDOUT;
315
316 /* Point the end bit to the second 32-bit word on P/Q/R/S,
317 * no-op on E/T.
318 */
319 tstamp_bit_end = (priv->info->ptpegr_ts_bytes - 4) * 8;
320 /* Shift the 24-bit timestamp on E/T to be collected from 31:8.
321 * No-op on P/Q/R/S.
322 */
323 tstamp_bit_end += 32 - priv->info->ptp_ts_bits;
324 tstamp_bit_start = tstamp_bit_end + priv->info->ptp_ts_bits - 1;
325
326 *ts = 0;
327
328 sja1105_unpack(packed_buf, ts, tstamp_bit_start, tstamp_bit_end,
329 priv->info->ptpegr_ts_bytes);
330
331 return 0;
332}
333
334/* Caller must hold ptp_data->lock */
335static int sja1105_ptpclkval_read(struct sja1105_private *priv, u64 *ticks,
336 struct ptp_system_timestamp *ptp_sts)
337{
338 const struct sja1105_regs *regs = priv->info->regs;
339
340 return sja1105_xfer_u64(priv, SPI_READ, regs->ptpclkval, ticks,
341 ptp_sts);
342}
343
344/* Caller must hold ptp_data->lock */
345static int sja1105_ptpclkval_write(struct sja1105_private *priv, u64 ticks,
346 struct ptp_system_timestamp *ptp_sts)
347{
348 const struct sja1105_regs *regs = priv->info->regs;
349
350 return sja1105_xfer_u64(priv, SPI_WRITE, regs->ptpclkval, &ticks,
351 ptp_sts);
352}
353
354static void sja1105_extts_poll(struct sja1105_private *priv)
355{
356 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
357 const struct sja1105_regs *regs = priv->info->regs;
358 struct ptp_clock_event event;
359 u64 ptpsyncts = 0;
360 int rc;
361
362 rc = sja1105_xfer_u64(priv, SPI_READ, regs->ptpsyncts, &ptpsyncts,
363 NULL);
364 if (rc < 0)
365 dev_err_ratelimited(priv->ds->dev,
366 "Failed to read PTPSYNCTS: %d\n", rc);
367
368 if (ptpsyncts && ptp_data->ptpsyncts != ptpsyncts) {
369 event.index = 0;
370 event.type = PTP_CLOCK_EXTTS;
371 event.timestamp = ns_to_ktime(sja1105_ticks_to_ns(ptpsyncts));
372 ptp_clock_event(ptp_data->clock, &event);
373
374 ptp_data->ptpsyncts = ptpsyncts;
375 }
376}
377
378static long sja1105_rxtstamp_work(struct ptp_clock_info *ptp)
379{
380 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
381 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
382 struct dsa_switch *ds = priv->ds;
383 struct sk_buff *skb;
384
385 mutex_lock(&ptp_data->lock);
386
387 while ((skb = skb_dequeue(&ptp_data->skb_rxtstamp_queue)) != NULL) {
388 struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);
389 u64 ticks, ts;
390 int rc;
391
392 rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
393 if (rc < 0) {
394 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
395 kfree_skb(skb);
396 continue;
397 }
398
399 *shwt = (struct skb_shared_hwtstamps) {0};
400
401 ts = SJA1105_SKB_CB(skb)->tstamp;
402 ts = sja1105_tstamp_reconstruct(ds, ticks, ts);
403
404 shwt->hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
405 netif_rx_ni(skb);
406 }
407
408 if (ptp_data->extts_enabled)
409 sja1105_extts_poll(priv);
410
411 mutex_unlock(&ptp_data->lock);
412
413 /* Don't restart */
414 return -1;
415}
416
417bool sja1105_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
418{
419 struct sja1105_private *priv = ds->priv;
420 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
421
422 if (!test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state))
423 return false;
424
425 /* We need to read the full PTP clock to reconstruct the Rx
426 * timestamp. For that we need a sleepable context.
427 */
428 skb_queue_tail(&ptp_data->skb_rxtstamp_queue, skb);
429 ptp_schedule_worker(ptp_data->clock, 0);
430 return true;
431}
432
433bool sja1110_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
434{
435 struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);
436 u64 ts = SJA1105_SKB_CB(skb)->tstamp;
437
438 *shwt = (struct skb_shared_hwtstamps) {0};
439
440 shwt->hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
441
442 /* Don't defer */
443 return false;
444}
445
446/* Called from dsa_skb_defer_rx_timestamp */
447bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,
448 struct sk_buff *skb, unsigned int type)
449{
450 struct sja1105_private *priv = ds->priv;
451
452 return priv->info->rxtstamp(ds, port, skb);
453}
454
455void sja1110_process_meta_tstamp(struct dsa_switch *ds, int port, u8 ts_id,
456 enum sja1110_meta_tstamp dir, u64 tstamp)
457{
458 struct sja1105_private *priv = ds->priv;
459 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
460 struct sk_buff *skb, *skb_tmp, *skb_match = NULL;
461 struct skb_shared_hwtstamps shwt = {0};
462
463 /* We don't care about RX timestamps on the CPU port */
464 if (dir == SJA1110_META_TSTAMP_RX)
465 return;
466
467 spin_lock(&ptp_data->skb_txtstamp_queue.lock);
468
469 skb_queue_walk_safe(&ptp_data->skb_txtstamp_queue, skb, skb_tmp) {
470 if (SJA1105_SKB_CB(skb)->ts_id != ts_id)
471 continue;
472
473 __skb_unlink(skb, &ptp_data->skb_txtstamp_queue);
474 skb_match = skb;
475
476 break;
477 }
478
479 spin_unlock(&ptp_data->skb_txtstamp_queue.lock);
480
481 if (WARN_ON(!skb_match))
482 return;
483
484 shwt.hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(tstamp));
485 skb_complete_tx_timestamp(skb_match, &shwt);
486}
487EXPORT_SYMBOL_GPL(sja1110_process_meta_tstamp);
488
489/* In addition to cloning the skb which is done by the common
490 * sja1105_port_txtstamp, we need to generate a timestamp ID and save the
491 * packet to the TX timestamping queue.
492 */
493void sja1110_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
494{
495 struct sk_buff *clone = SJA1105_SKB_CB(skb)->clone;
496 struct sja1105_private *priv = ds->priv;
497 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
498 struct sja1105_port *sp = &priv->ports[port];
499 u8 ts_id;
500
501 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
502
503 spin_lock(&sp->data->meta_lock);
504
505 ts_id = sp->data->ts_id;
506 /* Deal automatically with 8-bit wraparound */
507 sp->data->ts_id++;
508
509 SJA1105_SKB_CB(clone)->ts_id = ts_id;
510
511 spin_unlock(&sp->data->meta_lock);
512
513 skb_queue_tail(&ptp_data->skb_txtstamp_queue, clone);
514}
515
516/* Called from dsa_skb_tx_timestamp. This callback is just to clone
517 * the skb and have it available in SJA1105_SKB_CB in the .port_deferred_xmit
518 * callback, where we will timestamp it synchronously.
519 */
520void sja1105_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
521{
522 struct sja1105_private *priv = ds->priv;
523 struct sja1105_port *sp = &priv->ports[port];
524 struct sk_buff *clone;
525
526 if (!sp->hwts_tx_en)
527 return;
528
529 clone = skb_clone_sk(skb);
530 if (!clone)
531 return;
532
533 SJA1105_SKB_CB(skb)->clone = clone;
534
535 if (priv->info->txtstamp)
536 priv->info->txtstamp(ds, port, skb);
537}
538
539static int sja1105_ptp_reset(struct dsa_switch *ds)
540{
541 struct sja1105_private *priv = ds->priv;
542 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
543 struct sja1105_ptp_cmd cmd = ptp_data->cmd;
544 int rc;
545
546 mutex_lock(&ptp_data->lock);
547
548 cmd.resptp = 1;
549
550 dev_dbg(ds->dev, "Resetting PTP clock\n");
551 rc = sja1105_ptp_commit(ds, &cmd, SPI_WRITE);
552
553 sja1105_tas_clockstep(priv->ds);
554
555 mutex_unlock(&ptp_data->lock);
556
557 return rc;
558}
559
560/* Caller must hold ptp_data->lock */
561int __sja1105_ptp_gettimex(struct dsa_switch *ds, u64 *ns,
562 struct ptp_system_timestamp *ptp_sts)
563{
564 struct sja1105_private *priv = ds->priv;
565 u64 ticks;
566 int rc;
567
568 rc = sja1105_ptpclkval_read(priv, &ticks, ptp_sts);
569 if (rc < 0) {
570 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
571 return rc;
572 }
573
574 *ns = sja1105_ticks_to_ns(ticks);
575
576 return 0;
577}
578
579static int sja1105_ptp_gettimex(struct ptp_clock_info *ptp,
580 struct timespec64 *ts,
581 struct ptp_system_timestamp *ptp_sts)
582{
583 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
584 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
585 u64 now = 0;
586 int rc;
587
588 mutex_lock(&ptp_data->lock);
589
590 rc = __sja1105_ptp_gettimex(priv->ds, &now, ptp_sts);
591 *ts = ns_to_timespec64(now);
592
593 mutex_unlock(&ptp_data->lock);
594
595 return rc;
596}
597
598/* Caller must hold ptp_data->lock */
599static int sja1105_ptp_mode_set(struct sja1105_private *priv,
600 enum sja1105_ptp_clk_mode mode)
601{
602 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
603
604 if (ptp_data->cmd.ptpclkadd == mode)
605 return 0;
606
607 ptp_data->cmd.ptpclkadd = mode;
608
609 return sja1105_ptp_commit(priv->ds, &ptp_data->cmd, SPI_WRITE);
610}
611
612/* Write to PTPCLKVAL while PTPCLKADD is 0 */
613int __sja1105_ptp_settime(struct dsa_switch *ds, u64 ns,
614 struct ptp_system_timestamp *ptp_sts)
615{
616 struct sja1105_private *priv = ds->priv;
617 u64 ticks = ns_to_sja1105_ticks(ns);
618 int rc;
619
620 rc = sja1105_ptp_mode_set(priv, PTP_SET_MODE);
621 if (rc < 0) {
622 dev_err(priv->ds->dev, "Failed to put PTPCLK in set mode\n");
623 return rc;
624 }
625
626 rc = sja1105_ptpclkval_write(priv, ticks, ptp_sts);
627
628 sja1105_tas_clockstep(priv->ds);
629
630 return rc;
631}
632
633static int sja1105_ptp_settime(struct ptp_clock_info *ptp,
634 const struct timespec64 *ts)
635{
636 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
637 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
638 u64 ns = timespec64_to_ns(ts);
639 int rc;
640
641 mutex_lock(&ptp_data->lock);
642
643 rc = __sja1105_ptp_settime(priv->ds, ns, NULL);
644
645 mutex_unlock(&ptp_data->lock);
646
647 return rc;
648}
649
650static int sja1105_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
651{
652 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
653 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
654 const struct sja1105_regs *regs = priv->info->regs;
655 u32 clkrate32;
656 s64 clkrate;
657 int rc;
658
659 clkrate = (s64)scaled_ppm * SJA1105_CC_MULT_NUM;
660 clkrate = div_s64(clkrate, SJA1105_CC_MULT_DEM);
661
662 /* Take a +/- value and re-center it around 2^31. */
663 clkrate = SJA1105_CC_MULT + clkrate;
664 WARN_ON(abs(clkrate) >= GENMASK_ULL(31, 0));
665 clkrate32 = clkrate;
666
667 mutex_lock(&ptp_data->lock);
668
669 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptpclkrate, &clkrate32,
670 NULL);
671
672 sja1105_tas_adjfreq(priv->ds);
673
674 mutex_unlock(&ptp_data->lock);
675
676 return rc;
677}
678
679/* Write to PTPCLKVAL while PTPCLKADD is 1 */
680int __sja1105_ptp_adjtime(struct dsa_switch *ds, s64 delta)
681{
682 struct sja1105_private *priv = ds->priv;
683 s64 ticks = ns_to_sja1105_ticks(delta);
684 int rc;
685
686 rc = sja1105_ptp_mode_set(priv, PTP_ADD_MODE);
687 if (rc < 0) {
688 dev_err(priv->ds->dev, "Failed to put PTPCLK in add mode\n");
689 return rc;
690 }
691
692 rc = sja1105_ptpclkval_write(priv, ticks, NULL);
693
694 sja1105_tas_clockstep(priv->ds);
695
696 return rc;
697}
698
699static int sja1105_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
700{
701 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
702 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
703 int rc;
704
705 mutex_lock(&ptp_data->lock);
706
707 rc = __sja1105_ptp_adjtime(priv->ds, delta);
708
709 mutex_unlock(&ptp_data->lock);
710
711 return rc;
712}
713
714static void sja1105_ptp_extts_setup_timer(struct sja1105_ptp_data *ptp_data)
715{
716 unsigned long expires = ((jiffies / SJA1105_EXTTS_INTERVAL) + 1) *
717 SJA1105_EXTTS_INTERVAL;
718
719 mod_timer(&ptp_data->extts_timer, expires);
720}
721
722static void sja1105_ptp_extts_timer(struct timer_list *t)
723{
724 struct sja1105_ptp_data *ptp_data = extts_to_data(t);
725
726 ptp_schedule_worker(ptp_data->clock, 0);
727
728 sja1105_ptp_extts_setup_timer(ptp_data);
729}
730
731static int sja1105_change_ptp_clk_pin_func(struct sja1105_private *priv,
732 enum ptp_pin_function func)
733{
734 struct sja1105_avb_params_entry *avb;
735 enum ptp_pin_function old_func;
736
737 avb = priv->static_config.tables[BLK_IDX_AVB_PARAMS].entries;
738
739 if (priv->info->device_id == SJA1105E_DEVICE_ID ||
740 priv->info->device_id == SJA1105T_DEVICE_ID ||
741 avb->cas_master)
742 old_func = PTP_PF_PEROUT;
743 else
744 old_func = PTP_PF_EXTTS;
745
746 if (func == old_func)
747 return 0;
748
749 avb->cas_master = (func == PTP_PF_PEROUT);
750
751 return sja1105_dynamic_config_write(priv, BLK_IDX_AVB_PARAMS, 0, avb,
752 true);
753}
754
755/* The PTP_CLK pin may be configured to toggle with a 50% duty cycle and a
756 * frequency f:
757 *
758 * NSEC_PER_SEC
759 * f = ----------------------
760 * (PTPPINDUR * 8 ns) * 2
761 */
762static int sja1105_per_out_enable(struct sja1105_private *priv,
763 struct ptp_perout_request *perout,
764 bool on)
765{
766 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
767 const struct sja1105_regs *regs = priv->info->regs;
768 struct sja1105_ptp_cmd cmd = ptp_data->cmd;
769 int rc;
770
771 /* We only support one channel */
772 if (perout->index != 0)
773 return -EOPNOTSUPP;
774
775 /* Reject requests with unsupported flags */
776 if (perout->flags)
777 return -EOPNOTSUPP;
778
779 mutex_lock(&ptp_data->lock);
780
781 rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_PEROUT);
782 if (rc)
783 goto out;
784
785 if (on) {
786 struct timespec64 pin_duration_ts = {
787 .tv_sec = perout->period.sec,
788 .tv_nsec = perout->period.nsec,
789 };
790 struct timespec64 pin_start_ts = {
791 .tv_sec = perout->start.sec,
792 .tv_nsec = perout->start.nsec,
793 };
794 u64 pin_duration = timespec64_to_ns(&pin_duration_ts);
795 u64 pin_start = timespec64_to_ns(&pin_start_ts);
796 u32 pin_duration32;
797 u64 now;
798
799 /* ptppindur: 32 bit register which holds the interval between
800 * 2 edges on PTP_CLK. So check for truncation which happens
801 * at periods larger than around 68.7 seconds.
802 */
803 pin_duration = ns_to_sja1105_ticks(pin_duration / 2);
804 if (pin_duration > U32_MAX) {
805 rc = -ERANGE;
806 goto out;
807 }
808 pin_duration32 = pin_duration;
809
810 /* ptppins: 64 bit register which needs to hold a PTP time
811 * larger than the current time, otherwise the startptpcp
812 * command won't do anything. So advance the current time
813 * by a number of periods in a way that won't alter the
814 * phase offset.
815 */
816 rc = __sja1105_ptp_gettimex(priv->ds, &now, NULL);
817 if (rc < 0)
818 goto out;
819
820 pin_start = future_base_time(pin_start, pin_duration,
821 now + 1ull * NSEC_PER_SEC);
822 pin_start = ns_to_sja1105_ticks(pin_start);
823
824 rc = sja1105_xfer_u64(priv, SPI_WRITE, regs->ptppinst,
825 &pin_start, NULL);
826 if (rc < 0)
827 goto out;
828
829 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptppindur,
830 &pin_duration32, NULL);
831 if (rc < 0)
832 goto out;
833 }
834
835 if (on)
836 cmd.startptpcp = true;
837 else
838 cmd.stopptpcp = true;
839
840 rc = sja1105_ptp_commit(priv->ds, &cmd, SPI_WRITE);
841
842out:
843 mutex_unlock(&ptp_data->lock);
844
845 return rc;
846}
847
848static int sja1105_extts_enable(struct sja1105_private *priv,
849 struct ptp_extts_request *extts,
850 bool on)
851{
852 int rc;
853
854 /* We only support one channel */
855 if (extts->index != 0)
856 return -EOPNOTSUPP;
857
858 /* Reject requests with unsupported flags */
859 if (extts->flags & ~(PTP_ENABLE_FEATURE |
860 PTP_RISING_EDGE |
861 PTP_FALLING_EDGE |
862 PTP_STRICT_FLAGS))
863 return -EOPNOTSUPP;
864
865 /* We can only enable time stamping on both edges, sadly. */
866 if ((extts->flags & PTP_STRICT_FLAGS) &&
867 (extts->flags & PTP_ENABLE_FEATURE) &&
868 (extts->flags & PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES)
869 return -EOPNOTSUPP;
870
871 rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_EXTTS);
872 if (rc)
873 return rc;
874
875 priv->ptp_data.extts_enabled = on;
876
877 if (on)
878 sja1105_ptp_extts_setup_timer(&priv->ptp_data);
879 else
880 del_timer_sync(&priv->ptp_data.extts_timer);
881
882 return 0;
883}
884
885static int sja1105_ptp_enable(struct ptp_clock_info *ptp,
886 struct ptp_clock_request *req, int on)
887{
888 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
889 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
890 int rc = -EOPNOTSUPP;
891
892 if (req->type == PTP_CLK_REQ_PEROUT)
893 rc = sja1105_per_out_enable(priv, &req->perout, on);
894 else if (req->type == PTP_CLK_REQ_EXTTS)
895 rc = sja1105_extts_enable(priv, &req->extts, on);
896
897 return rc;
898}
899
900static int sja1105_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
901 enum ptp_pin_function func, unsigned int chan)
902{
903 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
904 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
905
906 if (chan != 0 || pin != 0)
907 return -1;
908
909 switch (func) {
910 case PTP_PF_NONE:
911 case PTP_PF_PEROUT:
912 break;
913 case PTP_PF_EXTTS:
914 if (priv->info->device_id == SJA1105E_DEVICE_ID ||
915 priv->info->device_id == SJA1105T_DEVICE_ID)
916 return -1;
917 break;
918 default:
919 return -1;
920 }
921 return 0;
922}
923
924static struct ptp_pin_desc sja1105_ptp_pin = {
925 .name = "ptp_clk",
926 .index = 0,
927 .func = PTP_PF_NONE,
928};
929
930int sja1105_ptp_clock_register(struct dsa_switch *ds)
931{
932 struct sja1105_private *priv = ds->priv;
933 struct sja1105_tagger_data *tagger_data = &priv->tagger_data;
934 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
935
936 ptp_data->caps = (struct ptp_clock_info) {
937 .owner = THIS_MODULE,
938 .name = "SJA1105 PHC",
939 .adjfine = sja1105_ptp_adjfine,
940 .adjtime = sja1105_ptp_adjtime,
941 .gettimex64 = sja1105_ptp_gettimex,
942 .settime64 = sja1105_ptp_settime,
943 .enable = sja1105_ptp_enable,
944 .verify = sja1105_ptp_verify_pin,
945 .do_aux_work = sja1105_rxtstamp_work,
946 .max_adj = SJA1105_MAX_ADJ_PPB,
947 .pin_config = &sja1105_ptp_pin,
948 .n_pins = 1,
949 .n_ext_ts = 1,
950 .n_per_out = 1,
951 };
952
953 /* Only used on SJA1105 */
954 skb_queue_head_init(&ptp_data->skb_rxtstamp_queue);
955 /* Only used on SJA1110 */
956 skb_queue_head_init(&ptp_data->skb_txtstamp_queue);
957 spin_lock_init(&tagger_data->meta_lock);
958
959 ptp_data->clock = ptp_clock_register(&ptp_data->caps, ds->dev);
960 if (IS_ERR_OR_NULL(ptp_data->clock))
961 return PTR_ERR(ptp_data->clock);
962
963 ptp_data->cmd.corrclk4ts = true;
964 ptp_data->cmd.ptpclkadd = PTP_SET_MODE;
965
966 timer_setup(&ptp_data->extts_timer, sja1105_ptp_extts_timer, 0);
967
968 return sja1105_ptp_reset(ds);
969}
970
971void sja1105_ptp_clock_unregister(struct dsa_switch *ds)
972{
973 struct sja1105_private *priv = ds->priv;
974 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
975
976 if (IS_ERR_OR_NULL(ptp_data->clock))
977 return;
978
979 del_timer_sync(&ptp_data->extts_timer);
980 ptp_cancel_worker_sync(ptp_data->clock);
981 skb_queue_purge(&ptp_data->skb_txtstamp_queue);
982 skb_queue_purge(&ptp_data->skb_rxtstamp_queue);
983 ptp_clock_unregister(ptp_data->clock);
984 ptp_data->clock = NULL;
985}
986
987void sja1105_ptp_txtstamp_skb(struct dsa_switch *ds, int port,
988 struct sk_buff *skb)
989{
990 struct sja1105_private *priv = ds->priv;
991 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
992 struct skb_shared_hwtstamps shwt = {0};
993 u64 ticks, ts;
994 int rc;
995
996 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
997
998 mutex_lock(&ptp_data->lock);
999
1000 rc = sja1105_ptpegr_ts_poll(ds, port, &ts);
1001 if (rc < 0) {
1002 dev_err(ds->dev, "timed out polling for tstamp\n");
1003 kfree_skb(skb);
1004 goto out;
1005 }
1006
1007 rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
1008 if (rc < 0) {
1009 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
1010 kfree_skb(skb);
1011 goto out;
1012 }
1013
1014 ts = sja1105_tstamp_reconstruct(ds, ticks, ts);
1015
1016 shwt.hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
1017 skb_complete_tx_timestamp(skb, &shwt);
1018
1019out:
1020 mutex_unlock(&ptp_data->lock);
1021}