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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
5 */
6
7#include <linux/bitfield.h>
8#include <linux/mtd/spi-nor.h>
9#include <linux/slab.h>
10#include <linux/sort.h>
11
12#include "core.h"
13
14#define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
15#define SFDP_PARAM_HEADER_PTP(p) \
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19#define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
20
21#define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */
22#define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
23#define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
24#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */
25#define SFDP_SCCR_MAP_ID 0xff87 /*
26 * Status, Control and Configuration
27 * Register Map.
28 */
29#define SFDP_SCCR_MAP_MC_ID 0xff88 /*
30 * Status, Control and Configuration
31 * Register Map Offsets for Multi-Chip
32 * SPI Memory Devices.
33 */
34
35#define SFDP_SIGNATURE 0x50444653U
36
37struct sfdp_header {
38 u32 signature; /* Ox50444653U <=> "SFDP" */
39 u8 minor;
40 u8 major;
41 u8 nph; /* 0-base number of parameter headers */
42 u8 unused;
43
44 /* Basic Flash Parameter Table. */
45 struct sfdp_parameter_header bfpt_header;
46};
47
48/* Fast Read settings. */
49struct sfdp_bfpt_read {
50 /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */
51 u32 hwcaps;
52
53 /*
54 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us
55 * whether the Fast Read x-y-z command is supported.
56 */
57 u32 supported_dword;
58 u32 supported_bit;
59
60 /*
61 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD
62 * encodes the op code, the number of mode clocks and the number of wait
63 * states to be used by Fast Read x-y-z command.
64 */
65 u32 settings_dword;
66 u32 settings_shift;
67
68 /* The SPI protocol for this Fast Read x-y-z command. */
69 enum spi_nor_protocol proto;
70};
71
72struct sfdp_bfpt_erase {
73 /*
74 * The half-word at offset <shift> in DWORD <dword> encodes the
75 * op code and erase sector size to be used by Sector Erase commands.
76 */
77 u32 dword;
78 u32 shift;
79};
80
81#define SMPT_CMD_ADDRESS_LEN_MASK GENMASK(23, 22)
82#define SMPT_CMD_ADDRESS_LEN_0 (0x0UL << 22)
83#define SMPT_CMD_ADDRESS_LEN_3 (0x1UL << 22)
84#define SMPT_CMD_ADDRESS_LEN_4 (0x2UL << 22)
85#define SMPT_CMD_ADDRESS_LEN_USE_CURRENT (0x3UL << 22)
86
87#define SMPT_CMD_READ_DUMMY_MASK GENMASK(19, 16)
88#define SMPT_CMD_READ_DUMMY_SHIFT 16
89#define SMPT_CMD_READ_DUMMY(_cmd) \
90 (((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT)
91#define SMPT_CMD_READ_DUMMY_IS_VARIABLE 0xfUL
92
93#define SMPT_CMD_READ_DATA_MASK GENMASK(31, 24)
94#define SMPT_CMD_READ_DATA_SHIFT 24
95#define SMPT_CMD_READ_DATA(_cmd) \
96 (((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT)
97
98#define SMPT_CMD_OPCODE_MASK GENMASK(15, 8)
99#define SMPT_CMD_OPCODE_SHIFT 8
100#define SMPT_CMD_OPCODE(_cmd) \
101 (((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT)
102
103#define SMPT_MAP_REGION_COUNT_MASK GENMASK(23, 16)
104#define SMPT_MAP_REGION_COUNT_SHIFT 16
105#define SMPT_MAP_REGION_COUNT(_header) \
106 ((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \
107 SMPT_MAP_REGION_COUNT_SHIFT) + 1)
108
109#define SMPT_MAP_ID_MASK GENMASK(15, 8)
110#define SMPT_MAP_ID_SHIFT 8
111#define SMPT_MAP_ID(_header) \
112 (((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT)
113
114#define SMPT_MAP_REGION_SIZE_MASK GENMASK(31, 8)
115#define SMPT_MAP_REGION_SIZE_SHIFT 8
116#define SMPT_MAP_REGION_SIZE(_region) \
117 (((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \
118 SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256)
119
120#define SMPT_MAP_REGION_ERASE_TYPE_MASK GENMASK(3, 0)
121#define SMPT_MAP_REGION_ERASE_TYPE(_region) \
122 ((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK)
123
124#define SMPT_DESC_TYPE_MAP BIT(1)
125#define SMPT_DESC_END BIT(0)
126
127#define SFDP_4BAIT_DWORD_MAX 2
128
129struct sfdp_4bait {
130 /* The hardware capability. */
131 u32 hwcaps;
132
133 /*
134 * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether
135 * the associated 4-byte address op code is supported.
136 */
137 u32 supported_bit;
138};
139
140/**
141 * spi_nor_read_raw() - raw read of serial flash memory. read_opcode,
142 * addr_nbytes and read_dummy members of the struct spi_nor
143 * should be previously set.
144 * @nor: pointer to a 'struct spi_nor'
145 * @addr: offset in the serial flash memory
146 * @len: number of bytes to read
147 * @buf: buffer where the data is copied into (dma-safe memory)
148 *
149 * Return: 0 on success, -errno otherwise.
150 */
151static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf)
152{
153 ssize_t ret;
154
155 while (len) {
156 ret = spi_nor_read_data(nor, addr, len, buf);
157 if (ret < 0)
158 return ret;
159 if (!ret || ret > len)
160 return -EIO;
161
162 buf += ret;
163 addr += ret;
164 len -= ret;
165 }
166 return 0;
167}
168
169/**
170 * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters.
171 * @nor: pointer to a 'struct spi_nor'
172 * @addr: offset in the SFDP area to start reading data from
173 * @len: number of bytes to read
174 * @buf: buffer where the SFDP data are copied into (dma-safe memory)
175 *
176 * Whatever the actual numbers of bytes for address and dummy cycles are
177 * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always
178 * followed by a 3-byte address and 8 dummy clock cycles.
179 *
180 * Return: 0 on success, -errno otherwise.
181 */
182static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,
183 size_t len, void *buf)
184{
185 u8 addr_nbytes, read_opcode, read_dummy;
186 int ret;
187
188 read_opcode = nor->read_opcode;
189 addr_nbytes = nor->addr_nbytes;
190 read_dummy = nor->read_dummy;
191
192 nor->read_opcode = SPINOR_OP_RDSFDP;
193 nor->addr_nbytes = 3;
194 nor->read_dummy = 8;
195
196 ret = spi_nor_read_raw(nor, addr, len, buf);
197
198 nor->read_opcode = read_opcode;
199 nor->addr_nbytes = addr_nbytes;
200 nor->read_dummy = read_dummy;
201
202 return ret;
203}
204
205/**
206 * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.
207 * @nor: pointer to a 'struct spi_nor'
208 * @addr: offset in the SFDP area to start reading data from
209 * @len: number of bytes to read
210 * @buf: buffer where the SFDP data are copied into
211 *
212 * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not
213 * guaranteed to be dma-safe.
214 *
215 * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp()
216 * otherwise.
217 */
218static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr,
219 size_t len, void *buf)
220{
221 void *dma_safe_buf;
222 int ret;
223
224 dma_safe_buf = kmalloc(len, GFP_KERNEL);
225 if (!dma_safe_buf)
226 return -ENOMEM;
227
228 ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf);
229 memcpy(buf, dma_safe_buf, len);
230 kfree(dma_safe_buf);
231
232 return ret;
233}
234
235static void
236spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read,
237 u16 half,
238 enum spi_nor_protocol proto)
239{
240 read->num_mode_clocks = (half >> 5) & 0x07;
241 read->num_wait_states = (half >> 0) & 0x1f;
242 read->opcode = (half >> 8) & 0xff;
243 read->proto = proto;
244}
245
246static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = {
247 /* Fast Read 1-1-2 */
248 {
249 SNOR_HWCAPS_READ_1_1_2,
250 SFDP_DWORD(1), BIT(16), /* Supported bit */
251 SFDP_DWORD(4), 0, /* Settings */
252 SNOR_PROTO_1_1_2,
253 },
254
255 /* Fast Read 1-2-2 */
256 {
257 SNOR_HWCAPS_READ_1_2_2,
258 SFDP_DWORD(1), BIT(20), /* Supported bit */
259 SFDP_DWORD(4), 16, /* Settings */
260 SNOR_PROTO_1_2_2,
261 },
262
263 /* Fast Read 2-2-2 */
264 {
265 SNOR_HWCAPS_READ_2_2_2,
266 SFDP_DWORD(5), BIT(0), /* Supported bit */
267 SFDP_DWORD(6), 16, /* Settings */
268 SNOR_PROTO_2_2_2,
269 },
270
271 /* Fast Read 1-1-4 */
272 {
273 SNOR_HWCAPS_READ_1_1_4,
274 SFDP_DWORD(1), BIT(22), /* Supported bit */
275 SFDP_DWORD(3), 16, /* Settings */
276 SNOR_PROTO_1_1_4,
277 },
278
279 /* Fast Read 1-4-4 */
280 {
281 SNOR_HWCAPS_READ_1_4_4,
282 SFDP_DWORD(1), BIT(21), /* Supported bit */
283 SFDP_DWORD(3), 0, /* Settings */
284 SNOR_PROTO_1_4_4,
285 },
286
287 /* Fast Read 4-4-4 */
288 {
289 SNOR_HWCAPS_READ_4_4_4,
290 SFDP_DWORD(5), BIT(4), /* Supported bit */
291 SFDP_DWORD(7), 16, /* Settings */
292 SNOR_PROTO_4_4_4,
293 },
294};
295
296static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {
297 /* Erase Type 1 in DWORD8 bits[15:0] */
298 {SFDP_DWORD(8), 0},
299
300 /* Erase Type 2 in DWORD8 bits[31:16] */
301 {SFDP_DWORD(8), 16},
302
303 /* Erase Type 3 in DWORD9 bits[15:0] */
304 {SFDP_DWORD(9), 0},
305
306 /* Erase Type 4 in DWORD9 bits[31:16] */
307 {SFDP_DWORD(9), 16},
308};
309
310/**
311 * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT
312 * @erase: pointer to a structure that describes a SPI NOR erase type
313 * @size: the size of the sector/block erased by the erase type
314 * @opcode: the SPI command op code to erase the sector/block
315 * @i: erase type index as sorted in the Basic Flash Parameter Table
316 *
317 * The supported Erase Types will be sorted at init in ascending order, with
318 * the smallest Erase Type size being the first member in the erase_type array
319 * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in
320 * the Basic Flash Parameter Table since it will be used later on to
321 * synchronize with the supported Erase Types defined in SFDP optional tables.
322 */
323static void
324spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase,
325 u32 size, u8 opcode, u8 i)
326{
327 erase->idx = i;
328 spi_nor_set_erase_type(erase, size, opcode);
329}
330
331/**
332 * spi_nor_map_cmp_erase_type() - compare the map's erase types by size
333 * @l: member in the left half of the map's erase_type array
334 * @r: member in the right half of the map's erase_type array
335 *
336 * Comparison function used in the sort() call to sort in ascending order the
337 * map's erase types, the smallest erase type size being the first member in the
338 * sorted erase_type array.
339 *
340 * Return: the result of @l->size - @r->size
341 */
342static int spi_nor_map_cmp_erase_type(const void *l, const void *r)
343{
344 const struct spi_nor_erase_type *left = l, *right = r;
345
346 return left->size - right->size;
347}
348
349/**
350 * spi_nor_sort_erase_mask() - sort erase mask
351 * @map: the erase map of the SPI NOR
352 * @erase_mask: the erase type mask to be sorted
353 *
354 * Replicate the sort done for the map's erase types in BFPT: sort the erase
355 * mask in ascending order with the smallest erase type size starting from
356 * BIT(0) in the sorted erase mask.
357 *
358 * Return: sorted erase mask.
359 */
360static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask)
361{
362 struct spi_nor_erase_type *erase_type = map->erase_type;
363 int i;
364 u8 sorted_erase_mask = 0;
365
366 if (!erase_mask)
367 return 0;
368
369 /* Replicate the sort done for the map's erase types. */
370 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
371 if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx))
372 sorted_erase_mask |= BIT(i);
373
374 return sorted_erase_mask;
375}
376
377/**
378 * spi_nor_regions_sort_erase_types() - sort erase types in each region
379 * @map: the erase map of the SPI NOR
380 *
381 * Function assumes that the erase types defined in the erase map are already
382 * sorted in ascending order, with the smallest erase type size being the first
383 * member in the erase_type array. It replicates the sort done for the map's
384 * erase types. Each region's erase bitmask will indicate which erase types are
385 * supported from the sorted erase types defined in the erase map.
386 * Sort the all region's erase type at init in order to speed up the process of
387 * finding the best erase command at runtime.
388 */
389static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map)
390{
391 struct spi_nor_erase_region *region = map->regions;
392 u8 region_erase_mask, sorted_erase_mask;
393
394 while (region) {
395 region_erase_mask = region->offset & SNOR_ERASE_TYPE_MASK;
396
397 sorted_erase_mask = spi_nor_sort_erase_mask(map,
398 region_erase_mask);
399
400 /* Overwrite erase mask. */
401 region->offset = (region->offset & ~SNOR_ERASE_TYPE_MASK) |
402 sorted_erase_mask;
403
404 region = spi_nor_region_next(region);
405 }
406}
407
408/**
409 * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table.
410 * @nor: pointer to a 'struct spi_nor'
411 * @bfpt_header: pointer to the 'struct sfdp_parameter_header' describing
412 * the Basic Flash Parameter Table length and version
413 *
414 * The Basic Flash Parameter Table is the main and only mandatory table as
415 * defined by the SFDP (JESD216) specification.
416 * It provides us with the total size (memory density) of the data array and
417 * the number of address bytes for Fast Read, Page Program and Sector Erase
418 * commands.
419 * For Fast READ commands, it also gives the number of mode clock cycles and
420 * wait states (regrouped in the number of dummy clock cycles) for each
421 * supported instruction op code.
422 * For Page Program, the page size is now available since JESD216 rev A, however
423 * the supported instruction op codes are still not provided.
424 * For Sector Erase commands, this table stores the supported instruction op
425 * codes and the associated sector sizes.
426 * Finally, the Quad Enable Requirements (QER) are also available since JESD216
427 * rev A. The QER bits encode the manufacturer dependent procedure to be
428 * executed to set the Quad Enable (QE) bit in some internal register of the
429 * Quad SPI memory. Indeed the QE bit, when it exists, must be set before
430 * sending any Quad SPI command to the memory. Actually, setting the QE bit
431 * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2
432 * and IO3 hence enabling 4 (Quad) I/O lines.
433 *
434 * Return: 0 on success, -errno otherwise.
435 */
436static int spi_nor_parse_bfpt(struct spi_nor *nor,
437 const struct sfdp_parameter_header *bfpt_header)
438{
439 struct spi_nor_flash_parameter *params = nor->params;
440 struct spi_nor_erase_map *map = ¶ms->erase_map;
441 struct spi_nor_erase_type *erase_type = map->erase_type;
442 struct sfdp_bfpt bfpt;
443 size_t len;
444 int i, cmd, err;
445 u32 addr, val;
446 u32 dword;
447 u16 half;
448 u8 erase_mask;
449 u8 wait_states, mode_clocks, opcode;
450
451 /* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */
452 if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)
453 return -EINVAL;
454
455 /* Read the Basic Flash Parameter Table. */
456 len = min_t(size_t, sizeof(bfpt),
457 bfpt_header->length * sizeof(u32));
458 addr = SFDP_PARAM_HEADER_PTP(bfpt_header);
459 memset(&bfpt, 0, sizeof(bfpt));
460 err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt);
461 if (err < 0)
462 return err;
463
464 /* Fix endianness of the BFPT DWORDs. */
465 le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX);
466
467 /* Number of address bytes. */
468 switch (bfpt.dwords[SFDP_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
469 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
470 case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
471 params->addr_nbytes = 3;
472 params->addr_mode_nbytes = 3;
473 break;
474
475 case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
476 params->addr_nbytes = 4;
477 params->addr_mode_nbytes = 4;
478 break;
479
480 default:
481 break;
482 }
483
484 /* Flash Memory Density (in bits). */
485 val = bfpt.dwords[SFDP_DWORD(2)];
486 if (val & BIT(31)) {
487 val &= ~BIT(31);
488
489 /*
490 * Prevent overflows on params->size. Anyway, a NOR of 2^64
491 * bits is unlikely to exist so this error probably means
492 * the BFPT we are reading is corrupted/wrong.
493 */
494 if (val > 63)
495 return -EINVAL;
496
497 params->size = 1ULL << val;
498 } else {
499 params->size = val + 1;
500 }
501 params->size >>= 3; /* Convert to bytes. */
502
503 /* Fast Read settings. */
504 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) {
505 const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i];
506 struct spi_nor_read_command *read;
507
508 if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) {
509 params->hwcaps.mask &= ~rd->hwcaps;
510 continue;
511 }
512
513 params->hwcaps.mask |= rd->hwcaps;
514 cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps);
515 read = ¶ms->reads[cmd];
516 half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift;
517 spi_nor_set_read_settings_from_bfpt(read, half, rd->proto);
518 }
519
520 /*
521 * Sector Erase settings. Reinitialize the uniform erase map using the
522 * Erase Types defined in the bfpt table.
523 */
524 erase_mask = 0;
525 memset(¶ms->erase_map, 0, sizeof(params->erase_map));
526 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) {
527 const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i];
528 u32 erasesize;
529 u8 opcode;
530
531 half = bfpt.dwords[er->dword] >> er->shift;
532 erasesize = half & 0xff;
533
534 /* erasesize == 0 means this Erase Type is not supported. */
535 if (!erasesize)
536 continue;
537
538 erasesize = 1U << erasesize;
539 opcode = (half >> 8) & 0xff;
540 erase_mask |= BIT(i);
541 spi_nor_set_erase_settings_from_bfpt(&erase_type[i], erasesize,
542 opcode, i);
543 }
544 spi_nor_init_uniform_erase_map(map, erase_mask, params->size);
545 /*
546 * Sort all the map's Erase Types in ascending order with the smallest
547 * erase size being the first member in the erase_type array.
548 */
549 sort(erase_type, SNOR_ERASE_TYPE_MAX, sizeof(erase_type[0]),
550 spi_nor_map_cmp_erase_type, NULL);
551 /*
552 * Sort the erase types in the uniform region in order to update the
553 * uniform_erase_type bitmask. The bitmask will be used later on when
554 * selecting the uniform erase.
555 */
556 spi_nor_regions_sort_erase_types(map);
557 map->uniform_erase_type = map->uniform_region.offset &
558 SNOR_ERASE_TYPE_MASK;
559
560 /* Stop here if not JESD216 rev A or later. */
561 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216)
562 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
563
564 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */
565 val = bfpt.dwords[SFDP_DWORD(11)];
566 val &= BFPT_DWORD11_PAGE_SIZE_MASK;
567 val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;
568 params->page_size = 1U << val;
569
570 /* Quad Enable Requirements. */
571 switch (bfpt.dwords[SFDP_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
572 case BFPT_DWORD15_QER_NONE:
573 params->quad_enable = NULL;
574 break;
575
576 case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:
577 /*
578 * Writing only one byte to the Status Register has the
579 * side-effect of clearing Status Register 2.
580 */
581 case BFPT_DWORD15_QER_SR2_BIT1_NO_RD:
582 /*
583 * Read Configuration Register (35h) instruction is not
584 * supported.
585 */
586 nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR;
587 params->quad_enable = spi_nor_sr2_bit1_quad_enable;
588 break;
589
590 case BFPT_DWORD15_QER_SR1_BIT6:
591 nor->flags &= ~SNOR_F_HAS_16BIT_SR;
592 params->quad_enable = spi_nor_sr1_bit6_quad_enable;
593 break;
594
595 case BFPT_DWORD15_QER_SR2_BIT7:
596 nor->flags &= ~SNOR_F_HAS_16BIT_SR;
597 params->quad_enable = spi_nor_sr2_bit7_quad_enable;
598 break;
599
600 case BFPT_DWORD15_QER_SR2_BIT1:
601 /*
602 * JESD216 rev B or later does not specify if writing only one
603 * byte to the Status Register clears or not the Status
604 * Register 2, so let's be cautious and keep the default
605 * assumption of a 16-bit Write Status (01h) command.
606 */
607 nor->flags |= SNOR_F_HAS_16BIT_SR;
608
609 params->quad_enable = spi_nor_sr2_bit1_quad_enable;
610 break;
611
612 default:
613 dev_dbg(nor->dev, "BFPT QER reserved value used\n");
614 break;
615 }
616
617 dword = bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_4B_ADDR_MODE_MASK;
618 if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_BRWR))
619 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_brwr;
620 else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_WREN_EN4B_EX4B))
621 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_wren_en4b_ex4b;
622 else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_EN4B_EX4B))
623 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_en4b_ex4b;
624 else
625 dev_dbg(nor->dev, "BFPT: 4-Byte Address Mode method is not recognized or not implemented\n");
626
627 /* Soft Reset support. */
628 if (bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_SWRST_EN_RST)
629 nor->flags |= SNOR_F_SOFT_RESET;
630
631 /* Stop here if not JESD216 rev C or later. */
632 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
633 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
634
635 /* Parse 1-1-8 read instruction */
636 opcode = FIELD_GET(BFPT_DWORD17_RD_1_1_8_CMD, bfpt.dwords[SFDP_DWORD(17)]);
637 if (opcode) {
638 mode_clocks = FIELD_GET(BFPT_DWORD17_RD_1_1_8_MODE_CLOCKS,
639 bfpt.dwords[SFDP_DWORD(17)]);
640 wait_states = FIELD_GET(BFPT_DWORD17_RD_1_1_8_WAIT_STATES,
641 bfpt.dwords[SFDP_DWORD(17)]);
642 params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
643 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_1_8],
644 mode_clocks, wait_states, opcode,
645 SNOR_PROTO_1_1_8);
646 }
647
648 /* Parse 1-8-8 read instruction */
649 opcode = FIELD_GET(BFPT_DWORD17_RD_1_8_8_CMD, bfpt.dwords[SFDP_DWORD(17)]);
650 if (opcode) {
651 mode_clocks = FIELD_GET(BFPT_DWORD17_RD_1_8_8_MODE_CLOCKS,
652 bfpt.dwords[SFDP_DWORD(17)]);
653 wait_states = FIELD_GET(BFPT_DWORD17_RD_1_8_8_WAIT_STATES,
654 bfpt.dwords[SFDP_DWORD(17)]);
655 params->hwcaps.mask |= SNOR_HWCAPS_READ_1_8_8;
656 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_8_8],
657 mode_clocks, wait_states, opcode,
658 SNOR_PROTO_1_8_8);
659 }
660
661 /* 8D-8D-8D command extension. */
662 switch (bfpt.dwords[SFDP_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) {
663 case BFPT_DWORD18_CMD_EXT_REP:
664 nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
665 break;
666
667 case BFPT_DWORD18_CMD_EXT_INV:
668 nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
669 break;
670
671 case BFPT_DWORD18_CMD_EXT_RES:
672 dev_dbg(nor->dev, "Reserved command extension used\n");
673 break;
674
675 case BFPT_DWORD18_CMD_EXT_16B:
676 dev_dbg(nor->dev, "16-bit opcodes not supported\n");
677 return -EOPNOTSUPP;
678 }
679
680 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
681}
682
683/**
684 * spi_nor_smpt_addr_nbytes() - return the number of address bytes used in the
685 * configuration detection command.
686 * @nor: pointer to a 'struct spi_nor'
687 * @settings: configuration detection command descriptor, dword1
688 */
689static u8 spi_nor_smpt_addr_nbytes(const struct spi_nor *nor, const u32 settings)
690{
691 switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) {
692 case SMPT_CMD_ADDRESS_LEN_0:
693 return 0;
694 case SMPT_CMD_ADDRESS_LEN_3:
695 return 3;
696 case SMPT_CMD_ADDRESS_LEN_4:
697 return 4;
698 case SMPT_CMD_ADDRESS_LEN_USE_CURRENT:
699 default:
700 return nor->params->addr_mode_nbytes;
701 }
702}
703
704/**
705 * spi_nor_smpt_read_dummy() - return the configuration detection command read
706 * latency, in clock cycles.
707 * @nor: pointer to a 'struct spi_nor'
708 * @settings: configuration detection command descriptor, dword1
709 *
710 * Return: the number of dummy cycles for an SMPT read
711 */
712static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings)
713{
714 u8 read_dummy = SMPT_CMD_READ_DUMMY(settings);
715
716 if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE)
717 return nor->read_dummy;
718 return read_dummy;
719}
720
721/**
722 * spi_nor_get_map_in_use() - get the configuration map in use
723 * @nor: pointer to a 'struct spi_nor'
724 * @smpt: pointer to the sector map parameter table
725 * @smpt_len: sector map parameter table length
726 *
727 * Return: pointer to the map in use, ERR_PTR(-errno) otherwise.
728 */
729static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt,
730 u8 smpt_len)
731{
732 const u32 *ret;
733 u8 *buf;
734 u32 addr;
735 int err;
736 u8 i;
737 u8 addr_nbytes, read_opcode, read_dummy;
738 u8 read_data_mask, map_id;
739
740 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
741 buf = kmalloc(sizeof(*buf), GFP_KERNEL);
742 if (!buf)
743 return ERR_PTR(-ENOMEM);
744
745 addr_nbytes = nor->addr_nbytes;
746 read_dummy = nor->read_dummy;
747 read_opcode = nor->read_opcode;
748
749 map_id = 0;
750 /* Determine if there are any optional Detection Command Descriptors */
751 for (i = 0; i < smpt_len; i += 2) {
752 if (smpt[i] & SMPT_DESC_TYPE_MAP)
753 break;
754
755 read_data_mask = SMPT_CMD_READ_DATA(smpt[i]);
756 nor->addr_nbytes = spi_nor_smpt_addr_nbytes(nor, smpt[i]);
757 nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]);
758 nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]);
759 addr = smpt[i + 1];
760
761 err = spi_nor_read_raw(nor, addr, 1, buf);
762 if (err) {
763 ret = ERR_PTR(err);
764 goto out;
765 }
766
767 /*
768 * Build an index value that is used to select the Sector Map
769 * Configuration that is currently in use.
770 */
771 map_id = map_id << 1 | !!(*buf & read_data_mask);
772 }
773
774 /*
775 * If command descriptors are provided, they always precede map
776 * descriptors in the table. There is no need to start the iteration
777 * over smpt array all over again.
778 *
779 * Find the matching configuration map.
780 */
781 ret = ERR_PTR(-EINVAL);
782 while (i < smpt_len) {
783 if (SMPT_MAP_ID(smpt[i]) == map_id) {
784 ret = smpt + i;
785 break;
786 }
787
788 /*
789 * If there are no more configuration map descriptors and no
790 * configuration ID matched the configuration identifier, the
791 * sector address map is unknown.
792 */
793 if (smpt[i] & SMPT_DESC_END)
794 break;
795
796 /* increment the table index to the next map */
797 i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1;
798 }
799
800 /* fall through */
801out:
802 kfree(buf);
803 nor->addr_nbytes = addr_nbytes;
804 nor->read_dummy = read_dummy;
805 nor->read_opcode = read_opcode;
806 return ret;
807}
808
809static void spi_nor_region_mark_end(struct spi_nor_erase_region *region)
810{
811 region->offset |= SNOR_LAST_REGION;
812}
813
814static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region)
815{
816 region->offset |= SNOR_OVERLAID_REGION;
817}
818
819/**
820 * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid
821 * @region: pointer to a structure that describes a SPI NOR erase region
822 * @erase: pointer to a structure that describes a SPI NOR erase type
823 * @erase_type: erase type bitmask
824 */
825static void
826spi_nor_region_check_overlay(struct spi_nor_erase_region *region,
827 const struct spi_nor_erase_type *erase,
828 const u8 erase_type)
829{
830 int i;
831
832 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
833 if (!(erase[i].size && erase_type & BIT(erase[i].idx)))
834 continue;
835 if (region->size & erase[i].size_mask) {
836 spi_nor_region_mark_overlay(region);
837 return;
838 }
839 }
840}
841
842/**
843 * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map
844 * @nor: pointer to a 'struct spi_nor'
845 * @smpt: pointer to the sector map parameter table
846 *
847 * Return: 0 on success, -errno otherwise.
848 */
849static int spi_nor_init_non_uniform_erase_map(struct spi_nor *nor,
850 const u32 *smpt)
851{
852 struct spi_nor_erase_map *map = &nor->params->erase_map;
853 struct spi_nor_erase_type *erase = map->erase_type;
854 struct spi_nor_erase_region *region;
855 u64 offset;
856 u32 region_count;
857 int i, j;
858 u8 uniform_erase_type, save_uniform_erase_type;
859 u8 erase_type, regions_erase_type;
860
861 region_count = SMPT_MAP_REGION_COUNT(*smpt);
862 /*
863 * The regions will be freed when the driver detaches from the
864 * device.
865 */
866 region = devm_kcalloc(nor->dev, region_count, sizeof(*region),
867 GFP_KERNEL);
868 if (!region)
869 return -ENOMEM;
870 map->regions = region;
871
872 uniform_erase_type = 0xff;
873 regions_erase_type = 0;
874 offset = 0;
875 /* Populate regions. */
876 for (i = 0; i < region_count; i++) {
877 j = i + 1; /* index for the region dword */
878 region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]);
879 erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]);
880 region[i].offset = offset | erase_type;
881
882 spi_nor_region_check_overlay(®ion[i], erase, erase_type);
883
884 /*
885 * Save the erase types that are supported in all regions and
886 * can erase the entire flash memory.
887 */
888 uniform_erase_type &= erase_type;
889
890 /*
891 * regions_erase_type mask will indicate all the erase types
892 * supported in this configuration map.
893 */
894 regions_erase_type |= erase_type;
895
896 offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) +
897 region[i].size;
898 }
899 spi_nor_region_mark_end(®ion[i - 1]);
900
901 save_uniform_erase_type = map->uniform_erase_type;
902 map->uniform_erase_type = spi_nor_sort_erase_mask(map,
903 uniform_erase_type);
904
905 if (!regions_erase_type) {
906 /*
907 * Roll back to the previous uniform_erase_type mask, SMPT is
908 * broken.
909 */
910 map->uniform_erase_type = save_uniform_erase_type;
911 return -EINVAL;
912 }
913
914 /*
915 * BFPT advertises all the erase types supported by all the possible
916 * map configurations. Mask out the erase types that are not supported
917 * by the current map configuration.
918 */
919 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
920 if (!(regions_erase_type & BIT(erase[i].idx)))
921 spi_nor_mask_erase_type(&erase[i]);
922
923 return 0;
924}
925
926/**
927 * spi_nor_parse_smpt() - parse Sector Map Parameter Table
928 * @nor: pointer to a 'struct spi_nor'
929 * @smpt_header: sector map parameter table header
930 *
931 * This table is optional, but when available, we parse it to identify the
932 * location and size of sectors within the main data array of the flash memory
933 * device and to identify which Erase Types are supported by each sector.
934 *
935 * Return: 0 on success, -errno otherwise.
936 */
937static int spi_nor_parse_smpt(struct spi_nor *nor,
938 const struct sfdp_parameter_header *smpt_header)
939{
940 const u32 *sector_map;
941 u32 *smpt;
942 size_t len;
943 u32 addr;
944 int ret;
945
946 /* Read the Sector Map Parameter Table. */
947 len = smpt_header->length * sizeof(*smpt);
948 smpt = kmalloc(len, GFP_KERNEL);
949 if (!smpt)
950 return -ENOMEM;
951
952 addr = SFDP_PARAM_HEADER_PTP(smpt_header);
953 ret = spi_nor_read_sfdp(nor, addr, len, smpt);
954 if (ret)
955 goto out;
956
957 /* Fix endianness of the SMPT DWORDs. */
958 le32_to_cpu_array(smpt, smpt_header->length);
959
960 sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length);
961 if (IS_ERR(sector_map)) {
962 ret = PTR_ERR(sector_map);
963 goto out;
964 }
965
966 ret = spi_nor_init_non_uniform_erase_map(nor, sector_map);
967 if (ret)
968 goto out;
969
970 spi_nor_regions_sort_erase_types(&nor->params->erase_map);
971 /* fall through */
972out:
973 kfree(smpt);
974 return ret;
975}
976
977/**
978 * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table
979 * @nor: pointer to a 'struct spi_nor'.
980 * @param_header: pointer to the 'struct sfdp_parameter_header' describing
981 * the 4-Byte Address Instruction Table length and version.
982 *
983 * Return: 0 on success, -errno otherwise.
984 */
985static int spi_nor_parse_4bait(struct spi_nor *nor,
986 const struct sfdp_parameter_header *param_header)
987{
988 static const struct sfdp_4bait reads[] = {
989 { SNOR_HWCAPS_READ, BIT(0) },
990 { SNOR_HWCAPS_READ_FAST, BIT(1) },
991 { SNOR_HWCAPS_READ_1_1_2, BIT(2) },
992 { SNOR_HWCAPS_READ_1_2_2, BIT(3) },
993 { SNOR_HWCAPS_READ_1_1_4, BIT(4) },
994 { SNOR_HWCAPS_READ_1_4_4, BIT(5) },
995 { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) },
996 { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) },
997 { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) },
998 { SNOR_HWCAPS_READ_1_1_8, BIT(20) },
999 { SNOR_HWCAPS_READ_1_8_8, BIT(21) },
1000 };
1001 static const struct sfdp_4bait programs[] = {
1002 { SNOR_HWCAPS_PP, BIT(6) },
1003 { SNOR_HWCAPS_PP_1_1_4, BIT(7) },
1004 { SNOR_HWCAPS_PP_1_4_4, BIT(8) },
1005 };
1006 static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {
1007 { 0u /* not used */, BIT(9) },
1008 { 0u /* not used */, BIT(10) },
1009 { 0u /* not used */, BIT(11) },
1010 { 0u /* not used */, BIT(12) },
1011 };
1012 struct spi_nor_flash_parameter *params = nor->params;
1013 struct spi_nor_pp_command *params_pp = params->page_programs;
1014 struct spi_nor_erase_map *map = ¶ms->erase_map;
1015 struct spi_nor_erase_type *erase_type = map->erase_type;
1016 u32 *dwords;
1017 size_t len;
1018 u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask;
1019 int i, ret;
1020
1021 if (param_header->major != SFDP_JESD216_MAJOR ||
1022 param_header->length < SFDP_4BAIT_DWORD_MAX)
1023 return -EINVAL;
1024
1025 /* Read the 4-byte Address Instruction Table. */
1026 len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX;
1027
1028 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
1029 dwords = kmalloc(len, GFP_KERNEL);
1030 if (!dwords)
1031 return -ENOMEM;
1032
1033 addr = SFDP_PARAM_HEADER_PTP(param_header);
1034 ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1035 if (ret)
1036 goto out;
1037
1038 /* Fix endianness of the 4BAIT DWORDs. */
1039 le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX);
1040
1041 /*
1042 * Compute the subset of (Fast) Read commands for which the 4-byte
1043 * version is supported.
1044 */
1045 discard_hwcaps = 0;
1046 read_hwcaps = 0;
1047 for (i = 0; i < ARRAY_SIZE(reads); i++) {
1048 const struct sfdp_4bait *read = &reads[i];
1049
1050 discard_hwcaps |= read->hwcaps;
1051 if ((params->hwcaps.mask & read->hwcaps) &&
1052 (dwords[SFDP_DWORD(1)] & read->supported_bit))
1053 read_hwcaps |= read->hwcaps;
1054 }
1055
1056 /*
1057 * Compute the subset of Page Program commands for which the 4-byte
1058 * version is supported.
1059 */
1060 pp_hwcaps = 0;
1061 for (i = 0; i < ARRAY_SIZE(programs); i++) {
1062 const struct sfdp_4bait *program = &programs[i];
1063
1064 /*
1065 * The 4 Byte Address Instruction (Optional) Table is the only
1066 * SFDP table that indicates support for Page Program Commands.
1067 * Bypass the params->hwcaps.mask and consider 4BAIT the biggest
1068 * authority for specifying Page Program support.
1069 */
1070 discard_hwcaps |= program->hwcaps;
1071 if (dwords[SFDP_DWORD(1)] & program->supported_bit)
1072 pp_hwcaps |= program->hwcaps;
1073 }
1074
1075 /*
1076 * Compute the subset of Sector Erase commands for which the 4-byte
1077 * version is supported.
1078 */
1079 erase_mask = 0;
1080 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1081 const struct sfdp_4bait *erase = &erases[i];
1082
1083 if (dwords[SFDP_DWORD(1)] & erase->supported_bit)
1084 erase_mask |= BIT(i);
1085 }
1086
1087 /* Replicate the sort done for the map's erase types in BFPT. */
1088 erase_mask = spi_nor_sort_erase_mask(map, erase_mask);
1089
1090 /*
1091 * We need at least one 4-byte op code per read, program and erase
1092 * operation; the .read(), .write() and .erase() hooks share the
1093 * nor->addr_nbytes value.
1094 */
1095 if (!read_hwcaps || !pp_hwcaps || !erase_mask)
1096 goto out;
1097
1098 /*
1099 * Discard all operations from the 4-byte instruction set which are
1100 * not supported by this memory.
1101 */
1102 params->hwcaps.mask &= ~discard_hwcaps;
1103 params->hwcaps.mask |= (read_hwcaps | pp_hwcaps);
1104
1105 /* Use the 4-byte address instruction set. */
1106 for (i = 0; i < SNOR_CMD_READ_MAX; i++) {
1107 struct spi_nor_read_command *read_cmd = ¶ms->reads[i];
1108
1109 read_cmd->opcode = spi_nor_convert_3to4_read(read_cmd->opcode);
1110 }
1111
1112 /* 4BAIT is the only SFDP table that indicates page program support. */
1113 if (pp_hwcaps & SNOR_HWCAPS_PP) {
1114 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP],
1115 SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1);
1116 /*
1117 * Since xSPI Page Program opcode is backward compatible with
1118 * Legacy SPI, use Legacy SPI opcode there as well.
1119 */
1120 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_8_8_8_DTR],
1121 SPINOR_OP_PP_4B, SNOR_PROTO_8_8_8_DTR);
1122 }
1123 if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4)
1124 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_1_4],
1125 SPINOR_OP_PP_1_1_4_4B,
1126 SNOR_PROTO_1_1_4);
1127 if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4)
1128 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_4_4],
1129 SPINOR_OP_PP_1_4_4_4B,
1130 SNOR_PROTO_1_4_4);
1131
1132 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1133 if (erase_mask & BIT(i))
1134 erase_type[i].opcode = (dwords[SFDP_DWORD(2)] >>
1135 erase_type[i].idx * 8) & 0xFF;
1136 else
1137 spi_nor_mask_erase_type(&erase_type[i]);
1138 }
1139
1140 /*
1141 * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes()
1142 * later because we already did the conversion to 4byte opcodes. Also,
1143 * this latest function implements a legacy quirk for the erase size of
1144 * Spansion memory. However this quirk is no longer needed with new
1145 * SFDP compliant memories.
1146 */
1147 params->addr_nbytes = 4;
1148 nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT;
1149
1150 /* fall through */
1151out:
1152 kfree(dwords);
1153 return ret;
1154}
1155
1156#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29)
1157#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28)
1158#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8)
1159#define PROFILE1_DWORD4_DUMMY_200MHZ GENMASK(11, 7)
1160#define PROFILE1_DWORD5_DUMMY_166MHZ GENMASK(31, 27)
1161#define PROFILE1_DWORD5_DUMMY_133MHZ GENMASK(21, 17)
1162#define PROFILE1_DWORD5_DUMMY_100MHZ GENMASK(11, 7)
1163
1164/**
1165 * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table
1166 * @nor: pointer to a 'struct spi_nor'
1167 * @profile1_header: pointer to the 'struct sfdp_parameter_header' describing
1168 * the Profile 1.0 Table length and version.
1169 *
1170 * Return: 0 on success, -errno otherwise.
1171 */
1172static int spi_nor_parse_profile1(struct spi_nor *nor,
1173 const struct sfdp_parameter_header *profile1_header)
1174{
1175 u32 *dwords, addr;
1176 size_t len;
1177 int ret;
1178 u8 dummy, opcode;
1179
1180 len = profile1_header->length * sizeof(*dwords);
1181 dwords = kmalloc(len, GFP_KERNEL);
1182 if (!dwords)
1183 return -ENOMEM;
1184
1185 addr = SFDP_PARAM_HEADER_PTP(profile1_header);
1186 ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1187 if (ret)
1188 goto out;
1189
1190 le32_to_cpu_array(dwords, profile1_header->length);
1191
1192 /* Get 8D-8D-8D fast read opcode and dummy cycles. */
1193 opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, dwords[SFDP_DWORD(1)]);
1194
1195 /* Set the Read Status Register dummy cycles and dummy address bytes. */
1196 if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_DUMMY)
1197 nor->params->rdsr_dummy = 8;
1198 else
1199 nor->params->rdsr_dummy = 4;
1200
1201 if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_ADDR_BYTES)
1202 nor->params->rdsr_addr_nbytes = 4;
1203 else
1204 nor->params->rdsr_addr_nbytes = 0;
1205
1206 /*
1207 * We don't know what speed the controller is running at. Find the
1208 * dummy cycles for the fastest frequency the flash can run at to be
1209 * sure we are never short of dummy cycles. A value of 0 means the
1210 * frequency is not supported.
1211 *
1212 * Default to PROFILE1_DUMMY_DEFAULT if we don't find anything, and let
1213 * flashes set the correct value if needed in their fixup hooks.
1214 */
1215 dummy = FIELD_GET(PROFILE1_DWORD4_DUMMY_200MHZ, dwords[SFDP_DWORD(4)]);
1216 if (!dummy)
1217 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_166MHZ,
1218 dwords[SFDP_DWORD(5)]);
1219 if (!dummy)
1220 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_133MHZ,
1221 dwords[SFDP_DWORD(5)]);
1222 if (!dummy)
1223 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_100MHZ,
1224 dwords[SFDP_DWORD(5)]);
1225 if (!dummy)
1226 dev_dbg(nor->dev,
1227 "Can't find dummy cycles from Profile 1.0 table\n");
1228
1229 /* Round up to an even value to avoid tripping controllers up. */
1230 dummy = round_up(dummy, 2);
1231
1232 /* Update the fast read settings. */
1233 nor->params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
1234 spi_nor_set_read_settings(&nor->params->reads[SNOR_CMD_READ_8_8_8_DTR],
1235 0, dummy, opcode,
1236 SNOR_PROTO_8_8_8_DTR);
1237
1238 /*
1239 * Page Program is "Required Command" in the xSPI Profile 1.0. Update
1240 * the params->hwcaps.mask here.
1241 */
1242 nor->params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR;
1243
1244out:
1245 kfree(dwords);
1246 return ret;
1247}
1248
1249#define SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE BIT(31)
1250
1251/**
1252 * spi_nor_parse_sccr() - Parse the Status, Control and Configuration Register
1253 * Map.
1254 * @nor: pointer to a 'struct spi_nor'
1255 * @sccr_header: pointer to the 'struct sfdp_parameter_header' describing
1256 * the SCCR Map table length and version.
1257 *
1258 * Return: 0 on success, -errno otherwise.
1259 */
1260static int spi_nor_parse_sccr(struct spi_nor *nor,
1261 const struct sfdp_parameter_header *sccr_header)
1262{
1263 struct spi_nor_flash_parameter *params = nor->params;
1264 u32 *dwords, addr;
1265 size_t len;
1266 int ret;
1267
1268 len = sccr_header->length * sizeof(*dwords);
1269 dwords = kmalloc(len, GFP_KERNEL);
1270 if (!dwords)
1271 return -ENOMEM;
1272
1273 addr = SFDP_PARAM_HEADER_PTP(sccr_header);
1274 ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1275 if (ret)
1276 goto out;
1277
1278 le32_to_cpu_array(dwords, sccr_header->length);
1279
1280 /* Address offset for volatile registers (die 0) */
1281 if (!params->vreg_offset) {
1282 params->vreg_offset = devm_kmalloc(nor->dev, sizeof(*dwords),
1283 GFP_KERNEL);
1284 if (!params->vreg_offset) {
1285 ret = -ENOMEM;
1286 goto out;
1287 }
1288 }
1289 params->vreg_offset[0] = dwords[SFDP_DWORD(1)];
1290 params->n_dice = 1;
1291
1292 if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE,
1293 dwords[SFDP_DWORD(22)]))
1294 nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;
1295
1296out:
1297 kfree(dwords);
1298 return ret;
1299}
1300
1301/**
1302 * spi_nor_parse_sccr_mc() - Parse the Status, Control and Configuration
1303 * Register Map Offsets for Multi-Chip SPI Memory
1304 * Devices.
1305 * @nor: pointer to a 'struct spi_nor'
1306 * @sccr_mc_header: pointer to the 'struct sfdp_parameter_header' describing
1307 * the SCCR Map offsets table length and version.
1308 *
1309 * Return: 0 on success, -errno otherwise.
1310 */
1311static int spi_nor_parse_sccr_mc(struct spi_nor *nor,
1312 const struct sfdp_parameter_header *sccr_mc_header)
1313{
1314 struct spi_nor_flash_parameter *params = nor->params;
1315 u32 *dwords, addr;
1316 u8 i, n_dice;
1317 size_t len;
1318 int ret;
1319
1320 len = sccr_mc_header->length * sizeof(*dwords);
1321 dwords = kmalloc(len, GFP_KERNEL);
1322 if (!dwords)
1323 return -ENOMEM;
1324
1325 addr = SFDP_PARAM_HEADER_PTP(sccr_mc_header);
1326 ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1327 if (ret)
1328 goto out;
1329
1330 le32_to_cpu_array(dwords, sccr_mc_header->length);
1331
1332 /*
1333 * Pair of DOWRDs (volatile and non-volatile register offsets) per
1334 * additional die. Hence, length = 2 * (number of additional dice).
1335 */
1336 n_dice = 1 + sccr_mc_header->length / 2;
1337
1338 /* Address offset for volatile registers of additional dice */
1339 params->vreg_offset =
1340 devm_krealloc(nor->dev, params->vreg_offset,
1341 n_dice * sizeof(*dwords),
1342 GFP_KERNEL);
1343 if (!params->vreg_offset) {
1344 ret = -ENOMEM;
1345 goto out;
1346 }
1347
1348 for (i = 1; i < n_dice; i++)
1349 params->vreg_offset[i] = dwords[SFDP_DWORD(i) * 2];
1350
1351 params->n_dice = n_dice;
1352
1353out:
1354 kfree(dwords);
1355 return ret;
1356}
1357
1358/**
1359 * spi_nor_post_sfdp_fixups() - Updates the flash's parameters and settings
1360 * after SFDP has been parsed. Called only for flashes that define JESD216 SFDP
1361 * tables.
1362 * @nor: pointer to a 'struct spi_nor'
1363 *
1364 * Used to tweak various flash parameters when information provided by the SFDP
1365 * tables are wrong.
1366 */
1367static int spi_nor_post_sfdp_fixups(struct spi_nor *nor)
1368{
1369 int ret;
1370
1371 if (nor->manufacturer && nor->manufacturer->fixups &&
1372 nor->manufacturer->fixups->post_sfdp) {
1373 ret = nor->manufacturer->fixups->post_sfdp(nor);
1374 if (ret)
1375 return ret;
1376 }
1377
1378 if (nor->info->fixups && nor->info->fixups->post_sfdp)
1379 return nor->info->fixups->post_sfdp(nor);
1380
1381 return 0;
1382}
1383
1384/**
1385 * spi_nor_check_sfdp_signature() - check for a valid SFDP signature
1386 * @nor: pointer to a 'struct spi_nor'
1387 *
1388 * Used to detect if the flash supports the RDSFDP command as well as the
1389 * presence of a valid SFDP table.
1390 *
1391 * Return: 0 on success, -errno otherwise.
1392 */
1393int spi_nor_check_sfdp_signature(struct spi_nor *nor)
1394{
1395 u32 signature;
1396 int err;
1397
1398 /* Get the SFDP header. */
1399 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(signature),
1400 &signature);
1401 if (err < 0)
1402 return err;
1403
1404 /* Check the SFDP signature. */
1405 if (le32_to_cpu(signature) != SFDP_SIGNATURE)
1406 return -EINVAL;
1407
1408 return 0;
1409}
1410
1411/**
1412 * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
1413 * @nor: pointer to a 'struct spi_nor'
1414 *
1415 * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216
1416 * specification. This is a standard which tends to supported by almost all
1417 * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at
1418 * runtime the main parameters needed to perform basic SPI flash operations such
1419 * as Fast Read, Page Program or Sector Erase commands.
1420 *
1421 * Return: 0 on success, -errno otherwise.
1422 */
1423int spi_nor_parse_sfdp(struct spi_nor *nor)
1424{
1425 const struct sfdp_parameter_header *param_header, *bfpt_header;
1426 struct sfdp_parameter_header *param_headers = NULL;
1427 struct sfdp_header header;
1428 struct device *dev = nor->dev;
1429 struct sfdp *sfdp;
1430 size_t sfdp_size;
1431 size_t psize;
1432 int i, err;
1433
1434 /* Get the SFDP header. */
1435 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header);
1436 if (err < 0)
1437 return err;
1438
1439 /* Check the SFDP header version. */
1440 if (le32_to_cpu(header.signature) != SFDP_SIGNATURE ||
1441 header.major != SFDP_JESD216_MAJOR)
1442 return -EINVAL;
1443
1444 /*
1445 * Verify that the first and only mandatory parameter header is a
1446 * Basic Flash Parameter Table header as specified in JESD216.
1447 */
1448 bfpt_header = &header.bfpt_header;
1449 if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID ||
1450 bfpt_header->major != SFDP_JESD216_MAJOR)
1451 return -EINVAL;
1452
1453 sfdp_size = SFDP_PARAM_HEADER_PTP(bfpt_header) +
1454 SFDP_PARAM_HEADER_PARAM_LEN(bfpt_header);
1455
1456 /*
1457 * Allocate memory then read all parameter headers with a single
1458 * Read SFDP command. These parameter headers will actually be parsed
1459 * twice: a first time to get the latest revision of the basic flash
1460 * parameter table, then a second time to handle the supported optional
1461 * tables.
1462 * Hence we read the parameter headers once for all to reduce the
1463 * processing time. Also we use kmalloc() instead of devm_kmalloc()
1464 * because we don't need to keep these parameter headers: the allocated
1465 * memory is always released with kfree() before exiting this function.
1466 */
1467 if (header.nph) {
1468 psize = header.nph * sizeof(*param_headers);
1469
1470 param_headers = kmalloc(psize, GFP_KERNEL);
1471 if (!param_headers)
1472 return -ENOMEM;
1473
1474 err = spi_nor_read_sfdp(nor, sizeof(header),
1475 psize, param_headers);
1476 if (err < 0) {
1477 dev_dbg(dev, "failed to read SFDP parameter headers\n");
1478 goto exit;
1479 }
1480 }
1481
1482 /*
1483 * Cache the complete SFDP data. It is not (easily) possible to fetch
1484 * SFDP after probe time and we need it for the sysfs access.
1485 */
1486 for (i = 0; i < header.nph; i++) {
1487 param_header = ¶m_headers[i];
1488 sfdp_size = max_t(size_t, sfdp_size,
1489 SFDP_PARAM_HEADER_PTP(param_header) +
1490 SFDP_PARAM_HEADER_PARAM_LEN(param_header));
1491 }
1492
1493 /*
1494 * Limit the total size to a reasonable value to avoid allocating too
1495 * much memory just of because the flash returned some insane values.
1496 */
1497 if (sfdp_size > PAGE_SIZE) {
1498 dev_dbg(dev, "SFDP data (%zu) too big, truncating\n",
1499 sfdp_size);
1500 sfdp_size = PAGE_SIZE;
1501 }
1502
1503 sfdp = devm_kzalloc(dev, sizeof(*sfdp), GFP_KERNEL);
1504 if (!sfdp) {
1505 err = -ENOMEM;
1506 goto exit;
1507 }
1508
1509 /*
1510 * The SFDP is organized in chunks of DWORDs. Thus, in theory, the
1511 * sfdp_size should be a multiple of DWORDs. But in case a flash
1512 * is not spec compliant, make sure that we have enough space to store
1513 * the complete SFDP data.
1514 */
1515 sfdp->num_dwords = DIV_ROUND_UP(sfdp_size, sizeof(*sfdp->dwords));
1516 sfdp->dwords = devm_kcalloc(dev, sfdp->num_dwords,
1517 sizeof(*sfdp->dwords), GFP_KERNEL);
1518 if (!sfdp->dwords) {
1519 err = -ENOMEM;
1520 devm_kfree(dev, sfdp);
1521 goto exit;
1522 }
1523
1524 err = spi_nor_read_sfdp(nor, 0, sfdp_size, sfdp->dwords);
1525 if (err < 0) {
1526 dev_dbg(dev, "failed to read SFDP data\n");
1527 devm_kfree(dev, sfdp->dwords);
1528 devm_kfree(dev, sfdp);
1529 goto exit;
1530 }
1531
1532 nor->sfdp = sfdp;
1533
1534 /*
1535 * Check other parameter headers to get the latest revision of
1536 * the basic flash parameter table.
1537 */
1538 for (i = 0; i < header.nph; i++) {
1539 param_header = ¶m_headers[i];
1540
1541 if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID &&
1542 param_header->major == SFDP_JESD216_MAJOR &&
1543 (param_header->minor > bfpt_header->minor ||
1544 (param_header->minor == bfpt_header->minor &&
1545 param_header->length > bfpt_header->length)))
1546 bfpt_header = param_header;
1547 }
1548
1549 err = spi_nor_parse_bfpt(nor, bfpt_header);
1550 if (err)
1551 goto exit;
1552
1553 /* Parse optional parameter tables. */
1554 for (i = 0; i < header.nph; i++) {
1555 param_header = ¶m_headers[i];
1556
1557 switch (SFDP_PARAM_HEADER_ID(param_header)) {
1558 case SFDP_SECTOR_MAP_ID:
1559 err = spi_nor_parse_smpt(nor, param_header);
1560 break;
1561
1562 case SFDP_4BAIT_ID:
1563 err = spi_nor_parse_4bait(nor, param_header);
1564 break;
1565
1566 case SFDP_PROFILE1_ID:
1567 err = spi_nor_parse_profile1(nor, param_header);
1568 break;
1569
1570 case SFDP_SCCR_MAP_ID:
1571 err = spi_nor_parse_sccr(nor, param_header);
1572 break;
1573
1574 case SFDP_SCCR_MAP_MC_ID:
1575 err = spi_nor_parse_sccr_mc(nor, param_header);
1576 break;
1577
1578 default:
1579 break;
1580 }
1581
1582 if (err) {
1583 dev_warn(dev, "Failed to parse optional parameter table: %04x\n",
1584 SFDP_PARAM_HEADER_ID(param_header));
1585 /*
1586 * Let's not drop all information we extracted so far
1587 * if optional table parsers fail. In case of failing,
1588 * each optional parser is responsible to roll back to
1589 * the previously known spi_nor data.
1590 */
1591 err = 0;
1592 }
1593 }
1594
1595 err = spi_nor_post_sfdp_fixups(nor);
1596exit:
1597 kfree(param_headers);
1598 return err;
1599}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
5 */
6
7#include <linux/bitfield.h>
8#include <linux/slab.h>
9#include <linux/sort.h>
10#include <linux/mtd/spi-nor.h>
11
12#include "core.h"
13
14#define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
15#define SFDP_PARAM_HEADER_PTP(p) \
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19#define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
20
21#define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */
22#define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
23#define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
24#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */
25#define SFDP_SCCR_MAP_ID 0xff87 /*
26 * Status, Control and Configuration
27 * Register Map.
28 */
29
30#define SFDP_SIGNATURE 0x50444653U
31
32struct sfdp_header {
33 u32 signature; /* Ox50444653U <=> "SFDP" */
34 u8 minor;
35 u8 major;
36 u8 nph; /* 0-base number of parameter headers */
37 u8 unused;
38
39 /* Basic Flash Parameter Table. */
40 struct sfdp_parameter_header bfpt_header;
41};
42
43/* Fast Read settings. */
44struct sfdp_bfpt_read {
45 /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */
46 u32 hwcaps;
47
48 /*
49 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us
50 * whether the Fast Read x-y-z command is supported.
51 */
52 u32 supported_dword;
53 u32 supported_bit;
54
55 /*
56 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD
57 * encodes the op code, the number of mode clocks and the number of wait
58 * states to be used by Fast Read x-y-z command.
59 */
60 u32 settings_dword;
61 u32 settings_shift;
62
63 /* The SPI protocol for this Fast Read x-y-z command. */
64 enum spi_nor_protocol proto;
65};
66
67struct sfdp_bfpt_erase {
68 /*
69 * The half-word at offset <shift> in DWORD <dword> encodes the
70 * op code and erase sector size to be used by Sector Erase commands.
71 */
72 u32 dword;
73 u32 shift;
74};
75
76#define SMPT_CMD_ADDRESS_LEN_MASK GENMASK(23, 22)
77#define SMPT_CMD_ADDRESS_LEN_0 (0x0UL << 22)
78#define SMPT_CMD_ADDRESS_LEN_3 (0x1UL << 22)
79#define SMPT_CMD_ADDRESS_LEN_4 (0x2UL << 22)
80#define SMPT_CMD_ADDRESS_LEN_USE_CURRENT (0x3UL << 22)
81
82#define SMPT_CMD_READ_DUMMY_MASK GENMASK(19, 16)
83#define SMPT_CMD_READ_DUMMY_SHIFT 16
84#define SMPT_CMD_READ_DUMMY(_cmd) \
85 (((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT)
86#define SMPT_CMD_READ_DUMMY_IS_VARIABLE 0xfUL
87
88#define SMPT_CMD_READ_DATA_MASK GENMASK(31, 24)
89#define SMPT_CMD_READ_DATA_SHIFT 24
90#define SMPT_CMD_READ_DATA(_cmd) \
91 (((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT)
92
93#define SMPT_CMD_OPCODE_MASK GENMASK(15, 8)
94#define SMPT_CMD_OPCODE_SHIFT 8
95#define SMPT_CMD_OPCODE(_cmd) \
96 (((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT)
97
98#define SMPT_MAP_REGION_COUNT_MASK GENMASK(23, 16)
99#define SMPT_MAP_REGION_COUNT_SHIFT 16
100#define SMPT_MAP_REGION_COUNT(_header) \
101 ((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \
102 SMPT_MAP_REGION_COUNT_SHIFT) + 1)
103
104#define SMPT_MAP_ID_MASK GENMASK(15, 8)
105#define SMPT_MAP_ID_SHIFT 8
106#define SMPT_MAP_ID(_header) \
107 (((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT)
108
109#define SMPT_MAP_REGION_SIZE_MASK GENMASK(31, 8)
110#define SMPT_MAP_REGION_SIZE_SHIFT 8
111#define SMPT_MAP_REGION_SIZE(_region) \
112 (((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \
113 SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256)
114
115#define SMPT_MAP_REGION_ERASE_TYPE_MASK GENMASK(3, 0)
116#define SMPT_MAP_REGION_ERASE_TYPE(_region) \
117 ((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK)
118
119#define SMPT_DESC_TYPE_MAP BIT(1)
120#define SMPT_DESC_END BIT(0)
121
122#define SFDP_4BAIT_DWORD_MAX 2
123
124struct sfdp_4bait {
125 /* The hardware capability. */
126 u32 hwcaps;
127
128 /*
129 * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether
130 * the associated 4-byte address op code is supported.
131 */
132 u32 supported_bit;
133};
134
135/**
136 * spi_nor_read_raw() - raw read of serial flash memory. read_opcode,
137 * addr_width and read_dummy members of the struct spi_nor
138 * should be previously
139 * set.
140 * @nor: pointer to a 'struct spi_nor'
141 * @addr: offset in the serial flash memory
142 * @len: number of bytes to read
143 * @buf: buffer where the data is copied into (dma-safe memory)
144 *
145 * Return: 0 on success, -errno otherwise.
146 */
147static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf)
148{
149 ssize_t ret;
150
151 while (len) {
152 ret = spi_nor_read_data(nor, addr, len, buf);
153 if (ret < 0)
154 return ret;
155 if (!ret || ret > len)
156 return -EIO;
157
158 buf += ret;
159 addr += ret;
160 len -= ret;
161 }
162 return 0;
163}
164
165/**
166 * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters.
167 * @nor: pointer to a 'struct spi_nor'
168 * @addr: offset in the SFDP area to start reading data from
169 * @len: number of bytes to read
170 * @buf: buffer where the SFDP data are copied into (dma-safe memory)
171 *
172 * Whatever the actual numbers of bytes for address and dummy cycles are
173 * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always
174 * followed by a 3-byte address and 8 dummy clock cycles.
175 *
176 * Return: 0 on success, -errno otherwise.
177 */
178static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,
179 size_t len, void *buf)
180{
181 u8 addr_width, read_opcode, read_dummy;
182 int ret;
183
184 read_opcode = nor->read_opcode;
185 addr_width = nor->addr_width;
186 read_dummy = nor->read_dummy;
187
188 nor->read_opcode = SPINOR_OP_RDSFDP;
189 nor->addr_width = 3;
190 nor->read_dummy = 8;
191
192 ret = spi_nor_read_raw(nor, addr, len, buf);
193
194 nor->read_opcode = read_opcode;
195 nor->addr_width = addr_width;
196 nor->read_dummy = read_dummy;
197
198 return ret;
199}
200
201/**
202 * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.
203 * @nor: pointer to a 'struct spi_nor'
204 * @addr: offset in the SFDP area to start reading data from
205 * @len: number of bytes to read
206 * @buf: buffer where the SFDP data are copied into
207 *
208 * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not
209 * guaranteed to be dma-safe.
210 *
211 * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp()
212 * otherwise.
213 */
214static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr,
215 size_t len, void *buf)
216{
217 void *dma_safe_buf;
218 int ret;
219
220 dma_safe_buf = kmalloc(len, GFP_KERNEL);
221 if (!dma_safe_buf)
222 return -ENOMEM;
223
224 ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf);
225 memcpy(buf, dma_safe_buf, len);
226 kfree(dma_safe_buf);
227
228 return ret;
229}
230
231static void
232spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read,
233 u16 half,
234 enum spi_nor_protocol proto)
235{
236 read->num_mode_clocks = (half >> 5) & 0x07;
237 read->num_wait_states = (half >> 0) & 0x1f;
238 read->opcode = (half >> 8) & 0xff;
239 read->proto = proto;
240}
241
242static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = {
243 /* Fast Read 1-1-2 */
244 {
245 SNOR_HWCAPS_READ_1_1_2,
246 BFPT_DWORD(1), BIT(16), /* Supported bit */
247 BFPT_DWORD(4), 0, /* Settings */
248 SNOR_PROTO_1_1_2,
249 },
250
251 /* Fast Read 1-2-2 */
252 {
253 SNOR_HWCAPS_READ_1_2_2,
254 BFPT_DWORD(1), BIT(20), /* Supported bit */
255 BFPT_DWORD(4), 16, /* Settings */
256 SNOR_PROTO_1_2_2,
257 },
258
259 /* Fast Read 2-2-2 */
260 {
261 SNOR_HWCAPS_READ_2_2_2,
262 BFPT_DWORD(5), BIT(0), /* Supported bit */
263 BFPT_DWORD(6), 16, /* Settings */
264 SNOR_PROTO_2_2_2,
265 },
266
267 /* Fast Read 1-1-4 */
268 {
269 SNOR_HWCAPS_READ_1_1_4,
270 BFPT_DWORD(1), BIT(22), /* Supported bit */
271 BFPT_DWORD(3), 16, /* Settings */
272 SNOR_PROTO_1_1_4,
273 },
274
275 /* Fast Read 1-4-4 */
276 {
277 SNOR_HWCAPS_READ_1_4_4,
278 BFPT_DWORD(1), BIT(21), /* Supported bit */
279 BFPT_DWORD(3), 0, /* Settings */
280 SNOR_PROTO_1_4_4,
281 },
282
283 /* Fast Read 4-4-4 */
284 {
285 SNOR_HWCAPS_READ_4_4_4,
286 BFPT_DWORD(5), BIT(4), /* Supported bit */
287 BFPT_DWORD(7), 16, /* Settings */
288 SNOR_PROTO_4_4_4,
289 },
290};
291
292static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {
293 /* Erase Type 1 in DWORD8 bits[15:0] */
294 {BFPT_DWORD(8), 0},
295
296 /* Erase Type 2 in DWORD8 bits[31:16] */
297 {BFPT_DWORD(8), 16},
298
299 /* Erase Type 3 in DWORD9 bits[15:0] */
300 {BFPT_DWORD(9), 0},
301
302 /* Erase Type 4 in DWORD9 bits[31:16] */
303 {BFPT_DWORD(9), 16},
304};
305
306/**
307 * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT
308 * @erase: pointer to a structure that describes a SPI NOR erase type
309 * @size: the size of the sector/block erased by the erase type
310 * @opcode: the SPI command op code to erase the sector/block
311 * @i: erase type index as sorted in the Basic Flash Parameter Table
312 *
313 * The supported Erase Types will be sorted at init in ascending order, with
314 * the smallest Erase Type size being the first member in the erase_type array
315 * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in
316 * the Basic Flash Parameter Table since it will be used later on to
317 * synchronize with the supported Erase Types defined in SFDP optional tables.
318 */
319static void
320spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase,
321 u32 size, u8 opcode, u8 i)
322{
323 erase->idx = i;
324 spi_nor_set_erase_type(erase, size, opcode);
325}
326
327/**
328 * spi_nor_map_cmp_erase_type() - compare the map's erase types by size
329 * @l: member in the left half of the map's erase_type array
330 * @r: member in the right half of the map's erase_type array
331 *
332 * Comparison function used in the sort() call to sort in ascending order the
333 * map's erase types, the smallest erase type size being the first member in the
334 * sorted erase_type array.
335 *
336 * Return: the result of @l->size - @r->size
337 */
338static int spi_nor_map_cmp_erase_type(const void *l, const void *r)
339{
340 const struct spi_nor_erase_type *left = l, *right = r;
341
342 return left->size - right->size;
343}
344
345/**
346 * spi_nor_sort_erase_mask() - sort erase mask
347 * @map: the erase map of the SPI NOR
348 * @erase_mask: the erase type mask to be sorted
349 *
350 * Replicate the sort done for the map's erase types in BFPT: sort the erase
351 * mask in ascending order with the smallest erase type size starting from
352 * BIT(0) in the sorted erase mask.
353 *
354 * Return: sorted erase mask.
355 */
356static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask)
357{
358 struct spi_nor_erase_type *erase_type = map->erase_type;
359 int i;
360 u8 sorted_erase_mask = 0;
361
362 if (!erase_mask)
363 return 0;
364
365 /* Replicate the sort done for the map's erase types. */
366 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
367 if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx))
368 sorted_erase_mask |= BIT(i);
369
370 return sorted_erase_mask;
371}
372
373/**
374 * spi_nor_regions_sort_erase_types() - sort erase types in each region
375 * @map: the erase map of the SPI NOR
376 *
377 * Function assumes that the erase types defined in the erase map are already
378 * sorted in ascending order, with the smallest erase type size being the first
379 * member in the erase_type array. It replicates the sort done for the map's
380 * erase types. Each region's erase bitmask will indicate which erase types are
381 * supported from the sorted erase types defined in the erase map.
382 * Sort the all region's erase type at init in order to speed up the process of
383 * finding the best erase command at runtime.
384 */
385static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map)
386{
387 struct spi_nor_erase_region *region = map->regions;
388 u8 region_erase_mask, sorted_erase_mask;
389
390 while (region) {
391 region_erase_mask = region->offset & SNOR_ERASE_TYPE_MASK;
392
393 sorted_erase_mask = spi_nor_sort_erase_mask(map,
394 region_erase_mask);
395
396 /* Overwrite erase mask. */
397 region->offset = (region->offset & ~SNOR_ERASE_TYPE_MASK) |
398 sorted_erase_mask;
399
400 region = spi_nor_region_next(region);
401 }
402}
403
404/**
405 * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table.
406 * @nor: pointer to a 'struct spi_nor'
407 * @bfpt_header: pointer to the 'struct sfdp_parameter_header' describing
408 * the Basic Flash Parameter Table length and version
409 *
410 * The Basic Flash Parameter Table is the main and only mandatory table as
411 * defined by the SFDP (JESD216) specification.
412 * It provides us with the total size (memory density) of the data array and
413 * the number of address bytes for Fast Read, Page Program and Sector Erase
414 * commands.
415 * For Fast READ commands, it also gives the number of mode clock cycles and
416 * wait states (regrouped in the number of dummy clock cycles) for each
417 * supported instruction op code.
418 * For Page Program, the page size is now available since JESD216 rev A, however
419 * the supported instruction op codes are still not provided.
420 * For Sector Erase commands, this table stores the supported instruction op
421 * codes and the associated sector sizes.
422 * Finally, the Quad Enable Requirements (QER) are also available since JESD216
423 * rev A. The QER bits encode the manufacturer dependent procedure to be
424 * executed to set the Quad Enable (QE) bit in some internal register of the
425 * Quad SPI memory. Indeed the QE bit, when it exists, must be set before
426 * sending any Quad SPI command to the memory. Actually, setting the QE bit
427 * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2
428 * and IO3 hence enabling 4 (Quad) I/O lines.
429 *
430 * Return: 0 on success, -errno otherwise.
431 */
432static int spi_nor_parse_bfpt(struct spi_nor *nor,
433 const struct sfdp_parameter_header *bfpt_header)
434{
435 struct spi_nor_flash_parameter *params = nor->params;
436 struct spi_nor_erase_map *map = ¶ms->erase_map;
437 struct spi_nor_erase_type *erase_type = map->erase_type;
438 struct sfdp_bfpt bfpt;
439 size_t len;
440 int i, cmd, err;
441 u32 addr, val;
442 u16 half;
443 u8 erase_mask;
444
445 /* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */
446 if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)
447 return -EINVAL;
448
449 /* Read the Basic Flash Parameter Table. */
450 len = min_t(size_t, sizeof(bfpt),
451 bfpt_header->length * sizeof(u32));
452 addr = SFDP_PARAM_HEADER_PTP(bfpt_header);
453 memset(&bfpt, 0, sizeof(bfpt));
454 err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt);
455 if (err < 0)
456 return err;
457
458 /* Fix endianness of the BFPT DWORDs. */
459 le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX);
460
461 /* Number of address bytes. */
462 switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
463 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
464 case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
465 nor->addr_width = 3;
466 break;
467
468 case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
469 nor->addr_width = 4;
470 break;
471
472 default:
473 break;
474 }
475
476 /* Flash Memory Density (in bits). */
477 val = bfpt.dwords[BFPT_DWORD(2)];
478 if (val & BIT(31)) {
479 val &= ~BIT(31);
480
481 /*
482 * Prevent overflows on params->size. Anyway, a NOR of 2^64
483 * bits is unlikely to exist so this error probably means
484 * the BFPT we are reading is corrupted/wrong.
485 */
486 if (val > 63)
487 return -EINVAL;
488
489 params->size = 1ULL << val;
490 } else {
491 params->size = val + 1;
492 }
493 params->size >>= 3; /* Convert to bytes. */
494
495 /* Fast Read settings. */
496 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) {
497 const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i];
498 struct spi_nor_read_command *read;
499
500 if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) {
501 params->hwcaps.mask &= ~rd->hwcaps;
502 continue;
503 }
504
505 params->hwcaps.mask |= rd->hwcaps;
506 cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps);
507 read = ¶ms->reads[cmd];
508 half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift;
509 spi_nor_set_read_settings_from_bfpt(read, half, rd->proto);
510 }
511
512 /*
513 * Sector Erase settings. Reinitialize the uniform erase map using the
514 * Erase Types defined in the bfpt table.
515 */
516 erase_mask = 0;
517 memset(¶ms->erase_map, 0, sizeof(params->erase_map));
518 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) {
519 const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i];
520 u32 erasesize;
521 u8 opcode;
522
523 half = bfpt.dwords[er->dword] >> er->shift;
524 erasesize = half & 0xff;
525
526 /* erasesize == 0 means this Erase Type is not supported. */
527 if (!erasesize)
528 continue;
529
530 erasesize = 1U << erasesize;
531 opcode = (half >> 8) & 0xff;
532 erase_mask |= BIT(i);
533 spi_nor_set_erase_settings_from_bfpt(&erase_type[i], erasesize,
534 opcode, i);
535 }
536 spi_nor_init_uniform_erase_map(map, erase_mask, params->size);
537 /*
538 * Sort all the map's Erase Types in ascending order with the smallest
539 * erase size being the first member in the erase_type array.
540 */
541 sort(erase_type, SNOR_ERASE_TYPE_MAX, sizeof(erase_type[0]),
542 spi_nor_map_cmp_erase_type, NULL);
543 /*
544 * Sort the erase types in the uniform region in order to update the
545 * uniform_erase_type bitmask. The bitmask will be used later on when
546 * selecting the uniform erase.
547 */
548 spi_nor_regions_sort_erase_types(map);
549 map->uniform_erase_type = map->uniform_region.offset &
550 SNOR_ERASE_TYPE_MASK;
551
552 /* Stop here if not JESD216 rev A or later. */
553 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216)
554 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
555
556 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */
557 val = bfpt.dwords[BFPT_DWORD(11)];
558 val &= BFPT_DWORD11_PAGE_SIZE_MASK;
559 val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;
560 params->page_size = 1U << val;
561
562 /* Quad Enable Requirements. */
563 switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
564 case BFPT_DWORD15_QER_NONE:
565 params->quad_enable = NULL;
566 break;
567
568 case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:
569 /*
570 * Writing only one byte to the Status Register has the
571 * side-effect of clearing Status Register 2.
572 */
573 case BFPT_DWORD15_QER_SR2_BIT1_NO_RD:
574 /*
575 * Read Configuration Register (35h) instruction is not
576 * supported.
577 */
578 nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR;
579 params->quad_enable = spi_nor_sr2_bit1_quad_enable;
580 break;
581
582 case BFPT_DWORD15_QER_SR1_BIT6:
583 nor->flags &= ~SNOR_F_HAS_16BIT_SR;
584 params->quad_enable = spi_nor_sr1_bit6_quad_enable;
585 break;
586
587 case BFPT_DWORD15_QER_SR2_BIT7:
588 nor->flags &= ~SNOR_F_HAS_16BIT_SR;
589 params->quad_enable = spi_nor_sr2_bit7_quad_enable;
590 break;
591
592 case BFPT_DWORD15_QER_SR2_BIT1:
593 /*
594 * JESD216 rev B or later does not specify if writing only one
595 * byte to the Status Register clears or not the Status
596 * Register 2, so let's be cautious and keep the default
597 * assumption of a 16-bit Write Status (01h) command.
598 */
599 nor->flags |= SNOR_F_HAS_16BIT_SR;
600
601 params->quad_enable = spi_nor_sr2_bit1_quad_enable;
602 break;
603
604 default:
605 dev_dbg(nor->dev, "BFPT QER reserved value used\n");
606 break;
607 }
608
609 /* Soft Reset support. */
610 if (bfpt.dwords[BFPT_DWORD(16)] & BFPT_DWORD16_SWRST_EN_RST)
611 nor->flags |= SNOR_F_SOFT_RESET;
612
613 /* Stop here if not JESD216 rev C or later. */
614 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
615 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
616
617 /* 8D-8D-8D command extension. */
618 switch (bfpt.dwords[BFPT_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) {
619 case BFPT_DWORD18_CMD_EXT_REP:
620 nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
621 break;
622
623 case BFPT_DWORD18_CMD_EXT_INV:
624 nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
625 break;
626
627 case BFPT_DWORD18_CMD_EXT_RES:
628 dev_dbg(nor->dev, "Reserved command extension used\n");
629 break;
630
631 case BFPT_DWORD18_CMD_EXT_16B:
632 dev_dbg(nor->dev, "16-bit opcodes not supported\n");
633 return -EOPNOTSUPP;
634 }
635
636 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
637}
638
639/**
640 * spi_nor_smpt_addr_width() - return the address width used in the
641 * configuration detection command.
642 * @nor: pointer to a 'struct spi_nor'
643 * @settings: configuration detection command descriptor, dword1
644 */
645static u8 spi_nor_smpt_addr_width(const struct spi_nor *nor, const u32 settings)
646{
647 switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) {
648 case SMPT_CMD_ADDRESS_LEN_0:
649 return 0;
650 case SMPT_CMD_ADDRESS_LEN_3:
651 return 3;
652 case SMPT_CMD_ADDRESS_LEN_4:
653 return 4;
654 case SMPT_CMD_ADDRESS_LEN_USE_CURRENT:
655 default:
656 return nor->addr_width;
657 }
658}
659
660/**
661 * spi_nor_smpt_read_dummy() - return the configuration detection command read
662 * latency, in clock cycles.
663 * @nor: pointer to a 'struct spi_nor'
664 * @settings: configuration detection command descriptor, dword1
665 *
666 * Return: the number of dummy cycles for an SMPT read
667 */
668static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings)
669{
670 u8 read_dummy = SMPT_CMD_READ_DUMMY(settings);
671
672 if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE)
673 return nor->read_dummy;
674 return read_dummy;
675}
676
677/**
678 * spi_nor_get_map_in_use() - get the configuration map in use
679 * @nor: pointer to a 'struct spi_nor'
680 * @smpt: pointer to the sector map parameter table
681 * @smpt_len: sector map parameter table length
682 *
683 * Return: pointer to the map in use, ERR_PTR(-errno) otherwise.
684 */
685static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt,
686 u8 smpt_len)
687{
688 const u32 *ret;
689 u8 *buf;
690 u32 addr;
691 int err;
692 u8 i;
693 u8 addr_width, read_opcode, read_dummy;
694 u8 read_data_mask, map_id;
695
696 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
697 buf = kmalloc(sizeof(*buf), GFP_KERNEL);
698 if (!buf)
699 return ERR_PTR(-ENOMEM);
700
701 addr_width = nor->addr_width;
702 read_dummy = nor->read_dummy;
703 read_opcode = nor->read_opcode;
704
705 map_id = 0;
706 /* Determine if there are any optional Detection Command Descriptors */
707 for (i = 0; i < smpt_len; i += 2) {
708 if (smpt[i] & SMPT_DESC_TYPE_MAP)
709 break;
710
711 read_data_mask = SMPT_CMD_READ_DATA(smpt[i]);
712 nor->addr_width = spi_nor_smpt_addr_width(nor, smpt[i]);
713 nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]);
714 nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]);
715 addr = smpt[i + 1];
716
717 err = spi_nor_read_raw(nor, addr, 1, buf);
718 if (err) {
719 ret = ERR_PTR(err);
720 goto out;
721 }
722
723 /*
724 * Build an index value that is used to select the Sector Map
725 * Configuration that is currently in use.
726 */
727 map_id = map_id << 1 | !!(*buf & read_data_mask);
728 }
729
730 /*
731 * If command descriptors are provided, they always precede map
732 * descriptors in the table. There is no need to start the iteration
733 * over smpt array all over again.
734 *
735 * Find the matching configuration map.
736 */
737 ret = ERR_PTR(-EINVAL);
738 while (i < smpt_len) {
739 if (SMPT_MAP_ID(smpt[i]) == map_id) {
740 ret = smpt + i;
741 break;
742 }
743
744 /*
745 * If there are no more configuration map descriptors and no
746 * configuration ID matched the configuration identifier, the
747 * sector address map is unknown.
748 */
749 if (smpt[i] & SMPT_DESC_END)
750 break;
751
752 /* increment the table index to the next map */
753 i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1;
754 }
755
756 /* fall through */
757out:
758 kfree(buf);
759 nor->addr_width = addr_width;
760 nor->read_dummy = read_dummy;
761 nor->read_opcode = read_opcode;
762 return ret;
763}
764
765static void spi_nor_region_mark_end(struct spi_nor_erase_region *region)
766{
767 region->offset |= SNOR_LAST_REGION;
768}
769
770static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region)
771{
772 region->offset |= SNOR_OVERLAID_REGION;
773}
774
775/**
776 * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid
777 * @region: pointer to a structure that describes a SPI NOR erase region
778 * @erase: pointer to a structure that describes a SPI NOR erase type
779 * @erase_type: erase type bitmask
780 */
781static void
782spi_nor_region_check_overlay(struct spi_nor_erase_region *region,
783 const struct spi_nor_erase_type *erase,
784 const u8 erase_type)
785{
786 int i;
787
788 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
789 if (!(erase[i].size && erase_type & BIT(erase[i].idx)))
790 continue;
791 if (region->size & erase[i].size_mask) {
792 spi_nor_region_mark_overlay(region);
793 return;
794 }
795 }
796}
797
798/**
799 * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map
800 * @nor: pointer to a 'struct spi_nor'
801 * @smpt: pointer to the sector map parameter table
802 *
803 * Return: 0 on success, -errno otherwise.
804 */
805static int spi_nor_init_non_uniform_erase_map(struct spi_nor *nor,
806 const u32 *smpt)
807{
808 struct spi_nor_erase_map *map = &nor->params->erase_map;
809 struct spi_nor_erase_type *erase = map->erase_type;
810 struct spi_nor_erase_region *region;
811 u64 offset;
812 u32 region_count;
813 int i, j;
814 u8 uniform_erase_type, save_uniform_erase_type;
815 u8 erase_type, regions_erase_type;
816
817 region_count = SMPT_MAP_REGION_COUNT(*smpt);
818 /*
819 * The regions will be freed when the driver detaches from the
820 * device.
821 */
822 region = devm_kcalloc(nor->dev, region_count, sizeof(*region),
823 GFP_KERNEL);
824 if (!region)
825 return -ENOMEM;
826 map->regions = region;
827
828 uniform_erase_type = 0xff;
829 regions_erase_type = 0;
830 offset = 0;
831 /* Populate regions. */
832 for (i = 0; i < region_count; i++) {
833 j = i + 1; /* index for the region dword */
834 region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]);
835 erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]);
836 region[i].offset = offset | erase_type;
837
838 spi_nor_region_check_overlay(®ion[i], erase, erase_type);
839
840 /*
841 * Save the erase types that are supported in all regions and
842 * can erase the entire flash memory.
843 */
844 uniform_erase_type &= erase_type;
845
846 /*
847 * regions_erase_type mask will indicate all the erase types
848 * supported in this configuration map.
849 */
850 regions_erase_type |= erase_type;
851
852 offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) +
853 region[i].size;
854 }
855 spi_nor_region_mark_end(®ion[i - 1]);
856
857 save_uniform_erase_type = map->uniform_erase_type;
858 map->uniform_erase_type = spi_nor_sort_erase_mask(map,
859 uniform_erase_type);
860
861 if (!regions_erase_type) {
862 /*
863 * Roll back to the previous uniform_erase_type mask, SMPT is
864 * broken.
865 */
866 map->uniform_erase_type = save_uniform_erase_type;
867 return -EINVAL;
868 }
869
870 /*
871 * BFPT advertises all the erase types supported by all the possible
872 * map configurations. Mask out the erase types that are not supported
873 * by the current map configuration.
874 */
875 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
876 if (!(regions_erase_type & BIT(erase[i].idx)))
877 spi_nor_set_erase_type(&erase[i], 0, 0xFF);
878
879 return 0;
880}
881
882/**
883 * spi_nor_parse_smpt() - parse Sector Map Parameter Table
884 * @nor: pointer to a 'struct spi_nor'
885 * @smpt_header: sector map parameter table header
886 *
887 * This table is optional, but when available, we parse it to identify the
888 * location and size of sectors within the main data array of the flash memory
889 * device and to identify which Erase Types are supported by each sector.
890 *
891 * Return: 0 on success, -errno otherwise.
892 */
893static int spi_nor_parse_smpt(struct spi_nor *nor,
894 const struct sfdp_parameter_header *smpt_header)
895{
896 const u32 *sector_map;
897 u32 *smpt;
898 size_t len;
899 u32 addr;
900 int ret;
901
902 /* Read the Sector Map Parameter Table. */
903 len = smpt_header->length * sizeof(*smpt);
904 smpt = kmalloc(len, GFP_KERNEL);
905 if (!smpt)
906 return -ENOMEM;
907
908 addr = SFDP_PARAM_HEADER_PTP(smpt_header);
909 ret = spi_nor_read_sfdp(nor, addr, len, smpt);
910 if (ret)
911 goto out;
912
913 /* Fix endianness of the SMPT DWORDs. */
914 le32_to_cpu_array(smpt, smpt_header->length);
915
916 sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length);
917 if (IS_ERR(sector_map)) {
918 ret = PTR_ERR(sector_map);
919 goto out;
920 }
921
922 ret = spi_nor_init_non_uniform_erase_map(nor, sector_map);
923 if (ret)
924 goto out;
925
926 spi_nor_regions_sort_erase_types(&nor->params->erase_map);
927 /* fall through */
928out:
929 kfree(smpt);
930 return ret;
931}
932
933/**
934 * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table
935 * @nor: pointer to a 'struct spi_nor'.
936 * @param_header: pointer to the 'struct sfdp_parameter_header' describing
937 * the 4-Byte Address Instruction Table length and version.
938 *
939 * Return: 0 on success, -errno otherwise.
940 */
941static int spi_nor_parse_4bait(struct spi_nor *nor,
942 const struct sfdp_parameter_header *param_header)
943{
944 static const struct sfdp_4bait reads[] = {
945 { SNOR_HWCAPS_READ, BIT(0) },
946 { SNOR_HWCAPS_READ_FAST, BIT(1) },
947 { SNOR_HWCAPS_READ_1_1_2, BIT(2) },
948 { SNOR_HWCAPS_READ_1_2_2, BIT(3) },
949 { SNOR_HWCAPS_READ_1_1_4, BIT(4) },
950 { SNOR_HWCAPS_READ_1_4_4, BIT(5) },
951 { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) },
952 { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) },
953 { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) },
954 };
955 static const struct sfdp_4bait programs[] = {
956 { SNOR_HWCAPS_PP, BIT(6) },
957 { SNOR_HWCAPS_PP_1_1_4, BIT(7) },
958 { SNOR_HWCAPS_PP_1_4_4, BIT(8) },
959 };
960 static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {
961 { 0u /* not used */, BIT(9) },
962 { 0u /* not used */, BIT(10) },
963 { 0u /* not used */, BIT(11) },
964 { 0u /* not used */, BIT(12) },
965 };
966 struct spi_nor_flash_parameter *params = nor->params;
967 struct spi_nor_pp_command *params_pp = params->page_programs;
968 struct spi_nor_erase_map *map = ¶ms->erase_map;
969 struct spi_nor_erase_type *erase_type = map->erase_type;
970 u32 *dwords;
971 size_t len;
972 u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask;
973 int i, ret;
974
975 if (param_header->major != SFDP_JESD216_MAJOR ||
976 param_header->length < SFDP_4BAIT_DWORD_MAX)
977 return -EINVAL;
978
979 /* Read the 4-byte Address Instruction Table. */
980 len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX;
981
982 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
983 dwords = kmalloc(len, GFP_KERNEL);
984 if (!dwords)
985 return -ENOMEM;
986
987 addr = SFDP_PARAM_HEADER_PTP(param_header);
988 ret = spi_nor_read_sfdp(nor, addr, len, dwords);
989 if (ret)
990 goto out;
991
992 /* Fix endianness of the 4BAIT DWORDs. */
993 le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX);
994
995 /*
996 * Compute the subset of (Fast) Read commands for which the 4-byte
997 * version is supported.
998 */
999 discard_hwcaps = 0;
1000 read_hwcaps = 0;
1001 for (i = 0; i < ARRAY_SIZE(reads); i++) {
1002 const struct sfdp_4bait *read = &reads[i];
1003
1004 discard_hwcaps |= read->hwcaps;
1005 if ((params->hwcaps.mask & read->hwcaps) &&
1006 (dwords[0] & read->supported_bit))
1007 read_hwcaps |= read->hwcaps;
1008 }
1009
1010 /*
1011 * Compute the subset of Page Program commands for which the 4-byte
1012 * version is supported.
1013 */
1014 pp_hwcaps = 0;
1015 for (i = 0; i < ARRAY_SIZE(programs); i++) {
1016 const struct sfdp_4bait *program = &programs[i];
1017
1018 /*
1019 * The 4 Byte Address Instruction (Optional) Table is the only
1020 * SFDP table that indicates support for Page Program Commands.
1021 * Bypass the params->hwcaps.mask and consider 4BAIT the biggest
1022 * authority for specifying Page Program support.
1023 */
1024 discard_hwcaps |= program->hwcaps;
1025 if (dwords[0] & program->supported_bit)
1026 pp_hwcaps |= program->hwcaps;
1027 }
1028
1029 /*
1030 * Compute the subset of Sector Erase commands for which the 4-byte
1031 * version is supported.
1032 */
1033 erase_mask = 0;
1034 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1035 const struct sfdp_4bait *erase = &erases[i];
1036
1037 if (dwords[0] & erase->supported_bit)
1038 erase_mask |= BIT(i);
1039 }
1040
1041 /* Replicate the sort done for the map's erase types in BFPT. */
1042 erase_mask = spi_nor_sort_erase_mask(map, erase_mask);
1043
1044 /*
1045 * We need at least one 4-byte op code per read, program and erase
1046 * operation; the .read(), .write() and .erase() hooks share the
1047 * nor->addr_width value.
1048 */
1049 if (!read_hwcaps || !pp_hwcaps || !erase_mask)
1050 goto out;
1051
1052 /*
1053 * Discard all operations from the 4-byte instruction set which are
1054 * not supported by this memory.
1055 */
1056 params->hwcaps.mask &= ~discard_hwcaps;
1057 params->hwcaps.mask |= (read_hwcaps | pp_hwcaps);
1058
1059 /* Use the 4-byte address instruction set. */
1060 for (i = 0; i < SNOR_CMD_READ_MAX; i++) {
1061 struct spi_nor_read_command *read_cmd = ¶ms->reads[i];
1062
1063 read_cmd->opcode = spi_nor_convert_3to4_read(read_cmd->opcode);
1064 }
1065
1066 /* 4BAIT is the only SFDP table that indicates page program support. */
1067 if (pp_hwcaps & SNOR_HWCAPS_PP) {
1068 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP],
1069 SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1);
1070 /*
1071 * Since xSPI Page Program opcode is backward compatible with
1072 * Legacy SPI, use Legacy SPI opcode there as well.
1073 */
1074 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_8_8_8_DTR],
1075 SPINOR_OP_PP_4B, SNOR_PROTO_8_8_8_DTR);
1076 }
1077 if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4)
1078 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_1_4],
1079 SPINOR_OP_PP_1_1_4_4B,
1080 SNOR_PROTO_1_1_4);
1081 if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4)
1082 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_4_4],
1083 SPINOR_OP_PP_1_4_4_4B,
1084 SNOR_PROTO_1_4_4);
1085
1086 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1087 if (erase_mask & BIT(i))
1088 erase_type[i].opcode = (dwords[1] >>
1089 erase_type[i].idx * 8) & 0xFF;
1090 else
1091 spi_nor_set_erase_type(&erase_type[i], 0u, 0xFF);
1092 }
1093
1094 /*
1095 * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes()
1096 * later because we already did the conversion to 4byte opcodes. Also,
1097 * this latest function implements a legacy quirk for the erase size of
1098 * Spansion memory. However this quirk is no longer needed with new
1099 * SFDP compliant memories.
1100 */
1101 nor->addr_width = 4;
1102 nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT;
1103
1104 /* fall through */
1105out:
1106 kfree(dwords);
1107 return ret;
1108}
1109
1110#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29)
1111#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28)
1112#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8)
1113#define PROFILE1_DWORD4_DUMMY_200MHZ GENMASK(11, 7)
1114#define PROFILE1_DWORD5_DUMMY_166MHZ GENMASK(31, 27)
1115#define PROFILE1_DWORD5_DUMMY_133MHZ GENMASK(21, 17)
1116#define PROFILE1_DWORD5_DUMMY_100MHZ GENMASK(11, 7)
1117
1118/**
1119 * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table
1120 * @nor: pointer to a 'struct spi_nor'
1121 * @profile1_header: pointer to the 'struct sfdp_parameter_header' describing
1122 * the Profile 1.0 Table length and version.
1123 *
1124 * Return: 0 on success, -errno otherwise.
1125 */
1126static int spi_nor_parse_profile1(struct spi_nor *nor,
1127 const struct sfdp_parameter_header *profile1_header)
1128{
1129 u32 *dwords, addr;
1130 size_t len;
1131 int ret;
1132 u8 dummy, opcode;
1133
1134 len = profile1_header->length * sizeof(*dwords);
1135 dwords = kmalloc(len, GFP_KERNEL);
1136 if (!dwords)
1137 return -ENOMEM;
1138
1139 addr = SFDP_PARAM_HEADER_PTP(profile1_header);
1140 ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1141 if (ret)
1142 goto out;
1143
1144 le32_to_cpu_array(dwords, profile1_header->length);
1145
1146 /* Get 8D-8D-8D fast read opcode and dummy cycles. */
1147 opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, dwords[0]);
1148
1149 /* Set the Read Status Register dummy cycles and dummy address bytes. */
1150 if (dwords[0] & PROFILE1_DWORD1_RDSR_DUMMY)
1151 nor->params->rdsr_dummy = 8;
1152 else
1153 nor->params->rdsr_dummy = 4;
1154
1155 if (dwords[0] & PROFILE1_DWORD1_RDSR_ADDR_BYTES)
1156 nor->params->rdsr_addr_nbytes = 4;
1157 else
1158 nor->params->rdsr_addr_nbytes = 0;
1159
1160 /*
1161 * We don't know what speed the controller is running at. Find the
1162 * dummy cycles for the fastest frequency the flash can run at to be
1163 * sure we are never short of dummy cycles. A value of 0 means the
1164 * frequency is not supported.
1165 *
1166 * Default to PROFILE1_DUMMY_DEFAULT if we don't find anything, and let
1167 * flashes set the correct value if needed in their fixup hooks.
1168 */
1169 dummy = FIELD_GET(PROFILE1_DWORD4_DUMMY_200MHZ, dwords[3]);
1170 if (!dummy)
1171 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_166MHZ, dwords[4]);
1172 if (!dummy)
1173 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_133MHZ, dwords[4]);
1174 if (!dummy)
1175 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_100MHZ, dwords[4]);
1176 if (!dummy)
1177 dev_dbg(nor->dev,
1178 "Can't find dummy cycles from Profile 1.0 table\n");
1179
1180 /* Round up to an even value to avoid tripping controllers up. */
1181 dummy = round_up(dummy, 2);
1182
1183 /* Update the fast read settings. */
1184 spi_nor_set_read_settings(&nor->params->reads[SNOR_CMD_READ_8_8_8_DTR],
1185 0, dummy, opcode,
1186 SNOR_PROTO_8_8_8_DTR);
1187
1188out:
1189 kfree(dwords);
1190 return ret;
1191}
1192
1193#define SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE BIT(31)
1194
1195/**
1196 * spi_nor_parse_sccr() - Parse the Status, Control and Configuration Register
1197 * Map.
1198 * @nor: pointer to a 'struct spi_nor'
1199 * @sccr_header: pointer to the 'struct sfdp_parameter_header' describing
1200 * the SCCR Map table length and version.
1201 *
1202 * Return: 0 on success, -errno otherwise.
1203 */
1204static int spi_nor_parse_sccr(struct spi_nor *nor,
1205 const struct sfdp_parameter_header *sccr_header)
1206{
1207 u32 *dwords, addr;
1208 size_t len;
1209 int ret;
1210
1211 len = sccr_header->length * sizeof(*dwords);
1212 dwords = kmalloc(len, GFP_KERNEL);
1213 if (!dwords)
1214 return -ENOMEM;
1215
1216 addr = SFDP_PARAM_HEADER_PTP(sccr_header);
1217 ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1218 if (ret)
1219 goto out;
1220
1221 le32_to_cpu_array(dwords, sccr_header->length);
1222
1223 if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE, dwords[22]))
1224 nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;
1225
1226out:
1227 kfree(dwords);
1228 return ret;
1229}
1230
1231/**
1232 * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
1233 * @nor: pointer to a 'struct spi_nor'
1234 *
1235 * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216
1236 * specification. This is a standard which tends to supported by almost all
1237 * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at
1238 * runtime the main parameters needed to perform basic SPI flash operations such
1239 * as Fast Read, Page Program or Sector Erase commands.
1240 *
1241 * Return: 0 on success, -errno otherwise.
1242 */
1243int spi_nor_parse_sfdp(struct spi_nor *nor)
1244{
1245 const struct sfdp_parameter_header *param_header, *bfpt_header;
1246 struct sfdp_parameter_header *param_headers = NULL;
1247 struct sfdp_header header;
1248 struct device *dev = nor->dev;
1249 struct sfdp *sfdp;
1250 size_t sfdp_size;
1251 size_t psize;
1252 int i, err;
1253
1254 /* Get the SFDP header. */
1255 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header);
1256 if (err < 0)
1257 return err;
1258
1259 /* Check the SFDP header version. */
1260 if (le32_to_cpu(header.signature) != SFDP_SIGNATURE ||
1261 header.major != SFDP_JESD216_MAJOR)
1262 return -EINVAL;
1263
1264 /*
1265 * Verify that the first and only mandatory parameter header is a
1266 * Basic Flash Parameter Table header as specified in JESD216.
1267 */
1268 bfpt_header = &header.bfpt_header;
1269 if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID ||
1270 bfpt_header->major != SFDP_JESD216_MAJOR)
1271 return -EINVAL;
1272
1273 sfdp_size = SFDP_PARAM_HEADER_PTP(bfpt_header) +
1274 SFDP_PARAM_HEADER_PARAM_LEN(bfpt_header);
1275
1276 /*
1277 * Allocate memory then read all parameter headers with a single
1278 * Read SFDP command. These parameter headers will actually be parsed
1279 * twice: a first time to get the latest revision of the basic flash
1280 * parameter table, then a second time to handle the supported optional
1281 * tables.
1282 * Hence we read the parameter headers once for all to reduce the
1283 * processing time. Also we use kmalloc() instead of devm_kmalloc()
1284 * because we don't need to keep these parameter headers: the allocated
1285 * memory is always released with kfree() before exiting this function.
1286 */
1287 if (header.nph) {
1288 psize = header.nph * sizeof(*param_headers);
1289
1290 param_headers = kmalloc(psize, GFP_KERNEL);
1291 if (!param_headers)
1292 return -ENOMEM;
1293
1294 err = spi_nor_read_sfdp(nor, sizeof(header),
1295 psize, param_headers);
1296 if (err < 0) {
1297 dev_dbg(dev, "failed to read SFDP parameter headers\n");
1298 goto exit;
1299 }
1300 }
1301
1302 /*
1303 * Cache the complete SFDP data. It is not (easily) possible to fetch
1304 * SFDP after probe time and we need it for the sysfs access.
1305 */
1306 for (i = 0; i < header.nph; i++) {
1307 param_header = ¶m_headers[i];
1308 sfdp_size = max_t(size_t, sfdp_size,
1309 SFDP_PARAM_HEADER_PTP(param_header) +
1310 SFDP_PARAM_HEADER_PARAM_LEN(param_header));
1311 }
1312
1313 /*
1314 * Limit the total size to a reasonable value to avoid allocating too
1315 * much memory just of because the flash returned some insane values.
1316 */
1317 if (sfdp_size > PAGE_SIZE) {
1318 dev_dbg(dev, "SFDP data (%zu) too big, truncating\n",
1319 sfdp_size);
1320 sfdp_size = PAGE_SIZE;
1321 }
1322
1323 sfdp = devm_kzalloc(dev, sizeof(*sfdp), GFP_KERNEL);
1324 if (!sfdp) {
1325 err = -ENOMEM;
1326 goto exit;
1327 }
1328
1329 /*
1330 * The SFDP is organized in chunks of DWORDs. Thus, in theory, the
1331 * sfdp_size should be a multiple of DWORDs. But in case a flash
1332 * is not spec compliant, make sure that we have enough space to store
1333 * the complete SFDP data.
1334 */
1335 sfdp->num_dwords = DIV_ROUND_UP(sfdp_size, sizeof(*sfdp->dwords));
1336 sfdp->dwords = devm_kcalloc(dev, sfdp->num_dwords,
1337 sizeof(*sfdp->dwords), GFP_KERNEL);
1338 if (!sfdp->dwords) {
1339 err = -ENOMEM;
1340 devm_kfree(dev, sfdp);
1341 goto exit;
1342 }
1343
1344 err = spi_nor_read_sfdp(nor, 0, sfdp_size, sfdp->dwords);
1345 if (err < 0) {
1346 dev_dbg(dev, "failed to read SFDP data\n");
1347 devm_kfree(dev, sfdp->dwords);
1348 devm_kfree(dev, sfdp);
1349 goto exit;
1350 }
1351
1352 nor->sfdp = sfdp;
1353
1354 /*
1355 * Check other parameter headers to get the latest revision of
1356 * the basic flash parameter table.
1357 */
1358 for (i = 0; i < header.nph; i++) {
1359 param_header = ¶m_headers[i];
1360
1361 if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID &&
1362 param_header->major == SFDP_JESD216_MAJOR &&
1363 (param_header->minor > bfpt_header->minor ||
1364 (param_header->minor == bfpt_header->minor &&
1365 param_header->length > bfpt_header->length)))
1366 bfpt_header = param_header;
1367 }
1368
1369 err = spi_nor_parse_bfpt(nor, bfpt_header);
1370 if (err)
1371 goto exit;
1372
1373 /* Parse optional parameter tables. */
1374 for (i = 0; i < header.nph; i++) {
1375 param_header = ¶m_headers[i];
1376
1377 switch (SFDP_PARAM_HEADER_ID(param_header)) {
1378 case SFDP_SECTOR_MAP_ID:
1379 err = spi_nor_parse_smpt(nor, param_header);
1380 break;
1381
1382 case SFDP_4BAIT_ID:
1383 err = spi_nor_parse_4bait(nor, param_header);
1384 break;
1385
1386 case SFDP_PROFILE1_ID:
1387 err = spi_nor_parse_profile1(nor, param_header);
1388 break;
1389
1390 case SFDP_SCCR_MAP_ID:
1391 err = spi_nor_parse_sccr(nor, param_header);
1392 break;
1393
1394 default:
1395 break;
1396 }
1397
1398 if (err) {
1399 dev_warn(dev, "Failed to parse optional parameter table: %04x\n",
1400 SFDP_PARAM_HEADER_ID(param_header));
1401 /*
1402 * Let's not drop all information we extracted so far
1403 * if optional table parsers fail. In case of failing,
1404 * each optional parser is responsible to roll back to
1405 * the previously known spi_nor data.
1406 */
1407 err = 0;
1408 }
1409 }
1410
1411exit:
1412 kfree(param_headers);
1413 return err;
1414}