1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Driver for Xilinx TMR Inject IP.
  4 *
  5 * Copyright (C) 2022 Advanced Micro Devices, Inc.
  6 *
  7 * Description:
  8 * This driver is developed for TMR Inject IP,The Triple Modular Redundancy(TMR)
  9 * Inject provides fault injection.
 10 */
 11
 12#include <asm/xilinx_mb_manager.h>
 13#include <linux/module.h>
 14#include <linux/of.h>
 15#include <linux/platform_device.h>
 16#include <linux/fault-inject.h>
 17
 18/* TMR Inject Register offsets */
 19#define XTMR_INJECT_CR_OFFSET		0x0
 20#define XTMR_INJECT_AIR_OFFSET		0x4
 21#define XTMR_INJECT_IIR_OFFSET		0xC
 22#define XTMR_INJECT_EAIR_OFFSET		0x10
 23#define XTMR_INJECT_ERR_OFFSET		0x204
 24
 25/* Register Bitmasks/shifts */
 26#define XTMR_INJECT_CR_CPUID_SHIFT	8
 27#define XTMR_INJECT_CR_IE_SHIFT		10
 28#define XTMR_INJECT_IIR_ADDR_MASK	GENMASK(31, 16)
 29
 30#define XTMR_INJECT_MAGIC_MAX_VAL	255
 31
 32/**
 33 * struct xtmr_inject_dev - Driver data for TMR Inject
 34 * @regs: device physical base address
 35 * @magic: Magic hardware configuration value
 36 */
 37struct xtmr_inject_dev {
 38	void __iomem *regs;
 39	u32 magic;
 40};
 41
 42static DECLARE_FAULT_ATTR(inject_fault);
 43static char *inject_request;
 44module_param(inject_request, charp, 0);
 45MODULE_PARM_DESC(inject_request, "default fault injection attributes");
 46static struct dentry *dbgfs_root;
 47
 48/* IO accessors */
 49static inline void xtmr_inject_write(struct xtmr_inject_dev *xtmr_inject,
 50				     u32 addr, u32 value)
 51{
 52	iowrite32(value, xtmr_inject->regs + addr);
 53}
 54
 55static inline u32 xtmr_inject_read(struct xtmr_inject_dev *xtmr_inject,
 56				   u32 addr)
 57{
 58	return ioread32(xtmr_inject->regs + addr);
 59}
 60
 61static int xtmr_inject_set(void *data, u64 val)
 62{
 63	if (val != 1)
 64		return -EINVAL;
 65
 66	xmb_inject_err();
 67	return 0;
 68}
 69DEFINE_DEBUGFS_ATTRIBUTE(xtmr_inject_fops, NULL, xtmr_inject_set, "%llu\n");
 70
 71static void xtmr_init_debugfs(struct xtmr_inject_dev *xtmr_inject)
 72{
 73	struct dentry *dir;
 74
 75	dbgfs_root = debugfs_create_dir("xtmr_inject", NULL);
 76	dir = fault_create_debugfs_attr("inject_fault", dbgfs_root,
 77					&inject_fault);
 78	debugfs_create_file("inject_fault", 0200, dir, NULL,
 79			    &xtmr_inject_fops);
 80}
 81
 82static void xtmr_inject_init(struct xtmr_inject_dev *xtmr_inject)
 83{
 84	u32 cr_val;
 85
 86	if (inject_request)
 87		setup_fault_attr(&inject_fault, inject_request);
 88	/* Allow fault injection */
 89	cr_val = xtmr_inject->magic |
 90		 (1 << XTMR_INJECT_CR_IE_SHIFT) |
 91		 (1 << XTMR_INJECT_CR_CPUID_SHIFT);
 92	xtmr_inject_write(xtmr_inject, XTMR_INJECT_CR_OFFSET,
 93			  cr_val);
 94	/* Initialize the address inject and instruction inject registers */
 95	xtmr_inject_write(xtmr_inject, XTMR_INJECT_AIR_OFFSET,
 96			  XMB_INJECT_ERR_OFFSET);
 97	xtmr_inject_write(xtmr_inject, XTMR_INJECT_IIR_OFFSET,
 98			  XMB_INJECT_ERR_OFFSET & XTMR_INJECT_IIR_ADDR_MASK);
 99}
100
101/**
102 * xtmr_inject_probe - Driver probe function
103 * @pdev: Pointer to the platform_device structure
104 *
105 * This is the driver probe routine. It does all the memory
106 * allocation for the device.
107 *
108 * Return: 0 on success and failure value on error
109 */
110static int xtmr_inject_probe(struct platform_device *pdev)
111{
112	struct xtmr_inject_dev *xtmr_inject;
113	int err;
114
115	xtmr_inject = devm_kzalloc(&pdev->dev, sizeof(*xtmr_inject),
116				   GFP_KERNEL);
117	if (!xtmr_inject)
118		return -ENOMEM;
119
120	xtmr_inject->regs = devm_platform_ioremap_resource(pdev, 0);
121	if (IS_ERR(xtmr_inject->regs))
122		return PTR_ERR(xtmr_inject->regs);
123
124	err = of_property_read_u32(pdev->dev.of_node, "xlnx,magic",
125				   &xtmr_inject->magic);
126	if (err < 0) {
127		dev_err(&pdev->dev, "unable to read xlnx,magic property");
128		return err;
129	}
130
131	if (xtmr_inject->magic > XTMR_INJECT_MAGIC_MAX_VAL) {
132		dev_err(&pdev->dev, "invalid xlnx,magic property value");
133		return -EINVAL;
134	}
135
136	/* Initialize TMR Inject */
137	xtmr_inject_init(xtmr_inject);
138
139	xtmr_init_debugfs(xtmr_inject);
140
141	platform_set_drvdata(pdev, xtmr_inject);
142
143	return 0;
144}
145
146static int xtmr_inject_remove(struct platform_device *pdev)
147{
148	debugfs_remove_recursive(dbgfs_root);
149	dbgfs_root = NULL;
150	return 0;
151}
152
153static const struct of_device_id xtmr_inject_of_match[] = {
154	{
155		.compatible = "xlnx,tmr-inject-1.0",
156	},
157	{ /* end of table */ }
158};
159MODULE_DEVICE_TABLE(of, xtmr_inject_of_match);
160
161static struct platform_driver xtmr_inject_driver = {
162	.driver = {
163		.name = "xilinx-tmr_inject",
164		.of_match_table = xtmr_inject_of_match,
165	},
166	.probe = xtmr_inject_probe,
167	.remove = xtmr_inject_remove,
168};
169module_platform_driver(xtmr_inject_driver);
170MODULE_AUTHOR("Advanced Micro Devices, Inc");
171MODULE_DESCRIPTION("Xilinx TMR Inject Driver");
172MODULE_LICENSE("GPL");