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v6.8
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * TI Touch Screen / ADC MFD driver
  4 *
  5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 
 
 
 
 
 
 
 
 
  6 */
  7
  8#include <linux/module.h>
  9#include <linux/slab.h>
 10#include <linux/err.h>
 11#include <linux/io.h>
 12#include <linux/clk.h>
 13#include <linux/regmap.h>
 14#include <linux/mfd/core.h>
 15#include <linux/pm_runtime.h>
 16#include <linux/of.h>
 17#include <linux/platform_device.h>
 18#include <linux/sched.h>
 19
 20#include <linux/mfd/ti_am335x_tscadc.h>
 21
 22static const struct regmap_config tscadc_regmap_config = {
 23	.name = "ti_tscadc",
 24	.reg_bits = 32,
 25	.reg_stride = 4,
 26	.val_bits = 32,
 27};
 28
 29void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
 30{
 31	unsigned long flags;
 32
 33	spin_lock_irqsave(&tscadc->reg_lock, flags);
 34	tscadc->reg_se_cache |= val;
 35	if (tscadc->adc_waiting)
 36		wake_up(&tscadc->reg_se_wait);
 37	else if (!tscadc->adc_in_use)
 38		regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
 39
 40	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
 41}
 42EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
 43
 44static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
 45{
 46	DEFINE_WAIT(wait);
 47	u32 reg;
 48
 49	regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
 50	if (reg & SEQ_STATUS) {
 51		tscadc->adc_waiting = true;
 52		prepare_to_wait(&tscadc->reg_se_wait, &wait,
 53				TASK_UNINTERRUPTIBLE);
 54		spin_unlock_irq(&tscadc->reg_lock);
 55
 56		schedule();
 57
 58		spin_lock_irq(&tscadc->reg_lock);
 59		finish_wait(&tscadc->reg_se_wait, &wait);
 60
 61		/*
 62		 * Sequencer should either be idle or
 63		 * busy applying the charge step.
 64		 */
 65		regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
 66		WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
 67		tscadc->adc_waiting = false;
 68	}
 69	tscadc->adc_in_use = true;
 70}
 71
 72void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
 73{
 74	spin_lock_irq(&tscadc->reg_lock);
 75	am335x_tscadc_need_adc(tscadc);
 76
 77	regmap_write(tscadc->regmap, REG_SE, val);
 78	spin_unlock_irq(&tscadc->reg_lock);
 79}
 80EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
 81
 82void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
 83{
 84	unsigned long flags;
 85
 86	spin_lock_irqsave(&tscadc->reg_lock, flags);
 87	tscadc->adc_in_use = false;
 88	regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
 89	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
 90}
 91EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
 92
 93void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
 94{
 95	unsigned long flags;
 96
 97	spin_lock_irqsave(&tscadc->reg_lock, flags);
 98	tscadc->reg_se_cache &= ~val;
 99	regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
100	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
101}
102EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
103
104static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
105{
106	unsigned int idleconfig;
107
108	idleconfig = STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM;
109	if (ti_adc_with_touchscreen(tscadc))
110		idleconfig |= STEPCONFIG_YNN | STEPCONFIG_YPN;
111
112	regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
113}
114
115static	int ti_tscadc_probe(struct platform_device *pdev)
116{
117	struct ti_tscadc_dev *tscadc;
118	struct resource *res;
119	struct clk *clk;
120	struct device_node *node;
121	struct mfd_cell *cell;
122	struct property *prop;
123	const __be32 *cur;
124	bool use_tsc = false, use_mag = false;
125	u32 val;
126	int err;
127	int tscmag_wires = 0, adc_channels = 0, cell_idx = 0, total_channels;
128	int readouts = 0, mag_tracks = 0;
129
130	/* Allocate memory for device */
131	tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
132	if (!tscadc)
133		return -ENOMEM;
134
135	tscadc->dev = &pdev->dev;
136
137	if (!pdev->dev.of_node) {
138		dev_err(&pdev->dev, "Could not find valid DT data.\n");
139		return -EINVAL;
140	}
141
142	tscadc->data = of_device_get_match_data(&pdev->dev);
143
144	if (ti_adc_with_touchscreen(tscadc)) {
145		node = of_get_child_by_name(pdev->dev.of_node, "tsc");
146		of_property_read_u32(node, "ti,wires", &tscmag_wires);
147		err = of_property_read_u32(node, "ti,coordinate-readouts",
148					   &readouts);
149		if (err < 0)
150			of_property_read_u32(node, "ti,coordiante-readouts",
151					     &readouts);
152
153		of_node_put(node);
154
155		if (tscmag_wires)
156			use_tsc = true;
157	} else {
158		/*
159		 * When adding support for the magnetic stripe reader, here is
160		 * the place to look for the number of tracks used from device
161		 * tree. Let's default to 0 for now.
162		 */
163		mag_tracks = 0;
164		tscmag_wires = mag_tracks * 2;
165		if (tscmag_wires)
166			use_mag = true;
167	}
168
169	node = of_get_child_by_name(pdev->dev.of_node, "adc");
170	of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
171		adc_channels++;
172		if (val > 7) {
173			dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
174				val);
175			of_node_put(node);
176			return -EINVAL;
177		}
178	}
179
180	of_node_put(node);
181
182	total_channels = tscmag_wires + adc_channels;
183	if (total_channels > 8) {
184		dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
185		return -EINVAL;
186	}
187
188	if (total_channels == 0) {
189		dev_err(&pdev->dev, "Need at least one channel.\n");
190		return -EINVAL;
191	}
192
193	if (use_tsc && (readouts * 2 + 2 + adc_channels > 16)) {
194		dev_err(&pdev->dev, "Too many step configurations requested\n");
195		return -EINVAL;
196	}
197
 
 
 
 
 
 
 
198	err = platform_get_irq(pdev, 0);
199	if (err < 0)
200		return err;
201	else
 
202		tscadc->irq = err;
203
204	tscadc->tscadc_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
 
205	if (IS_ERR(tscadc->tscadc_base))
206		return PTR_ERR(tscadc->tscadc_base);
207
208	tscadc->tscadc_phys_base = res->start;
209	tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
210					       tscadc->tscadc_base,
211					       &tscadc_regmap_config);
212	if (IS_ERR(tscadc->regmap)) {
213		dev_err(&pdev->dev, "regmap init failed\n");
214		return PTR_ERR(tscadc->regmap);
 
215	}
216
217	spin_lock_init(&tscadc->reg_lock);
218	init_waitqueue_head(&tscadc->reg_se_wait);
219
220	pm_runtime_enable(&pdev->dev);
221	pm_runtime_get_sync(&pdev->dev);
222
223	/*
224	 * The TSC_ADC_Subsystem has 2 clock domains: OCP_CLK and ADC_CLK.
225	 * ADCs produce a 12-bit sample every 15 ADC_CLK cycles.
226	 * am33xx ADCs expect to capture 200ksps.
227	 * am47xx ADCs expect to capture 867ksps.
228	 * We need ADC clocks respectively running at 3MHz and 13MHz.
229	 * These frequencies are valid since TSC_ADC_SS controller design
230	 * assumes the OCP clock is at least 6x faster than the ADC clock.
231	 */
232	clk = devm_clk_get(&pdev->dev, NULL);
233	if (IS_ERR(clk)) {
234		dev_err(&pdev->dev, "failed to get fck\n");
235		err = PTR_ERR(clk);
236		goto err_disable_clk;
237	}
 
 
238
239	tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;
 
240	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
241
242	/*
243	 * Set the control register bits. tscadc->ctrl stores the configuration
244	 * of the CTRL register but not the subsystem enable bit which must be
245	 * added manually when timely.
246	 */
247	tscadc->ctrl = CNTRLREG_STEPID;
248	if (ti_adc_with_touchscreen(tscadc)) {
249		tscadc->ctrl |= CNTRLREG_TSC_STEPCONFIGWRT;
250		if (use_tsc) {
251			tscadc->ctrl |= CNTRLREG_TSC_ENB;
252			if (tscmag_wires == 5)
253				tscadc->ctrl |= CNTRLREG_TSC_5WIRE;
254			else
255				tscadc->ctrl |= CNTRLREG_TSC_4WIRE;
256		}
257	} else {
258		tscadc->ctrl |= CNTRLREG_MAG_PREAMP_PWRDOWN |
259				CNTRLREG_MAG_PREAMP_BYPASS;
260	}
261	regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
262
263	tscadc_idle_config(tscadc);
264
265	/* Enable the TSC module enable bit */
266	regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
 
267
268	/* TSC or MAG Cell */
269	if (use_tsc || use_mag) {
270		cell = &tscadc->cells[cell_idx++];
271		cell->name = tscadc->data->secondary_feature_name;
272		cell->of_compatible = tscadc->data->secondary_feature_compatible;
 
 
 
 
 
273		cell->platform_data = &tscadc;
274		cell->pdata_size = sizeof(tscadc);
275	}
276
277	/* ADC Cell */
278	if (adc_channels > 0) {
279		cell = &tscadc->cells[cell_idx++];
280		cell->name = tscadc->data->adc_feature_name;
281		cell->of_compatible = tscadc->data->adc_feature_compatible;
 
282		cell->platform_data = &tscadc;
283		cell->pdata_size = sizeof(tscadc);
284	}
285
286	err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
287			      tscadc->cells, cell_idx, NULL, 0, NULL);
 
288	if (err < 0)
289		goto err_disable_clk;
290
291	platform_set_drvdata(pdev, tscadc);
292	return 0;
293
294err_disable_clk:
295	pm_runtime_put_sync(&pdev->dev);
296	pm_runtime_disable(&pdev->dev);
297
298	return err;
299}
300
301static void ti_tscadc_remove(struct platform_device *pdev)
302{
303	struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
304
305	regmap_write(tscadc->regmap, REG_SE, 0x00);
306
307	pm_runtime_put_sync(&pdev->dev);
308	pm_runtime_disable(&pdev->dev);
309
310	mfd_remove_devices(tscadc->dev);
 
 
311}
312
313static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
314{
315	return device_may_wakeup(dev);
316}
317
318static int __maybe_unused tscadc_suspend(struct device *dev)
319{
320	struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
321
322	regmap_write(tscadc->regmap, REG_SE, 0x00);
323	if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
324		u32 ctrl;
325
326		regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
327		ctrl &= ~(CNTRLREG_POWERDOWN);
328		ctrl |= CNTRLREG_SSENB;
329		regmap_write(tscadc->regmap, REG_CTRL, ctrl);
330	}
331	pm_runtime_put_sync(dev);
332
333	return 0;
334}
335
336static int __maybe_unused tscadc_resume(struct device *dev)
337{
338	struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
 
339
340	pm_runtime_get_sync(dev);
341
 
 
 
 
 
 
 
 
 
 
 
 
 
 
342	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
343	regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
344	tscadc_idle_config(tscadc);
345	regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
346
347	return 0;
348}
349
350static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
351
352static const struct ti_tscadc_data tscdata = {
353	.adc_feature_name = "TI-am335x-adc",
354	.adc_feature_compatible = "ti,am3359-adc",
355	.secondary_feature_name = "TI-am335x-tsc",
356	.secondary_feature_compatible = "ti,am3359-tsc",
357	.target_clk_rate = TSC_ADC_CLK,
358};
359
360static const struct ti_tscadc_data magdata = {
361	.adc_feature_name = "TI-am43xx-adc",
362	.adc_feature_compatible = "ti,am4372-adc",
363	.secondary_feature_name = "TI-am43xx-mag",
364	.secondary_feature_compatible = "ti,am4372-mag",
365	.target_clk_rate = MAG_ADC_CLK,
366};
367
368static const struct of_device_id ti_tscadc_dt_ids[] = {
369	{ .compatible = "ti,am3359-tscadc", .data = &tscdata },
370	{ .compatible = "ti,am4372-magadc", .data = &magdata },
371	{ }
372};
373MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
374
375static struct platform_driver ti_tscadc_driver = {
376	.driver = {
377		.name   = "ti_am3359-tscadc",
378		.pm	= &tscadc_pm_ops,
379		.of_match_table = ti_tscadc_dt_ids,
380	},
381	.probe	= ti_tscadc_probe,
382	.remove_new = ti_tscadc_remove,
383
384};
385
386module_platform_driver(ti_tscadc_driver);
387
388MODULE_DESCRIPTION("TI touchscreen/magnetic stripe reader/ADC MFD controller driver");
389MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
390MODULE_LICENSE("GPL");
v5.14.15
 
  1/*
  2 * TI Touch Screen / ADC MFD driver
  3 *
  4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  5 *
  6 * This program is free software; you can redistribute it and/or
  7 * modify it under the terms of the GNU General Public License as
  8 * published by the Free Software Foundation version 2.
  9 *
 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 11 * kind, whether express or implied; without even the implied warranty
 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13 * GNU General Public License for more details.
 14 */
 15
 16#include <linux/module.h>
 17#include <linux/slab.h>
 18#include <linux/err.h>
 19#include <linux/io.h>
 20#include <linux/clk.h>
 21#include <linux/regmap.h>
 22#include <linux/mfd/core.h>
 23#include <linux/pm_runtime.h>
 24#include <linux/of.h>
 25#include <linux/of_device.h>
 26#include <linux/sched.h>
 27
 28#include <linux/mfd/ti_am335x_tscadc.h>
 29
 30static const struct regmap_config tscadc_regmap_config = {
 31	.name = "ti_tscadc",
 32	.reg_bits = 32,
 33	.reg_stride = 4,
 34	.val_bits = 32,
 35};
 36
 37void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
 38{
 39	unsigned long flags;
 40
 41	spin_lock_irqsave(&tscadc->reg_lock, flags);
 42	tscadc->reg_se_cache |= val;
 43	if (tscadc->adc_waiting)
 44		wake_up(&tscadc->reg_se_wait);
 45	else if (!tscadc->adc_in_use)
 46		regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
 47
 48	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
 49}
 50EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
 51
 52static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
 53{
 54	DEFINE_WAIT(wait);
 55	u32 reg;
 56
 57	regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
 58	if (reg & SEQ_STATUS) {
 59		tscadc->adc_waiting = true;
 60		prepare_to_wait(&tscadc->reg_se_wait, &wait,
 61				TASK_UNINTERRUPTIBLE);
 62		spin_unlock_irq(&tscadc->reg_lock);
 63
 64		schedule();
 65
 66		spin_lock_irq(&tscadc->reg_lock);
 67		finish_wait(&tscadc->reg_se_wait, &wait);
 68
 69		/*
 70		 * Sequencer should either be idle or
 71		 * busy applying the charge step.
 72		 */
 73		regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
 74		WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
 75		tscadc->adc_waiting = false;
 76	}
 77	tscadc->adc_in_use = true;
 78}
 79
 80void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
 81{
 82	spin_lock_irq(&tscadc->reg_lock);
 83	am335x_tscadc_need_adc(tscadc);
 84
 85	regmap_write(tscadc->regmap, REG_SE, val);
 86	spin_unlock_irq(&tscadc->reg_lock);
 87}
 88EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
 89
 90void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
 91{
 92	unsigned long flags;
 93
 94	spin_lock_irqsave(&tscadc->reg_lock, flags);
 95	tscadc->adc_in_use = false;
 96	regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
 97	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
 98}
 99EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
100
101void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
102{
103	unsigned long flags;
104
105	spin_lock_irqsave(&tscadc->reg_lock, flags);
106	tscadc->reg_se_cache &= ~val;
107	regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
108	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
109}
110EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
111
112static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
113{
114	unsigned int idleconfig;
115
116	idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
117			STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
 
118
119	regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
120}
121
122static	int ti_tscadc_probe(struct platform_device *pdev)
123{
124	struct ti_tscadc_dev	*tscadc;
125	struct resource		*res;
126	struct clk		*clk;
127	struct device_node	*node;
128	struct mfd_cell		*cell;
129	struct property         *prop;
130	const __be32            *cur;
131	u32			val;
132	int			err, ctrl;
133	int			clock_rate;
134	int			tsc_wires = 0, adc_channels = 0, total_channels;
135	int			readouts = 0;
 
 
 
 
 
 
 
136
137	if (!pdev->dev.of_node) {
138		dev_err(&pdev->dev, "Could not find valid DT data.\n");
139		return -EINVAL;
140	}
141
142	node = of_get_child_by_name(pdev->dev.of_node, "tsc");
143	of_property_read_u32(node, "ti,wires", &tsc_wires);
144	of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
145
146	node = of_get_child_by_name(pdev->dev.of_node, "adc");
147	of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
148		adc_channels++;
149		if (val > 7) {
150			dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
151					val);
 
152			return -EINVAL;
153		}
154	}
155	total_channels = tsc_wires + adc_channels;
 
 
 
156	if (total_channels > 8) {
157		dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
158		return -EINVAL;
159	}
 
160	if (total_channels == 0) {
161		dev_err(&pdev->dev, "Need atleast one channel.\n");
162		return -EINVAL;
163	}
164
165	if (readouts * 2 + 2 + adc_channels > 16) {
166		dev_err(&pdev->dev, "Too many step configurations requested\n");
167		return -EINVAL;
168	}
169
170	/* Allocate memory for device */
171	tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
172	if (!tscadc)
173		return -ENOMEM;
174
175	tscadc->dev = &pdev->dev;
176
177	err = platform_get_irq(pdev, 0);
178	if (err < 0) {
179		dev_err(&pdev->dev, "no irq ID is specified.\n");
180		goto ret;
181	} else
182		tscadc->irq = err;
183
184	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
185	tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
186	if (IS_ERR(tscadc->tscadc_base))
187		return PTR_ERR(tscadc->tscadc_base);
188
189	tscadc->tscadc_phys_base = res->start;
190	tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
191			tscadc->tscadc_base, &tscadc_regmap_config);
 
192	if (IS_ERR(tscadc->regmap)) {
193		dev_err(&pdev->dev, "regmap init failed\n");
194		err = PTR_ERR(tscadc->regmap);
195		goto ret;
196	}
197
198	spin_lock_init(&tscadc->reg_lock);
199	init_waitqueue_head(&tscadc->reg_se_wait);
200
201	pm_runtime_enable(&pdev->dev);
202	pm_runtime_get_sync(&pdev->dev);
203
204	/*
205	 * The TSC_ADC_Subsystem has 2 clock domains
206	 * OCP_CLK and ADC_CLK.
207	 * The ADC clock is expected to run at target of 3MHz,
208	 * and expected to capture 12-bit data at a rate of 200 KSPS.
209	 * The TSC_ADC_SS controller design assumes the OCP clock is
210	 * at least 6x faster than the ADC clock.
 
211	 */
212	clk = devm_clk_get(&pdev->dev, "adc_tsc_fck");
213	if (IS_ERR(clk)) {
214		dev_err(&pdev->dev, "failed to get TSC fck\n");
215		err = PTR_ERR(clk);
216		goto err_disable_clk;
217	}
218	clock_rate = clk_get_rate(clk);
219	tscadc->clk_div = clock_rate / ADC_CLK;
220
221	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
222	tscadc->clk_div--;
223	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
224
225	/* Set the control register bits */
226	ctrl = CNTRLREG_STEPCONFIGWRT |	CNTRLREG_STEPID;
227	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
228
229	/* Set register bits for Idle Config Mode */
230	if (tsc_wires > 0) {
231		tscadc->tsc_wires = tsc_wires;
232		if (tsc_wires == 5)
233			ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
234		else
235			ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
236		tscadc_idle_config(tscadc);
 
 
 
 
 
 
237	}
 
 
 
238
239	/* Enable the TSC module enable bit */
240	ctrl |= CNTRLREG_TSCSSENB;
241	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
242
243	tscadc->used_cells = 0;
244	tscadc->tsc_cell = -1;
245	tscadc->adc_cell = -1;
246
247	/* TSC Cell */
248	if (tsc_wires > 0) {
249		tscadc->tsc_cell = tscadc->used_cells;
250		cell = &tscadc->cells[tscadc->used_cells++];
251		cell->name = "TI-am335x-tsc";
252		cell->of_compatible = "ti,am3359-tsc";
253		cell->platform_data = &tscadc;
254		cell->pdata_size = sizeof(tscadc);
255	}
256
257	/* ADC Cell */
258	if (adc_channels > 0) {
259		tscadc->adc_cell = tscadc->used_cells;
260		cell = &tscadc->cells[tscadc->used_cells++];
261		cell->name = "TI-am335x-adc";
262		cell->of_compatible = "ti,am3359-adc";
263		cell->platform_data = &tscadc;
264		cell->pdata_size = sizeof(tscadc);
265	}
266
267	err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
268			      tscadc->cells, tscadc->used_cells, NULL,
269			      0, NULL);
270	if (err < 0)
271		goto err_disable_clk;
272
273	platform_set_drvdata(pdev, tscadc);
274	return 0;
275
276err_disable_clk:
277	pm_runtime_put_sync(&pdev->dev);
278	pm_runtime_disable(&pdev->dev);
279ret:
280	return err;
281}
282
283static int ti_tscadc_remove(struct platform_device *pdev)
284{
285	struct ti_tscadc_dev	*tscadc = platform_get_drvdata(pdev);
286
287	regmap_write(tscadc->regmap, REG_SE, 0x00);
288
289	pm_runtime_put_sync(&pdev->dev);
290	pm_runtime_disable(&pdev->dev);
291
292	mfd_remove_devices(tscadc->dev);
293
294	return 0;
295}
296
297static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
298{
299	return device_may_wakeup(dev);
300}
301
302static int __maybe_unused tscadc_suspend(struct device *dev)
303{
304	struct ti_tscadc_dev	*tscadc = dev_get_drvdata(dev);
305
306	regmap_write(tscadc->regmap, REG_SE, 0x00);
307	if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
308		u32 ctrl;
309
310		regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
311		ctrl &= ~(CNTRLREG_POWERDOWN);
312		ctrl |= CNTRLREG_TSCSSENB;
313		regmap_write(tscadc->regmap, REG_CTRL, ctrl);
314	}
315	pm_runtime_put_sync(dev);
316
317	return 0;
318}
319
320static int __maybe_unused tscadc_resume(struct device *dev)
321{
322	struct ti_tscadc_dev	*tscadc = dev_get_drvdata(dev);
323	u32 ctrl;
324
325	pm_runtime_get_sync(dev);
326
327	/* context restore */
328	ctrl = CNTRLREG_STEPCONFIGWRT |	CNTRLREG_STEPID;
329	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
330
331	if (tscadc->tsc_cell != -1) {
332		if (tscadc->tsc_wires == 5)
333			ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
334		else
335			ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
336		tscadc_idle_config(tscadc);
337	}
338	ctrl |= CNTRLREG_TSCSSENB;
339	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
340
341	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
 
 
 
342
343	return 0;
344}
345
346static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
347
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
348static const struct of_device_id ti_tscadc_dt_ids[] = {
349	{ .compatible = "ti,am3359-tscadc", },
 
350	{ }
351};
352MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
353
354static struct platform_driver ti_tscadc_driver = {
355	.driver = {
356		.name   = "ti_am3359-tscadc",
357		.pm	= &tscadc_pm_ops,
358		.of_match_table = ti_tscadc_dt_ids,
359	},
360	.probe	= ti_tscadc_probe,
361	.remove	= ti_tscadc_remove,
362
363};
364
365module_platform_driver(ti_tscadc_driver);
366
367MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
368MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
369MODULE_LICENSE("GPL");