1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
  4 */
  5
  6#ifndef _DP_PARSER_H_
  7#define _DP_PARSER_H_
  8
  9#include <linux/platform_device.h>
 10#include <linux/phy/phy.h>
 11#include <linux/phy/phy-dp.h>
 12
 
 13#include "msm_drv.h"
 14
 15#define DP_LABEL "MDSS DP DISPLAY"
 16#define DP_MAX_PIXEL_CLK_KHZ	675000
 17#define DP_MAX_NUM_DP_LANES	4
 18#define DP_LINK_RATE_HBR2	540000 /* kbytes */
 19
 20enum dp_pm_type {
 21	DP_CORE_PM,
 22	DP_CTRL_PM,
 23	DP_STREAM_PM,
 24	DP_PHY_PM,
 25	DP_MAX_PM
 26};
 27
 28struct dss_io_region {
 29	size_t len;
 30	void __iomem *base;
 31};
 32
 33struct dss_io_data {
 34	struct dss_io_region ahb;
 35	struct dss_io_region aux;
 36	struct dss_io_region link;
 37	struct dss_io_region p0;
 38};
 39
 40static inline const char *dp_parser_pm_name(enum dp_pm_type module)
 41{
 42	switch (module) {
 43	case DP_CORE_PM:	return "DP_CORE_PM";
 44	case DP_CTRL_PM:	return "DP_CTRL_PM";
 45	case DP_STREAM_PM:	return "DP_STREAM_PM";
 46	case DP_PHY_PM:		return "DP_PHY_PM";
 47	default:		return "???";
 48	}
 49}
 50
 51/**
 52 * struct dp_display_data  - display related device tree data.
 53 *
 54 * @ctrl_node: referece to controller device
 55 * @phy_node:  reference to phy device
 56 * @is_active: is the controller currently active
 57 * @name: name of the display
 58 * @display_type: type of the display
 59 */
 60struct dp_display_data {
 61	struct device_node *ctrl_node;
 62	struct device_node *phy_node;
 63	bool is_active;
 64	const char *name;
 65	const char *display_type;
 66};
 67
 68/**
 69 * struct dp_ctrl_resource - controller's IO related data
 70 *
 71 * @dp_controller: Display Port controller mapped memory address
 72 * @phy_io: phy's mapped memory address
 73 */
 74struct dp_io {
 75	struct dss_io_data dp_controller;
 76	struct phy *phy;
 77	union phy_configure_opts phy_opts;
 78};
 79
 80/**
 81 * struct dp_pinctrl - DP's pin control
 82 *
 83 * @pin: pin-controller's instance
 84 * @state_active: active state pin control
 85 * @state_hpd_active: hpd active state pin control
 86 * @state_suspend: suspend state pin control
 87 */
 88struct dp_pinctrl {
 89	struct pinctrl *pin;
 90	struct pinctrl_state *state_active;
 91	struct pinctrl_state *state_hpd_active;
 92	struct pinctrl_state *state_suspend;
 93};
 94
 
 
 95/* Regulators for DP devices */
 96struct dp_reg_entry {
 97	char name[32];
 98	int enable_load;
 99	int disable_load;
100};
101
102struct dss_module_power {
103	unsigned int num_clk;
104	struct clk_bulk_data *clocks;
105};
106
107/**
108 * struct dp_parser - DP parser's data exposed to clients
109 *
110 * @pdev: platform data of the client
111 * @mp: gpio, regulator and clock related data
112 * @pinctrl: pin-control related data
113 * @disp_data: controller's display related data
114 * @parse: function to be called by client to parse device tree.
115 */
116struct dp_parser {
117	struct platform_device *pdev;
118	struct dss_module_power mp[DP_MAX_PM];
119	struct dp_pinctrl pinctrl;
120	struct dp_io io;
121	struct dp_display_data disp_data;
 
122	u32 max_dp_lanes;
123	u32 max_dp_link_rate;
124	struct drm_bridge *next_bridge;
125
126	int (*parse)(struct dp_parser *parser);
127};
128
129/**
130 * dp_parser_get() - get the DP's device tree parser module
131 *
132 * @pdev: platform data of the client
133 * return: pointer to dp_parser structure.
134 *
135 * This function provides client capability to parse the
136 * device tree and populate the data structures. The data
137 * related to clock, regulators, pin-control and other
138 * can be parsed using this module.
139 */
140struct dp_parser *dp_parser_get(struct platform_device *pdev);
141
142/**
143 * devm_dp_parser_find_next_bridge() - find an additional bridge to DP
144 *
145 * @dev: device to tie bridge lifetime to
146 * @parser: dp_parser data from client
147 *
148 * This function is used to find any additional bridge attached to
149 * the DP controller. The eDP interface requires a panel bridge.
150 *
151 * Return: 0 if able to get the bridge, otherwise negative errno for failure.
152 */
153int devm_dp_parser_find_next_bridge(struct device *dev, struct dp_parser *parser);
154
155#endif

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
  4 */
  5
  6#ifndef _DP_PARSER_H_
  7#define _DP_PARSER_H_
  8
  9#include <linux/platform_device.h>
 10#include <linux/phy/phy.h>
 11#include <linux/phy/phy-dp.h>
 12
 13#include "dpu_io_util.h"
 14#include "msm_drv.h"
 15
 16#define DP_LABEL "MDSS DP DISPLAY"
 17#define DP_MAX_PIXEL_CLK_KHZ	675000
 18#define DP_MAX_NUM_DP_LANES	4
 
 19
 20enum dp_pm_type {
 21	DP_CORE_PM,
 22	DP_CTRL_PM,
 23	DP_STREAM_PM,
 24	DP_PHY_PM,
 25	DP_MAX_PM
 26};
 27
 
 
 
 
 
 28struct dss_io_data {
 29	u32 len;
 30	void __iomem *base;
 
 
 31};
 32
 33static inline const char *dp_parser_pm_name(enum dp_pm_type module)
 34{
 35	switch (module) {
 36	case DP_CORE_PM:	return "DP_CORE_PM";
 37	case DP_CTRL_PM:	return "DP_CTRL_PM";
 38	case DP_STREAM_PM:	return "DP_STREAM_PM";
 39	case DP_PHY_PM:		return "DP_PHY_PM";
 40	default:		return "???";
 41	}
 42}
 43
 44/**
 45 * struct dp_display_data  - display related device tree data.
 46 *
 47 * @ctrl_node: referece to controller device
 48 * @phy_node:  reference to phy device
 49 * @is_active: is the controller currently active
 50 * @name: name of the display
 51 * @display_type: type of the display
 52 */
 53struct dp_display_data {
 54	struct device_node *ctrl_node;
 55	struct device_node *phy_node;
 56	bool is_active;
 57	const char *name;
 58	const char *display_type;
 59};
 60
 61/**
 62 * struct dp_ctrl_resource - controller's IO related data
 63 *
 64 * @dp_controller: Display Port controller mapped memory address
 65 * @phy_io: phy's mapped memory address
 66 */
 67struct dp_io {
 68	struct dss_io_data dp_controller;
 69	struct phy *phy;
 70	union phy_configure_opts phy_opts;
 71};
 72
 73/**
 74 * struct dp_pinctrl - DP's pin control
 75 *
 76 * @pin: pin-controller's instance
 77 * @state_active: active state pin control
 78 * @state_hpd_active: hpd active state pin control
 79 * @state_suspend: suspend state pin control
 80 */
 81struct dp_pinctrl {
 82	struct pinctrl *pin;
 83	struct pinctrl_state *state_active;
 84	struct pinctrl_state *state_hpd_active;
 85	struct pinctrl_state *state_suspend;
 86};
 87
 88#define DP_DEV_REGULATOR_MAX	4
 89
 90/* Regulators for DP devices */
 91struct dp_reg_entry {
 92	char name[32];
 93	int enable_load;
 94	int disable_load;
 95};
 96
 97struct dp_regulator_cfg {
 98	int num;
 99	struct dp_reg_entry regs[DP_DEV_REGULATOR_MAX];
100};
101
102/**
103 * struct dp_parser - DP parser's data exposed to clients
104 *
105 * @pdev: platform data of the client
106 * @mp: gpio, regulator and clock related data
107 * @pinctrl: pin-control related data
108 * @disp_data: controller's display related data
109 * @parse: function to be called by client to parse device tree.
110 */
111struct dp_parser {
112	struct platform_device *pdev;
113	struct dss_module_power mp[DP_MAX_PM];
114	struct dp_pinctrl pinctrl;
115	struct dp_io io;
116	struct dp_display_data disp_data;
117	const struct dp_regulator_cfg *regulator_cfg;
118	u32 max_dp_lanes;
 
 
119
120	int (*parse)(struct dp_parser *parser);
121};
122
123/**
124 * dp_parser_get() - get the DP's device tree parser module
125 *
126 * @pdev: platform data of the client
127 * return: pointer to dp_parser structure.
128 *
129 * This function provides client capability to parse the
130 * device tree and populate the data structures. The data
131 * related to clock, regulators, pin-control and other
132 * can be parsed using this module.
133 */
134struct dp_parser *dp_parser_get(struct platform_device *pdev);
 
 
 
 
 
 
 
 
 
 
 
 
 
135
136#endif