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v6.8
  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 *
  4 *  Bluetooth support for Intel devices
  5 *
  6 *  Copyright (C) 2015  Intel Corporation
  7 */
  8
  9/* List of tlv type */
 10enum {
 11	INTEL_TLV_CNVI_TOP = 0x10,
 12	INTEL_TLV_CNVR_TOP,
 13	INTEL_TLV_CNVI_BT,
 14	INTEL_TLV_CNVR_BT,
 15	INTEL_TLV_CNVI_OTP,
 16	INTEL_TLV_CNVR_OTP,
 17	INTEL_TLV_DEV_REV_ID,
 18	INTEL_TLV_USB_VENDOR_ID,
 19	INTEL_TLV_USB_PRODUCT_ID,
 20	INTEL_TLV_PCIE_VENDOR_ID,
 21	INTEL_TLV_PCIE_DEVICE_ID,
 22	INTEL_TLV_PCIE_SUBSYSTEM_ID,
 23	INTEL_TLV_IMAGE_TYPE,
 24	INTEL_TLV_TIME_STAMP,
 25	INTEL_TLV_BUILD_TYPE,
 26	INTEL_TLV_BUILD_NUM,
 27	INTEL_TLV_FW_BUILD_PRODUCT,
 28	INTEL_TLV_FW_BUILD_HW,
 29	INTEL_TLV_FW_STEP,
 30	INTEL_TLV_BT_SPEC,
 31	INTEL_TLV_MFG_NAME,
 32	INTEL_TLV_HCI_REV,
 33	INTEL_TLV_LMP_SUBVER,
 34	INTEL_TLV_OTP_PATCH_VER,
 35	INTEL_TLV_SECURE_BOOT,
 36	INTEL_TLV_KEY_FROM_HDR,
 37	INTEL_TLV_OTP_LOCK,
 38	INTEL_TLV_API_LOCK,
 39	INTEL_TLV_DEBUG_LOCK,
 40	INTEL_TLV_MIN_FW,
 41	INTEL_TLV_LIMITED_CCE,
 42	INTEL_TLV_SBE_TYPE,
 43	INTEL_TLV_OTP_BDADDR,
 44	INTEL_TLV_UNLOCKED_STATE,
 45	INTEL_TLV_GIT_SHA1
 46};
 47
 48struct intel_tlv {
 49	u8 type;
 50	u8 len;
 51	u8 val[];
 52} __packed;
 53
 54struct intel_version_tlv {
 55	u32	cnvi_top;
 56	u32	cnvr_top;
 57	u32	cnvi_bt;
 58	u32	cnvr_bt;
 59	u16	dev_rev_id;
 60	u8	img_type;
 61	u16	timestamp;
 62	u8	build_type;
 63	u32	build_num;
 64	u8	secure_boot;
 65	u8	otp_lock;
 66	u8	api_lock;
 67	u8	debug_lock;
 68	u8	min_fw_build_nn;
 69	u8	min_fw_build_cw;
 70	u8	min_fw_build_yy;
 71	u8	limited_cce;
 72	u8	sbe_type;
 73	u32	git_sha1;
 74	bdaddr_t otp_bd_addr;
 75};
 76
 77struct intel_version {
 78	u8 status;
 79	u8 hw_platform;
 80	u8 hw_variant;
 81	u8 hw_revision;
 82	u8 fw_variant;
 83	u8 fw_revision;
 84	u8 fw_build_num;
 85	u8 fw_build_ww;
 86	u8 fw_build_yy;
 87	u8 fw_patch_num;
 88} __packed;
 89
 90struct intel_boot_params {
 91	__u8     status;
 92	__u8     otp_format;
 93	__u8     otp_content;
 94	__u8     otp_patch;
 95	__le16   dev_revid;
 96	__u8     secure_boot;
 97	__u8     key_from_hdr;
 98	__u8     key_type;
 99	__u8     otp_lock;
100	__u8     api_lock;
101	__u8     debug_lock;
102	bdaddr_t otp_bdaddr;
103	__u8     min_fw_build_nn;
104	__u8     min_fw_build_cw;
105	__u8     min_fw_build_yy;
106	__u8     limited_cce;
107	__u8     unlocked_state;
108} __packed;
109
110struct intel_bootup {
111	__u8     zero;
112	__u8     num_cmds;
113	__u8     source;
114	__u8     reset_type;
115	__u8     reset_reason;
116	__u8     ddc_status;
117} __packed;
118
119struct intel_secure_send_result {
120	__u8     result;
121	__le16   opcode;
122	__u8     status;
123} __packed;
124
125struct intel_reset {
126	__u8     reset_type;
127	__u8     patch_enable;
128	__u8     ddc_reload;
129	__u8     boot_option;
130	__le32   boot_param;
131} __packed;
132
133struct intel_debug_features {
134	__u8    page1[16];
135} __packed;
136
137struct intel_offload_use_cases {
138	__u8	status;
139	__u8	preset[8];
140} __packed;
141
142#define INTEL_OP_PPAG_CMD		0xFE0B
143struct hci_ppag_enable_cmd {
144	__le32	ppag_enable_flags;
145} __packed;
146
147#define INTEL_TLV_TYPE_ID		0x01
148
149#define INTEL_TLV_SYSTEM_EXCEPTION	0x00
150#define INTEL_TLV_FATAL_EXCEPTION	0x01
151#define INTEL_TLV_DEBUG_EXCEPTION	0x02
152#define INTEL_TLV_TEST_EXCEPTION	0xDE
153
154#define INTEL_HW_PLATFORM(cnvx_bt)	((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
155#define INTEL_HW_VARIANT(cnvx_bt)	((u8)(((cnvx_bt) & 0x003f0000) >> 16))
156#define INTEL_CNVX_TOP_TYPE(cnvx_top)	((cnvx_top) & 0x00000fff)
157#define INTEL_CNVX_TOP_STEP(cnvx_top)	(((cnvx_top) & 0x0f000000) >> 24)
158#define INTEL_CNVX_TOP_PACK_SWAB(t, s)	__swab16(((__u16)(((t) << 4) | (s))))
159
160enum {
161	INTEL_BOOTLOADER,
162	INTEL_DOWNLOADING,
163	INTEL_FIRMWARE_LOADED,
164	INTEL_FIRMWARE_FAILED,
165	INTEL_BOOTING,
166	INTEL_BROKEN_INITIAL_NCMD,
167	INTEL_BROKEN_SHUTDOWN_LED,
168	INTEL_ROM_LEGACY,
169	INTEL_ROM_LEGACY_NO_WBS_SUPPORT,
170	INTEL_ACPI_RESET_ACTIVE,
171
172	__INTEL_NUM_FLAGS,
173};
174
175struct btintel_data {
176	DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS);
177	int (*acpi_reset_method)(struct hci_dev *hdev);
178};
179
180#define btintel_set_flag(hdev, nr)					\
181	do {								\
182		struct btintel_data *intel = hci_get_priv((hdev));	\
183		set_bit((nr), intel->flags);				\
184	} while (0)
185
186#define btintel_clear_flag(hdev, nr)					\
187	do {								\
188		struct btintel_data *intel = hci_get_priv((hdev));	\
189		clear_bit((nr), intel->flags);				\
190	} while (0)
191
192#define btintel_wake_up_flag(hdev, nr)					\
193	do {								\
194		struct btintel_data *intel = hci_get_priv((hdev));	\
195		wake_up_bit(intel->flags, (nr));			\
196	} while (0)
197
198#define btintel_get_flag(hdev)						\
199	(((struct btintel_data *)hci_get_priv(hdev))->flags)
200
201#define btintel_test_flag(hdev, nr)	test_bit((nr), btintel_get_flag(hdev))
202#define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev))
203#define btintel_wait_on_flag_timeout(hdev, nr, m, to)			\
204		wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)
205
206#if IS_ENABLED(CONFIG_BT_INTEL)
207
208int btintel_check_bdaddr(struct hci_dev *hdev);
209int btintel_enter_mfg(struct hci_dev *hdev);
210int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched);
211int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
212int btintel_set_diag(struct hci_dev *hdev, bool enable);
 
 
213
214int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver);
 
 
 
215int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name);
 
216int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug);
217int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver);
 
 
218struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
219				   u16 opcode_write);
220int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param);
221int btintel_read_boot_params(struct hci_dev *hdev,
222			     struct intel_boot_params *params);
223int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver,
224			      const struct firmware *fw, u32 *boot_param);
225int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name);
226int btintel_recv_event(struct hci_dev *hdev, struct sk_buff *skb);
227void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len);
228void btintel_secure_send_result(struct hci_dev *hdev,
229				const void *ptr, unsigned int len);
230int btintel_set_quality_report(struct hci_dev *hdev, bool enable);
 
 
 
 
231#else
232
233static inline int btintel_check_bdaddr(struct hci_dev *hdev)
234{
235	return -EOPNOTSUPP;
236}
237
238static inline int btintel_enter_mfg(struct hci_dev *hdev)
239{
240	return -EOPNOTSUPP;
241}
242
243static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
244{
245	return -EOPNOTSUPP;
246}
247
248static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
249{
250	return -EOPNOTSUPP;
251}
252
253static inline int btintel_set_diag(struct hci_dev *hdev, bool enable)
254{
255	return -EOPNOTSUPP;
256}
257
 
 
 
 
 
 
 
 
 
258static inline int btintel_version_info(struct hci_dev *hdev,
259				       struct intel_version *ver)
260{
261	return -EOPNOTSUPP;
262}
263
 
 
 
 
 
 
 
 
 
 
 
 
264static inline int btintel_load_ddc_config(struct hci_dev *hdev,
265					  const char *ddc_name)
266{
267	return -EOPNOTSUPP;
268}
269
 
 
 
 
 
270static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
271{
272	return -EOPNOTSUPP;
273}
274
275static inline int btintel_read_version(struct hci_dev *hdev,
276				       struct intel_version *ver)
277{
278	return -EOPNOTSUPP;
279}
280
 
 
 
 
 
 
281static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev,
282						 u16 opcode_read,
283						 u16 opcode_write)
284{
285	return ERR_PTR(-EINVAL);
286}
287
288static inline int btintel_send_intel_reset(struct hci_dev *hdev,
289					   u32 reset_param)
290{
291	return -EOPNOTSUPP;
292}
293
294static inline int btintel_read_boot_params(struct hci_dev *hdev,
295					   struct intel_boot_params *params)
296{
297	return -EOPNOTSUPP;
298}
299
300static inline int btintel_download_firmware(struct hci_dev *dev,
301					    const struct firmware *fw,
302					    u32 *boot_param)
303{
304	return -EOPNOTSUPP;
305}
306
307static inline int btintel_configure_setup(struct hci_dev *hdev,
308					  const char *driver_name)
 
 
309{
310	return -ENODEV;
311}
312
313static inline void btintel_bootup(struct hci_dev *hdev,
314				  const void *ptr, unsigned int len)
315{
316}
317
318static inline void btintel_secure_send_result(struct hci_dev *hdev,
319				const void *ptr, unsigned int len)
320{
 
321}
322
323static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)
 
324{
325	return -ENODEV;
326}
 
327#endif
v5.14.15
  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 *
  4 *  Bluetooth support for Intel devices
  5 *
  6 *  Copyright (C) 2015  Intel Corporation
  7 */
  8
  9/* List of tlv type */
 10enum {
 11	INTEL_TLV_CNVI_TOP = 0x10,
 12	INTEL_TLV_CNVR_TOP,
 13	INTEL_TLV_CNVI_BT,
 14	INTEL_TLV_CNVR_BT,
 15	INTEL_TLV_CNVI_OTP,
 16	INTEL_TLV_CNVR_OTP,
 17	INTEL_TLV_DEV_REV_ID,
 18	INTEL_TLV_USB_VENDOR_ID,
 19	INTEL_TLV_USB_PRODUCT_ID,
 20	INTEL_TLV_PCIE_VENDOR_ID,
 21	INTEL_TLV_PCIE_DEVICE_ID,
 22	INTEL_TLV_PCIE_SUBSYSTEM_ID,
 23	INTEL_TLV_IMAGE_TYPE,
 24	INTEL_TLV_TIME_STAMP,
 25	INTEL_TLV_BUILD_TYPE,
 26	INTEL_TLV_BUILD_NUM,
 27	INTEL_TLV_FW_BUILD_PRODUCT,
 28	INTEL_TLV_FW_BUILD_HW,
 29	INTEL_TLV_FW_STEP,
 30	INTEL_TLV_BT_SPEC,
 31	INTEL_TLV_MFG_NAME,
 32	INTEL_TLV_HCI_REV,
 33	INTEL_TLV_LMP_SUBVER,
 34	INTEL_TLV_OTP_PATCH_VER,
 35	INTEL_TLV_SECURE_BOOT,
 36	INTEL_TLV_KEY_FROM_HDR,
 37	INTEL_TLV_OTP_LOCK,
 38	INTEL_TLV_API_LOCK,
 39	INTEL_TLV_DEBUG_LOCK,
 40	INTEL_TLV_MIN_FW,
 41	INTEL_TLV_LIMITED_CCE,
 42	INTEL_TLV_SBE_TYPE,
 43	INTEL_TLV_OTP_BDADDR,
 44	INTEL_TLV_UNLOCKED_STATE
 
 45};
 46
 47struct intel_tlv {
 48	u8 type;
 49	u8 len;
 50	u8 val[];
 51} __packed;
 52
 53struct intel_version_tlv {
 54	u32	cnvi_top;
 55	u32	cnvr_top;
 56	u32	cnvi_bt;
 57	u32	cnvr_bt;
 58	u16	dev_rev_id;
 59	u8	img_type;
 60	u16	timestamp;
 61	u8	build_type;
 62	u32	build_num;
 63	u8	secure_boot;
 64	u8	otp_lock;
 65	u8	api_lock;
 66	u8	debug_lock;
 67	u8	min_fw_build_nn;
 68	u8	min_fw_build_cw;
 69	u8	min_fw_build_yy;
 70	u8	limited_cce;
 71	u8	sbe_type;
 
 72	bdaddr_t otp_bd_addr;
 73};
 74
 75struct intel_version {
 76	u8 status;
 77	u8 hw_platform;
 78	u8 hw_variant;
 79	u8 hw_revision;
 80	u8 fw_variant;
 81	u8 fw_revision;
 82	u8 fw_build_num;
 83	u8 fw_build_ww;
 84	u8 fw_build_yy;
 85	u8 fw_patch_num;
 86} __packed;
 87
 88struct intel_boot_params {
 89	__u8     status;
 90	__u8     otp_format;
 91	__u8     otp_content;
 92	__u8     otp_patch;
 93	__le16   dev_revid;
 94	__u8     secure_boot;
 95	__u8     key_from_hdr;
 96	__u8     key_type;
 97	__u8     otp_lock;
 98	__u8     api_lock;
 99	__u8     debug_lock;
100	bdaddr_t otp_bdaddr;
101	__u8     min_fw_build_nn;
102	__u8     min_fw_build_cw;
103	__u8     min_fw_build_yy;
104	__u8     limited_cce;
105	__u8     unlocked_state;
106} __packed;
107
108struct intel_bootup {
109	__u8     zero;
110	__u8     num_cmds;
111	__u8     source;
112	__u8     reset_type;
113	__u8     reset_reason;
114	__u8     ddc_status;
115} __packed;
116
117struct intel_secure_send_result {
118	__u8     result;
119	__le16   opcode;
120	__u8     status;
121} __packed;
122
123struct intel_reset {
124	__u8     reset_type;
125	__u8     patch_enable;
126	__u8     ddc_reload;
127	__u8     boot_option;
128	__le32   boot_param;
129} __packed;
130
131struct intel_debug_features {
132	__u8    page1[16];
133} __packed;
134
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
135#define INTEL_HW_PLATFORM(cnvx_bt)	((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
136#define INTEL_HW_VARIANT(cnvx_bt)	((u8)(((cnvx_bt) & 0x003f0000) >> 16))
137#define INTEL_CNVX_TOP_TYPE(cnvx_top)	((cnvx_top) & 0x00000fff)
138#define INTEL_CNVX_TOP_STEP(cnvx_top)	(((cnvx_top) & 0x0f000000) >> 24)
139#define INTEL_CNVX_TOP_PACK_SWAB(t, s)	__swab16(((__u16)(((t) << 4) | (s))))
140
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
141#if IS_ENABLED(CONFIG_BT_INTEL)
142
143int btintel_check_bdaddr(struct hci_dev *hdev);
144int btintel_enter_mfg(struct hci_dev *hdev);
145int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched);
146int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
147int btintel_set_diag(struct hci_dev *hdev, bool enable);
148int btintel_set_diag_mfg(struct hci_dev *hdev, bool enable);
149void btintel_hw_error(struct hci_dev *hdev, u8 code);
150
151int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver);
152int btintel_version_info_tlv(struct hci_dev *hdev, struct intel_version_tlv *version);
153int btintel_secure_send(struct hci_dev *hdev, u8 fragment_type, u32 plen,
154			const void *param);
155int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name);
156int btintel_set_event_mask(struct hci_dev *hdev, bool debug);
157int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug);
158int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver);
159int btintel_read_version_tlv(struct hci_dev *hdev, struct intel_version_tlv *ver);
160
161struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
162				   u16 opcode_write);
163int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param);
164int btintel_read_boot_params(struct hci_dev *hdev,
165			     struct intel_boot_params *params);
166int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver,
167			      const struct firmware *fw, u32 *boot_param);
168int btintel_download_firmware_newgen(struct hci_dev *hdev,
169				     struct intel_version_tlv *ver,
170				     const struct firmware *fw,
171				     u32 *boot_param, u8 hw_variant,
172				     u8 sbe_type);
173void btintel_reset_to_bootloader(struct hci_dev *hdev);
174int btintel_read_debug_features(struct hci_dev *hdev,
175				struct intel_debug_features *features);
176int btintel_set_debug_features(struct hci_dev *hdev,
177			       const struct intel_debug_features *features);
178#else
179
180static inline int btintel_check_bdaddr(struct hci_dev *hdev)
181{
182	return -EOPNOTSUPP;
183}
184
185static inline int btintel_enter_mfg(struct hci_dev *hdev)
186{
187	return -EOPNOTSUPP;
188}
189
190static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
191{
192	return -EOPNOTSUPP;
193}
194
195static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
196{
197	return -EOPNOTSUPP;
198}
199
200static inline int btintel_set_diag(struct hci_dev *hdev, bool enable)
201{
202	return -EOPNOTSUPP;
203}
204
205static inline int btintel_set_diag_mfg(struct hci_dev *hdev, bool enable)
206{
207	return -EOPNOTSUPP;
208}
209
210static inline void btintel_hw_error(struct hci_dev *hdev, u8 code)
211{
212}
213
214static inline int btintel_version_info(struct hci_dev *hdev,
215				       struct intel_version *ver)
216{
217	return -EOPNOTSUPP;
218}
219
220static inline int btintel_version_info_tlv(struct hci_dev *hdev,
221					   struct intel_version_tlv *version)
222{
223	return -EOPNOTSUPP;
224}
225
226static inline int btintel_secure_send(struct hci_dev *hdev, u8 fragment_type,
227				      u32 plen, const void *param)
228{
229	return -EOPNOTSUPP;
230}
231
232static inline int btintel_load_ddc_config(struct hci_dev *hdev,
233					  const char *ddc_name)
234{
235	return -EOPNOTSUPP;
236}
237
238static inline int btintel_set_event_mask(struct hci_dev *hdev, bool debug)
239{
240	return -EOPNOTSUPP;
241}
242
243static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
244{
245	return -EOPNOTSUPP;
246}
247
248static inline int btintel_read_version(struct hci_dev *hdev,
249				       struct intel_version *ver)
250{
251	return -EOPNOTSUPP;
252}
253
254static inline int btintel_read_version_tlv(struct hci_dev *hdev,
255					   struct intel_version_tlv *ver)
256{
257	return -EOPNOTSUPP;
258}
259
260static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev,
261						 u16 opcode_read,
262						 u16 opcode_write)
263{
264	return ERR_PTR(-EINVAL);
265}
266
267static inline int btintel_send_intel_reset(struct hci_dev *hdev,
268					   u32 reset_param)
269{
270	return -EOPNOTSUPP;
271}
272
273static inline int btintel_read_boot_params(struct hci_dev *hdev,
274					   struct intel_boot_params *params)
275{
276	return -EOPNOTSUPP;
277}
278
279static inline int btintel_download_firmware(struct hci_dev *dev,
280					    const struct firmware *fw,
281					    u32 *boot_param)
282{
283	return -EOPNOTSUPP;
284}
285
286static inline int btintel_download_firmware_newgen(struct hci_dev *hdev,
287						   const struct firmware *fw,
288						   u32 *boot_param,
289						   u8 hw_variant, u8 sbe_type)
290{
291	return -EOPNOTSUPP;
292}
293
294static inline void btintel_reset_to_bootloader(struct hci_dev *hdev)
 
295{
296}
297
298static inline int btintel_read_debug_features(struct hci_dev *hdev,
299					      struct intel_debug_features *features)
300{
301	return -EOPNOTSUPP;
302}
303
304static inline int btintel_set_debug_features(struct hci_dev *hdev,
305					     const struct intel_debug_features *features)
306{
307	return -EOPNOTSUPP;
308}
309
310#endif