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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2016 MediaTek Inc.
4 *
5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6 */
7
8#include <linux/dma-mapping.h>
9#include <linux/iopoll.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/of_address.h>
13#include <linux/of_irq.h>
14#include <linux/platform_device.h>
15#include <linux/pm_wakeirq.h>
16#include <linux/reset.h>
17
18#include "mtu3.h"
19#include "mtu3_dr.h"
20#include "mtu3_debug.h"
21
22/* u2-port0 should be powered on and enabled; */
23int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
24{
25 void __iomem *ibase = ssusb->ippc_base;
26 u32 value, check_val;
27 int ret;
28
29 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
30 SSUSB_REF_RST_B_STS;
31
32 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
33 (check_val == (value & check_val)), 100, 20000);
34 if (ret) {
35 dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
36 return ret;
37 }
38
39 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
40 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
41 if (ret) {
42 dev_err(ssusb->dev, "mac2 clock is not stable\n");
43 return ret;
44 }
45
46 return 0;
47}
48
49static int wait_for_ip_sleep(struct ssusb_mtk *ssusb)
50{
51 bool sleep_check = true;
52 u32 value;
53 int ret;
54
55 if (!ssusb->is_host)
56 sleep_check = ssusb_gadget_ip_sleep_check(ssusb);
57
58 if (!sleep_check)
59 return 0;
60
61 /* wait for ip enter sleep mode */
62 ret = readl_poll_timeout(ssusb->ippc_base + U3D_SSUSB_IP_PW_STS1, value,
63 (value & SSUSB_IP_SLEEP_STS), 100, 100000);
64 if (ret) {
65 dev_err(ssusb->dev, "ip sleep failed!!!\n");
66 ret = -EBUSY;
67 } else {
68 /* workaround: avoid wrong wakeup signal latch for some soc */
69 usleep_range(100, 200);
70 }
71
72 return ret;
73}
74
75static int ssusb_phy_init(struct ssusb_mtk *ssusb)
76{
77 int i;
78 int ret;
79
80 for (i = 0; i < ssusb->num_phys; i++) {
81 ret = phy_init(ssusb->phys[i]);
82 if (ret)
83 goto exit_phy;
84 }
85 return 0;
86
87exit_phy:
88 for (; i > 0; i--)
89 phy_exit(ssusb->phys[i - 1]);
90
91 return ret;
92}
93
94static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
95{
96 int i;
97
98 for (i = 0; i < ssusb->num_phys; i++)
99 phy_exit(ssusb->phys[i]);
100
101 return 0;
102}
103
104static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
105{
106 int i;
107 int ret;
108
109 for (i = 0; i < ssusb->num_phys; i++) {
110 ret = phy_power_on(ssusb->phys[i]);
111 if (ret)
112 goto power_off_phy;
113 }
114 return 0;
115
116power_off_phy:
117 for (; i > 0; i--)
118 phy_power_off(ssusb->phys[i - 1]);
119
120 return ret;
121}
122
123static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
124{
125 unsigned int i;
126
127 for (i = 0; i < ssusb->num_phys; i++)
128 phy_power_off(ssusb->phys[i]);
129}
130
131static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
132{
133 int ret = 0;
134
135 ret = regulator_enable(ssusb->vusb33);
136 if (ret) {
137 dev_err(ssusb->dev, "failed to enable vusb33\n");
138 goto vusb33_err;
139 }
140
141 ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
142 if (ret)
143 goto clks_err;
144
145 ret = ssusb_phy_init(ssusb);
146 if (ret) {
147 dev_err(ssusb->dev, "failed to init phy\n");
148 goto phy_init_err;
149 }
150
151 ret = ssusb_phy_power_on(ssusb);
152 if (ret) {
153 dev_err(ssusb->dev, "failed to power on phy\n");
154 goto phy_err;
155 }
156
157 return 0;
158
159phy_err:
160 ssusb_phy_exit(ssusb);
161phy_init_err:
162 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
163clks_err:
164 regulator_disable(ssusb->vusb33);
165vusb33_err:
166 return ret;
167}
168
169static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
170{
171 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
172 regulator_disable(ssusb->vusb33);
173 ssusb_phy_power_off(ssusb);
174 ssusb_phy_exit(ssusb);
175}
176
177static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
178{
179 /* reset whole ip (xhci & u3d) */
180 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
181 udelay(1);
182 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
183
184 /*
185 * device ip may be powered on in firmware/BROM stage before entering
186 * kernel stage;
187 * power down device ip, otherwise ip-sleep will fail when working as
188 * host only mode
189 */
190 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
191}
192
193static void ssusb_u3_drd_check(struct ssusb_mtk *ssusb)
194{
195 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
196 u32 dev_u3p_num;
197 u32 host_u3p_num;
198 u32 value;
199
200 /* u3 port0 is disabled */
201 if (ssusb->u3p_dis_msk & BIT(0)) {
202 otg_sx->is_u3_drd = false;
203 goto out;
204 }
205
206 value = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_DEV_CAP);
207 dev_u3p_num = SSUSB_IP_DEV_U3_PORT_NUM(value);
208
209 value = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_XHCI_CAP);
210 host_u3p_num = SSUSB_IP_XHCI_U3_PORT_NUM(value);
211
212 otg_sx->is_u3_drd = !!(dev_u3p_num && host_u3p_num);
213
214out:
215 dev_info(ssusb->dev, "usb3-drd: %d\n", otg_sx->is_u3_drd);
216}
217
218static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
219{
220 struct device_node *node = pdev->dev.of_node;
221 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
222 struct clk_bulk_data *clks = ssusb->clks;
223 struct device *dev = &pdev->dev;
224 int i;
225 int ret;
226
227 ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
228 if (IS_ERR(ssusb->vusb33)) {
229 dev_err(dev, "failed to get vusb33\n");
230 return PTR_ERR(ssusb->vusb33);
231 }
232
233 clks[0].id = "sys_ck";
234 clks[1].id = "ref_ck";
235 clks[2].id = "mcu_ck";
236 clks[3].id = "dma_ck";
237 clks[4].id = "xhci_ck";
238 clks[5].id = "frmcnt_ck";
239 ret = devm_clk_bulk_get_optional(dev, BULK_CLKS_CNT, clks);
240 if (ret)
241 return ret;
242
243 ssusb->num_phys = of_count_phandle_with_args(node,
244 "phys", "#phy-cells");
245 if (ssusb->num_phys > 0) {
246 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
247 sizeof(*ssusb->phys), GFP_KERNEL);
248 if (!ssusb->phys)
249 return -ENOMEM;
250 } else {
251 ssusb->num_phys = 0;
252 }
253
254 for (i = 0; i < ssusb->num_phys; i++) {
255 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
256 if (IS_ERR(ssusb->phys[i])) {
257 dev_err(dev, "failed to get phy-%d\n", i);
258 return PTR_ERR(ssusb->phys[i]);
259 }
260 }
261
262 ssusb->ippc_base = devm_platform_ioremap_resource_byname(pdev, "ippc");
263 if (IS_ERR(ssusb->ippc_base))
264 return PTR_ERR(ssusb->ippc_base);
265
266 ssusb->wakeup_irq = platform_get_irq_byname_optional(pdev, "wakeup");
267 if (ssusb->wakeup_irq == -EPROBE_DEFER)
268 return ssusb->wakeup_irq;
269
270 ssusb->dr_mode = usb_get_dr_mode(dev);
271 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
272 ssusb->dr_mode = USB_DR_MODE_OTG;
273
274 of_property_read_u32(node, "mediatek,u3p-dis-msk", &ssusb->u3p_dis_msk);
275
276 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
277 goto out;
278
279 /* if host role is supported */
280 ret = ssusb_wakeup_of_property_parse(ssusb, node);
281 if (ret) {
282 dev_err(dev, "failed to parse uwk property\n");
283 return ret;
284 }
285
286 /* optional property, ignore the error if it does not exist */
287 of_property_read_u32(node, "mediatek,u2p-dis-msk",
288 &ssusb->u2p_dis_msk);
289
290 otg_sx->vbus = devm_regulator_get(dev, "vbus");
291 if (IS_ERR(otg_sx->vbus)) {
292 dev_err(dev, "failed to get vbus\n");
293 return PTR_ERR(otg_sx->vbus);
294 }
295
296 if (ssusb->dr_mode == USB_DR_MODE_HOST)
297 goto out;
298
299 /* if dual-role mode is supported */
300 otg_sx->manual_drd_enabled =
301 of_property_read_bool(node, "enable-manual-drd");
302 otg_sx->role_sw_used = of_property_read_bool(node, "usb-role-switch");
303
304 /* can't disable port0 when use dual-role mode */
305 ssusb->u2p_dis_msk &= ~0x1;
306
307 if (otg_sx->role_sw_used || otg_sx->manual_drd_enabled)
308 goto out;
309
310 if (of_property_read_bool(node, "extcon")) {
311 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
312 if (IS_ERR(otg_sx->edev)) {
313 return dev_err_probe(dev, PTR_ERR(otg_sx->edev),
314 "couldn't get extcon device\n");
315 }
316 }
317
318out:
319 dev_info(dev, "dr_mode: %d, drd: %s\n", ssusb->dr_mode,
320 otg_sx->manual_drd_enabled ? "manual" : "auto");
321 dev_info(dev, "u2p_dis_msk: %x, u3p_dis_msk: %x\n",
322 ssusb->u2p_dis_msk, ssusb->u3p_dis_msk);
323
324 return 0;
325}
326
327static int mtu3_probe(struct platform_device *pdev)
328{
329 struct device_node *node = pdev->dev.of_node;
330 struct device *dev = &pdev->dev;
331 struct ssusb_mtk *ssusb;
332 int ret = -ENOMEM;
333
334 /* all elements are set to ZERO as default value */
335 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
336 if (!ssusb)
337 return -ENOMEM;
338
339 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
340 if (ret) {
341 dev_err(dev, "No suitable DMA config available\n");
342 return -ENOTSUPP;
343 }
344
345 platform_set_drvdata(pdev, ssusb);
346 ssusb->dev = dev;
347
348 ret = get_ssusb_rscs(pdev, ssusb);
349 if (ret)
350 return ret;
351
352 ssusb_debugfs_create_root(ssusb);
353
354 /* enable power domain */
355 pm_runtime_set_active(dev);
356 pm_runtime_use_autosuspend(dev);
357 pm_runtime_set_autosuspend_delay(dev, 4000);
358 pm_runtime_enable(dev);
359 pm_runtime_get_sync(dev);
360
361 device_init_wakeup(dev, true);
362
363 ret = ssusb_rscs_init(ssusb);
364 if (ret)
365 goto comm_init_err;
366
367 if (ssusb->wakeup_irq > 0) {
368 ret = dev_pm_set_dedicated_wake_irq_reverse(dev, ssusb->wakeup_irq);
369 if (ret) {
370 dev_err(dev, "failed to set wakeup irq %d\n", ssusb->wakeup_irq);
371 goto comm_exit;
372 }
373 dev_info(dev, "wakeup irq %d\n", ssusb->wakeup_irq);
374 }
375
376 ret = device_reset_optional(dev);
377 if (ret) {
378 dev_err_probe(dev, ret, "failed to reset controller\n");
379 goto comm_exit;
380 }
381
382 ssusb_ip_sw_reset(ssusb);
383 ssusb_u3_drd_check(ssusb);
384
385 if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
386 ssusb->dr_mode = USB_DR_MODE_HOST;
387 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
388 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
389
390 /* default as host */
391 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
392
393 switch (ssusb->dr_mode) {
394 case USB_DR_MODE_PERIPHERAL:
395 ret = ssusb_gadget_init(ssusb);
396 if (ret) {
397 dev_err(dev, "failed to initialize gadget\n");
398 goto comm_exit;
399 }
400 break;
401 case USB_DR_MODE_HOST:
402 ret = ssusb_host_init(ssusb, node);
403 if (ret) {
404 dev_err(dev, "failed to initialize host\n");
405 goto comm_exit;
406 }
407 break;
408 case USB_DR_MODE_OTG:
409 ret = ssusb_gadget_init(ssusb);
410 if (ret) {
411 dev_err(dev, "failed to initialize gadget\n");
412 goto comm_exit;
413 }
414
415 ret = ssusb_host_init(ssusb, node);
416 if (ret) {
417 dev_err(dev, "failed to initialize host\n");
418 goto gadget_exit;
419 }
420
421 ret = ssusb_otg_switch_init(ssusb);
422 if (ret) {
423 dev_err(dev, "failed to initialize switch\n");
424 goto host_exit;
425 }
426 break;
427 default:
428 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
429 ret = -EINVAL;
430 goto comm_exit;
431 }
432
433 device_enable_async_suspend(dev);
434 pm_runtime_mark_last_busy(dev);
435 pm_runtime_put_autosuspend(dev);
436 pm_runtime_forbid(dev);
437
438 return 0;
439
440host_exit:
441 ssusb_host_exit(ssusb);
442gadget_exit:
443 ssusb_gadget_exit(ssusb);
444comm_exit:
445 ssusb_rscs_exit(ssusb);
446comm_init_err:
447 pm_runtime_put_noidle(dev);
448 pm_runtime_disable(dev);
449 ssusb_debugfs_remove_root(ssusb);
450
451 return ret;
452}
453
454static void mtu3_remove(struct platform_device *pdev)
455{
456 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
457
458 pm_runtime_get_sync(&pdev->dev);
459
460 switch (ssusb->dr_mode) {
461 case USB_DR_MODE_PERIPHERAL:
462 ssusb_gadget_exit(ssusb);
463 break;
464 case USB_DR_MODE_HOST:
465 ssusb_host_exit(ssusb);
466 break;
467 case USB_DR_MODE_OTG:
468 ssusb_otg_switch_exit(ssusb);
469 ssusb_gadget_exit(ssusb);
470 ssusb_host_exit(ssusb);
471 break;
472 case USB_DR_MODE_UNKNOWN:
473 /*
474 * This cannot happen because with dr_mode ==
475 * USB_DR_MODE_UNKNOWN, .probe() doesn't succeed and so
476 * .remove() wouldn't be called at all. However (little
477 * surprising) the compiler isn't smart enough to see that, so
478 * we explicitly have this case item to not make the compiler
479 * wail about an unhandled enumeration value.
480 */
481 break;
482 }
483
484 ssusb_rscs_exit(ssusb);
485 ssusb_debugfs_remove_root(ssusb);
486 pm_runtime_disable(&pdev->dev);
487 pm_runtime_put_noidle(&pdev->dev);
488 pm_runtime_set_suspended(&pdev->dev);
489}
490
491static int resume_ip_and_ports(struct ssusb_mtk *ssusb, pm_message_t msg)
492{
493 switch (ssusb->dr_mode) {
494 case USB_DR_MODE_PERIPHERAL:
495 ssusb_gadget_resume(ssusb, msg);
496 break;
497 case USB_DR_MODE_HOST:
498 ssusb_host_resume(ssusb, false);
499 break;
500 case USB_DR_MODE_OTG:
501 ssusb_host_resume(ssusb, !ssusb->is_host);
502 if (!ssusb->is_host)
503 ssusb_gadget_resume(ssusb, msg);
504
505 break;
506 default:
507 return -EINVAL;
508 }
509
510 return 0;
511}
512
513static int mtu3_suspend_common(struct device *dev, pm_message_t msg)
514{
515 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
516 int ret = 0;
517
518 dev_dbg(dev, "%s\n", __func__);
519
520 switch (ssusb->dr_mode) {
521 case USB_DR_MODE_PERIPHERAL:
522 ret = ssusb_gadget_suspend(ssusb, msg);
523 if (ret)
524 goto err;
525
526 break;
527 case USB_DR_MODE_HOST:
528 ssusb_host_suspend(ssusb);
529 break;
530 case USB_DR_MODE_OTG:
531 if (!ssusb->is_host) {
532 ret = ssusb_gadget_suspend(ssusb, msg);
533 if (ret)
534 goto err;
535 }
536 ssusb_host_suspend(ssusb);
537 break;
538 default:
539 return -EINVAL;
540 }
541
542 ret = wait_for_ip_sleep(ssusb);
543 if (ret)
544 goto sleep_err;
545
546 ssusb_phy_power_off(ssusb);
547 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
548 ssusb_wakeup_set(ssusb, true);
549 return 0;
550
551sleep_err:
552 resume_ip_and_ports(ssusb, msg);
553err:
554 return ret;
555}
556
557static int mtu3_resume_common(struct device *dev, pm_message_t msg)
558{
559 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
560 int ret;
561
562 dev_dbg(dev, "%s\n", __func__);
563
564 ssusb_wakeup_set(ssusb, false);
565 ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
566 if (ret)
567 goto clks_err;
568
569 ret = ssusb_phy_power_on(ssusb);
570 if (ret)
571 goto phy_err;
572
573 return resume_ip_and_ports(ssusb, msg);
574
575phy_err:
576 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
577clks_err:
578 return ret;
579}
580
581static int __maybe_unused mtu3_suspend(struct device *dev)
582{
583 return mtu3_suspend_common(dev, PMSG_SUSPEND);
584}
585
586static int __maybe_unused mtu3_resume(struct device *dev)
587{
588 return mtu3_resume_common(dev, PMSG_SUSPEND);
589}
590
591static int __maybe_unused mtu3_runtime_suspend(struct device *dev)
592{
593 if (!device_may_wakeup(dev))
594 return 0;
595
596 return mtu3_suspend_common(dev, PMSG_AUTO_SUSPEND);
597}
598
599static int __maybe_unused mtu3_runtime_resume(struct device *dev)
600{
601 if (!device_may_wakeup(dev))
602 return 0;
603
604 return mtu3_resume_common(dev, PMSG_AUTO_SUSPEND);
605}
606
607static const struct dev_pm_ops mtu3_pm_ops = {
608 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
609 SET_RUNTIME_PM_OPS(mtu3_runtime_suspend,
610 mtu3_runtime_resume, NULL)
611};
612
613#define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
614
615static const struct of_device_id mtu3_of_match[] = {
616 {.compatible = "mediatek,mt8173-mtu3",},
617 {.compatible = "mediatek,mtu3",},
618 {},
619};
620MODULE_DEVICE_TABLE(of, mtu3_of_match);
621
622static struct platform_driver mtu3_driver = {
623 .probe = mtu3_probe,
624 .remove_new = mtu3_remove,
625 .driver = {
626 .name = MTU3_DRIVER_NAME,
627 .pm = DEV_PM_OPS,
628 .of_match_table = mtu3_of_match,
629 },
630};
631module_platform_driver(mtu3_driver);
632
633MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
634MODULE_LICENSE("GPL v2");
635MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2016 MediaTek Inc.
4 *
5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6 */
7
8#include <linux/dma-mapping.h>
9#include <linux/iopoll.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/of_address.h>
13#include <linux/of_irq.h>
14#include <linux/platform_device.h>
15
16#include "mtu3.h"
17#include "mtu3_dr.h"
18#include "mtu3_debug.h"
19
20/* u2-port0 should be powered on and enabled; */
21int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
22{
23 void __iomem *ibase = ssusb->ippc_base;
24 u32 value, check_val;
25 int ret;
26
27 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
28 SSUSB_REF_RST_B_STS;
29
30 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
31 (check_val == (value & check_val)), 100, 20000);
32 if (ret) {
33 dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
34 return ret;
35 }
36
37 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
38 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
39 if (ret) {
40 dev_err(ssusb->dev, "mac2 clock is not stable\n");
41 return ret;
42 }
43
44 return 0;
45}
46
47static int ssusb_phy_init(struct ssusb_mtk *ssusb)
48{
49 int i;
50 int ret;
51
52 for (i = 0; i < ssusb->num_phys; i++) {
53 ret = phy_init(ssusb->phys[i]);
54 if (ret)
55 goto exit_phy;
56 }
57 return 0;
58
59exit_phy:
60 for (; i > 0; i--)
61 phy_exit(ssusb->phys[i - 1]);
62
63 return ret;
64}
65
66static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
67{
68 int i;
69
70 for (i = 0; i < ssusb->num_phys; i++)
71 phy_exit(ssusb->phys[i]);
72
73 return 0;
74}
75
76static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
77{
78 int i;
79 int ret;
80
81 for (i = 0; i < ssusb->num_phys; i++) {
82 ret = phy_power_on(ssusb->phys[i]);
83 if (ret)
84 goto power_off_phy;
85 }
86 return 0;
87
88power_off_phy:
89 for (; i > 0; i--)
90 phy_power_off(ssusb->phys[i - 1]);
91
92 return ret;
93}
94
95static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
96{
97 unsigned int i;
98
99 for (i = 0; i < ssusb->num_phys; i++)
100 phy_power_off(ssusb->phys[i]);
101}
102
103static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
104{
105 int ret = 0;
106
107 ret = regulator_enable(ssusb->vusb33);
108 if (ret) {
109 dev_err(ssusb->dev, "failed to enable vusb33\n");
110 goto vusb33_err;
111 }
112
113 ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
114 if (ret)
115 goto clks_err;
116
117 ret = ssusb_phy_init(ssusb);
118 if (ret) {
119 dev_err(ssusb->dev, "failed to init phy\n");
120 goto phy_init_err;
121 }
122
123 ret = ssusb_phy_power_on(ssusb);
124 if (ret) {
125 dev_err(ssusb->dev, "failed to power on phy\n");
126 goto phy_err;
127 }
128
129 return 0;
130
131phy_err:
132 ssusb_phy_exit(ssusb);
133phy_init_err:
134 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
135clks_err:
136 regulator_disable(ssusb->vusb33);
137vusb33_err:
138 return ret;
139}
140
141static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
142{
143 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
144 regulator_disable(ssusb->vusb33);
145 ssusb_phy_power_off(ssusb);
146 ssusb_phy_exit(ssusb);
147}
148
149static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
150{
151 /* reset whole ip (xhci & u3d) */
152 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
153 udelay(1);
154 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
155
156 /*
157 * device ip may be powered on in firmware/BROM stage before entering
158 * kernel stage;
159 * power down device ip, otherwise ip-sleep will fail when working as
160 * host only mode
161 */
162 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
163}
164
165static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
166{
167 struct device_node *node = pdev->dev.of_node;
168 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
169 struct clk_bulk_data *clks = ssusb->clks;
170 struct device *dev = &pdev->dev;
171 int i;
172 int ret;
173
174 ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
175 if (IS_ERR(ssusb->vusb33)) {
176 dev_err(dev, "failed to get vusb33\n");
177 return PTR_ERR(ssusb->vusb33);
178 }
179
180 clks[0].id = "sys_ck";
181 clks[1].id = "ref_ck";
182 clks[2].id = "mcu_ck";
183 clks[3].id = "dma_ck";
184 ret = devm_clk_bulk_get_optional(dev, BULK_CLKS_CNT, clks);
185 if (ret)
186 return ret;
187
188 ssusb->num_phys = of_count_phandle_with_args(node,
189 "phys", "#phy-cells");
190 if (ssusb->num_phys > 0) {
191 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
192 sizeof(*ssusb->phys), GFP_KERNEL);
193 if (!ssusb->phys)
194 return -ENOMEM;
195 } else {
196 ssusb->num_phys = 0;
197 }
198
199 for (i = 0; i < ssusb->num_phys; i++) {
200 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
201 if (IS_ERR(ssusb->phys[i])) {
202 dev_err(dev, "failed to get phy-%d\n", i);
203 return PTR_ERR(ssusb->phys[i]);
204 }
205 }
206
207 ssusb->ippc_base = devm_platform_ioremap_resource_byname(pdev, "ippc");
208 if (IS_ERR(ssusb->ippc_base))
209 return PTR_ERR(ssusb->ippc_base);
210
211 ssusb->dr_mode = usb_get_dr_mode(dev);
212 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
213 ssusb->dr_mode = USB_DR_MODE_OTG;
214
215 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
216 goto out;
217
218 /* if host role is supported */
219 ret = ssusb_wakeup_of_property_parse(ssusb, node);
220 if (ret) {
221 dev_err(dev, "failed to parse uwk property\n");
222 return ret;
223 }
224
225 /* optional property, ignore the error if it does not exist */
226 of_property_read_u32(node, "mediatek,u3p-dis-msk",
227 &ssusb->u3p_dis_msk);
228
229 otg_sx->vbus = devm_regulator_get(dev, "vbus");
230 if (IS_ERR(otg_sx->vbus)) {
231 dev_err(dev, "failed to get vbus\n");
232 return PTR_ERR(otg_sx->vbus);
233 }
234
235 if (ssusb->dr_mode == USB_DR_MODE_HOST)
236 goto out;
237
238 /* if dual-role mode is supported */
239 otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
240 otg_sx->manual_drd_enabled =
241 of_property_read_bool(node, "enable-manual-drd");
242 otg_sx->role_sw_used = of_property_read_bool(node, "usb-role-switch");
243
244 if (otg_sx->role_sw_used || otg_sx->manual_drd_enabled)
245 goto out;
246
247 if (of_property_read_bool(node, "extcon")) {
248 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
249 if (IS_ERR(otg_sx->edev)) {
250 return dev_err_probe(dev, PTR_ERR(otg_sx->edev),
251 "couldn't get extcon device\n");
252 }
253 }
254
255out:
256 dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n",
257 ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk,
258 otg_sx->manual_drd_enabled ? "manual" : "auto");
259
260 return 0;
261}
262
263static int mtu3_probe(struct platform_device *pdev)
264{
265 struct device_node *node = pdev->dev.of_node;
266 struct device *dev = &pdev->dev;
267 struct ssusb_mtk *ssusb;
268 int ret = -ENOMEM;
269
270 /* all elements are set to ZERO as default value */
271 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
272 if (!ssusb)
273 return -ENOMEM;
274
275 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
276 if (ret) {
277 dev_err(dev, "No suitable DMA config available\n");
278 return -ENOTSUPP;
279 }
280
281 platform_set_drvdata(pdev, ssusb);
282 ssusb->dev = dev;
283
284 ret = get_ssusb_rscs(pdev, ssusb);
285 if (ret)
286 return ret;
287
288 ssusb_debugfs_create_root(ssusb);
289
290 /* enable power domain */
291 pm_runtime_enable(dev);
292 pm_runtime_get_sync(dev);
293 device_enable_async_suspend(dev);
294
295 ret = ssusb_rscs_init(ssusb);
296 if (ret)
297 goto comm_init_err;
298
299 ssusb_ip_sw_reset(ssusb);
300
301 if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
302 ssusb->dr_mode = USB_DR_MODE_HOST;
303 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
304 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
305
306 /* default as host */
307 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
308
309 switch (ssusb->dr_mode) {
310 case USB_DR_MODE_PERIPHERAL:
311 ret = ssusb_gadget_init(ssusb);
312 if (ret) {
313 dev_err(dev, "failed to initialize gadget\n");
314 goto comm_exit;
315 }
316 break;
317 case USB_DR_MODE_HOST:
318 ret = ssusb_host_init(ssusb, node);
319 if (ret) {
320 dev_err(dev, "failed to initialize host\n");
321 goto comm_exit;
322 }
323 break;
324 case USB_DR_MODE_OTG:
325 ret = ssusb_gadget_init(ssusb);
326 if (ret) {
327 dev_err(dev, "failed to initialize gadget\n");
328 goto comm_exit;
329 }
330
331 ret = ssusb_host_init(ssusb, node);
332 if (ret) {
333 dev_err(dev, "failed to initialize host\n");
334 goto gadget_exit;
335 }
336
337 ret = ssusb_otg_switch_init(ssusb);
338 if (ret) {
339 dev_err(dev, "failed to initialize switch\n");
340 goto host_exit;
341 }
342 break;
343 default:
344 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
345 ret = -EINVAL;
346 goto comm_exit;
347 }
348
349 return 0;
350
351host_exit:
352 ssusb_host_exit(ssusb);
353gadget_exit:
354 ssusb_gadget_exit(ssusb);
355comm_exit:
356 ssusb_rscs_exit(ssusb);
357comm_init_err:
358 pm_runtime_put_sync(dev);
359 pm_runtime_disable(dev);
360 ssusb_debugfs_remove_root(ssusb);
361
362 return ret;
363}
364
365static int mtu3_remove(struct platform_device *pdev)
366{
367 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
368
369 switch (ssusb->dr_mode) {
370 case USB_DR_MODE_PERIPHERAL:
371 ssusb_gadget_exit(ssusb);
372 break;
373 case USB_DR_MODE_HOST:
374 ssusb_host_exit(ssusb);
375 break;
376 case USB_DR_MODE_OTG:
377 ssusb_otg_switch_exit(ssusb);
378 ssusb_gadget_exit(ssusb);
379 ssusb_host_exit(ssusb);
380 break;
381 default:
382 return -EINVAL;
383 }
384
385 ssusb_rscs_exit(ssusb);
386 pm_runtime_put_sync(&pdev->dev);
387 pm_runtime_disable(&pdev->dev);
388 ssusb_debugfs_remove_root(ssusb);
389
390 return 0;
391}
392
393/*
394 * when support dual-role mode, we reject suspend when
395 * it works as device mode;
396 */
397static int __maybe_unused mtu3_suspend(struct device *dev)
398{
399 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
400
401 dev_dbg(dev, "%s\n", __func__);
402
403 /* REVISIT: disconnect it for only device mode? */
404 if (!ssusb->is_host)
405 return 0;
406
407 ssusb_host_disable(ssusb, true);
408 ssusb_phy_power_off(ssusb);
409 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
410 ssusb_wakeup_set(ssusb, true);
411
412 return 0;
413}
414
415static int __maybe_unused mtu3_resume(struct device *dev)
416{
417 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
418 int ret;
419
420 dev_dbg(dev, "%s\n", __func__);
421
422 if (!ssusb->is_host)
423 return 0;
424
425 ssusb_wakeup_set(ssusb, false);
426 ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
427 if (ret)
428 goto clks_err;
429
430 ret = ssusb_phy_power_on(ssusb);
431 if (ret)
432 goto phy_err;
433
434 ssusb_host_enable(ssusb);
435
436 return 0;
437
438phy_err:
439 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
440clks_err:
441 return ret;
442}
443
444static const struct dev_pm_ops mtu3_pm_ops = {
445 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
446};
447
448#define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
449
450static const struct of_device_id mtu3_of_match[] = {
451 {.compatible = "mediatek,mt8173-mtu3",},
452 {.compatible = "mediatek,mtu3",},
453 {},
454};
455MODULE_DEVICE_TABLE(of, mtu3_of_match);
456
457static struct platform_driver mtu3_driver = {
458 .probe = mtu3_probe,
459 .remove = mtu3_remove,
460 .driver = {
461 .name = MTU3_DRIVER_NAME,
462 .pm = DEV_PM_OPS,
463 .of_match_table = mtu3_of_match,
464 },
465};
466module_platform_driver(mtu3_driver);
467
468MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
469MODULE_LICENSE("GPL v2");
470MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");