1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*	Sealevel Systems 4021 driver.
  3 *
  4 *	(c) Copyright 1999, 2001 Alan Cox
  5 *	(c) Copyright 2001 Red Hat Inc.
  6 *	Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
  7 */
  8
  9#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 10
 11#include <linux/module.h>
 12#include <linux/kernel.h>
 13#include <linux/mm.h>
 14#include <linux/net.h>
 15#include <linux/skbuff.h>
 16#include <linux/netdevice.h>
 17#include <linux/if_arp.h>
 18#include <linux/delay.h>
 19#include <linux/hdlc.h>
 20#include <linux/ioport.h>
 21#include <linux/init.h>
 22#include <linux/slab.h>
 23#include <net/arp.h>
 24
 25#include <asm/irq.h>
 26#include <asm/io.h>
 27#include <asm/dma.h>
 28#include <asm/byteorder.h>
 29#include "z85230.h"
 30
 31struct slvl_device {
 32	struct z8530_channel *chan;
 33	int channel;
 34};
 35
 36struct slvl_board {
 37	struct slvl_device dev[2];
 38	struct z8530_dev board;
 39	int iobase;
 40};
 41
 42 /*	Network driver support routines */
 43
 44static inline struct slvl_device *dev_to_chan(struct net_device *dev)
 45{
 46	return (struct slvl_device *)dev_to_hdlc(dev)->priv;
 47}
 48
 49/*	Frame receive. Simple for our card as we do HDLC and there
 50 *	is no funny garbage involved
 51 */
 52
 53static void sealevel_input(struct z8530_channel *c, struct sk_buff *skb)
 54{
 55	/* Drop the CRC - it's not a good idea to try and negotiate it ;) */
 56	skb_trim(skb, skb->len - 2);
 57	skb->protocol = hdlc_type_trans(skb, c->netdevice);
 58	skb_reset_mac_header(skb);
 59	skb->dev = c->netdevice;
 60	netif_rx(skb);
 61}
 62
 63 /*	We've been placed in the UP state */
 64
 65static int sealevel_open(struct net_device *d)
 66{
 67	struct slvl_device *slvl = dev_to_chan(d);
 68	int err = -1;
 69	int unit = slvl->channel;
 70
 71	 /*	Link layer up. */
 72
 73	switch (unit) {
 74	case 0:
 75		err = z8530_sync_dma_open(d, slvl->chan);
 76		break;
 77	case 1:
 78		err = z8530_sync_open(d, slvl->chan);
 79		break;
 80	}
 81
 82	if (err)
 83		return err;
 84
 85	err = hdlc_open(d);
 86	if (err) {
 87		switch (unit) {
 88		case 0:
 89			z8530_sync_dma_close(d, slvl->chan);
 90			break;
 91		case 1:
 92			z8530_sync_close(d, slvl->chan);
 93			break;
 94		}
 95		return err;
 96	}
 97
 98	slvl->chan->rx_function = sealevel_input;
 99
100	netif_start_queue(d);
101	return 0;
102}
103
104static int sealevel_close(struct net_device *d)
105{
106	struct slvl_device *slvl = dev_to_chan(d);
107	int unit = slvl->channel;
108
109	/*	Discard new frames */
110
111	slvl->chan->rx_function = z8530_null_rx;
112
113	hdlc_close(d);
114	netif_stop_queue(d);
115
116	switch (unit) {
117	case 0:
118		z8530_sync_dma_close(d, slvl->chan);
119		break;
120	case 1:
121		z8530_sync_close(d, slvl->chan);
122		break;
123	}
124	return 0;
125}
126
127static int sealevel_ioctl(struct net_device *d, struct ifreq *ifr, int cmd)
128{
129	/* struct slvl_device *slvl=dev_to_chan(d);
130	 * z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd)
131	 */
132	return hdlc_ioctl(d, ifr, cmd);
133}
134
135/*	Passed network frames, fire them downwind. */
136
137static netdev_tx_t sealevel_queue_xmit(struct sk_buff *skb,
138				       struct net_device *d)
139{
140	return z8530_queue_xmit(dev_to_chan(d)->chan, skb);
141}
142
143static int sealevel_attach(struct net_device *dev, unsigned short encoding,
144			   unsigned short parity)
145{
146	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
147		return 0;
148	return -EINVAL;
149}
150
151static const struct net_device_ops sealevel_ops = {
152	.ndo_open       = sealevel_open,
153	.ndo_stop       = sealevel_close,
154	.ndo_start_xmit = hdlc_start_xmit,
155	.ndo_do_ioctl   = sealevel_ioctl,
156};
157
158static int slvl_setup(struct slvl_device *sv, int iobase, int irq)
159{
160	struct net_device *dev = alloc_hdlcdev(sv);
161
162	if (!dev)
163		return -1;
164
165	dev_to_hdlc(dev)->attach = sealevel_attach;
166	dev_to_hdlc(dev)->xmit = sealevel_queue_xmit;
167	dev->netdev_ops = &sealevel_ops;
168	dev->base_addr = iobase;
169	dev->irq = irq;
170
171	if (register_hdlc_device(dev)) {
172		pr_err("unable to register HDLC device\n");
173		free_netdev(dev);
174		return -1;
175	}
176
177	sv->chan->netdevice = dev;
178	return 0;
179}
180
181/*	Allocate and setup Sealevel board. */
182
183static __init struct slvl_board *slvl_init(int iobase, int irq,
184					   int txdma, int rxdma, int slow)
185{
186	struct z8530_dev *dev;
187	struct slvl_board *b;
188
189	/*	Get the needed I/O space */
190
191	if (!request_region(iobase, 8, "Sealevel 4021")) {
192		pr_warn("I/O 0x%X already in use\n", iobase);
193		return NULL;
194	}
195
196	b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL);
197	if (!b)
198		goto err_kzalloc;
199
200	b->dev[0].chan = &b->board.chanA;
201	b->dev[0].channel = 0;
202
203	b->dev[1].chan = &b->board.chanB;
204	b->dev[1].channel = 1;
205
206	dev = &b->board;
207
208	/*	Stuff in the I/O addressing */
209
210	dev->active = 0;
211
212	b->iobase = iobase;
213
214	/*	Select 8530 delays for the old board */
215
216	if (slow)
217		iobase |= Z8530_PORT_SLEEP;
218
219	dev->chanA.ctrlio = iobase + 1;
220	dev->chanA.dataio = iobase;
221	dev->chanB.ctrlio = iobase + 3;
222	dev->chanB.dataio = iobase + 2;
223
224	dev->chanA.irqs = &z8530_nop;
225	dev->chanB.irqs = &z8530_nop;
226
227	/*	Assert DTR enable DMA */
228
229	outb(3 | (1 << 7), b->iobase + 4);
230
231	/* We want a fast IRQ for this device. Actually we'd like an even faster
232	 * IRQ ;) - This is one driver RtLinux is made for
233	 */
234
235	if (request_irq(irq, z8530_interrupt, 0,
236			"SeaLevel", dev) < 0) {
237		pr_warn("IRQ %d already in use\n", irq);
238		goto err_request_irq;
239	}
240
241	dev->irq = irq;
242	dev->chanA.private = &b->dev[0];
243	dev->chanB.private = &b->dev[1];
244	dev->chanA.dev = dev;
245	dev->chanB.dev = dev;
246
247	dev->chanA.txdma = 3;
248	dev->chanA.rxdma = 1;
249	if (request_dma(dev->chanA.txdma, "SeaLevel (TX)"))
250		goto err_dma_tx;
251
252	if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)"))
253		goto err_dma_rx;
254
255	disable_irq(irq);
256
257	/*	Begin normal initialise */
258
259	if (z8530_init(dev) != 0) {
260		pr_err("Z8530 series device not found\n");
261		enable_irq(irq);
262		goto free_hw;
263	}
264	if (dev->type == Z85C30) {
265		z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream);
266		z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream);
267	} else {
268		z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230);
269		z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230);
270	}
271
272	/*	Now we can take the IRQ */
273
274	enable_irq(irq);
275
276	if (slvl_setup(&b->dev[0], iobase, irq))
277		goto free_hw;
278	if (slvl_setup(&b->dev[1], iobase, irq))
279		goto free_netdev0;
280
281	z8530_describe(dev, "I/O", iobase);
282	dev->active = 1;
283	return b;
284
285free_netdev0:
286	unregister_hdlc_device(b->dev[0].chan->netdevice);
287	free_netdev(b->dev[0].chan->netdevice);
288free_hw:
289	free_dma(dev->chanA.rxdma);
290err_dma_rx:
291	free_dma(dev->chanA.txdma);
292err_dma_tx:
293	free_irq(irq, dev);
294err_request_irq:
295	kfree(b);
296err_kzalloc:
297	release_region(iobase, 8);
298	return NULL;
299}
300
301static void __exit slvl_shutdown(struct slvl_board *b)
302{
303	int u;
304
305	z8530_shutdown(&b->board);
306
307	for (u = 0; u < 2; u++) {
308		struct net_device *d = b->dev[u].chan->netdevice;
309
310		unregister_hdlc_device(d);
311		free_netdev(d);
312	}
313
314	free_irq(b->board.irq, &b->board);
315	free_dma(b->board.chanA.rxdma);
316	free_dma(b->board.chanA.txdma);
317	/* DMA off on the card, drop DTR */
318	outb(0, b->iobase);
319	release_region(b->iobase, 8);
320	kfree(b);
321}
322
323static int io = 0x238;
324static int txdma = 1;
325static int rxdma = 3;
326static int irq = 5;
327static bool slow;
328
329module_param_hw(io, int, ioport, 0);
330MODULE_PARM_DESC(io, "The I/O base of the Sealevel card");
331module_param_hw(txdma, int, dma, 0);
332MODULE_PARM_DESC(txdma, "Transmit DMA channel");
333module_param_hw(rxdma, int, dma, 0);
334MODULE_PARM_DESC(rxdma, "Receive DMA channel");
335module_param_hw(irq, int, irq, 0);
336MODULE_PARM_DESC(irq, "The interrupt line setting for the SeaLevel card");
337module_param(slow, bool, 0);
338MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012");
339
340MODULE_AUTHOR("Alan Cox");
341MODULE_LICENSE("GPL");
342MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021");
343
344static struct slvl_board *slvl_unit;
345
346static int __init slvl_init_module(void)
347{
348	slvl_unit = slvl_init(io, irq, txdma, rxdma, slow);
349
350	return slvl_unit ? 0 : -ENODEV;
351}
352
353static void __exit slvl_cleanup_module(void)
354{
355	if (slvl_unit)
356		slvl_shutdown(slvl_unit);
357}
358
359module_init(slvl_init_module);
360module_exit(slvl_cleanup_module);