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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Faraday FTMAC100 10/100 Ethernet
4 *
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 */
8
9#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10
11#include <linux/dma-mapping.h>
12#include <linux/etherdevice.h>
13#include <linux/ethtool.h>
14#include <linux/if_ether.h>
15#include <linux/if_vlan.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/mii.h>
20#include <linux/module.h>
21#include <linux/mod_devicetable.h>
22#include <linux/netdevice.h>
23#include <linux/platform_device.h>
24
25#include "ftmac100.h"
26
27#define DRV_NAME "ftmac100"
28
29#define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
30#define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
31
32#define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
33#define MAX_PKT_SIZE RX_BUF_SIZE /* multi-segment not supported */
34
35#if MAX_PKT_SIZE > 0x7ff
36#error invalid MAX_PKT_SIZE
37#endif
38
39#if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
40#error invalid RX_BUF_SIZE
41#endif
42
43/******************************************************************************
44 * private data
45 *****************************************************************************/
46struct ftmac100_descs {
47 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
48 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
49};
50
51struct ftmac100 {
52 struct resource *res;
53 void __iomem *base;
54 int irq;
55
56 struct ftmac100_descs *descs;
57 dma_addr_t descs_dma_addr;
58
59 unsigned int rx_pointer;
60 unsigned int tx_clean_pointer;
61 unsigned int tx_pointer;
62 unsigned int tx_pending;
63
64 spinlock_t tx_lock;
65
66 struct net_device *netdev;
67 struct device *dev;
68 struct napi_struct napi;
69
70 struct mii_if_info mii;
71};
72
73static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
74 struct ftmac100_rxdes *rxdes, gfp_t gfp);
75
76/******************************************************************************
77 * internal functions (hardware register access)
78 *****************************************************************************/
79#define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
80 FTMAC100_INT_NORXBUF | \
81 FTMAC100_INT_XPKT_OK | \
82 FTMAC100_INT_XPKT_LOST | \
83 FTMAC100_INT_RPKT_LOST | \
84 FTMAC100_INT_AHB_ERR | \
85 FTMAC100_INT_PHYSTS_CHG)
86
87#define INT_MASK_ALL_DISABLED 0
88
89static void ftmac100_enable_all_int(struct ftmac100 *priv)
90{
91 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
92}
93
94static void ftmac100_disable_all_int(struct ftmac100 *priv)
95{
96 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
97}
98
99static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
100{
101 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
102}
103
104static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
105{
106 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
107}
108
109static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
110{
111 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
112}
113
114static int ftmac100_reset(struct ftmac100 *priv)
115{
116 struct net_device *netdev = priv->netdev;
117 int i;
118
119 /* NOTE: reset clears all registers */
120 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
121
122 for (i = 0; i < 5; i++) {
123 unsigned int maccr;
124
125 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
126 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
127 /*
128 * FTMAC100_MACCR_SW_RST cleared does not indicate
129 * that hardware reset completed (what the f*ck).
130 * We still need to wait for a while.
131 */
132 udelay(500);
133 return 0;
134 }
135
136 udelay(1000);
137 }
138
139 netdev_err(netdev, "software reset failed\n");
140 return -EIO;
141}
142
143static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
144{
145 unsigned int maddr = mac[0] << 8 | mac[1];
146 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
147
148 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
149 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
150}
151
152static void ftmac100_setup_mc_ht(struct ftmac100 *priv)
153{
154 struct netdev_hw_addr *ha;
155 u64 maht = 0; /* Multicast Address Hash Table */
156
157 netdev_for_each_mc_addr(ha, priv->netdev) {
158 u32 hash = ether_crc(ETH_ALEN, ha->addr) >> 26;
159
160 maht |= BIT_ULL(hash);
161 }
162
163 iowrite32(lower_32_bits(maht), priv->base + FTMAC100_OFFSET_MAHT0);
164 iowrite32(upper_32_bits(maht), priv->base + FTMAC100_OFFSET_MAHT1);
165}
166
167static void ftmac100_set_rx_bits(struct ftmac100 *priv, unsigned int *maccr)
168{
169 struct net_device *netdev = priv->netdev;
170
171 /* Clear all */
172 *maccr &= ~(FTMAC100_MACCR_RCV_ALL | FTMAC100_MACCR_RX_MULTIPKT |
173 FTMAC100_MACCR_HT_MULTI_EN);
174
175 /* Set the requested bits */
176 if (netdev->flags & IFF_PROMISC)
177 *maccr |= FTMAC100_MACCR_RCV_ALL;
178 if (netdev->flags & IFF_ALLMULTI)
179 *maccr |= FTMAC100_MACCR_RX_MULTIPKT;
180 else if (netdev_mc_count(netdev)) {
181 *maccr |= FTMAC100_MACCR_HT_MULTI_EN;
182 ftmac100_setup_mc_ht(priv);
183 }
184}
185
186#define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
187 FTMAC100_MACCR_RCV_EN | \
188 FTMAC100_MACCR_XDMA_EN | \
189 FTMAC100_MACCR_RDMA_EN | \
190 FTMAC100_MACCR_CRC_APD | \
191 FTMAC100_MACCR_FULLDUP | \
192 FTMAC100_MACCR_RX_RUNT | \
193 FTMAC100_MACCR_RX_BROADPKT)
194
195static int ftmac100_start_hw(struct ftmac100 *priv)
196{
197 struct net_device *netdev = priv->netdev;
198 unsigned int maccr = MACCR_ENABLE_ALL;
199
200 if (ftmac100_reset(priv))
201 return -EIO;
202
203 /* setup ring buffer base registers */
204 ftmac100_set_rx_ring_base(priv,
205 priv->descs_dma_addr +
206 offsetof(struct ftmac100_descs, rxdes));
207 ftmac100_set_tx_ring_base(priv,
208 priv->descs_dma_addr +
209 offsetof(struct ftmac100_descs, txdes));
210
211 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
212
213 ftmac100_set_mac(priv, netdev->dev_addr);
214
215 /* See ftmac100_change_mtu() */
216 if (netdev->mtu > ETH_DATA_LEN)
217 maccr |= FTMAC100_MACCR_RX_FTL;
218
219 ftmac100_set_rx_bits(priv, &maccr);
220
221 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
222 return 0;
223}
224
225static void ftmac100_stop_hw(struct ftmac100 *priv)
226{
227 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
228}
229
230/******************************************************************************
231 * internal functions (receive descriptor)
232 *****************************************************************************/
233static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
234{
235 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
236}
237
238static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
239{
240 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
241}
242
243static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
244{
245 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
246}
247
248static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
249{
250 /* clear status bits */
251 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
252}
253
254static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
255{
256 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
257}
258
259static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
260{
261 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
262}
263
264static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
265{
266 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
267}
268
269static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
270{
271 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
272}
273
274static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
275{
276 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
277}
278
279static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
280{
281 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
282}
283
284static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
285 unsigned int size)
286{
287 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
288 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
289}
290
291static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
292{
293 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
294}
295
296static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
297 dma_addr_t addr)
298{
299 rxdes->rxdes2 = cpu_to_le32(addr);
300}
301
302static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
303{
304 return le32_to_cpu(rxdes->rxdes2);
305}
306
307/*
308 * rxdes3 is not used by hardware. We use it to keep track of page.
309 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
310 */
311static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
312{
313 rxdes->rxdes3 = (unsigned int)page;
314}
315
316static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
317{
318 return (struct page *)rxdes->rxdes3;
319}
320
321/******************************************************************************
322 * internal functions (receive)
323 *****************************************************************************/
324static int ftmac100_next_rx_pointer(int pointer)
325{
326 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
327}
328
329static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
330{
331 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
332}
333
334static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
335{
336 return &priv->descs->rxdes[priv->rx_pointer];
337}
338
339static struct ftmac100_rxdes *
340ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
341{
342 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
343
344 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
345 if (ftmac100_rxdes_first_segment(rxdes))
346 return rxdes;
347
348 ftmac100_rxdes_set_dma_own(rxdes);
349 ftmac100_rx_pointer_advance(priv);
350 rxdes = ftmac100_current_rxdes(priv);
351 }
352
353 return NULL;
354}
355
356static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
357 struct ftmac100_rxdes *rxdes)
358{
359 struct net_device *netdev = priv->netdev;
360 bool error = false;
361
362 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
363 if (net_ratelimit())
364 netdev_info(netdev, "rx err\n");
365
366 netdev->stats.rx_errors++;
367 error = true;
368 }
369
370 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
371 if (net_ratelimit())
372 netdev_info(netdev, "rx crc err\n");
373
374 netdev->stats.rx_crc_errors++;
375 error = true;
376 }
377
378 if (unlikely(ftmac100_rxdes_runt(rxdes))) {
379 if (net_ratelimit())
380 netdev_info(netdev, "rx runt\n");
381
382 netdev->stats.rx_length_errors++;
383 error = true;
384 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
385 if (net_ratelimit())
386 netdev_info(netdev, "rx odd nibble\n");
387
388 netdev->stats.rx_length_errors++;
389 error = true;
390 }
391 /*
392 * FTMAC100_RXDES0_FTL is not an error, it just indicates that the
393 * frame is longer than 1518 octets. Receiving these is possible when
394 * we told the hardware not to drop them, via FTMAC100_MACCR_RX_FTL.
395 */
396
397 return error;
398}
399
400static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
401{
402 struct net_device *netdev = priv->netdev;
403 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
404 bool done = false;
405
406 if (net_ratelimit())
407 netdev_dbg(netdev, "drop packet %p\n", rxdes);
408
409 do {
410 if (ftmac100_rxdes_last_segment(rxdes))
411 done = true;
412
413 ftmac100_rxdes_set_dma_own(rxdes);
414 ftmac100_rx_pointer_advance(priv);
415 rxdes = ftmac100_current_rxdes(priv);
416 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
417
418 netdev->stats.rx_dropped++;
419}
420
421static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
422{
423 struct net_device *netdev = priv->netdev;
424 struct ftmac100_rxdes *rxdes;
425 struct sk_buff *skb;
426 struct page *page;
427 dma_addr_t map;
428 int length;
429 bool ret;
430
431 rxdes = ftmac100_rx_locate_first_segment(priv);
432 if (!rxdes)
433 return false;
434
435 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
436 ftmac100_rx_drop_packet(priv);
437 return true;
438 }
439
440 /* We don't support multi-segment packets for now, so drop them. */
441 ret = ftmac100_rxdes_last_segment(rxdes);
442 if (unlikely(!ret)) {
443 netdev->stats.rx_length_errors++;
444 ftmac100_rx_drop_packet(priv);
445 return true;
446 }
447
448 /* start processing */
449 skb = netdev_alloc_skb_ip_align(netdev, 128);
450 if (unlikely(!skb)) {
451 if (net_ratelimit())
452 netdev_err(netdev, "rx skb alloc failed\n");
453
454 ftmac100_rx_drop_packet(priv);
455 return true;
456 }
457
458 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
459 netdev->stats.multicast++;
460
461 map = ftmac100_rxdes_get_dma_addr(rxdes);
462 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
463
464 length = ftmac100_rxdes_frame_length(rxdes);
465 page = ftmac100_rxdes_get_page(rxdes);
466 skb_fill_page_desc(skb, 0, page, 0, length);
467 skb->len += length;
468 skb->data_len += length;
469
470 if (length > 128) {
471 skb->truesize += PAGE_SIZE;
472 /* We pull the minimum amount into linear part */
473 __pskb_pull_tail(skb, ETH_HLEN);
474 } else {
475 /* Small frames are copied into linear part to free one page */
476 __pskb_pull_tail(skb, length);
477 }
478 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
479
480 ftmac100_rx_pointer_advance(priv);
481
482 skb->protocol = eth_type_trans(skb, netdev);
483
484 netdev->stats.rx_packets++;
485 netdev->stats.rx_bytes += skb->len;
486
487 /* push packet to protocol stack */
488 netif_receive_skb(skb);
489
490 (*processed)++;
491 return true;
492}
493
494/******************************************************************************
495 * internal functions (transmit descriptor)
496 *****************************************************************************/
497static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
498{
499 /* clear all except end of ring bit */
500 txdes->txdes0 = 0;
501 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
502 txdes->txdes2 = 0;
503 txdes->txdes3 = 0;
504}
505
506static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
507{
508 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
509}
510
511static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
512{
513 /*
514 * Make sure dma own bit will not be set before any other
515 * descriptor fields.
516 */
517 wmb();
518 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
519}
520
521static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
522{
523 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
524}
525
526static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
527{
528 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
529}
530
531static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
532{
533 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
534}
535
536static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
537{
538 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
539}
540
541static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
542{
543 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
544}
545
546static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
547{
548 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
549}
550
551static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
552 unsigned int len)
553{
554 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
555}
556
557static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
558 dma_addr_t addr)
559{
560 txdes->txdes2 = cpu_to_le32(addr);
561}
562
563static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
564{
565 return le32_to_cpu(txdes->txdes2);
566}
567
568/*
569 * txdes3 is not used by hardware. We use it to keep track of socket buffer.
570 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
571 */
572static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
573{
574 txdes->txdes3 = (unsigned int)skb;
575}
576
577static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
578{
579 return (struct sk_buff *)txdes->txdes3;
580}
581
582/******************************************************************************
583 * internal functions (transmit)
584 *****************************************************************************/
585static int ftmac100_next_tx_pointer(int pointer)
586{
587 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
588}
589
590static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
591{
592 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
593}
594
595static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
596{
597 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
598}
599
600static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
601{
602 return &priv->descs->txdes[priv->tx_pointer];
603}
604
605static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
606{
607 return &priv->descs->txdes[priv->tx_clean_pointer];
608}
609
610static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
611{
612 struct net_device *netdev = priv->netdev;
613 struct ftmac100_txdes *txdes;
614 struct sk_buff *skb;
615 dma_addr_t map;
616
617 if (priv->tx_pending == 0)
618 return false;
619
620 txdes = ftmac100_current_clean_txdes(priv);
621
622 if (ftmac100_txdes_owned_by_dma(txdes))
623 return false;
624
625 skb = ftmac100_txdes_get_skb(txdes);
626 map = ftmac100_txdes_get_dma_addr(txdes);
627
628 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
629 ftmac100_txdes_late_collision(txdes))) {
630 /*
631 * packet transmitted to ethernet lost due to late collision
632 * or excessive collision
633 */
634 netdev->stats.tx_aborted_errors++;
635 } else {
636 netdev->stats.tx_packets++;
637 netdev->stats.tx_bytes += skb->len;
638 }
639
640 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
641 dev_kfree_skb(skb);
642
643 ftmac100_txdes_reset(txdes);
644
645 ftmac100_tx_clean_pointer_advance(priv);
646
647 spin_lock(&priv->tx_lock);
648 priv->tx_pending--;
649 spin_unlock(&priv->tx_lock);
650 netif_wake_queue(netdev);
651
652 return true;
653}
654
655static void ftmac100_tx_complete(struct ftmac100 *priv)
656{
657 while (ftmac100_tx_complete_packet(priv))
658 ;
659}
660
661static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
662 dma_addr_t map)
663{
664 struct net_device *netdev = priv->netdev;
665 struct ftmac100_txdes *txdes;
666 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
667
668 txdes = ftmac100_current_txdes(priv);
669 ftmac100_tx_pointer_advance(priv);
670
671 /* setup TX descriptor */
672 ftmac100_txdes_set_skb(txdes, skb);
673 ftmac100_txdes_set_dma_addr(txdes, map);
674
675 ftmac100_txdes_set_first_segment(txdes);
676 ftmac100_txdes_set_last_segment(txdes);
677 ftmac100_txdes_set_txint(txdes);
678 ftmac100_txdes_set_buffer_size(txdes, len);
679
680 spin_lock(&priv->tx_lock);
681 priv->tx_pending++;
682 if (priv->tx_pending == TX_QUEUE_ENTRIES)
683 netif_stop_queue(netdev);
684
685 /* start transmit */
686 ftmac100_txdes_set_dma_own(txdes);
687 spin_unlock(&priv->tx_lock);
688
689 ftmac100_txdma_start_polling(priv);
690 return NETDEV_TX_OK;
691}
692
693/******************************************************************************
694 * internal functions (buffer)
695 *****************************************************************************/
696static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
697 struct ftmac100_rxdes *rxdes, gfp_t gfp)
698{
699 struct net_device *netdev = priv->netdev;
700 struct page *page;
701 dma_addr_t map;
702
703 page = alloc_page(gfp);
704 if (!page) {
705 if (net_ratelimit())
706 netdev_err(netdev, "failed to allocate rx page\n");
707 return -ENOMEM;
708 }
709
710 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
711 if (unlikely(dma_mapping_error(priv->dev, map))) {
712 if (net_ratelimit())
713 netdev_err(netdev, "failed to map rx page\n");
714 __free_page(page);
715 return -ENOMEM;
716 }
717
718 ftmac100_rxdes_set_page(rxdes, page);
719 ftmac100_rxdes_set_dma_addr(rxdes, map);
720 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
721 ftmac100_rxdes_set_dma_own(rxdes);
722 return 0;
723}
724
725static void ftmac100_free_buffers(struct ftmac100 *priv)
726{
727 int i;
728
729 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
730 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
731 struct page *page = ftmac100_rxdes_get_page(rxdes);
732 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
733
734 if (!page)
735 continue;
736
737 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
738 __free_page(page);
739 }
740
741 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
742 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
743 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
744 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
745
746 if (!skb)
747 continue;
748
749 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
750 dev_kfree_skb(skb);
751 }
752
753 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
754 priv->descs, priv->descs_dma_addr);
755}
756
757static int ftmac100_alloc_buffers(struct ftmac100 *priv)
758{
759 int i;
760
761 priv->descs = dma_alloc_coherent(priv->dev,
762 sizeof(struct ftmac100_descs),
763 &priv->descs_dma_addr, GFP_KERNEL);
764 if (!priv->descs)
765 return -ENOMEM;
766
767 /* initialize RX ring */
768 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
769
770 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
771 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
772
773 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
774 goto err;
775 }
776
777 /* initialize TX ring */
778 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
779 return 0;
780
781err:
782 ftmac100_free_buffers(priv);
783 return -ENOMEM;
784}
785
786/******************************************************************************
787 * struct mii_if_info functions
788 *****************************************************************************/
789static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
790{
791 struct ftmac100 *priv = netdev_priv(netdev);
792 unsigned int phycr;
793 int i;
794
795 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
796 FTMAC100_PHYCR_REGAD(reg) |
797 FTMAC100_PHYCR_MIIRD;
798
799 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
800
801 for (i = 0; i < 10; i++) {
802 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
803
804 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
805 return phycr & FTMAC100_PHYCR_MIIRDATA;
806
807 udelay(100);
808 }
809
810 netdev_err(netdev, "mdio read timed out\n");
811 return 0;
812}
813
814static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
815 int data)
816{
817 struct ftmac100 *priv = netdev_priv(netdev);
818 unsigned int phycr;
819 int i;
820
821 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
822 FTMAC100_PHYCR_REGAD(reg) |
823 FTMAC100_PHYCR_MIIWR;
824
825 data = FTMAC100_PHYWDATA_MIIWDATA(data);
826
827 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
828 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
829
830 for (i = 0; i < 10; i++) {
831 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
832
833 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
834 return;
835
836 udelay(100);
837 }
838
839 netdev_err(netdev, "mdio write timed out\n");
840}
841
842/******************************************************************************
843 * struct ethtool_ops functions
844 *****************************************************************************/
845static void ftmac100_get_drvinfo(struct net_device *netdev,
846 struct ethtool_drvinfo *info)
847{
848 strscpy(info->driver, DRV_NAME, sizeof(info->driver));
849 strscpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
850}
851
852static int ftmac100_get_link_ksettings(struct net_device *netdev,
853 struct ethtool_link_ksettings *cmd)
854{
855 struct ftmac100 *priv = netdev_priv(netdev);
856
857 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
858
859 return 0;
860}
861
862static int ftmac100_set_link_ksettings(struct net_device *netdev,
863 const struct ethtool_link_ksettings *cmd)
864{
865 struct ftmac100 *priv = netdev_priv(netdev);
866 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
867}
868
869static int ftmac100_nway_reset(struct net_device *netdev)
870{
871 struct ftmac100 *priv = netdev_priv(netdev);
872 return mii_nway_restart(&priv->mii);
873}
874
875static u32 ftmac100_get_link(struct net_device *netdev)
876{
877 struct ftmac100 *priv = netdev_priv(netdev);
878 return mii_link_ok(&priv->mii);
879}
880
881static const struct ethtool_ops ftmac100_ethtool_ops = {
882 .get_drvinfo = ftmac100_get_drvinfo,
883 .nway_reset = ftmac100_nway_reset,
884 .get_link = ftmac100_get_link,
885 .get_link_ksettings = ftmac100_get_link_ksettings,
886 .set_link_ksettings = ftmac100_set_link_ksettings,
887};
888
889/******************************************************************************
890 * interrupt handler
891 *****************************************************************************/
892static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
893{
894 struct net_device *netdev = dev_id;
895 struct ftmac100 *priv = netdev_priv(netdev);
896
897 /* Disable interrupts for polling */
898 ftmac100_disable_all_int(priv);
899 if (likely(netif_running(netdev)))
900 napi_schedule(&priv->napi);
901
902 return IRQ_HANDLED;
903}
904
905/******************************************************************************
906 * struct napi_struct functions
907 *****************************************************************************/
908static int ftmac100_poll(struct napi_struct *napi, int budget)
909{
910 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
911 struct net_device *netdev = priv->netdev;
912 unsigned int status;
913 bool completed = true;
914 int rx = 0;
915
916 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
917
918 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
919 /*
920 * FTMAC100_INT_RPKT_FINISH:
921 * RX DMA has received packets into RX buffer successfully
922 *
923 * FTMAC100_INT_NORXBUF:
924 * RX buffer unavailable
925 */
926 bool retry;
927
928 do {
929 retry = ftmac100_rx_packet(priv, &rx);
930 } while (retry && rx < budget);
931
932 if (retry && rx == budget)
933 completed = false;
934 }
935
936 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
937 /*
938 * FTMAC100_INT_XPKT_OK:
939 * packet transmitted to ethernet successfully
940 *
941 * FTMAC100_INT_XPKT_LOST:
942 * packet transmitted to ethernet lost due to late
943 * collision or excessive collision
944 */
945 ftmac100_tx_complete(priv);
946 }
947
948 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
949 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
950 if (net_ratelimit())
951 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
952 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
953 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
954 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
955 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
956
957 if (status & FTMAC100_INT_NORXBUF) {
958 /* RX buffer unavailable */
959 netdev->stats.rx_over_errors++;
960 }
961
962 if (status & FTMAC100_INT_RPKT_LOST) {
963 /* received packet lost due to RX FIFO full */
964 netdev->stats.rx_fifo_errors++;
965 }
966
967 if (status & FTMAC100_INT_PHYSTS_CHG) {
968 /* PHY link status change */
969 mii_check_link(&priv->mii);
970 }
971 }
972
973 if (completed) {
974 /* stop polling */
975 napi_complete(napi);
976 ftmac100_enable_all_int(priv);
977 }
978
979 return rx;
980}
981
982/******************************************************************************
983 * struct net_device_ops functions
984 *****************************************************************************/
985static int ftmac100_open(struct net_device *netdev)
986{
987 struct ftmac100 *priv = netdev_priv(netdev);
988 int err;
989
990 err = ftmac100_alloc_buffers(priv);
991 if (err) {
992 netdev_err(netdev, "failed to allocate buffers\n");
993 goto err_alloc;
994 }
995
996 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
997 if (err) {
998 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
999 goto err_irq;
1000 }
1001
1002 priv->rx_pointer = 0;
1003 priv->tx_clean_pointer = 0;
1004 priv->tx_pointer = 0;
1005 priv->tx_pending = 0;
1006
1007 err = ftmac100_start_hw(priv);
1008 if (err)
1009 goto err_hw;
1010
1011 napi_enable(&priv->napi);
1012 netif_start_queue(netdev);
1013
1014 ftmac100_enable_all_int(priv);
1015
1016 return 0;
1017
1018err_hw:
1019 free_irq(priv->irq, netdev);
1020err_irq:
1021 ftmac100_free_buffers(priv);
1022err_alloc:
1023 return err;
1024}
1025
1026static int ftmac100_stop(struct net_device *netdev)
1027{
1028 struct ftmac100 *priv = netdev_priv(netdev);
1029
1030 ftmac100_disable_all_int(priv);
1031 netif_stop_queue(netdev);
1032 napi_disable(&priv->napi);
1033 ftmac100_stop_hw(priv);
1034 free_irq(priv->irq, netdev);
1035 ftmac100_free_buffers(priv);
1036
1037 return 0;
1038}
1039
1040static netdev_tx_t
1041ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1042{
1043 struct ftmac100 *priv = netdev_priv(netdev);
1044 dma_addr_t map;
1045
1046 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1047 if (net_ratelimit())
1048 netdev_dbg(netdev, "tx packet too big\n");
1049
1050 netdev->stats.tx_dropped++;
1051 dev_kfree_skb(skb);
1052 return NETDEV_TX_OK;
1053 }
1054
1055 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1056 if (unlikely(dma_mapping_error(priv->dev, map))) {
1057 /* drop packet */
1058 if (net_ratelimit())
1059 netdev_err(netdev, "map socket buffer failed\n");
1060
1061 netdev->stats.tx_dropped++;
1062 dev_kfree_skb(skb);
1063 return NETDEV_TX_OK;
1064 }
1065
1066 return ftmac100_xmit(priv, skb, map);
1067}
1068
1069/* optional */
1070static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1071{
1072 struct ftmac100 *priv = netdev_priv(netdev);
1073 struct mii_ioctl_data *data = if_mii(ifr);
1074
1075 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1076}
1077
1078static int ftmac100_change_mtu(struct net_device *netdev, int mtu)
1079{
1080 struct ftmac100 *priv = netdev_priv(netdev);
1081 unsigned int maccr;
1082
1083 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
1084 if (mtu > ETH_DATA_LEN) {
1085 /* process long packets in the driver */
1086 maccr |= FTMAC100_MACCR_RX_FTL;
1087 } else {
1088 /* Let the controller drop incoming packets greater
1089 * than 1518 (that is 1500 + 14 Ethernet + 4 FCS).
1090 */
1091 maccr &= ~FTMAC100_MACCR_RX_FTL;
1092 }
1093 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
1094
1095 netdev->mtu = mtu;
1096
1097 return 0;
1098}
1099
1100static void ftmac100_set_rx_mode(struct net_device *netdev)
1101{
1102 struct ftmac100 *priv = netdev_priv(netdev);
1103 unsigned int maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
1104
1105 ftmac100_set_rx_bits(priv, &maccr);
1106 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
1107}
1108
1109static const struct net_device_ops ftmac100_netdev_ops = {
1110 .ndo_open = ftmac100_open,
1111 .ndo_stop = ftmac100_stop,
1112 .ndo_start_xmit = ftmac100_hard_start_xmit,
1113 .ndo_set_mac_address = eth_mac_addr,
1114 .ndo_validate_addr = eth_validate_addr,
1115 .ndo_eth_ioctl = ftmac100_do_ioctl,
1116 .ndo_change_mtu = ftmac100_change_mtu,
1117 .ndo_set_rx_mode = ftmac100_set_rx_mode,
1118};
1119
1120/******************************************************************************
1121 * struct platform_driver functions
1122 *****************************************************************************/
1123static int ftmac100_probe(struct platform_device *pdev)
1124{
1125 struct resource *res;
1126 int irq;
1127 struct net_device *netdev;
1128 struct ftmac100 *priv;
1129 int err;
1130
1131 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1132 if (!res)
1133 return -ENXIO;
1134
1135 irq = platform_get_irq(pdev, 0);
1136 if (irq < 0)
1137 return irq;
1138
1139 /* setup net_device */
1140 netdev = alloc_etherdev(sizeof(*priv));
1141 if (!netdev) {
1142 err = -ENOMEM;
1143 goto err_alloc_etherdev;
1144 }
1145
1146 SET_NETDEV_DEV(netdev, &pdev->dev);
1147 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1148 netdev->netdev_ops = &ftmac100_netdev_ops;
1149 netdev->max_mtu = MAX_PKT_SIZE - VLAN_ETH_HLEN;
1150
1151 err = platform_get_ethdev_address(&pdev->dev, netdev);
1152 if (err == -EPROBE_DEFER)
1153 goto defer_get_mac;
1154
1155 platform_set_drvdata(pdev, netdev);
1156
1157 /* setup private data */
1158 priv = netdev_priv(netdev);
1159 priv->netdev = netdev;
1160 priv->dev = &pdev->dev;
1161
1162 spin_lock_init(&priv->tx_lock);
1163
1164 /* initialize NAPI */
1165 netif_napi_add(netdev, &priv->napi, ftmac100_poll);
1166
1167 /* map io memory */
1168 priv->res = request_mem_region(res->start, resource_size(res),
1169 dev_name(&pdev->dev));
1170 if (!priv->res) {
1171 dev_err(&pdev->dev, "Could not reserve memory region\n");
1172 err = -ENOMEM;
1173 goto err_req_mem;
1174 }
1175
1176 priv->base = ioremap(res->start, resource_size(res));
1177 if (!priv->base) {
1178 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1179 err = -EIO;
1180 goto err_ioremap;
1181 }
1182
1183 priv->irq = irq;
1184
1185 /* initialize struct mii_if_info */
1186 priv->mii.phy_id = 0;
1187 priv->mii.phy_id_mask = 0x1f;
1188 priv->mii.reg_num_mask = 0x1f;
1189 priv->mii.dev = netdev;
1190 priv->mii.mdio_read = ftmac100_mdio_read;
1191 priv->mii.mdio_write = ftmac100_mdio_write;
1192
1193 /* register network device */
1194 err = register_netdev(netdev);
1195 if (err) {
1196 dev_err(&pdev->dev, "Failed to register netdev\n");
1197 goto err_register_netdev;
1198 }
1199
1200 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1201
1202 if (!is_valid_ether_addr(netdev->dev_addr)) {
1203 eth_hw_addr_random(netdev);
1204 netdev_info(netdev, "generated random MAC address %pM\n",
1205 netdev->dev_addr);
1206 }
1207
1208 return 0;
1209
1210err_register_netdev:
1211 iounmap(priv->base);
1212err_ioremap:
1213 release_resource(priv->res);
1214err_req_mem:
1215 netif_napi_del(&priv->napi);
1216defer_get_mac:
1217 free_netdev(netdev);
1218err_alloc_etherdev:
1219 return err;
1220}
1221
1222static void ftmac100_remove(struct platform_device *pdev)
1223{
1224 struct net_device *netdev;
1225 struct ftmac100 *priv;
1226
1227 netdev = platform_get_drvdata(pdev);
1228 priv = netdev_priv(netdev);
1229
1230 unregister_netdev(netdev);
1231
1232 iounmap(priv->base);
1233 release_resource(priv->res);
1234
1235 netif_napi_del(&priv->napi);
1236 free_netdev(netdev);
1237}
1238
1239static const struct of_device_id ftmac100_of_ids[] = {
1240 { .compatible = "andestech,atmac100" },
1241 { }
1242};
1243
1244static struct platform_driver ftmac100_driver = {
1245 .probe = ftmac100_probe,
1246 .remove_new = ftmac100_remove,
1247 .driver = {
1248 .name = DRV_NAME,
1249 .of_match_table = ftmac100_of_ids
1250 },
1251};
1252
1253/******************************************************************************
1254 * initialization / finalization
1255 *****************************************************************************/
1256module_platform_driver(ftmac100_driver);
1257
1258MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1259MODULE_DESCRIPTION("FTMAC100 driver");
1260MODULE_LICENSE("GPL");
1261MODULE_DEVICE_TABLE(of, ftmac100_of_ids);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Faraday FTMAC100 10/100 Ethernet
4 *
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 */
8
9#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10
11#include <linux/dma-mapping.h>
12#include <linux/etherdevice.h>
13#include <linux/ethtool.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/io.h>
17#include <linux/mii.h>
18#include <linux/module.h>
19#include <linux/mod_devicetable.h>
20#include <linux/netdevice.h>
21#include <linux/platform_device.h>
22
23#include "ftmac100.h"
24
25#define DRV_NAME "ftmac100"
26
27#define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
28#define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
29
30#define MAX_PKT_SIZE 1518
31#define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
32
33#if MAX_PKT_SIZE > 0x7ff
34#error invalid MAX_PKT_SIZE
35#endif
36
37#if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
38#error invalid RX_BUF_SIZE
39#endif
40
41/******************************************************************************
42 * private data
43 *****************************************************************************/
44struct ftmac100_descs {
45 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
46 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
47};
48
49struct ftmac100 {
50 struct resource *res;
51 void __iomem *base;
52 int irq;
53
54 struct ftmac100_descs *descs;
55 dma_addr_t descs_dma_addr;
56
57 unsigned int rx_pointer;
58 unsigned int tx_clean_pointer;
59 unsigned int tx_pointer;
60 unsigned int tx_pending;
61
62 spinlock_t tx_lock;
63
64 struct net_device *netdev;
65 struct device *dev;
66 struct napi_struct napi;
67
68 struct mii_if_info mii;
69};
70
71static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
72 struct ftmac100_rxdes *rxdes, gfp_t gfp);
73
74/******************************************************************************
75 * internal functions (hardware register access)
76 *****************************************************************************/
77#define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
78 FTMAC100_INT_NORXBUF | \
79 FTMAC100_INT_XPKT_OK | \
80 FTMAC100_INT_XPKT_LOST | \
81 FTMAC100_INT_RPKT_LOST | \
82 FTMAC100_INT_AHB_ERR | \
83 FTMAC100_INT_PHYSTS_CHG)
84
85#define INT_MASK_ALL_DISABLED 0
86
87static void ftmac100_enable_all_int(struct ftmac100 *priv)
88{
89 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
90}
91
92static void ftmac100_disable_all_int(struct ftmac100 *priv)
93{
94 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
95}
96
97static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
98{
99 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
100}
101
102static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
103{
104 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
105}
106
107static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
108{
109 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
110}
111
112static int ftmac100_reset(struct ftmac100 *priv)
113{
114 struct net_device *netdev = priv->netdev;
115 int i;
116
117 /* NOTE: reset clears all registers */
118 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
119
120 for (i = 0; i < 5; i++) {
121 unsigned int maccr;
122
123 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
124 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
125 /*
126 * FTMAC100_MACCR_SW_RST cleared does not indicate
127 * that hardware reset completed (what the f*ck).
128 * We still need to wait for a while.
129 */
130 udelay(500);
131 return 0;
132 }
133
134 udelay(1000);
135 }
136
137 netdev_err(netdev, "software reset failed\n");
138 return -EIO;
139}
140
141static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
142{
143 unsigned int maddr = mac[0] << 8 | mac[1];
144 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
145
146 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
147 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
148}
149
150#define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
151 FTMAC100_MACCR_RCV_EN | \
152 FTMAC100_MACCR_XDMA_EN | \
153 FTMAC100_MACCR_RDMA_EN | \
154 FTMAC100_MACCR_CRC_APD | \
155 FTMAC100_MACCR_FULLDUP | \
156 FTMAC100_MACCR_RX_RUNT | \
157 FTMAC100_MACCR_RX_BROADPKT)
158
159static int ftmac100_start_hw(struct ftmac100 *priv)
160{
161 struct net_device *netdev = priv->netdev;
162
163 if (ftmac100_reset(priv))
164 return -EIO;
165
166 /* setup ring buffer base registers */
167 ftmac100_set_rx_ring_base(priv,
168 priv->descs_dma_addr +
169 offsetof(struct ftmac100_descs, rxdes));
170 ftmac100_set_tx_ring_base(priv,
171 priv->descs_dma_addr +
172 offsetof(struct ftmac100_descs, txdes));
173
174 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
175
176 ftmac100_set_mac(priv, netdev->dev_addr);
177
178 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
179 return 0;
180}
181
182static void ftmac100_stop_hw(struct ftmac100 *priv)
183{
184 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
185}
186
187/******************************************************************************
188 * internal functions (receive descriptor)
189 *****************************************************************************/
190static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
191{
192 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
193}
194
195static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
196{
197 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
198}
199
200static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
201{
202 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
203}
204
205static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
206{
207 /* clear status bits */
208 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
209}
210
211static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
212{
213 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
214}
215
216static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
217{
218 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
219}
220
221static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
222{
223 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
224}
225
226static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
227{
228 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
229}
230
231static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
232{
233 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
234}
235
236static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
237{
238 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
239}
240
241static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
242{
243 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
244}
245
246static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
247 unsigned int size)
248{
249 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
250 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
251}
252
253static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
254{
255 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
256}
257
258static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
259 dma_addr_t addr)
260{
261 rxdes->rxdes2 = cpu_to_le32(addr);
262}
263
264static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
265{
266 return le32_to_cpu(rxdes->rxdes2);
267}
268
269/*
270 * rxdes3 is not used by hardware. We use it to keep track of page.
271 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
272 */
273static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
274{
275 rxdes->rxdes3 = (unsigned int)page;
276}
277
278static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
279{
280 return (struct page *)rxdes->rxdes3;
281}
282
283/******************************************************************************
284 * internal functions (receive)
285 *****************************************************************************/
286static int ftmac100_next_rx_pointer(int pointer)
287{
288 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
289}
290
291static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
292{
293 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
294}
295
296static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
297{
298 return &priv->descs->rxdes[priv->rx_pointer];
299}
300
301static struct ftmac100_rxdes *
302ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
303{
304 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
305
306 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
307 if (ftmac100_rxdes_first_segment(rxdes))
308 return rxdes;
309
310 ftmac100_rxdes_set_dma_own(rxdes);
311 ftmac100_rx_pointer_advance(priv);
312 rxdes = ftmac100_current_rxdes(priv);
313 }
314
315 return NULL;
316}
317
318static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
319 struct ftmac100_rxdes *rxdes)
320{
321 struct net_device *netdev = priv->netdev;
322 bool error = false;
323
324 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
325 if (net_ratelimit())
326 netdev_info(netdev, "rx err\n");
327
328 netdev->stats.rx_errors++;
329 error = true;
330 }
331
332 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
333 if (net_ratelimit())
334 netdev_info(netdev, "rx crc err\n");
335
336 netdev->stats.rx_crc_errors++;
337 error = true;
338 }
339
340 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
341 if (net_ratelimit())
342 netdev_info(netdev, "rx frame too long\n");
343
344 netdev->stats.rx_length_errors++;
345 error = true;
346 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
347 if (net_ratelimit())
348 netdev_info(netdev, "rx runt\n");
349
350 netdev->stats.rx_length_errors++;
351 error = true;
352 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
353 if (net_ratelimit())
354 netdev_info(netdev, "rx odd nibble\n");
355
356 netdev->stats.rx_length_errors++;
357 error = true;
358 }
359
360 return error;
361}
362
363static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
364{
365 struct net_device *netdev = priv->netdev;
366 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
367 bool done = false;
368
369 if (net_ratelimit())
370 netdev_dbg(netdev, "drop packet %p\n", rxdes);
371
372 do {
373 if (ftmac100_rxdes_last_segment(rxdes))
374 done = true;
375
376 ftmac100_rxdes_set_dma_own(rxdes);
377 ftmac100_rx_pointer_advance(priv);
378 rxdes = ftmac100_current_rxdes(priv);
379 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
380
381 netdev->stats.rx_dropped++;
382}
383
384static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
385{
386 struct net_device *netdev = priv->netdev;
387 struct ftmac100_rxdes *rxdes;
388 struct sk_buff *skb;
389 struct page *page;
390 dma_addr_t map;
391 int length;
392 bool ret;
393
394 rxdes = ftmac100_rx_locate_first_segment(priv);
395 if (!rxdes)
396 return false;
397
398 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
399 ftmac100_rx_drop_packet(priv);
400 return true;
401 }
402
403 /*
404 * It is impossible to get multi-segment packets
405 * because we always provide big enough receive buffers.
406 */
407 ret = ftmac100_rxdes_last_segment(rxdes);
408 BUG_ON(!ret);
409
410 /* start processing */
411 skb = netdev_alloc_skb_ip_align(netdev, 128);
412 if (unlikely(!skb)) {
413 if (net_ratelimit())
414 netdev_err(netdev, "rx skb alloc failed\n");
415
416 ftmac100_rx_drop_packet(priv);
417 return true;
418 }
419
420 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
421 netdev->stats.multicast++;
422
423 map = ftmac100_rxdes_get_dma_addr(rxdes);
424 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
425
426 length = ftmac100_rxdes_frame_length(rxdes);
427 page = ftmac100_rxdes_get_page(rxdes);
428 skb_fill_page_desc(skb, 0, page, 0, length);
429 skb->len += length;
430 skb->data_len += length;
431
432 if (length > 128) {
433 skb->truesize += PAGE_SIZE;
434 /* We pull the minimum amount into linear part */
435 __pskb_pull_tail(skb, ETH_HLEN);
436 } else {
437 /* Small frames are copied into linear part to free one page */
438 __pskb_pull_tail(skb, length);
439 }
440 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
441
442 ftmac100_rx_pointer_advance(priv);
443
444 skb->protocol = eth_type_trans(skb, netdev);
445
446 netdev->stats.rx_packets++;
447 netdev->stats.rx_bytes += skb->len;
448
449 /* push packet to protocol stack */
450 netif_receive_skb(skb);
451
452 (*processed)++;
453 return true;
454}
455
456/******************************************************************************
457 * internal functions (transmit descriptor)
458 *****************************************************************************/
459static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
460{
461 /* clear all except end of ring bit */
462 txdes->txdes0 = 0;
463 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
464 txdes->txdes2 = 0;
465 txdes->txdes3 = 0;
466}
467
468static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
469{
470 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
471}
472
473static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
474{
475 /*
476 * Make sure dma own bit will not be set before any other
477 * descriptor fields.
478 */
479 wmb();
480 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
481}
482
483static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
484{
485 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
486}
487
488static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
489{
490 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
491}
492
493static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
494{
495 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
496}
497
498static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
499{
500 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
501}
502
503static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
504{
505 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
506}
507
508static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
509{
510 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
511}
512
513static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
514 unsigned int len)
515{
516 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
517}
518
519static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
520 dma_addr_t addr)
521{
522 txdes->txdes2 = cpu_to_le32(addr);
523}
524
525static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
526{
527 return le32_to_cpu(txdes->txdes2);
528}
529
530/*
531 * txdes3 is not used by hardware. We use it to keep track of socket buffer.
532 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
533 */
534static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
535{
536 txdes->txdes3 = (unsigned int)skb;
537}
538
539static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
540{
541 return (struct sk_buff *)txdes->txdes3;
542}
543
544/******************************************************************************
545 * internal functions (transmit)
546 *****************************************************************************/
547static int ftmac100_next_tx_pointer(int pointer)
548{
549 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
550}
551
552static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
553{
554 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
555}
556
557static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
558{
559 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
560}
561
562static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
563{
564 return &priv->descs->txdes[priv->tx_pointer];
565}
566
567static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
568{
569 return &priv->descs->txdes[priv->tx_clean_pointer];
570}
571
572static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
573{
574 struct net_device *netdev = priv->netdev;
575 struct ftmac100_txdes *txdes;
576 struct sk_buff *skb;
577 dma_addr_t map;
578
579 if (priv->tx_pending == 0)
580 return false;
581
582 txdes = ftmac100_current_clean_txdes(priv);
583
584 if (ftmac100_txdes_owned_by_dma(txdes))
585 return false;
586
587 skb = ftmac100_txdes_get_skb(txdes);
588 map = ftmac100_txdes_get_dma_addr(txdes);
589
590 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
591 ftmac100_txdes_late_collision(txdes))) {
592 /*
593 * packet transmitted to ethernet lost due to late collision
594 * or excessive collision
595 */
596 netdev->stats.tx_aborted_errors++;
597 } else {
598 netdev->stats.tx_packets++;
599 netdev->stats.tx_bytes += skb->len;
600 }
601
602 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
603 dev_kfree_skb(skb);
604
605 ftmac100_txdes_reset(txdes);
606
607 ftmac100_tx_clean_pointer_advance(priv);
608
609 spin_lock(&priv->tx_lock);
610 priv->tx_pending--;
611 spin_unlock(&priv->tx_lock);
612 netif_wake_queue(netdev);
613
614 return true;
615}
616
617static void ftmac100_tx_complete(struct ftmac100 *priv)
618{
619 while (ftmac100_tx_complete_packet(priv))
620 ;
621}
622
623static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
624 dma_addr_t map)
625{
626 struct net_device *netdev = priv->netdev;
627 struct ftmac100_txdes *txdes;
628 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
629
630 txdes = ftmac100_current_txdes(priv);
631 ftmac100_tx_pointer_advance(priv);
632
633 /* setup TX descriptor */
634 ftmac100_txdes_set_skb(txdes, skb);
635 ftmac100_txdes_set_dma_addr(txdes, map);
636
637 ftmac100_txdes_set_first_segment(txdes);
638 ftmac100_txdes_set_last_segment(txdes);
639 ftmac100_txdes_set_txint(txdes);
640 ftmac100_txdes_set_buffer_size(txdes, len);
641
642 spin_lock(&priv->tx_lock);
643 priv->tx_pending++;
644 if (priv->tx_pending == TX_QUEUE_ENTRIES)
645 netif_stop_queue(netdev);
646
647 /* start transmit */
648 ftmac100_txdes_set_dma_own(txdes);
649 spin_unlock(&priv->tx_lock);
650
651 ftmac100_txdma_start_polling(priv);
652 return NETDEV_TX_OK;
653}
654
655/******************************************************************************
656 * internal functions (buffer)
657 *****************************************************************************/
658static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
659 struct ftmac100_rxdes *rxdes, gfp_t gfp)
660{
661 struct net_device *netdev = priv->netdev;
662 struct page *page;
663 dma_addr_t map;
664
665 page = alloc_page(gfp);
666 if (!page) {
667 if (net_ratelimit())
668 netdev_err(netdev, "failed to allocate rx page\n");
669 return -ENOMEM;
670 }
671
672 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
673 if (unlikely(dma_mapping_error(priv->dev, map))) {
674 if (net_ratelimit())
675 netdev_err(netdev, "failed to map rx page\n");
676 __free_page(page);
677 return -ENOMEM;
678 }
679
680 ftmac100_rxdes_set_page(rxdes, page);
681 ftmac100_rxdes_set_dma_addr(rxdes, map);
682 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
683 ftmac100_rxdes_set_dma_own(rxdes);
684 return 0;
685}
686
687static void ftmac100_free_buffers(struct ftmac100 *priv)
688{
689 int i;
690
691 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
692 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
693 struct page *page = ftmac100_rxdes_get_page(rxdes);
694 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
695
696 if (!page)
697 continue;
698
699 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
700 __free_page(page);
701 }
702
703 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
704 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
705 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
706 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
707
708 if (!skb)
709 continue;
710
711 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
712 dev_kfree_skb(skb);
713 }
714
715 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
716 priv->descs, priv->descs_dma_addr);
717}
718
719static int ftmac100_alloc_buffers(struct ftmac100 *priv)
720{
721 int i;
722
723 priv->descs = dma_alloc_coherent(priv->dev,
724 sizeof(struct ftmac100_descs),
725 &priv->descs_dma_addr, GFP_KERNEL);
726 if (!priv->descs)
727 return -ENOMEM;
728
729 /* initialize RX ring */
730 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
731
732 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
733 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
734
735 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
736 goto err;
737 }
738
739 /* initialize TX ring */
740 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
741 return 0;
742
743err:
744 ftmac100_free_buffers(priv);
745 return -ENOMEM;
746}
747
748/******************************************************************************
749 * struct mii_if_info functions
750 *****************************************************************************/
751static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
752{
753 struct ftmac100 *priv = netdev_priv(netdev);
754 unsigned int phycr;
755 int i;
756
757 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
758 FTMAC100_PHYCR_REGAD(reg) |
759 FTMAC100_PHYCR_MIIRD;
760
761 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
762
763 for (i = 0; i < 10; i++) {
764 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
765
766 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
767 return phycr & FTMAC100_PHYCR_MIIRDATA;
768
769 udelay(100);
770 }
771
772 netdev_err(netdev, "mdio read timed out\n");
773 return 0;
774}
775
776static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
777 int data)
778{
779 struct ftmac100 *priv = netdev_priv(netdev);
780 unsigned int phycr;
781 int i;
782
783 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
784 FTMAC100_PHYCR_REGAD(reg) |
785 FTMAC100_PHYCR_MIIWR;
786
787 data = FTMAC100_PHYWDATA_MIIWDATA(data);
788
789 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
790 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
791
792 for (i = 0; i < 10; i++) {
793 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
794
795 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
796 return;
797
798 udelay(100);
799 }
800
801 netdev_err(netdev, "mdio write timed out\n");
802}
803
804/******************************************************************************
805 * struct ethtool_ops functions
806 *****************************************************************************/
807static void ftmac100_get_drvinfo(struct net_device *netdev,
808 struct ethtool_drvinfo *info)
809{
810 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
811 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
812}
813
814static int ftmac100_get_link_ksettings(struct net_device *netdev,
815 struct ethtool_link_ksettings *cmd)
816{
817 struct ftmac100 *priv = netdev_priv(netdev);
818
819 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
820
821 return 0;
822}
823
824static int ftmac100_set_link_ksettings(struct net_device *netdev,
825 const struct ethtool_link_ksettings *cmd)
826{
827 struct ftmac100 *priv = netdev_priv(netdev);
828 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
829}
830
831static int ftmac100_nway_reset(struct net_device *netdev)
832{
833 struct ftmac100 *priv = netdev_priv(netdev);
834 return mii_nway_restart(&priv->mii);
835}
836
837static u32 ftmac100_get_link(struct net_device *netdev)
838{
839 struct ftmac100 *priv = netdev_priv(netdev);
840 return mii_link_ok(&priv->mii);
841}
842
843static const struct ethtool_ops ftmac100_ethtool_ops = {
844 .get_drvinfo = ftmac100_get_drvinfo,
845 .nway_reset = ftmac100_nway_reset,
846 .get_link = ftmac100_get_link,
847 .get_link_ksettings = ftmac100_get_link_ksettings,
848 .set_link_ksettings = ftmac100_set_link_ksettings,
849};
850
851/******************************************************************************
852 * interrupt handler
853 *****************************************************************************/
854static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
855{
856 struct net_device *netdev = dev_id;
857 struct ftmac100 *priv = netdev_priv(netdev);
858
859 /* Disable interrupts for polling */
860 ftmac100_disable_all_int(priv);
861 if (likely(netif_running(netdev)))
862 napi_schedule(&priv->napi);
863
864 return IRQ_HANDLED;
865}
866
867/******************************************************************************
868 * struct napi_struct functions
869 *****************************************************************************/
870static int ftmac100_poll(struct napi_struct *napi, int budget)
871{
872 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
873 struct net_device *netdev = priv->netdev;
874 unsigned int status;
875 bool completed = true;
876 int rx = 0;
877
878 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
879
880 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
881 /*
882 * FTMAC100_INT_RPKT_FINISH:
883 * RX DMA has received packets into RX buffer successfully
884 *
885 * FTMAC100_INT_NORXBUF:
886 * RX buffer unavailable
887 */
888 bool retry;
889
890 do {
891 retry = ftmac100_rx_packet(priv, &rx);
892 } while (retry && rx < budget);
893
894 if (retry && rx == budget)
895 completed = false;
896 }
897
898 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
899 /*
900 * FTMAC100_INT_XPKT_OK:
901 * packet transmitted to ethernet successfully
902 *
903 * FTMAC100_INT_XPKT_LOST:
904 * packet transmitted to ethernet lost due to late
905 * collision or excessive collision
906 */
907 ftmac100_tx_complete(priv);
908 }
909
910 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
911 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
912 if (net_ratelimit())
913 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
914 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
915 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
916 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
917 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
918
919 if (status & FTMAC100_INT_NORXBUF) {
920 /* RX buffer unavailable */
921 netdev->stats.rx_over_errors++;
922 }
923
924 if (status & FTMAC100_INT_RPKT_LOST) {
925 /* received packet lost due to RX FIFO full */
926 netdev->stats.rx_fifo_errors++;
927 }
928
929 if (status & FTMAC100_INT_PHYSTS_CHG) {
930 /* PHY link status change */
931 mii_check_link(&priv->mii);
932 }
933 }
934
935 if (completed) {
936 /* stop polling */
937 napi_complete(napi);
938 ftmac100_enable_all_int(priv);
939 }
940
941 return rx;
942}
943
944/******************************************************************************
945 * struct net_device_ops functions
946 *****************************************************************************/
947static int ftmac100_open(struct net_device *netdev)
948{
949 struct ftmac100 *priv = netdev_priv(netdev);
950 int err;
951
952 err = ftmac100_alloc_buffers(priv);
953 if (err) {
954 netdev_err(netdev, "failed to allocate buffers\n");
955 goto err_alloc;
956 }
957
958 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
959 if (err) {
960 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
961 goto err_irq;
962 }
963
964 priv->rx_pointer = 0;
965 priv->tx_clean_pointer = 0;
966 priv->tx_pointer = 0;
967 priv->tx_pending = 0;
968
969 err = ftmac100_start_hw(priv);
970 if (err)
971 goto err_hw;
972
973 napi_enable(&priv->napi);
974 netif_start_queue(netdev);
975
976 ftmac100_enable_all_int(priv);
977
978 return 0;
979
980err_hw:
981 free_irq(priv->irq, netdev);
982err_irq:
983 ftmac100_free_buffers(priv);
984err_alloc:
985 return err;
986}
987
988static int ftmac100_stop(struct net_device *netdev)
989{
990 struct ftmac100 *priv = netdev_priv(netdev);
991
992 ftmac100_disable_all_int(priv);
993 netif_stop_queue(netdev);
994 napi_disable(&priv->napi);
995 ftmac100_stop_hw(priv);
996 free_irq(priv->irq, netdev);
997 ftmac100_free_buffers(priv);
998
999 return 0;
1000}
1001
1002static netdev_tx_t
1003ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1004{
1005 struct ftmac100 *priv = netdev_priv(netdev);
1006 dma_addr_t map;
1007
1008 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1009 if (net_ratelimit())
1010 netdev_dbg(netdev, "tx packet too big\n");
1011
1012 netdev->stats.tx_dropped++;
1013 dev_kfree_skb(skb);
1014 return NETDEV_TX_OK;
1015 }
1016
1017 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1018 if (unlikely(dma_mapping_error(priv->dev, map))) {
1019 /* drop packet */
1020 if (net_ratelimit())
1021 netdev_err(netdev, "map socket buffer failed\n");
1022
1023 netdev->stats.tx_dropped++;
1024 dev_kfree_skb(skb);
1025 return NETDEV_TX_OK;
1026 }
1027
1028 return ftmac100_xmit(priv, skb, map);
1029}
1030
1031/* optional */
1032static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1033{
1034 struct ftmac100 *priv = netdev_priv(netdev);
1035 struct mii_ioctl_data *data = if_mii(ifr);
1036
1037 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1038}
1039
1040static const struct net_device_ops ftmac100_netdev_ops = {
1041 .ndo_open = ftmac100_open,
1042 .ndo_stop = ftmac100_stop,
1043 .ndo_start_xmit = ftmac100_hard_start_xmit,
1044 .ndo_set_mac_address = eth_mac_addr,
1045 .ndo_validate_addr = eth_validate_addr,
1046 .ndo_do_ioctl = ftmac100_do_ioctl,
1047};
1048
1049/******************************************************************************
1050 * struct platform_driver functions
1051 *****************************************************************************/
1052static int ftmac100_probe(struct platform_device *pdev)
1053{
1054 struct resource *res;
1055 int irq;
1056 struct net_device *netdev;
1057 struct ftmac100 *priv;
1058 int err;
1059
1060 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1061 if (!res)
1062 return -ENXIO;
1063
1064 irq = platform_get_irq(pdev, 0);
1065 if (irq < 0)
1066 return irq;
1067
1068 /* setup net_device */
1069 netdev = alloc_etherdev(sizeof(*priv));
1070 if (!netdev) {
1071 err = -ENOMEM;
1072 goto err_alloc_etherdev;
1073 }
1074
1075 SET_NETDEV_DEV(netdev, &pdev->dev);
1076 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1077 netdev->netdev_ops = &ftmac100_netdev_ops;
1078
1079 platform_set_drvdata(pdev, netdev);
1080
1081 /* setup private data */
1082 priv = netdev_priv(netdev);
1083 priv->netdev = netdev;
1084 priv->dev = &pdev->dev;
1085
1086 spin_lock_init(&priv->tx_lock);
1087
1088 /* initialize NAPI */
1089 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
1090
1091 /* map io memory */
1092 priv->res = request_mem_region(res->start, resource_size(res),
1093 dev_name(&pdev->dev));
1094 if (!priv->res) {
1095 dev_err(&pdev->dev, "Could not reserve memory region\n");
1096 err = -ENOMEM;
1097 goto err_req_mem;
1098 }
1099
1100 priv->base = ioremap(res->start, resource_size(res));
1101 if (!priv->base) {
1102 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1103 err = -EIO;
1104 goto err_ioremap;
1105 }
1106
1107 priv->irq = irq;
1108
1109 /* initialize struct mii_if_info */
1110 priv->mii.phy_id = 0;
1111 priv->mii.phy_id_mask = 0x1f;
1112 priv->mii.reg_num_mask = 0x1f;
1113 priv->mii.dev = netdev;
1114 priv->mii.mdio_read = ftmac100_mdio_read;
1115 priv->mii.mdio_write = ftmac100_mdio_write;
1116
1117 /* register network device */
1118 err = register_netdev(netdev);
1119 if (err) {
1120 dev_err(&pdev->dev, "Failed to register netdev\n");
1121 goto err_register_netdev;
1122 }
1123
1124 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1125
1126 if (!is_valid_ether_addr(netdev->dev_addr)) {
1127 eth_hw_addr_random(netdev);
1128 netdev_info(netdev, "generated random MAC address %pM\n",
1129 netdev->dev_addr);
1130 }
1131
1132 return 0;
1133
1134err_register_netdev:
1135 iounmap(priv->base);
1136err_ioremap:
1137 release_resource(priv->res);
1138err_req_mem:
1139 netif_napi_del(&priv->napi);
1140 free_netdev(netdev);
1141err_alloc_etherdev:
1142 return err;
1143}
1144
1145static int ftmac100_remove(struct platform_device *pdev)
1146{
1147 struct net_device *netdev;
1148 struct ftmac100 *priv;
1149
1150 netdev = platform_get_drvdata(pdev);
1151 priv = netdev_priv(netdev);
1152
1153 unregister_netdev(netdev);
1154
1155 iounmap(priv->base);
1156 release_resource(priv->res);
1157
1158 netif_napi_del(&priv->napi);
1159 free_netdev(netdev);
1160 return 0;
1161}
1162
1163static const struct of_device_id ftmac100_of_ids[] = {
1164 { .compatible = "andestech,atmac100" },
1165 { }
1166};
1167
1168static struct platform_driver ftmac100_driver = {
1169 .probe = ftmac100_probe,
1170 .remove = ftmac100_remove,
1171 .driver = {
1172 .name = DRV_NAME,
1173 .of_match_table = ftmac100_of_ids
1174 },
1175};
1176
1177/******************************************************************************
1178 * initialization / finalization
1179 *****************************************************************************/
1180module_platform_driver(ftmac100_driver);
1181
1182MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1183MODULE_DESCRIPTION("FTMAC100 driver");
1184MODULE_LICENSE("GPL");
1185MODULE_DEVICE_TABLE(of, ftmac100_of_ids);