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v6.8
 1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
 2/*
 3 * Copyright(c) 2016 Intel Corporation.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 4 */
 5
 6#ifndef HFI1_SDMA_TXREQ_H
 7#define HFI1_SDMA_TXREQ_H
 8
 9/* increased for AHG */
10#define NUM_DESC 6
11
12/*
13 * struct sdma_desc - canonical fragment descriptor
14 *
15 * This is the descriptor carried in the tx request
16 * corresponding to each fragment.
17 *
18 */
19struct sdma_desc {
20	/* private:  don't use directly */
21	u64 qw[2];
22	void *pinning_ctx;
23	/* Release reference to @pinning_ctx. May be called in interrupt context. Must not sleep. */
24	void (*ctx_put)(void *ctx);
25};
26
27/**
28 * struct sdma_txreq - the sdma_txreq structure (one per packet)
29 * @list: for use by user and by queuing for wait
30 *
31 * This is the representation of a packet which consists of some
32 * number of fragments.   Storage is provided to within the structure.
33 * for all fragments.
34 *
35 * The storage for the descriptors are automatically extended as needed
36 * when the currently allocation is exceeded.
37 *
38 * The user (Verbs or PSM) may overload this structure with fields
39 * specific to their use by putting this struct first in their struct.
40 * The method of allocation of the overloaded structure is user dependent
41 *
42 * The list is the only public field in the structure.
43 *
44 */
45
46#define SDMA_TXREQ_S_OK        0
47#define SDMA_TXREQ_S_SENDERROR 1
48#define SDMA_TXREQ_S_ABORTED   2
49#define SDMA_TXREQ_S_SHUTDOWN  3
50
51/* flags bits */
52#define SDMA_TXREQ_F_URGENT       0x0001
53#define SDMA_TXREQ_F_AHG_COPY     0x0002
54#define SDMA_TXREQ_F_USE_AHG      0x0004
55#define SDMA_TXREQ_F_VIP          0x0010
56
57struct sdma_txreq;
58typedef void (*callback_t)(struct sdma_txreq *, int);
59
60struct iowait;
61struct sdma_txreq {
62	struct list_head list;
63	/* private: */
64	struct sdma_desc *descp;
65	/* private: */
66	void *coalesce_buf;
67	/* private: */
68	struct iowait *wait;
69	/* private: */
70	callback_t                  complete;
71#ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
72	u64 sn;
73#endif
74	/* private: - used in coalesce/pad processing */
75	u16                         packet_len;
76	/* private: - down-counted to trigger last */
77	u16                         tlen;
78	/* private: */
79	u16                         num_desc;
80	/* private: */
81	u16                         desc_limit;
82	/* private: */
83	u16                         next_descq_idx;
84	/* private: */
85	u16 coalesce_idx;
86	/* private: flags */
87	u16                         flags;
88	/* private: */
89	struct sdma_desc descs[NUM_DESC];
90};
91
92static inline int sdma_txreq_built(struct sdma_txreq *tx)
93{
94	return tx->num_desc;
95}
96
97#endif                          /* HFI1_SDMA_TXREQ_H */
v5.14.15
 
  1/*
  2 * Copyright(c) 2016 Intel Corporation.
  3 *
  4 * This file is provided under a dual BSD/GPLv2 license.  When using or
  5 * redistributing this file, you may do so under either license.
  6 *
  7 * GPL LICENSE SUMMARY
  8 *
  9 * This program is free software; you can redistribute it and/or modify
 10 * it under the terms of version 2 of the GNU General Public License as
 11 * published by the Free Software Foundation.
 12 *
 13 * This program is distributed in the hope that it will be useful, but
 14 * WITHOUT ANY WARRANTY; without even the implied warranty of
 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 16 * General Public License for more details.
 17 *
 18 * BSD LICENSE
 19 *
 20 * Redistribution and use in source and binary forms, with or without
 21 * modification, are permitted provided that the following conditions
 22 * are met:
 23 *
 24 *  - Redistributions of source code must retain the above copyright
 25 *    notice, this list of conditions and the following disclaimer.
 26 *  - Redistributions in binary form must reproduce the above copyright
 27 *    notice, this list of conditions and the following disclaimer in
 28 *    the documentation and/or other materials provided with the
 29 *    distribution.
 30 *  - Neither the name of Intel Corporation nor the names of its
 31 *    contributors may be used to endorse or promote products derived
 32 *    from this software without specific prior written permission.
 33 *
 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 45 *
 46 */
 47
 48#ifndef HFI1_SDMA_TXREQ_H
 49#define HFI1_SDMA_TXREQ_H
 50
 51/* increased for AHG */
 52#define NUM_DESC 6
 53
 54/*
 55 * struct sdma_desc - canonical fragment descriptor
 56 *
 57 * This is the descriptor carried in the tx request
 58 * corresponding to each fragment.
 59 *
 60 */
 61struct sdma_desc {
 62	/* private:  don't use directly */
 63	u64 qw[2];
 
 
 
 64};
 65
 66/**
 67 * struct sdma_txreq - the sdma_txreq structure (one per packet)
 68 * @list: for use by user and by queuing for wait
 69 *
 70 * This is the representation of a packet which consists of some
 71 * number of fragments.   Storage is provided to within the structure.
 72 * for all fragments.
 73 *
 74 * The storage for the descriptors are automatically extended as needed
 75 * when the currently allocation is exceeded.
 76 *
 77 * The user (Verbs or PSM) may overload this structure with fields
 78 * specific to their use by putting this struct first in their struct.
 79 * The method of allocation of the overloaded structure is user dependent
 80 *
 81 * The list is the only public field in the structure.
 82 *
 83 */
 84
 85#define SDMA_TXREQ_S_OK        0
 86#define SDMA_TXREQ_S_SENDERROR 1
 87#define SDMA_TXREQ_S_ABORTED   2
 88#define SDMA_TXREQ_S_SHUTDOWN  3
 89
 90/* flags bits */
 91#define SDMA_TXREQ_F_URGENT       0x0001
 92#define SDMA_TXREQ_F_AHG_COPY     0x0002
 93#define SDMA_TXREQ_F_USE_AHG      0x0004
 94#define SDMA_TXREQ_F_VIP          0x0010
 95
 96struct sdma_txreq;
 97typedef void (*callback_t)(struct sdma_txreq *, int);
 98
 99struct iowait;
100struct sdma_txreq {
101	struct list_head list;
102	/* private: */
103	struct sdma_desc *descp;
104	/* private: */
105	void *coalesce_buf;
106	/* private: */
107	struct iowait *wait;
108	/* private: */
109	callback_t                  complete;
110#ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
111	u64 sn;
112#endif
113	/* private: - used in coalesce/pad processing */
114	u16                         packet_len;
115	/* private: - down-counted to trigger last */
116	u16                         tlen;
117	/* private: */
118	u16                         num_desc;
119	/* private: */
120	u16                         desc_limit;
121	/* private: */
122	u16                         next_descq_idx;
123	/* private: */
124	u16 coalesce_idx;
125	/* private: flags */
126	u16                         flags;
127	/* private: */
128	struct sdma_desc descs[NUM_DESC];
129};
130
131static inline int sdma_txreq_built(struct sdma_txreq *tx)
132{
133	return tx->num_desc;
134}
135
136#endif                          /* HFI1_SDMA_TXREQ_H */