1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
  4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  5 */
  6
  7#ifndef _CORESIGHT_ETM_PERF_H
  8#define _CORESIGHT_ETM_PERF_H
  9
 10#include <linux/percpu-defs.h>
 11#include "coresight-priv.h"
 12
 13struct coresight_device;
 14struct cscfg_config_desc;
 15
 16/*
 17 * In both ETMv3 and v4 the maximum number of address comparator implentable
 18 * is 8.  The actual number is implementation specific and will be checked
 19 * when filters are applied.
 20 */
 21#define ETM_ADDR_CMP_MAX	8
 22
 23/**
 24 * struct etm_filter - single instruction range or start/stop configuration.
 25 * @start_addr:	The address to start tracing on.
 26 * @stop_addr:	The address to stop tracing on.
 27 * @type:	Is this a range or start/stop filter.
 28 */
 29struct etm_filter {
 30	unsigned long start_addr;
 31	unsigned long stop_addr;
 32	enum etm_addr_type type;
 33};
 34
 35/**
 36 * struct etm_filters - set of filters for a session
 37 * @etm_filter:	All the filters for this session.
 38 * @nr_filters:	Number of filters
 39 * @ssstatus:	Status of the start/stop logic.
 40 */
 41struct etm_filters {
 42	struct etm_filter	etm_filter[ETM_ADDR_CMP_MAX];
 43	unsigned int		nr_filters;
 44	bool			ssstatus;
 45};
 46
 47/**
 48 * struct etm_event_data - Coresight specifics associated to an event
 49 * @work:		Handle to free allocated memory outside IRQ context.
 50 * @mask:		Hold the CPU(s) this event was set for.
 51 * @aux_hwid_done:	Whether a CPU has emitted the TraceID packet or not.
 52 * @snk_config:		The sink configuration.
 53 * @cfg_hash:		The hash id of any coresight config selected.
 54 * @path:		An array of path, each slot for one CPU.
 55 */
 56struct etm_event_data {
 57	struct work_struct work;
 58	cpumask_t mask;
 59	cpumask_t aux_hwid_done;
 60	void *snk_config;
 61	u32 cfg_hash;
 62	struct list_head * __percpu *path;
 63};
 64
 65#if IS_ENABLED(CONFIG_CORESIGHT)
 66int etm_perf_symlink(struct coresight_device *csdev, bool link);
 67int etm_perf_add_symlink_sink(struct coresight_device *csdev);
 68void etm_perf_del_symlink_sink(struct coresight_device *csdev);
 69static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
 70{
 71	struct etm_event_data *data = perf_get_aux(handle);
 72
 73	if (data)
 74		return data->snk_config;
 75	return NULL;
 76}
 77int etm_perf_add_symlink_cscfg(struct device *dev,
 78			       struct cscfg_config_desc *config_desc);
 79void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc);
 80#else
 81static inline int etm_perf_symlink(struct coresight_device *csdev, bool link)
 82{ return -EINVAL; }
 83int etm_perf_add_symlink_sink(struct coresight_device *csdev)
 84{ return -EINVAL; }
 85void etm_perf_del_symlink_sink(struct coresight_device *csdev) {}
 86static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
 87{
 88	return NULL;
 89}
 90int etm_perf_add_symlink_cscfg(struct device *dev,
 91			       struct cscfg_config_desc *config_desc)
 92{ return -EINVAL; }
 93void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc) {}
 94
 95#endif /* CONFIG_CORESIGHT */
 96
 97int __init etm_perf_init(void);
 98void etm_perf_exit(void);
 99
100#endif

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
 5 */
 6
 7#ifndef _CORESIGHT_ETM_PERF_H
 8#define _CORESIGHT_ETM_PERF_H
 9
10#include <linux/percpu-defs.h>
11#include "coresight-priv.h"
12
13struct coresight_device;
 
14
15/*
16 * In both ETMv3 and v4 the maximum number of address comparator implentable
17 * is 8.  The actual number is implementation specific and will be checked
18 * when filters are applied.
19 */
20#define ETM_ADDR_CMP_MAX	8
21
22/**
23 * struct etm_filter - single instruction range or start/stop configuration.
24 * @start_addr:	The address to start tracing on.
25 * @stop_addr:	The address to stop tracing on.
26 * @type:	Is this a range or start/stop filter.
27 */
28struct etm_filter {
29	unsigned long start_addr;
30	unsigned long stop_addr;
31	enum etm_addr_type type;
32};
33
34/**
35 * struct etm_filters - set of filters for a session
36 * @etm_filter:	All the filters for this session.
37 * @nr_filters:	Number of filters
38 * @ssstatus:	Status of the start/stop logic.
39 */
40struct etm_filters {
41	struct etm_filter	etm_filter[ETM_ADDR_CMP_MAX];
42	unsigned int		nr_filters;
43	bool			ssstatus;
44};
45
46/**
47 * struct etm_event_data - Coresight specifics associated to an event
48 * @work:		Handle to free allocated memory outside IRQ context.
49 * @mask:		Hold the CPU(s) this event was set for.
 
50 * @snk_config:		The sink configuration.
 
51 * @path:		An array of path, each slot for one CPU.
52 */
53struct etm_event_data {
54	struct work_struct work;
55	cpumask_t mask;
 
56	void *snk_config;
 
57	struct list_head * __percpu *path;
58};
59
60#if IS_ENABLED(CONFIG_CORESIGHT)
61int etm_perf_symlink(struct coresight_device *csdev, bool link);
62int etm_perf_add_symlink_sink(struct coresight_device *csdev);
63void etm_perf_del_symlink_sink(struct coresight_device *csdev);
64static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
65{
66	struct etm_event_data *data = perf_get_aux(handle);
67
68	if (data)
69		return data->snk_config;
70	return NULL;
71}
 
 
 
72#else
73static inline int etm_perf_symlink(struct coresight_device *csdev, bool link)
74{ return -EINVAL; }
75int etm_perf_add_symlink_sink(struct coresight_device *csdev)
76{ return -EINVAL; }
77void etm_perf_del_symlink_sink(struct coresight_device *csdev) {}
78static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
79{
80	return NULL;
81}
 
 
 
 
82
83#endif /* CONFIG_CORESIGHT */
84
85int __init etm_perf_init(void);
86void __exit etm_perf_exit(void);
87
88#endif